Will Deacon 0cbad9c9df ARM: 7854/1: lockref: add support for lockless lockrefs using cmpxchg64 ... Our spinlocks are only 32-bit (2x16-bit tickets) and, on processors with 64-bit atomic instructions, cmpxchg64 makes use of the double-word exclusive accessors. This patch wires up the cmpxchg-based lockless lockref implementation for ARM. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2013-10-29 11:06:11 +00:00
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asm	ARM: 7854/1: lockref: add support for lockless lockrefs using cmpxchg64	2013-10-29 11:06:11 +00:00
debug	ARM: 7850/1: DEBUG_LL on efm32 SoCs	2013-10-29 11:06:04 +00:00
uapi/asm	ARM: 7791/1: a.out: remove partial a.out support	2013-07-26 12:02:10 +01:00