android/android_kernel_xiaomi_sm8450
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MIPS: Move 'gic_present' to common location.

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Move the global variable 'gic_present' to be defined in the file
'arch/mips/kernel/irq-gic.c' instead of defining it individually
for each platform making use of the GIC. Also change the type to
be an unsigned integer instead of signed.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
This commit is contained in:
Steven J. Hill 2013-04-10 16:27:04 -05:00 committed by Ralf Baechle
parent 451b001b05
commit ff86714fda
5 changed files with 3 additions and 5 deletions
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2
arch/mips/include/asm/gic.h
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@ -359,7 +359,7 @@ struct gic_shared_intr_map {
/* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */ /* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */
#define GIC_PIN_TO_VEC_OFFSET (1) #define GIC_PIN_TO_VEC_OFFSET (1)
extern int gic_present; extern unsigned int gic_present;
extern unsigned long _gic_base; extern unsigned long _gic_base;
extern unsigned int gic_irq_base; extern unsigned int gic_irq_base;
extern unsigned int gic_irq_flags[]; extern unsigned int gic_irq_flags[];

1
arch/mips/kernel/irq-gic.c
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@ -19,6 +19,7 @@
#include <linux/hardirq.h> #include <linux/hardirq.h>
#include <asm-generic/bitops/find.h> #include <asm-generic/bitops/find.h>
unsigned int gic_present;
unsigned long _gic_base; unsigned long _gic_base;
unsigned int gic_irq_base; unsigned int gic_irq_base;
unsigned int gic_irq_flags[GIC_NUM_INTRS]; unsigned int gic_irq_flags[GIC_NUM_INTRS];

3
arch/mips/kernel/smp-mt.c
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@ -34,6 +34,7 @@
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
#include <asm/mipsmtregs.h> #include <asm/mipsmtregs.h>
#include <asm/mips_mt.h> #include <asm/mips_mt.h>
#include <asm/gic.h>
static void __init smvp_copy_vpe_config(void) static void __init smvp_copy_vpe_config(void)
{ {
@ -151,8 +152,6 @@ static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
static void __cpuinit vsmp_init_secondary(void) static void __cpuinit vsmp_init_secondary(void)
{ {
#ifdef CONFIG_IRQ_GIC #ifdef CONFIG_IRQ_GIC
extern int gic_present;
/* This is Malta specific: IPI,performance and timer interrupts */ /* This is Malta specific: IPI,performance and timer interrupts */
if (gic_present) if (gic_present)
change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 | change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 |

1
arch/mips/mti-malta/malta-int.c
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@ -47,7 +47,6 @@
#include <asm/setup.h> #include <asm/setup.h>
int gcmp_present = -1; int gcmp_present = -1;
int gic_present;
static unsigned long _msc01_biu_base; static unsigned long _msc01_biu_base;
static unsigned long _gcmp_base; static unsigned long _gcmp_base;
static unsigned int ipi_map[NR_CPUS]; static unsigned int ipi_map[NR_CPUS];

1
arch/mips/mti-sead3/sead3-int.c
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@ -20,7 +20,6 @@
#define SEAD_CONFIG_BASE 0x1b100110 #define SEAD_CONFIG_BASE 0x1b100110
#define SEAD_CONFIG_SIZE 4 #define SEAD_CONFIG_SIZE 4
int gic_present;
static unsigned long sead3_config_reg; static unsigned long sead3_config_reg;
/* /*