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Merge "Merge tag 'android12-5.10.198_r00' into android12-5.10" into android12-5.10

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This commit is contained in:
Treehugger Robot 2023-11-03 21:00:44 +00:00
commit f40707abde
1175 changed files with 12255 additions and 6733 deletions
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4
Documentation/admin-guide/hw-vuln/srso.rst
View File

@ -124,8 +124,8 @@ sequence.
To ensure the safety of this mitigation, the kernel must ensure that the
safe return sequence is itself free from attacker interference. In Zen3
and Zen4, this is accomplished by creating a BTB alias between the
untraining function srso_untrain_ret_alias() and the safe return
function srso_safe_ret_alias() which results in evicting a potentially
untraining function srso_alias_untrain_ret() and the safe return
function srso_alias_safe_ret() which results in evicting a potentially
poisoned BTB entry and using that safe one for all function returns.
In older Zen1 and Zen2, this is accomplished using a reinterpretation

37
Documentation/admin-guide/security-bugs.rst
View File

@ -63,31 +63,28 @@ information submitted to the security list and any followup discussions
of the report are treated confidentially even after the embargo has been
lifted, in perpetuity.
Coordination
------------
Coordination with other groups
------------------------------
Fixes for sensitive bugs, such as those that might lead to privilege
escalations, may need to be coordinated with the private
<linux-distros@vs.openwall.org> mailing list so that distribution vendors
are well prepared to issue a fixed kernel upon public disclosure of the
upstream fix. Distros will need some time to test the proposed patch and
will generally request at least a few days of embargo, and vendor update
publication prefers to happen Tuesday through Thursday. When appropriate,
the security team can assist with this coordination, or the reporter can
include linux-distros from the start. In this case, remember to prefix
the email Subject line with "[vs]" as described in the linux-distros wiki:
<http://oss-security.openwall.org/wiki/mailing-lists/distros#how-to-use-the-lists>
The kernel security team strongly recommends that reporters of potential
security issues NEVER contact the "linux-distros" mailing list until
AFTER discussing it with the kernel security team. Do not Cc: both
lists at once. You may contact the linux-distros mailing list after a
fix has been agreed on and you fully understand the requirements that
doing so will impose on you and the kernel community.
The different lists have different goals and the linux-distros rules do
not contribute to actually fixing any potential security problems.
CVE assignment
--------------
The security team does not normally assign CVEs, nor do we require them
for reports or fixes, as this can needlessly complicate the process and
may delay the bug handling. If a reporter wishes to have a CVE identifier
assigned ahead of public disclosure, they will need to contact the private
linux-distros list, described above. When such a CVE identifier is known
before a patch is provided, it is desirable to mention it in the commit
message if the reporter agrees.
The security team does not assign CVEs, nor do we require them for
reports or fixes, as this can needlessly complicate the process and may
delay the bug handling. If a reporter wishes to have a CVE identifier
assigned, they should find one by themselves, for example by contacting
MITRE directly. However under no circumstances will a patch inclusion
be delayed to wait for a CVE identifier to arrive.
Non-disclosure agreements
-------------------------

3
Documentation/arm64/silicon-errata.rst
View File

@ -158,6 +158,9 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
| | Hip09 SMMU PMCG | | |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
+----------------+-----------------+-----------------+-----------------------------+

2
Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
View File

@ -16,8 +16,6 @@ description: |
reads required input clock frequencies from the devicetree and acts as clock
provider for all clock consumers of PS clocks.
select: false
properties:
compatible:
const: xlnx,versal-clk

158
Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml Normal file
View File

@ -0,0 +1,158 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/addac/adi,ad74413r.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD74412R/AD74413R device
maintainers:
- Cosmin Tanislav <cosmin.tanislav@analog.com>
description: |
The AD74412R and AD74413R are quad-channel software configurable input/output
solutions for building and process control applications. They contain
functionality for analog output, analog input, digital input, resistance
temperature detector, and thermocouple measurements integrated
into a single chip solution with an SPI interface.
The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide
four configurable input/output channels and a suite of diagnostic functions.
The AD74413R differentiates itself from the AD74412R by being HART-compatible.
https://www.analog.com/en/products/ad74412r.html
https://www.analog.com/en/products/ad74413r.html
properties:
compatible:
enum:
- adi,ad74412r
- adi,ad74413r
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
spi-max-frequency:
maximum: 1000000
spi-cpol: true
interrupts:
maxItems: 1
refin-supply: true
shunt-resistor-micro-ohms:
description:
Shunt (sense) resistor value in micro-Ohms.
default: 100000000
required:
- compatible
- reg
- spi-max-frequency
- spi-cpol
- refin-supply
additionalProperties: false
patternProperties:
"^channel@[0-3]$":
type: object
description: Represents the external channels which are connected to the device.
properties:
reg:
description: |
The channel number. It can have up to 4 channels numbered from 0 to 3.
minimum: 0
maximum: 3
adi,ch-func:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Channel function.
HART functions are not supported on AD74412R.
0 - CH_FUNC_HIGH_IMPEDANCE
1 - CH_FUNC_VOLTAGE_OUTPUT
2 - CH_FUNC_CURRENT_OUTPUT
3 - CH_FUNC_VOLTAGE_INPUT
4 - CH_FUNC_CURRENT_INPUT_EXT_POWER
5 - CH_FUNC_CURRENT_INPUT_LOOP_POWER
6 - CH_FUNC_RESISTANCE_INPUT
7 - CH_FUNC_DIGITAL_INPUT_LOGIC
8 - CH_FUNC_DIGITAL_INPUT_LOOP_POWER
9 - CH_FUNC_CURRENT_INPUT_EXT_POWER_HART
10 - CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART
minimum: 0
maximum: 10
default: 0
adi,gpo-comparator:
type: boolean
description: |
Whether to configure GPO as a comparator or not.
When not configured as a comparator, the GPO will be treated as an
output-only GPIO.
required:
- reg
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/iio/addac/adi,ad74413r.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
status = "okay";
ad74413r@0 {
compatible = "adi,ad74413r";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&gpio>;
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
refin-supply = <&ad74413r_refin>;
channel@0 {
reg = <0>;
adi,ch-func = <CH_FUNC_VOLTAGE_OUTPUT>;
};
channel@1 {
reg = <1>;
adi,ch-func = <CH_FUNC_CURRENT_OUTPUT>;
};
channel@2 {
reg = <2>;
adi,ch-func = <CH_FUNC_DIGITAL_INPUT_LOGIC>;
adi,gpo-comparator;
};
channel@3 {
reg = <3>;
adi,ch-func = <CH_FUNC_CURRENT_INPUT_EXT_POWER>;
};
};
};
...

4
Documentation/scsi/scsi_mid_low_api.rst
View File

@ -1195,11 +1195,11 @@ Members of interest:
- pointer to scsi_device object that this command is
associated with.
resid
- an LLD should set this signed integer to the requested
- an LLD should set this unsigned integer to the requested
transfer length (i.e. 'request_bufflen') less the number
of bytes that are actually transferred. 'resid' is
preset to 0 so an LLD can ignore it if it cannot detect
underruns (overruns should be rare). If possible an LLD
underruns (overruns should not be reported). An LLD
should set 'resid' prior to invoking 'done'. The most
interesting case is data transfers from a SCSI target
device (e.g. READs) that underrun.

2
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 189
SUBLEVEL = 198
EXTRAVERSION =
NAME = Dare mighty things

3
arch/alpha/kernel/setup.c
View File

@ -394,8 +394,7 @@ setup_memory(void *kernel_end)
extern void setup_memory(void *);
#endif /* !CONFIG_DISCONTIGMEM */
int __init
page_is_ram(unsigned long pfn)
int page_is_ram(unsigned long pfn)
{
struct memclust_struct * cluster;
struct memdesc_struct * memdesc;

9
arch/arm/boot/dts/am335x-guardian.dts
View File

@ -100,11 +100,12 @@ panel-info {
};
pwm7: dmtimer-pwm {
guardian_beeper: pwm-7 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer7_pins>;
pinctrl-0 = <&guardian_beeper_pins>;
ti,clock-source = <0x01>;
};
@ -343,9 +344,9 @@ AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
dmtimer7_pins: pinmux_dmtimer7_pins {
guardian_beeper_pins: pinmux_dmtimer7_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */
>;
};

2
arch/arm/boot/dts/am3517-evm.dts
View File

@ -150,7 +150,7 @@ bl: backlight {
enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */
};
pwm11: dmtimer-pwm@11 {
pwm11: pwm-11 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;

3
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
View File

@ -19,7 +19,8 @@ chosen {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
};
gpio-keys {

13
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
View File

@ -46,3 +46,16 @@ restart {
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

13
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
View File

@ -83,3 +83,16 @@ pcie0_chipcommon: chipcommon@0 {
};
};
};
&gmac0 {
phy-mode = "rgmii";
phy-handle = <&bcm54210e>;
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
};
};
};

4
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -267,7 +267,7 @@ usb2: usb2@21000 {
interrupt-parent = <&gic>;
ehci: ehci@21000 {
ehci: usb@21000 {
#usb-cells = <0>;
compatible = "generic-ehci";
@ -289,7 +289,7 @@ ehci_port2: port@2 {
};
};
ohci: ohci@22000 {
ohci: usb@22000 {
#usb-cells = <0>;
compatible = "generic-ohci";

27
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -127,6 +127,9 @@ uart0: serial@300 {
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
#address-cells = <3>;
#size-cells = <2>;
};
usb2: usb2@4000 {
@ -135,7 +138,7 @@ usb2: usb2@4000 {
#address-cells = <1>;
#size-cells = <1>;
ehci: ehci@4000 {
ehci: usb@4000 {
compatible = "generic-ehci";
reg = <0x4000 0x1000>;
interrupt-parent = <&gic>;
@ -155,9 +158,7 @@ ehci_port2: port@2 {
};
};
ohci: ohci@d000 {
#usb-cells = <0>;
ohci: usb@d000 {
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;
@ -180,6 +181,24 @@ ohci_port2: port@2 {
gmac0: ethernet@5000 {
reg = <0x5000 0x1000>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch: switch@1e {
compatible = "brcm,bcm53125";
reg = <0x1e>;
status = "disabled";
/* ports are defined in board DTS */
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};
gmac1: ethernet@b000 {

6
arch/arm/boot/dts/bcm947189acdbmr.dts
View File

@ -60,9 +60,9 @@ wps {
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
gpio-sck = <&chipcommon 21 0>;
gpio-miso = <&chipcommon 22 0>;
gpio-mosi = <&chipcommon 23 0>;
sck-gpios = <&chipcommon 21 0>;
miso-gpios = <&chipcommon 22 0>;
mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/exynos4210-i9100.dts
View File

@ -170,8 +170,8 @@ lcd@0 {
power-on-delay = <10>;
reset-delay = <10>;
panel-width-mm = <90>;
panel-height-mm = <154>;
panel-width-mm = <56>;
panel-height-mm = <93>;
display-timings {
timing {

2
arch/arm/boot/dts/imx23.dtsi
View File

@ -59,7 +59,7 @@ icoll: interrupt-controller@80000000 {
reg = <0x80000000 0x2000>;
};
dma_apbh: dma-apbh@80004000 {
dma_apbh: dma-controller@80004000 {
compatible = "fsl,imx23-dma-apbh";
reg = <0x80004000 0x2000>;
interrupts = <0 14 20 0

2
arch/arm/boot/dts/imx25.dtsi
View File

@ -515,7 +515,7 @@ gpio2: gpio@53fd0000 {
#interrupt-cells = <2>;
};
sdma: sdma@53fd4000 {
sdma: dma-controller@53fd4000 {
compatible = "fsl,imx25-sdma";
reg = <0x53fd4000 0x4000>;
clocks = <&clks 112>, <&clks 68>;

2
arch/arm/boot/dts/imx28.dtsi
View File

@ -78,7 +78,7 @@ hsadc: hsadc@80002000 {
status = "disabled";
};
dma_apbh: dma-apbh@80004000 {
dma_apbh: dma-controller@80004000 {
compatible = "fsl,imx28-dma-apbh";
reg = <0x80004000 0x2000>;
interrupts = <82 83 84 85

2
arch/arm/boot/dts/imx31.dtsi
View File

@ -297,7 +297,7 @@ gpio2: gpio@53fd0000 {
#interrupt-cells = <2>;
};
sdma: sdma@53fd4000 {
sdma: dma-controller@53fd4000 {
compatible = "fsl,imx31-sdma";
reg = <0x53fd4000 0x4000>;
interrupts = <34>;

2
arch/arm/boot/dts/imx35.dtsi
View File

@ -284,7 +284,7 @@ gpio2: gpio@53fd0000 {
#interrupt-cells = <2>;
};
sdma: sdma@53fd4000 {
sdma: dma-controller@53fd4000 {
compatible = "fsl,imx35-sdma";
reg = <0x53fd4000 0x4000>;
clocks = <&clks 9>, <&clks 65>;

2
arch/arm/boot/dts/imx50.dtsi
View File

@ -421,7 +421,7 @@ ecspi2: spi@63fac000 {
status = "disabled";
};
sdma: sdma@63fb0000 {
sdma: dma-controller@63fb0000 {
compatible = "fsl,imx50-sdma", "fsl,imx35-sdma";
reg = <0x63fb0000 0x4000>;
interrupts = <6>;

2
arch/arm/boot/dts/imx51.dtsi
View File

@ -498,7 +498,7 @@ ecspi2: spi@83fac000 {
status = "disabled";
};
sdma: sdma@83fb0000 {
sdma: dma-controller@83fb0000 {
compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
reg = <0x83fb0000 0x4000>;
interrupts = <6>;

2
arch/arm/boot/dts/imx53.dtsi
View File

@ -710,7 +710,7 @@ ecspi2: spi@63fac000 {
status = "disabled";
};
sdma: sdma@63fb0000 {
sdma: dma-controller@63fb0000 {
compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
reg = <0x63fb0000 0x4000>;
interrupts = <6>;

4
arch/arm/boot/dts/imx6dl-prtrvt.dts
View File

@ -126,6 +126,10 @@ &usbh1 {
status = "disabled";
};
&usbotg {
disable-over-current;
};
&vpu {
status = "disabled";
};

11
arch/arm/boot/dts/imx6qdl-prti6q.dtsi
View File

@ -69,6 +69,7 @@ &usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -78,10 +79,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

8
arch/arm/boot/dts/imx6qdl.dtsi
View File

@ -45,6 +45,10 @@ aliases {
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg;
usb1 = &usbh1;
usb2 = &usbh2;
usb3 = &usbh3;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -146,7 +150,7 @@ soc {
interrupt-parent = <&gpc>;
ranges;
dma_apbh: dma-apbh@110000 {
dma_apbh: dma-controller@110000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x00110000 0x2000>;
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
@ -923,7 +927,7 @@ dcic2: dcic@20e8000 {
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
};
sdma: sdma@20ec000 {
sdma: dma-controller@20ec000 {
compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
reg = <0x020ec000 0x4000>;
interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;

5
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -39,6 +39,9 @@ aliases {
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -749,7 +752,7 @@ spdc: spdc@20e8000 {
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
};
sdma: sdma@20ec000 {
sdma: dma-controller@20ec000 {
compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma";
reg = <0x020ec000 0x4000>;
interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;

26
arch/arm/boot/dts/imx6sll.dtsi
View File

@ -36,6 +36,8 @@ aliases {
spi1 = &ecspi2;
spi3 = &ecspi3;
spi4 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbotg2;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -49,20 +51,18 @@ cpu0: cpu@0 {
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
operating-points =
/* kHz uV */
996000 1275000
792000 1175000
396000 1075000
198000 975000
>;
fsl,soc-operating-points = <
<996000 1275000>,
<792000 1175000>,
<396000 1075000>,
<198000 975000>;
fsl,soc-operating-points =
/* ARM kHz SOC-PU uV */
996000 1175000
792000 1175000
396000 1175000
198000 1175000
>;
<996000 1175000>,
<792000 1175000>,
<396000 1175000>,
<198000 1175000>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6SLL_CLK_ARM>,
@ -552,7 +552,7 @@ usbphy2: usb-phy@20ca000 {
reg = <0x020ca000 0x1000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USBPHY2>;
phy-reg_3p0-supply = <&reg_3p0>;
phy-3p0-supply = <&reg_3p0>;
fsl,anatop = <&anatop>;
};

7
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -49,6 +49,9 @@ aliases {
spi2 = &ecspi3;
spi3 = &ecspi4;
spi4 = &ecspi5;
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -206,7 +209,7 @@ gpu: gpu@1800000 {
power-domains = <&pd_pu>;
};
dma_apbh: dma-apbh@1804000 {
dma_apbh: dma-controller@1804000 {
compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x01804000 0x2000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
@ -845,7 +848,7 @@ gpr: iomuxc-gpr@20e4000 {
reg = <0x020e4000 0x4000>;
};
sdma: sdma@20ec000 {
sdma: dma-controller@20ec000 {
compatible = "fsl,imx6sx-sdma", "fsl,imx6q-sdma";
reg = <0x020ec000 0x4000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

6
arch/arm/boot/dts/imx6ul.dtsi
View File

@ -47,6 +47,8 @@ aliases {
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbotg2;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -162,7 +164,7 @@ intc: interrupt-controller@a01000 {
<0x00a06000 0x2000>;
};
dma_apbh: dma-apbh@1804000 {
dma_apbh: dma-controller@1804000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x01804000 0x2000>;
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
@ -741,7 +743,7 @@ gpt2: timer@20e8000 {
status = "disabled";
};
sdma: sdma@20ec000 {
sdma: dma-controller@20ec000 {
compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
"fsl,imx35-sdma";
reg = <0x020ec000 0x4000>;

6
arch/arm/boot/dts/imx7d.dtsi
View File

@ -7,6 +7,12 @@
#include <dt-bindings/reset/imx7-reset.h>
/ {
aliases {
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
};
cpus {
cpu0: cpu@0 {
clock-frequency = <996000000>;

13
arch/arm/boot/dts/imx7s.dtsi
View File

@ -47,6 +47,8 @@ aliases {
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbh;
};
cpus {
@ -1135,6 +1137,8 @@ usdhc1: mmc@30b40000 {
<&clks IMX7D_USDHC1_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1147,6 +1151,8 @@ usdhc2: mmc@30b50000 {
<&clks IMX7D_USDHC2_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1159,6 +1165,8 @@ usdhc3: mmc@30b60000 {
<&clks IMX7D_USDHC3_ROOT_CLK>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-step = <2>;
fsl,tuning-start-tap = <20>;
status = "disabled";
};
@ -1175,7 +1183,7 @@ qspi: spi@30bb0000 {
status = "disabled";
};
sdma: sdma@30bd0000 {
sdma: dma-controller@30bd0000 {
compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
reg = <0x30bd0000 0x10000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@ -1208,14 +1216,13 @@ fec1: ethernet@30be0000 {
};
};
dma_apbh: dma-apbh@33000000 {
dma_apbh: dma-controller@33000000 {
compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x33000000 0x2000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <1>;
dma-channels = <4>;
clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;

2
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
View File

@ -59,7 +59,7 @@ led2 {
};
};
pwm10: dmtimer-pwm {
pwm10: pwm-10 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;

33
arch/arm/boot/dts/motorola-mapphone-common.dtsi
View File

@ -156,7 +156,7 @@ soundcard {
dais = <&mcbsp2_port>, <&mcbsp3_port>;
};
pwm8: dmtimer-pwm-8 {
pwm8: pwm-8 {
pinctrl-names = "default";
pinctrl-0 = <&vibrator_direction_pin>;
@ -166,7 +166,7 @@ pwm8: dmtimer-pwm-8 {
ti,clock-source = <0x01>;
};
pwm9: dmtimer-pwm-9 {
pwm9: pwm-9 {
pinctrl-names = "default";
pinctrl-0 = <&vibrator_enable_pin>;
@ -192,6 +192,29 @@ backlight: backlight {
};
};
&cpu_thermal {
polling-delay = <10000>; /* milliseconds */
};
&cpu_alert0 {
temperature = <80000>; /* millicelsius */
};
&cpu0 {
/*
* Note that the 1.2GiHz mode is enabled for all SoC variants for
* the Motorola Android Linux v3.0.8 based kernel.
*/
operating-points = <
/* kHz uV */
300000 1025000
600000 1200000
800000 1313000
1008000 1375000
1200000 1375000
>;
};
&dss {
status = "okay";
};
@ -384,7 +407,7 @@ &mmc3 {
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1285", "ti,wl1283";
compatible = "ti,wl1285";
reg = <2>;
/* gpio_100 with gpmc_wait2 pad as wakeirq */
interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
@ -716,12 +739,12 @@ &rng_target {
/* Configure pwm clock source for timers 8 & 9 */
&timer8 {
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
&timer9 {
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
/*

6
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
View File

@ -8,9 +8,9 @@
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {

6
arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
View File

@ -12,9 +12,9 @@
/ {
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {

12
arch/arm/boot/dts/omap3-cm-t3517.dts
View File

@ -11,12 +11,12 @@ / {
model = "CompuLab CM-T3517";
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wl12xx_vmmc2: wl12xx_vmmc2 {
compatible = "regulator-fixed";

3
arch/arm/boot/dts/omap3-cpu-thermal.dtsi
View File

@ -15,8 +15,7 @@ cpu_thermal: cpu_thermal {
polling-delay = <1000>; /* milliseconds */
coefficients = <0 20000>;
/* sensor ID */
thermal-sensors = <&bandgap 0>;
thermal-sensors = <&bandgap>;
cpu_trips: trips {
cpu_alert0: cpu_alert {

8
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -147,7 +147,7 @@ backlight: backlight {
pinctrl-0 = <&backlight_pins>;
};
pwm11: dmtimer-pwm {
pwm11: pwm-11 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer11>;
#pwm-cells = <3>;
@ -332,7 +332,7 @@ OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
>;
};
};
gps_pins: pinmux_gps_pins {
pinctrl-single,pins = <
@ -866,8 +866,8 @@ &mcbsp4 { /* GSM voice PCM */
};
&hdqw1w {
pinctrl-names = "default";
pinctrl-0 = <&hdq_pins>;
pinctrl-names = "default";
pinctrl-0 = <&hdq_pins>;
};
/* image signal processor within OMAP3 SoC */

2
arch/arm/boot/dts/omap3-ldp.dts
View File

@ -301,5 +301,5 @@ &usb_otg_hs {
&vaux1 {
/* Needed for ads7846 */
regulator-name = "vcc";
regulator-name = "vcc";
};

40
arch/arm/boot/dts/omap3-n900.dts
View File

@ -156,7 +156,7 @@ battery: n900-battery {
io-channel-names = "temp", "bsi", "vbat";
};
pwm9: dmtimer-pwm {
pwm9: pwm-9 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer9>;
@ -236,27 +236,27 @@ gpmc_pins: pinmux_gpmc_pins {
pinctrl-single,pins = <
/* address lines */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
/* data lines, gpmc_d0..d7 not muxable according to TRM */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
/*
* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
* according to TRM. OneNAND seems to require PIN_INPUT on clock.
*/
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
};
i2c1_pins: pinmux_i2c1_pins {
@ -738,12 +738,12 @@ tpa6130a2: tpa6130a2@60 {
si4713: si4713@63 {
compatible = "silabs,si4713";
reg = <0x63>;
reg = <0x63>;
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
vio-supply = <&vio>;
vdd-supply = <&vaux1>;
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
vio-supply = <&vio>;
vdd-supply = <&vaux1>;
};
bq24150a: bq24150a@6b {

44
arch/arm/boot/dts/omap3-zoom3.dts
View File

@ -23,9 +23,9 @@ memory@80000000 {
};
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {
@ -84,28 +84,28 @@ OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
@ -205,22 +205,22 @@ wlcore: wlcore@2 {
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&uart4 {
status = "disabled";
status = "disabled";
};
&usb_otg_hs {

29
arch/arm/boot/dts/omap4-cpu-thermal.dtsi
View File

@ -15,21 +15,24 @@ cpu_thermal: cpu_thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
/* sensor ID */
thermal-sensors = <&bandgap 0>;
/*
* See 44xx files for single sensor addressing, omap5 and dra7 need
* also sensor ID for addressing.
*/
thermal-sensors = <&bandgap 0>;
cpu_trips: trips {
cpu_alert0: cpu_alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_alert0: cpu_alert {
temperature = <100000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <125000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_cooling_maps: cooling-maps {
map0 {

1
arch/arm/boot/dts/omap443x.dtsi
View File

@ -72,6 +72,7 @@ abb_iva: regulator-abb-iva {
};
&cpu_thermal {
thermal-sensors = <&bandgap>;
coefficients = <0 20000>;
};

1
arch/arm/boot/dts/omap4460.dtsi
View File

@ -89,6 +89,7 @@ abb_iva: regulator-abb-iva {
};
&cpu_thermal {
thermal-sensors = <&bandgap>;
coefficients = <348 (-9301)>;
};

56
arch/arm/boot/dts/omap5-cm-t54.dts
View File

@ -84,36 +84,36 @@ led1 {
};
lcd0: display {
compatible = "startek,startek-kd050c", "panel-dpi";
label = "lcd";
compatible = "startek,startek-kd050c", "panel-dpi";
label = "lcd";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <40>;
hsync-len = <43>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <40>;
hsync-len = <43>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_lcd_out>;
};
};
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_lcd_out>;
};
};
};
hdmi0: connector0 {
compatible = "hdmi-connector";
@ -644,8 +644,8 @@ &usbhsehci {
};
&usb3 {
extcon = <&extcon_usb3>;
vbus-supply = <&smps10_out1_reg>;
extcon = <&extcon_usb3>;
vbus-supply = <&smps10_out1_reg>;
};
&cpu0 {

6
arch/arm/boot/dts/s3c6410-mini6410.dts
View File

@ -51,7 +51,7 @@ srom-cs1-bus@18000000 {
ethernet@18000000 {
compatible = "davicom,dm9000";
reg = <0x18000000 0x2 0x18000004 0x2>;
reg = <0x18000000 0x2>, <0x18000004 0x2>;
interrupt-parent = <&gpn>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
davicom,no-eeprom;
@ -193,12 +193,12 @@ &uart3 {
};
&pinctrl0 {
gpio_leds: gpio-leds {
gpio_leds: gpio-leds-pins {
samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
gpio_keys: gpio-keys {
gpio_keys: gpio-keys-pins {
samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3",
"gpn-4", "gpn-5", "gpl-11", "gpl-12";
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;

210
arch/arm/boot/dts/s3c64xx-pinctrl.dtsi
View File

@ -16,111 +16,111 @@ &pinctrl0 {
* Pin banks
*/
gpa: gpa {
gpa: gpa-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb: gpb {
gpb: gpb-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc: gpc {
gpc: gpc-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd: gpd {
gpd: gpd-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpe: gpe {
gpe: gpe-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
gpf: gpf {
gpf: gpf-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpg: gpg {
gpg: gpg-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gph: gph {
gph: gph-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpi: gpi {
gpi: gpi-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
gpj: gpj {
gpj: gpj-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
gpk: gpk {
gpk: gpk-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
gpl: gpl {
gpl: gpl-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm: gpm {
gpm: gpm-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpn: gpn {
gpn: gpn-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpo: gpo {
gpo: gpo-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp: gpp {
gpp: gpp-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpq: gpq {
gpq: gpq-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@ -131,225 +131,225 @@ gpq: gpq {
* Pin groups
*/
uart0_data: uart0-data {
uart0_data: uart0-data-pins {
samsung,pins = "gpa-0", "gpa-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
uart0_fctl: uart0-fctl {
uart0_fctl: uart0-fctl-pins {
samsung,pins = "gpa-2", "gpa-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
uart1_data: uart1-data {
uart1_data: uart1-data-pins {
samsung,pins = "gpa-4", "gpa-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
uart1_fctl: uart1-fctl {
uart1_fctl: uart1-fctl-pins {
samsung,pins = "gpa-6", "gpa-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
uart2_data: uart2-data {
uart2_data: uart2-data-pins {
samsung,pins = "gpb-0", "gpb-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
uart3_data: uart3-data {
uart3_data: uart3-data-pins {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
ext_dma_0: ext-dma-0 {
ext_dma_0: ext-dma-0-pins {
samsung,pins = "gpb-0", "gpb-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
ext_dma_1: ext-dma-1 {
ext_dma_1: ext-dma-1-pins {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
irda_data_0: irda-data-0 {
irda_data_0: irda-data-0-pins {
samsung,pins = "gpb-0", "gpb-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
irda_data_1: irda-data-1 {
irda_data_1: irda-data-1-pins {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
irda_sdbw: irda-sdbw {
irda_sdbw: irda-sdbw-pins {
samsung,pins = "gpb-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2c0_bus: i2c0-bus {
i2c0_bus: i2c0-bus-pins {
samsung,pins = "gpb-5", "gpb-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
};
i2c1_bus: i2c1-bus {
i2c1_bus: i2c1-bus-pins {
/* S3C6410-only */
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_6>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
};
spi0_bus: spi0-bus {
spi0_bus: spi0-bus-pins {
samsung,pins = "gpc-0", "gpc-1", "gpc-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
};
spi0_cs: spi0-cs {
spi0_cs: spi0-cs-pins {
samsung,pins = "gpc-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
spi1_bus: spi1-bus {
spi1_bus: spi1-bus-pins {
samsung,pins = "gpc-4", "gpc-5", "gpc-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
};
spi1_cs: spi1-cs {
spi1_cs: spi1-cs-pins {
samsung,pins = "gpc-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd0_cmd: sd0-cmd {
sd0_cmd: sd0-cmd-pins {
samsung,pins = "gpg-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd0_clk: sd0-clk {
sd0_clk: sd0-clk-pins {
samsung,pins = "gpg-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd0_bus1: sd0-bus1 {
sd0_bus1: sd0-bus1-pins {
samsung,pins = "gpg-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd0_bus4: sd0-bus4 {
sd0_bus4: sd0-bus4-pins {
samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd0_cd: sd0-cd {
sd0_cd: sd0-cd-pins {
samsung,pins = "gpg-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
};
sd1_cmd: sd1-cmd {
sd1_cmd: sd1-cmd-pins {
samsung,pins = "gph-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd1_clk: sd1-clk {
sd1_clk: sd1-clk-pins {
samsung,pins = "gph-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd1_bus1: sd1-bus1 {
sd1_bus1: sd1-bus1-pins {
samsung,pins = "gph-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd1_bus4: sd1-bus4 {
sd1_bus4: sd1-bus4-pins {
samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd1_bus8: sd1-bus8 {
sd1_bus8: sd1-bus8-pins {
samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5",
"gph-6", "gph-7", "gph-8", "gph-9";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd1_cd: sd1-cd {
sd1_cd: sd1-cd-pins {
samsung,pins = "gpg-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
};
sd2_cmd: sd2-cmd {
sd2_cmd: sd2-cmd-pins {
samsung,pins = "gpc-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd2_clk: sd2-clk {
sd2_clk: sd2-clk-pins {
samsung,pins = "gpc-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd2_bus1: sd2-bus1 {
sd2_bus1: sd2-bus1-pins {
samsung,pins = "gph-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
sd2_bus4: sd2-bus4 {
sd2_bus4: sd2-bus4-pins {
samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2s0_bus: i2s0-bus {
i2s0_bus: i2s0-bus-pins {
samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2s0_cdclk: i2s0-cdclk {
i2s0_cdclk: i2s0-cdclk-pins {
samsung,pins = "gpd-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2s1_bus: i2s1-bus {
i2s1_bus: i2s1-bus-pins {
samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2s1_cdclk: i2s1-cdclk {
i2s1_cdclk: i2s1-cdclk-pins {
samsung,pins = "gpe-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2s2_bus: i2s2-bus {
i2s2_bus: i2s2-bus-pins {
/* S3C6410-only */
samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6",
"gph-8", "gph-9";
@ -357,50 +357,50 @@ i2s2_bus: i2s2-bus {
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
i2s2_cdclk: i2s2-cdclk {
i2s2_cdclk: i2s2-cdclk-pins {
/* S3C6410-only */
samsung,pins = "gph-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_5>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pcm0_bus: pcm0-bus {
pcm0_bus: pcm0-bus-pins {
samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pcm0_extclk: pcm0-extclk {
pcm0_extclk: pcm0-extclk-pins {
samsung,pins = "gpd-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pcm1_bus: pcm1-bus {
pcm1_bus: pcm1-bus-pins {
samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pcm1_extclk: pcm1-extclk {
pcm1_extclk: pcm1-extclk-pins {
samsung,pins = "gpe-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
ac97_bus_0: ac97-bus-0 {
ac97_bus_0: ac97-bus-0-pins {
samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
ac97_bus_1: ac97-bus-1 {
ac97_bus_1: ac97-bus-1-pins {
samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
cam_port: cam-port {
cam_port: cam-port-pins {
samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4",
"gpf-5", "gpf-6", "gpf-7", "gpf-8",
"gpf-9", "gpf-10", "gpf-11", "gpf-12";
@ -408,242 +408,242 @@ cam_port: cam-port {
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
cam_rst: cam-rst {
cam_rst: cam-rst-pins {
samsung,pins = "gpf-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
cam_field: cam-field {
cam_field: cam-field-pins {
/* S3C6410-only */
samsung,pins = "gpb-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pwm_extclk: pwm-extclk {
pwm_extclk: pwm-extclk-pins {
samsung,pins = "gpf-13";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pwm0_out: pwm0-out {
pwm0_out: pwm0-out-pins {
samsung,pins = "gpf-14";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
pwm1_out: pwm1-out {
pwm1_out: pwm1-out-pins {
samsung,pins = "gpf-15";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
clkout0: clkout-0 {
clkout0: clkout-0-pins {
samsung,pins = "gpf-14";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col0_0: keypad-col0-0 {
keypad_col0_0: keypad-col0-0-pins {
samsung,pins = "gph-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col1_0: keypad-col1-0 {
keypad_col1_0: keypad-col1-0-pins {
samsung,pins = "gph-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col2_0: keypad-col2-0 {
keypad_col2_0: keypad-col2-0-pins {
samsung,pins = "gph-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col3_0: keypad-col3-0 {
keypad_col3_0: keypad-col3-0-pins {
samsung,pins = "gph-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col4_0: keypad-col4-0 {
keypad_col4_0: keypad-col4-0-pins {
samsung,pins = "gph-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col5_0: keypad-col5-0 {
keypad_col5_0: keypad-col5-0-pins {
samsung,pins = "gph-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col6_0: keypad-col6-0 {
keypad_col6_0: keypad-col6-0-pins {
samsung,pins = "gph-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col7_0: keypad-col7-0 {
keypad_col7_0: keypad-col7-0-pins {
samsung,pins = "gph-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col0_1: keypad-col0-1 {
keypad_col0_1: keypad-col0-1-pins {
samsung,pins = "gpl-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col1_1: keypad-col1-1 {
keypad_col1_1: keypad-col1-1-pins {
samsung,pins = "gpl-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col2_1: keypad-col2-1 {
keypad_col2_1: keypad-col2-1-pins {
samsung,pins = "gpl-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col3_1: keypad-col3-1 {
keypad_col3_1: keypad-col3-1-pins {
samsung,pins = "gpl-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col4_1: keypad-col4-1 {
keypad_col4_1: keypad-col4-1-pins {
samsung,pins = "gpl-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col5_1: keypad-col5-1 {
keypad_col5_1: keypad-col5-1-pins {
samsung,pins = "gpl-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col6_1: keypad-col6-1 {
keypad_col6_1: keypad-col6-1-pins {
samsung,pins = "gpl-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_col7_1: keypad-col7-1 {
keypad_col7_1: keypad-col7-1-pins {
samsung,pins = "gpl-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row0_0: keypad-row0-0 {
keypad_row0_0: keypad-row0-0-pins {
samsung,pins = "gpk-8";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row1_0: keypad-row1-0 {
keypad_row1_0: keypad-row1-0-pins {
samsung,pins = "gpk-9";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row2_0: keypad-row2-0 {
keypad_row2_0: keypad-row2-0-pins {
samsung,pins = "gpk-10";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row3_0: keypad-row3-0 {
keypad_row3_0: keypad-row3-0-pins {
samsung,pins = "gpk-11";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row4_0: keypad-row4-0 {
keypad_row4_0: keypad-row4-0-pins {
samsung,pins = "gpk-12";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row5_0: keypad-row5-0 {
keypad_row5_0: keypad-row5-0-pins {
samsung,pins = "gpk-13";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row6_0: keypad-row6-0 {
keypad_row6_0: keypad-row6-0-pins {
samsung,pins = "gpk-14";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row7_0: keypad-row7-0 {
keypad_row7_0: keypad-row7-0-pins {
samsung,pins = "gpk-15";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row0_1: keypad-row0-1 {
keypad_row0_1: keypad-row0-1-pins {
samsung,pins = "gpn-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row1_1: keypad-row1-1 {
keypad_row1_1: keypad-row1-1-pins {
samsung,pins = "gpn-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row2_1: keypad-row2-1 {
keypad_row2_1: keypad-row2-1-pins {
samsung,pins = "gpn-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row3_1: keypad-row3-1 {
keypad_row3_1: keypad-row3-1-pins {
samsung,pins = "gpn-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row4_1: keypad-row4-1 {
keypad_row4_1: keypad-row4-1-pins {
samsung,pins = "gpn-4";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row5_1: keypad-row5-1 {
keypad_row5_1: keypad-row5-1-pins {
samsung,pins = "gpn-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row6_1: keypad-row6-1 {
keypad_row6_1: keypad-row6-1-pins {
samsung,pins = "gpn-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
keypad_row7_1: keypad-row7-1 {
keypad_row7_1: keypad-row7-1-pins {
samsung,pins = "gpn-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
lcd_ctrl: lcd-ctrl {
lcd_ctrl: lcd-ctrl-pins {
samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
lcd_data16: lcd-data-width16 {
lcd_data16: lcd-data-width16-pins {
samsung,pins = "gpi-3", "gpi-4", "gpi-5", "gpi-6",
"gpi-7", "gpi-10", "gpi-11", "gpi-12",
"gpi-13", "gpi-14", "gpi-15", "gpj-3",
@ -652,7 +652,7 @@ lcd_data16: lcd-data-width16 {
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
lcd_data18: lcd-data-width18 {
lcd_data18: lcd-data-width18-pins {
samsung,pins = "gpi-2", "gpi-3", "gpi-4", "gpi-5",
"gpi-6", "gpi-7", "gpi-10", "gpi-11",
"gpi-12", "gpi-13", "gpi-14", "gpi-15",
@ -662,7 +662,7 @@ lcd_data18: lcd-data-width18 {
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
lcd_data24: lcd-data-width24 {
lcd_data24: lcd-data-width24-pins {
samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3",
"gpi-4", "gpi-5", "gpi-6", "gpi-7",
"gpi-8", "gpi-9", "gpi-10", "gpi-11",
@ -673,7 +673,7 @@ lcd_data24: lcd-data-width24 {
samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
};
hsi_bus: hsi-bus {
hsi_bus: hsi-bus-pins {
samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3",
"gpk-4", "gpk-5", "gpk-6", "gpk-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;

12
arch/arm/boot/dts/s5pv210-aquila.dts
View File

@ -277,37 +277,37 @@ &keypad {
<&keypad_col0>, <&keypad_col1>, <&keypad_col2>;
status = "okay";
key_1 {
key-1 {
keypad,row = <0>;
keypad,column = <1>;
linux,code = <KEY_CONNECT>;
};
key_2 {
key-2 {
keypad,row = <0>;
keypad,column = <2>;
linux,code = <KEY_BACK>;
};
key_3 {
key-3 {
keypad,row = <1>;
keypad,column = <1>;
linux,code = <KEY_CAMERA_FOCUS>;
};
key_4 {
key-4 {
keypad,row = <1>;
keypad,column = <2>;
linux,code = <KEY_VOLUMEUP>;
};
key_5 {
key-5 {
keypad,row = <2>;
keypad,column = <1>;
linux,code = <KEY_CAMERA>;
};
key_6 {
key-6 {
keypad,row = <2>;
keypad,column = <2>;
linux,code = <KEY_VOLUMEDOWN>;

4
arch/arm/boot/dts/s5pv210-aries.dtsi
View File

@ -54,7 +54,7 @@ pmic_ap_clk: clock-0 {
clock-frequency = <32768>;
};
bt_codec: bt_sco {
bt_codec: bt-sco {
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
};
@ -113,7 +113,7 @@ i2c_sound: i2c-gpio-0 {
pinctrl-names = "default";
pinctrl-0 = <&sound_i2c_pins>;
wm8994: wm8994@1a {
wm8994: audio-codec@1a {
compatible = "wlf,wm8994";
reg = <0x1a>;

14
arch/arm/boot/dts/s5pv210-goni.dts
View File

@ -259,37 +259,37 @@ &keypad {
<&keypad_col0>, <&keypad_col1>, <&keypad_col2>;
status = "okay";
key_1 {
key-1 {
keypad,row = <0>;
keypad,column = <1>;
linux,code = <KEY_CONNECT>;
};
key_2 {
key-2 {
keypad,row = <0>;
keypad,column = <2>;
linux,code = <KEY_BACK>;
};
key_3 {
key-3 {
keypad,row = <1>;
keypad,column = <1>;
linux,code = <KEY_CAMERA_FOCUS>;
};
key_4 {
key-4 {
keypad,row = <1>;
keypad,column = <2>;
linux,code = <KEY_VOLUMEUP>;
};
key_5 {
key-5 {
keypad,row = <2>;
keypad,column = <1>;
linux,code = <KEY_CAMERA>;
};
key_6 {
key-6 {
keypad,row = <2>;
keypad,column = <2>;
linux,code = <KEY_VOLUMEDOWN>;
@ -353,7 +353,7 @@ &i2c2 {
samsung,i2c-slave-addr = <0x10>;
status = "okay";
tsp@4a {
touchscreen@4a {
compatible = "atmel,maxtouch";
reg = <0x4a>;
interrupt-parent = <&gpj0>;

30
arch/arm/boot/dts/s5pv210-smdkv210.dts
View File

@ -41,7 +41,7 @@ pmic_ap_clk: clock-0 {
ethernet@a8000000 {
compatible = "davicom,dm9000";
reg = <0xA8000000 0x2 0xA8000002 0x2>;
reg = <0xa8000000 0x2>, <0xa8000002 0x2>;
interrupt-parent = <&gph1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
local-mac-address = [00 00 de ad be ef];
@ -55,6 +55,14 @@ backlight {
default-brightness-level = <6>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_out>;
power-supply = <&dc5v_reg>;
};
dc5v_reg: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "DC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
@ -76,61 +84,61 @@ &keypad {
<&keypad_col6>, <&keypad_col7>;
status = "okay";
key_1 {
key-1 {
keypad,row = <0>;
keypad,column = <3>;
linux,code = <KEY_1>;
};
key_2 {
key-2 {
keypad,row = <0>;
keypad,column = <4>;
linux,code = <KEY_2>;
};
key_3 {
key-3 {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <KEY_3>;
};
key_4 {
key-4 {
keypad,row = <0>;
keypad,column = <6>;
linux,code = <KEY_4>;
};
key_5 {
key-5 {
keypad,row = <0
>;
keypad,column = <7>;
linux,code = <KEY_5>;
};
key_6 {
key-6 {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <KEY_A>;
};
key_7 {
key-7 {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <KEY_B>;
};
key_8 {
key-8 {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <KEY_C>;
};
key_9 {
key-9 {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <KEY_D>;
};
key_10 {
key-10 {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <KEY_E>;

8
arch/arm/kernel/hw_breakpoint.c
View File

@ -626,7 +626,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
hw->address &= ~alignment_mask;
hw->ctrl.len <<= offset;
if (is_default_overflow_handler(bp)) {
if (uses_default_overflow_handler(bp)) {
/*
* Mismatch breakpoints are required for single-stepping
* breakpoints.
@ -798,7 +798,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
* Otherwise, insert a temporary mismatch breakpoint so that
* we can single-step over the watchpoint trigger.
*/
if (!is_default_overflow_handler(wp))
if (!uses_default_overflow_handler(wp))
continue;
step:
enable_single_step(wp, instruction_pointer(regs));
@ -811,7 +811,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
info->trigger = addr;
pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
perf_bp_event(wp, regs);
if (is_default_overflow_handler(wp))
if (uses_default_overflow_handler(wp))
enable_single_step(wp, instruction_pointer(regs));
}
@ -886,7 +886,7 @@ static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs)
info->trigger = addr;
pr_debug("breakpoint fired: address = 0x%x\n", addr);
perf_bp_event(bp, regs);
if (is_default_overflow_handler(bp))
if (uses_default_overflow_handler(bp))
enable_single_step(bp, addr);
goto unlock;
}

2
arch/arm/kernel/module-plts.c
View File

@ -256,7 +256,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
/* sort by type and symbol index */
sort(rels, numrels, sizeof(Elf32_Rel), cmp_rel, NULL);
if (strncmp(secstrings + dstsec->sh_name, ".init", 5) != 0)
if (!module_init_layout_section(secstrings + dstsec->sh_name))
core_plts += count_plts(syms, dstsec->sh_addr, rels,
numrels, s->sh_info);
else

2
arch/arm/mach-omap2/powerdomain.c
View File

@ -174,7 +174,7 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
break;
case PWRDM_STATE_PREV:
prev = pwrdm_read_prev_pwrst(pwrdm);
if (pwrdm->state != prev)
if (prev >= 0 && pwrdm->state != prev)
pwrdm->state_counter[prev]++;
if (prev == PWRDM_POWER_RET)
_update_logic_membank_counters(pwrdm);

2
arch/arm/mach-pxa/sharpsl_pm.c
View File

@ -220,8 +220,6 @@ void sharpsl_battery_kick(void)
{
schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(125));
}
EXPORT_SYMBOL(sharpsl_battery_kick);
static void sharpsl_battery_thread(struct work_struct *private_)
{

14
arch/arm/mach-pxa/spitz.c
View File

@ -9,7 +9,6 @@
*/
#include <linux/kernel.h>
#include <linux/module.h> /* symbol_get ; symbol_put */
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio_keys.h>
@ -514,17 +513,6 @@ static struct pxa2xx_spi_chip spitz_ads7846_chip = {
.gpio_cs = SPITZ_GPIO_ADS7846_CS,
};
static void spitz_bl_kick_battery(void)
{
void (*kick_batt)(void);
kick_batt = symbol_get(sharpsl_battery_kick);
if (kick_batt) {
kick_batt();
symbol_put(sharpsl_battery_kick);
}
}
static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
.dev_id = "spi2.1",
.table = {
@ -552,7 +540,7 @@ static struct corgi_lcd_platform_data spitz_lcdcon_info = {
.max_intensity = 0x2f,
.default_intensity = 0x1f,
.limit_mask = 0x0b,
.kick_battery = spitz_bl_kick_battery,
.kick_battery = sharpsl_battery_kick,
};
static struct pxa2xx_spi_chip spitz_lcdcon_chip = {

2
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@ -129,7 +129,7 @@ &i2c1 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";

2
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
View File

@ -162,7 +162,7 @@ &i2c2 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";

2
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
View File

@ -351,7 +351,7 @@ MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x159
>;
};

3
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -1966,6 +1966,9 @@ usb2: usb@76f8800 {
#size-cells = <1>;
ranges;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq";
clocks = <&gcc GCC_PERIPH_NOC_USB20_AHB_CLK>,
<&gcc GCC_USB20_MASTER_CLK>,
<&gcc GCC_USB20_MOCK_UTMI_CLK>,

3
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -1064,6 +1064,7 @@ gcc: clock-controller@100000 {
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
power-domains = <&rpmhpd SDM845_CX>;
};
qfprom@784000 {
@ -2108,7 +2109,7 @@ ufs_mem_hc: ufshc@1d84000 {
<0 0>,
<0 0>,
<0 0>,
<0 300000000>;
<75000000 300000000>;
status = "disabled";
};

207
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
View File

@ -31,6 +31,40 @@ sdio_pwrseq: sdio-pwrseq {
reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
};
sound {
compatible = "audio-graph-card";
label = "Analog";
dais = <&i2s0_p0>;
};
sound-dit {
compatible = "audio-graph-card";
label = "SPDIF";
dais = <&spdif_p0>;
};
spdif-dit {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port {
dit_p0_0: endpoint {
remote-endpoint = <&spdif_p0_0>;
};
};
};
vbus_typec: vbus-typec-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_typec_en>;
regulator-name = "vbus_typec";
regulator-always-on;
vin-supply = <&vcc5v0_sys>;
};
vcc12v_dcin: dc-12v {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@ -40,23 +74,13 @@ vcc12v_dcin: dc-12v {
regulator-max-microvolt = <12000000>;
};
vcc5v0_sys: vcc-sys {
vcc3v3_lan: vcc3v3-lan-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-name = "vcc3v3_lan";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc_0v9: vcc-0v9 {
compatible = "regulator-fixed";
regulator-name = "vcc_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
@ -93,28 +117,24 @@ vcc5v0_host: vcc5v0-host-regulator {
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_typec: vcc5v0-typec-regulator {
vcc5v0_sys: vcc-sys {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_typec_en>;
regulator-name = "vcc5v0_typec";
regulator-always-on;
vin-supply = <&vcc5v0_sys>;
};
vcc_lan: vcc3v3-phy-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_lan";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
regulator-state-mem {
regulator-off-in-suspend;
};
vcc_0v9: vcc-0v9 {
compatible = "regulator-fixed";
regulator-name = "vcc_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
vdd_log: vdd-log {
@ -161,7 +181,7 @@ &gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
clock_in_out = "input";
phy-supply = <&vcc_lan>;
phy-supply = <&vcc3v3_lan>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
@ -266,8 +286,8 @@ regulator-state-mem {
};
};
vcc1v8_codec: LDO_REG1 {
regulator-name = "vcc1v8_codec";
vcca1v8_codec: LDO_REG1 {
regulator-name = "vcca1v8_codec";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
@ -277,8 +297,8 @@ regulator-state-mem {
};
};
vcc1v8_hdmi: LDO_REG2 {
regulator-name = "vcc1v8_hdmi";
vcca1v8_hdmi: LDO_REG2 {
regulator-name = "vcca1v8_hdmi";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
@ -335,8 +355,8 @@ regulator-state-mem {
};
};
vcc0v9_hdmi: LDO_REG7 {
regulator-name = "vcc0v9_hdmi";
vcca0v9_hdmi: LDO_REG7 {
regulator-name = "vcca0v9_hdmi";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
@ -362,8 +382,6 @@ vcc_cam: SWITCH_REG1 {
regulator-name = "vcc_cam";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
@ -373,8 +391,6 @@ vcc_mipi: SWITCH_REG2 {
regulator-name = "vcc_mipi";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
@ -425,6 +441,20 @@ &i2c1 {
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
status = "okay";
es8316: codec@11 {
compatible = "everest,es8316";
reg = <0x11>;
clocks = <&cru SCLK_I2S_8CH_OUT>;
clock-names = "mclk";
#sound-dai-cells = <0>;
port {
es8316_p0_0: endpoint {
remote-endpoint = <&i2s0_p0_0>;
};
};
};
};
&i2c3 {
@ -443,6 +473,14 @@ &i2s0 {
rockchip,playback-channels = <8>;
rockchip,capture-channels = <8>;
status = "okay";
i2s0_p0: port {
i2s0_p0_0: endpoint {
dai-format = "i2s";
mclk-fs = <256>;
remote-endpoint = <&es8316_p0_0>;
};
};
};
&i2s1 {
@ -455,21 +493,10 @@ &i2s2 {
};
&io_domains {
status = "okay";
audio-supply = <&vcca1v8_codec>;
bt656-supply = <&vcc_3v0>;
audio-supply = <&vcc1v8_codec>;
sdmmc-supply = <&vcc_sdio>;
gpio1830-supply = <&vcc_3v0>;
};
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_3v0>;
};
&pcie_phy {
sdmmc-supply = <&vcc_sdio>;
status = "okay";
};
@ -485,6 +512,10 @@ &pcie0 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pinctrl {
bt {
bt_enable_h: bt-enable-h {
@ -506,6 +537,20 @@ pcie_pwr_en: pcie-pwr-en {
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
vsel1_pin: vsel1-pin {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
vsel2_pin: vsel2-pin {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio0 {
sdio0_bus4: sdio0-bus4 {
rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
@ -523,20 +568,6 @@ sdio0_clk: sdio0-clk {
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
vsel1_pin: vsel1-pin {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
vsel2_pin: vsel2-pin {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb-typec {
vcc5v0_typec_en: vcc5v0-typec-en {
rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
@ -560,6 +591,11 @@ wifi_host_wake_l: wifi-host-wake-l {
};
};
&pmu_io_domains {
pmu1830-supply = <&vcc_3v0>;
status = "okay";
};
&pwm2 {
status = "okay";
};
@ -570,6 +606,14 @@ &saradc {
vref-supply = <&vcc_1v8>;
};
&sdhci {
max-frequency = <150000000>;
bus-width = <8>;
mmc-hs200-1_8v;
non-removable;
status = "okay";
};
&sdio0 {
#address-cells = <1>;
#size-cells = <0>;
@ -597,12 +641,13 @@ &sdmmc {
status = "okay";
};
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
&spdif {
spdif_p0: port {
spdif_p0_0: endpoint {
remote-endpoint = <&dit_p0_0>;
};
};
};
&tcphy0 {
@ -677,15 +722,15 @@ &usbdrd3_0 {
status = "okay";
};
&usbdrd_dwc3_0 {
status = "okay";
dr_mode = "otg";
};
&usbdrd3_1 {
status = "okay";
};
&usbdrd_dwc3_0 {
status = "okay";
dr_mode = "host";
};
&usbdrd_dwc3_1 {
status = "okay";
dr_mode = "host";

2
arch/arm64/include/asm/cputype.h
View File

@ -79,6 +79,7 @@
#define ARM_CPU_PART_CORTEX_A78AE 0xD42
#define ARM_CPU_PART_CORTEX_X1 0xD44
#define ARM_CPU_PART_CORTEX_A510 0xD46
#define ARM_CPU_PART_CORTEX_A520 0xD80
#define ARM_CPU_PART_CORTEX_A710 0xD47
#define ARM_CPU_PART_CORTEX_X2 0xD48
#define ARM_CPU_PART_NEOVERSE_N2 0xD49
@ -130,6 +131,7 @@
#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
#define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
#define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)

6
arch/arm64/include/asm/sdei.h
View File

@ -17,6 +17,9 @@
#include <asm/virt.h>
DECLARE_PER_CPU(struct sdei_registered_event *, sdei_active_normal_event);
DECLARE_PER_CPU(struct sdei_registered_event *, sdei_active_critical_event);
extern unsigned long sdei_exit_mode;
/* Software Delegated Exception entry point from firmware*/
@ -29,6 +32,9 @@ asmlinkage void __sdei_asm_entry_trampoline(unsigned long event_num,
unsigned long pc,
unsigned long pstate);
/* Abort a running handler. Context is discarded. */
void __sdei_handler_abort(void);
/*
* The above entry point does the minimum to call C code. This function does
* anything else, before calling the driver.

27
arch/arm64/kernel/entry.S
View File

@ -1238,9 +1238,13 @@ SYM_CODE_START(__sdei_asm_handler)
mov x19, x1
#if defined(CONFIG_VMAP_STACK) || defined(CONFIG_SHADOW_CALL_STACK)
/* Store the registered-event for crash_smp_send_stop() */
ldrb w4, [x19, #SDEI_EVENT_PRIORITY]
#endif
cbnz w4, 1f
adr_this_cpu dst=x5, sym=sdei_active_normal_event, tmp=x6
b 2f
1: adr_this_cpu dst=x5, sym=sdei_active_critical_event, tmp=x6
2: str x19, [x5]
#ifdef CONFIG_VMAP_STACK
/*
@ -1305,6 +1309,14 @@ SYM_CODE_START(__sdei_asm_handler)
ldr_l x2, sdei_exit_mode
/* Clear the registered-event seen by crash_smp_send_stop() */
ldrb w3, [x4, #SDEI_EVENT_PRIORITY]
cbnz w3, 1f
adr_this_cpu dst=x5, sym=sdei_active_normal_event, tmp=x6
b 2f
1: adr_this_cpu dst=x5, sym=sdei_active_critical_event, tmp=x6
2: str xzr, [x5]
alternative_if_not ARM64_UNMAP_KERNEL_AT_EL0
sdei_handler_exit exit_mode=x2
alternative_else_nop_endif
@ -1315,4 +1327,15 @@ alternative_else_nop_endif
#endif
SYM_CODE_END(__sdei_asm_handler)
NOKPROBE(__sdei_asm_handler)
SYM_CODE_START(__sdei_handler_abort)
mov_q x0, SDEI_1_0_FN_SDEI_EVENT_COMPLETE_AND_RESUME
adr x1, 1f
ldr_l x2, sdei_exit_mode
sdei_handler_exit exit_mode=x2
// exit the handler and jump to the next instruction.
// Exit will stomp x0-x17, PSTATE, ELR_ELx, and SPSR_ELx.
1: ret
SYM_CODE_END(__sdei_handler_abort)
NOKPROBE(__sdei_handler_abort)
#endif /* CONFIG_ARM_SDE_INTERFACE */

4
arch/arm64/kernel/hw_breakpoint.c
View File

@ -654,7 +654,7 @@ static int breakpoint_handler(unsigned long unused, unsigned int esr,
perf_bp_event(bp, regs);
/* Do we need to handle the stepping? */
if (is_default_overflow_handler(bp))
if (uses_default_overflow_handler(bp))
step = 1;
unlock:
rcu_read_unlock();
@ -733,7 +733,7 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,
static int watchpoint_report(struct perf_event *wp, unsigned long addr,
struct pt_regs *regs)
{
int step = is_default_overflow_handler(wp);
int step = uses_default_overflow_handler(wp);
struct arch_hw_breakpoint *info = counter_arch_bp(wp);
info->trigger = addr;

3
arch/arm64/kernel/module-plts.c
View File

@ -7,6 +7,7 @@
#include <linux/ftrace.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleloader.h>
#include <linux/slab.h>
#include <linux/sort.h>
@ -376,7 +377,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
if (nents)
sort(rels, nents, sizeof(Elf64_Rela), cmp_rela, NULL);
if (!str_has_prefix(secstrings + dstsec->sh_name, ".init"))
if (!module_init_layout_section(secstrings + dstsec->sh_name))
core_plts += count_plts(syms, rels, numrels,
sechdrs[i].sh_info, dstsec);
else

3
arch/arm64/kernel/sdei.c
View File

@ -39,6 +39,9 @@ DEFINE_PER_CPU(unsigned long *, sdei_stack_normal_ptr);
DEFINE_PER_CPU(unsigned long *, sdei_stack_critical_ptr);
#endif
DEFINE_PER_CPU(struct sdei_registered_event *, sdei_active_normal_event);
DEFINE_PER_CPU(struct sdei_registered_event *, sdei_active_critical_event);
DECLARE_PER_CPU(unsigned long *, sdei_shadow_call_stack_normal_ptr);
DECLARE_PER_CPU(unsigned long *, sdei_shadow_call_stack_critical_ptr);

8
arch/arm64/kernel/smp.c
View File

@ -1086,10 +1086,8 @@ void crash_smp_send_stop(void)
* If this cpu is the only one alive at this point in time, online or
* not, there are no stop messages to be sent around, so just back out.
*/
if (num_other_online_cpus() == 0) {
sdei_mask_local_cpu();
return;
}
if (num_other_online_cpus() == 0)
goto skip_ipi;
cpumask_copy(&mask, cpu_online_mask);
cpumask_clear_cpu(smp_processor_id(), &mask);
@ -1108,7 +1106,9 @@ void crash_smp_send_stop(void)
pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
cpumask_pr_args(&mask));
skip_ipi:
sdei_mask_local_cpu();
sdei_handler_abort();
}
bool smp_crash_stop_failed(void)

2
arch/arm64/lib/csum.c
View File

@ -24,7 +24,7 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len)
const u64 *ptr;
u64 data, sum64 = 0;
if (unlikely(len == 0))
if (unlikely(len <= 0))
return 0;
offset = (unsigned long)buff & 7;

4
arch/m68k/fpsp040/skeleton.S
View File

@ -499,12 +499,12 @@ in_ea:
dbf %d0,morein
rts
.section .fixup,#alloc,#execinstr
.section .fixup,"ax"
.even
1:
jbra fpsp040_die
.section __ex_table,#alloc
.section __ex_table,"a"
.align 4
.long in_ea,1b

4
arch/m68k/ifpsp060/os.S
View File

@ -379,11 +379,11 @@ _060_real_access:
| Execption handling for movs access to illegal memory
.section .fixup,#alloc,#execinstr
.section .fixup,"ax"
.even
1: moveq #-1,%d1
rts
.section __ex_table,#alloc
.section __ex_table,"a"
.align 4
.long dmrbuae,1b
.long dmrwuae,1b

4
arch/m68k/kernel/relocate_kernel.S
View File

@ -26,7 +26,7 @@ ENTRY(relocate_new_kernel)
lea %pc@(.Lcopy),%a4
2: addl #0x00000000,%a4 /* virt_to_phys() */
.section ".m68k_fixup","aw"
.section .m68k_fixup,"aw"
.long M68K_FIXUP_MEMOFFSET, 2b+2
.previous
@ -49,7 +49,7 @@ ENTRY(relocate_new_kernel)
lea %pc@(.Lcont040),%a4
5: addl #0x00000000,%a4 /* virt_to_phys() */
.section ".m68k_fixup","aw"
.section .m68k_fixup,"aw"
.long M68K_FIXUP_MEMOFFSET, 5b+2
.previous

27
arch/mips/alchemy/common/dbdma.c
View File

@ -30,7 +30,6 @@
*
*/
#include <linux/dma-map-ops.h> /* for dma_default_coherent */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/slab.h>
@ -624,18 +623,17 @@ u32 au1xxx_dbdma_put_source(u32 chanid, dma_addr_t buf, int nbytes, u32 flags)
dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
/*
* There is an erratum on certain Au1200/Au1550 revisions that could
* result in "stale" data being DMA'ed. It has to do with the snoop
* logic on the cache eviction buffer. dma_default_coherent is set
* to false on these parts.
* There is an errata on the Au1200/Au1550 parts that could result
* in "stale" data being DMA'ed. It has to do with the snoop logic on
* the cache eviction buffer. DMA_NONCOHERENT is on by default for
* these parts. If it is fixed in the future, these dma_cache_inv will
* just be nothing more than empty macros. See io.h.
*/
if (!dma_default_coherent)
dma_cache_wback_inv(KSEG0ADDR(buf), nbytes);
dma_cache_wback_inv((unsigned long)buf, nbytes);
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
wmb(); /* drain writebuffer */
dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
ctp->chan_ptr->ddma_dbell = 0;
wmb(); /* force doorbell write out to dma engine */
/* Get next descriptor pointer. */
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
@ -687,18 +685,17 @@ u32 au1xxx_dbdma_put_dest(u32 chanid, dma_addr_t buf, int nbytes, u32 flags)
dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
#endif
/*
* There is an erratum on certain Au1200/Au1550 revisions that could
* result in "stale" data being DMA'ed. It has to do with the snoop
* logic on the cache eviction buffer. dma_default_coherent is set
* to false on these parts.
* There is an errata on the Au1200/Au1550 parts that could result in
* "stale" data being DMA'ed. It has to do with the snoop logic on the
* cache eviction buffer. DMA_NONCOHERENT is on by default for these
* parts. If it is fixed in the future, these dma_cache_inv will just
* be nothing more than empty macros. See io.h.
*/
if (!dma_default_coherent)
dma_cache_inv(KSEG0ADDR(buf), nbytes);
dma_cache_inv((unsigned long)buf, nbytes);
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
wmb(); /* drain writebuffer */
dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
ctp->chan_ptr->ddma_dbell = 0;
wmb(); /* force doorbell write out to dma engine */
/* Get next descriptor pointer. */
ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));

12
arch/mips/alchemy/devboards/db1000.c
View File

@ -14,7 +14,6 @@
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/mmc/host.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/spi/spi.h>
@ -165,14 +164,10 @@ static struct platform_device db1x00_audio_dev = {
/******************************************************************************/
#ifdef CONFIG_MMC_AU1X
static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
{
void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m */
mmc_cd = symbol_get(mmc_detect_change);
mmc_cd(ptr, msecs_to_jiffies(500));
symbol_put(mmc_detect_change);
mmc_detect_change(ptr, msecs_to_jiffies(500));
return IRQ_HANDLED;
}
@ -375,6 +370,7 @@ static struct platform_device db1100_mmc1_dev = {
.num_resources = ARRAY_SIZE(au1100_mmc1_res),
.resource = au1100_mmc1_res,
};
#endif /* CONFIG_MMC_AU1X */
/******************************************************************************/
@ -438,8 +434,10 @@ static struct platform_device *db1x00_devs[] = {
static struct platform_device *db1100_devs[] = {
&au1100_lcd_device,
#ifdef CONFIG_MMC_AU1X
&db1100_mmc0_dev,
&db1100_mmc1_dev,
#endif
};
int __init db1000_dev_setup(void)

25
arch/mips/alchemy/devboards/db1200.c
View File

@ -10,7 +10,6 @@
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/leds.h>
@ -327,6 +326,7 @@ static struct platform_device db1200_ide_dev = {
/**********************************************************************/
#ifdef CONFIG_MMC_AU1X
/* SD carddetects: they're supposed to be edge-triggered, but ack
* doesn't seem to work (CPLD Rev 2). Instead, the screaming one
* is disabled and its counterpart enabled. The 200ms timeout is
@ -340,14 +340,7 @@ static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
static irqreturn_t db1200_mmc_cdfn(int irq, void *ptr)
{
void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m */
mmc_cd = symbol_get(mmc_detect_change);
if (mmc_cd) {
mmc_cd(ptr, msecs_to_jiffies(200));
symbol_put(mmc_detect_change);
}
mmc_detect_change(ptr, msecs_to_jiffies(200));
msleep(100); /* debounce */
if (irq == DB1200_SD0_INSERT_INT)
@ -431,14 +424,7 @@ static irqreturn_t pb1200_mmc1_cd(int irq, void *ptr)
static irqreturn_t pb1200_mmc1_cdfn(int irq, void *ptr)
{
void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m */
mmc_cd = symbol_get(mmc_detect_change);
if (mmc_cd) {
mmc_cd(ptr, msecs_to_jiffies(200));
symbol_put(mmc_detect_change);
}
mmc_detect_change(ptr, msecs_to_jiffies(200));
msleep(100); /* debounce */
if (irq == PB1200_SD1_INSERT_INT)
@ -599,6 +585,7 @@ static struct platform_device pb1200_mmc1_dev = {
.num_resources = ARRAY_SIZE(au1200_mmc1_res),
.resource = au1200_mmc1_res,
};
#endif /* CONFIG_MMC_AU1X */
/**********************************************************************/
@ -766,7 +753,9 @@ static struct platform_device db1200_audiodma_dev = {
static struct platform_device *db1200_devs[] __initdata = {
NULL, /* PSC0, selected by S6.8 */
&db1200_ide_dev,
#ifdef CONFIG_MMC_AU1X
&db1200_mmc0_dev,
#endif
&au1200_lcd_dev,
&db1200_eth_dev,
&db1200_nand_dev,
@ -777,7 +766,9 @@ static struct platform_device *db1200_devs[] __initdata = {
};
static struct platform_device *pb1200_devs[] __initdata = {
#ifdef CONFIG_MMC_AU1X
&pb1200_mmc1_dev,
#endif
};
/* Some peripheral base addresses differ on the PB1200 */

14
arch/mips/alchemy/devboards/db1300.c
View File

@ -17,7 +17,6 @@
#include <linux/interrupt.h>
#include <linux/ata_platform.h>
#include <linux/mmc/host.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/platnand.h>
#include <linux/platform_device.h>
@ -451,6 +450,7 @@ static struct platform_device db1300_ide_dev = {
/**********************************************************************/
#ifdef CONFIG_MMC_AU1X
static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
{
disable_irq_nosync(irq);
@ -459,14 +459,7 @@ static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
{
void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m. We can only be called once MMC core has
* initialized the controller, so symbol_get() should always succeed.
*/
mmc_cd = symbol_get(mmc_detect_change);
mmc_cd(ptr, msecs_to_jiffies(200));
symbol_put(mmc_detect_change);
mmc_detect_change(ptr, msecs_to_jiffies(200));
msleep(100); /* debounce */
if (irq == DB1300_SD1_INSERT_INT)
@ -640,6 +633,7 @@ static struct platform_device db1300_sd0_dev = {
.resource = au1300_sd0_res,
.num_resources = ARRAY_SIZE(au1300_sd0_res),
};
#endif /* CONFIG_MMC_AU1X */
/**********************************************************************/
@ -784,8 +778,10 @@ static struct platform_device *db1300_dev[] __initdata = {
&db1300_5waysw_dev,
&db1300_nand_dev,
&db1300_ide_dev,
#ifdef CONFIG_MMC_AU1X
&db1300_sd0_dev,
&db1300_sd1_dev,
#endif
&db1300_lcd_dev,
&db1300_ac97_dev,
&db1300_i2s_dev,

21
arch/mips/include/asm/cpu-features.h
View File

@ -126,7 +126,24 @@
#define cpu_has_tx39_cache __opt(MIPS_CPU_TX39_CACHE)
#endif
#ifndef cpu_has_octeon_cache
#define cpu_has_octeon_cache 0
#define cpu_has_octeon_cache \
({ \
int __res; \
\
switch (boot_cpu_type()) { \
case CPU_CAVIUM_OCTEON: \
case CPU_CAVIUM_OCTEON_PLUS: \
case CPU_CAVIUM_OCTEON2: \
case CPU_CAVIUM_OCTEON3: \
__res = 1; \
break; \
\
default: \
__res = 0; \
} \
\
__res; \
})
#endif
/* Don't override `cpu_has_fpu' to 1 or the "nofpu" option won't work. */
#ifndef cpu_has_fpu
@ -353,7 +370,7 @@
({ \
int __res; \
\
switch (current_cpu_type()) { \
switch (boot_cpu_type()) { \
case CPU_M14KC: \
case CPU_74K: \
case CPU_1074K: \

2
arch/mips/include/asm/dec/prom.h
View File

@ -70,7 +70,7 @@ static inline bool prom_is_rex(u32 magic)
*/
typedef struct {
int pagesize;
unsigned char bitmap[0];
unsigned char bitmap[];
} memmap;

36
arch/parisc/include/asm/ldcw.h
View File

@ -2,14 +2,28 @@
#ifndef __PARISC_LDCW_H
#define __PARISC_LDCW_H
#ifndef CONFIG_PA20
/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
and GCC only guarantees 8-byte alignment for stack locals, we can't
be assured of 16-byte alignment for atomic lock data even if we
specify "__attribute ((aligned(16)))" in the type declaration. So,
we use a struct containing an array of four ints for the atomic lock
type and dynamically select the 16-byte aligned int from the array
for the semaphore. */
for the semaphore. */
/* From: "Jim Hull" <jim.hull of hp.com>
I've attached a summary of the change, but basically, for PA 2.0, as
long as the ",CO" (coherent operation) completer is implemented, then the
16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
they only require "natural" alignment (4-byte for ldcw, 8-byte for
ldcd).
Although the cache control hint is accepted by all PA 2.0 processors,
it is only implemented on PA8800/PA8900 CPUs. Prior PA8X00 CPUs still
require 16-byte alignment. If the address is unaligned, the operation
of the instruction is undefined. The ldcw instruction does not generate
unaligned data reference traps so misaligned accesses are not detected.
This hid the problem for years. So, restore the 16-byte alignment dropped
by Kyle McMartin in "Remove __ldcw_align for PA-RISC 2.0 processors". */
#define __PA_LDCW_ALIGNMENT 16
#define __PA_LDCW_ALIGN_ORDER 4
@ -19,22 +33,12 @@
& ~(__PA_LDCW_ALIGNMENT - 1); \
(volatile unsigned int *) __ret; \
})
#define __LDCW "ldcw"
#else /*CONFIG_PA20*/
/* From: "Jim Hull" <jim.hull of hp.com>
I've attached a summary of the change, but basically, for PA 2.0, as
long as the ",CO" (coherent operation) completer is specified, then the
16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
they only require "natural" alignment (4-byte for ldcw, 8-byte for
ldcd). */
#define __PA_LDCW_ALIGNMENT 4
#define __PA_LDCW_ALIGN_ORDER 2
#define __ldcw_align(a) (&(a)->slock)
#ifdef CONFIG_PA20
#define __LDCW "ldcw,co"
#endif /*!CONFIG_PA20*/
#else
#define __LDCW "ldcw"
#endif
/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.
We don't explicitly expose that "*a" may be written as reload

4
arch/parisc/include/asm/led.h
View File

@ -11,8 +11,8 @@
#define LED1 0x02
#define LED0 0x01 /* bottom (or furthest left) LED */
#define LED_LAN_TX LED0 /* for LAN transmit activity */
#define LED_LAN_RCV LED1 /* for LAN receive activity */
#define LED_LAN_RCV LED0 /* for LAN receive activity */
#define LED_LAN_TX LED1 /* for LAN transmit activity */
#define LED_DISK_IO LED2 /* for disk activity */
#define LED_HEARTBEAT LED3 /* heartbeat */

1
arch/parisc/include/asm/processor.h
View File

@ -97,7 +97,6 @@ struct cpuinfo_parisc {
unsigned long cpu_loc; /* CPU location from PAT firmware */
unsigned int state;
struct parisc_device *dev;
unsigned long loops_per_jiffy;
};
extern struct system_cpuinfo_parisc boot_cpu_data;

3
arch/parisc/include/asm/ropes.h
View File

@ -86,6 +86,9 @@ struct sba_device {
struct ioc ioc[MAX_IOC];
};
/* list of SBA's in system, see drivers/parisc/sba_iommu.c */
extern struct sba_device *sba_list;
#define ASTRO_RUNWAY_PORT 0x582
#define IKE_MERCED_PORT 0x803
#define REO_MERCED_PORT 0x804

5
arch/parisc/include/asm/spinlock_types.h
View File

@ -3,13 +3,8 @@
#define __ASM_SPINLOCK_TYPES_H
typedef struct {
#ifdef CONFIG_PA20
volatile unsigned int slock;
# define __ARCH_SPIN_LOCK_UNLOCKED { 1 }
#else
volatile unsigned int lock[4];
# define __ARCH_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } }
#endif
} arch_spinlock_t;

2
arch/parisc/kernel/drivers.c
View File

@ -925,9 +925,9 @@ static __init void qemu_header(void)
pr_info("#define PARISC_MODEL \"%s\"\n\n",
boot_cpu_data.pdc.sys_model_name);
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
#undef p

2
arch/parisc/kernel/irq.c
View File

@ -388,7 +388,7 @@ union irq_stack_union {
volatile unsigned int lock[1];
};
DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
static DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
.slock = { 1,1,1,1 },
};
#endif

18
arch/parisc/kernel/processor.c
View File

@ -163,7 +163,6 @@ static int __init processor_probe(struct parisc_device *dev)
if (cpuid)
memset(p, 0, sizeof(struct cpuinfo_parisc));
p->loops_per_jiffy = loops_per_jiffy;
p->dev = dev; /* Save IODC data in case we need it */
p->hpa = dev->hpa.start; /* save CPU hpa */
p->cpuid = cpuid; /* save CPU id */
@ -373,10 +372,18 @@ int
show_cpuinfo (struct seq_file *m, void *v)
{
unsigned long cpu;
char cpu_name[60], *p;
/* strip PA path from CPU name to not confuse lscpu */
strlcpy(cpu_name, per_cpu(cpu_data, 0).dev->name, sizeof(cpu_name));
p = strrchr(cpu_name, '[');
if (p)
*(--p) = 0;
for_each_online_cpu(cpu) {
const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
#ifdef CONFIG_SMP
const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
if (0 == cpuinfo->hpa)
continue;
#endif
@ -421,8 +428,7 @@ show_cpuinfo (struct seq_file *m, void *v)
seq_printf(m, "model\t\t: %s - %s\n",
boot_cpu_data.pdc.sys_model_name,
cpuinfo->dev ?
cpuinfo->dev->name : "Unknown");
cpu_name);
seq_printf(m, "hversion\t: 0x%08x\n"
"sversion\t: 0x%08x\n",
@ -433,8 +439,8 @@ show_cpuinfo (struct seq_file *m, void *v)
show_cache_info(m);
seq_printf(m, "bogomips\t: %lu.%02lu\n",
cpuinfo->loops_per_jiffy / (500000 / HZ),
(cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
loops_per_jiffy / (500000 / HZ),
loops_per_jiffy / (5000 / HZ) % 100);
seq_printf(m, "software id\t: %ld\n\n",
boot_cpu_data.pdc.model.sw_id);

13
arch/powerpc/include/asm/lppaca.h
View File

@ -45,6 +45,7 @@
#include <asm/types.h>
#include <asm/mmu.h>
#include <asm/firmware.h>
#include <asm/paca.h>
/*
* The lppaca is the "virtual processor area" registered with the hypervisor,
@ -123,13 +124,23 @@ struct lppaca {
*/
#define LPPACA_OLD_SHARED_PROC 2
static inline bool lppaca_shared_proc(struct lppaca *l)
#ifdef CONFIG_PPC_PSERIES
/*
* All CPUs should have the same shared proc value, so directly access the PACA
* to avoid false positives from DEBUG_PREEMPT.
*/
static inline bool lppaca_shared_proc(void)
{
struct lppaca *l = local_paca->lppaca_ptr;
if (!firmware_has_feature(FW_FEATURE_SPLPAR))
return false;
return !!(l->__old_status & LPPACA_OLD_SHARED_PROC);
}
#define get_lppaca() (get_paca()->lppaca_ptr)
#endif
/*
* SLB shadow buffer structure as defined in the PAPR. The save_area
* contains adjacent ESID and VSID pairs for each shadowed SLB. The

6
arch/powerpc/include/asm/paca.h
View File

@ -15,7 +15,6 @@
#include <linux/cache.h>
#include <linux/string.h>
#include <asm/types.h>
#include <asm/lppaca.h>
#include <asm/mmu.h>
#include <asm/page.h>
#ifdef CONFIG_PPC_BOOK3E
@ -46,14 +45,11 @@ extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
#define get_paca() local_paca
#endif
#ifdef CONFIG_PPC_PSERIES
#define get_lppaca() (get_paca()->lppaca_ptr)
#endif
#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
struct task_struct;
struct rtas_args;
struct lppaca;
/*
* Defines the layout of the paca.

1
arch/powerpc/include/asm/paravirt.h
View File

@ -6,6 +6,7 @@
#include <asm/smp.h>
#ifdef CONFIG_PPC64
#include <asm/paca.h>
#include <asm/lppaca.h>
#include <asm/hvcall.h>
#endif

1
arch/powerpc/include/asm/plpar_wrappers.h
View File

@ -9,6 +9,7 @@
#include <asm/hvcall.h>
#include <asm/paca.h>
#include <asm/lppaca.h>
#include <asm/page.h>
static inline long poll_pending(void)

2
arch/powerpc/include/asm/word-at-a-time.h
View File

@ -34,7 +34,7 @@ static inline long find_zero(unsigned long mask)
return leading_zero_bits >> 3;
}
static inline bool has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c)
static inline unsigned long has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c)
{
unsigned long rhs = val | c->low_bits;
*data = rhs;

1
arch/powerpc/kernel/fadump.c
View File

@ -642,6 +642,7 @@ int __init fadump_reserve_mem(void)
return ret;
error_out:
fw_dump.fadump_enabled = 0;
fw_dump.reserve_dump_area_size = 0;
return 0;
}

7
arch/powerpc/kernel/hw_breakpoint.c
View File

@ -479,11 +479,13 @@ void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
struct arch_hw_breakpoint *info;
int i;
preempt_disable();
for (i = 0; i < nr_wp_slots(); i++) {
if (unlikely(tsk->thread.last_hit_ubp[i]))
goto reset;
}
return;
goto out;
reset:
regs->msr &= ~MSR_SE;
@ -492,6 +494,9 @@ void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
__set_breakpoint(i, info);
tsk->thread.last_hit_ubp[i] = NULL;
}
out:
preempt_enable();
}
static bool is_larx_stcx_instr(int type)

17
arch/powerpc/kernel/iommu.c
View File

@ -133,17 +133,28 @@ static int fail_iommu_bus_notify(struct notifier_block *nb,
return 0;
}
static struct notifier_block fail_iommu_bus_notifier = {
/*
* PCI and VIO buses need separate notifier_block structs, since they're linked
* list nodes. Sharing a notifier_block would mean that any notifiers later
* registered for PCI buses would also get called by VIO buses and vice versa.
*/
static struct notifier_block fail_iommu_pci_bus_notifier = {
.notifier_call = fail_iommu_bus_notify
};
#ifdef CONFIG_IBMVIO
static struct notifier_block fail_iommu_vio_bus_notifier = {
.notifier_call = fail_iommu_bus_notify
};
#endif
static int __init fail_iommu_setup(void)
{
#ifdef CONFIG_PCI
bus_register_notifier(&pci_bus_type, &fail_iommu_bus_notifier);
bus_register_notifier(&pci_bus_type, &fail_iommu_pci_bus_notifier);
#endif
#ifdef CONFIG_IBMVIO
bus_register_notifier(&vio_bus_type, &fail_iommu_bus_notifier);
bus_register_notifier(&vio_bus_type, &fail_iommu_vio_bus_notifier);
#endif
return 0;

6
arch/powerpc/kernel/rtas_flash.c
View File

@ -710,9 +710,9 @@ static int __init rtas_flash_init(void)
if (!rtas_validate_flash_data.buf)
return -ENOMEM;
flash_block_cache = kmem_cache_create("rtas_flash_cache",
RTAS_BLK_SIZE, RTAS_BLK_SIZE, 0,
NULL);
flash_block_cache = kmem_cache_create_usercopy("rtas_flash_cache",
RTAS_BLK_SIZE, RTAS_BLK_SIZE,
0, 0, RTAS_BLK_SIZE, NULL);
if (!flash_block_cache) {
printk(KERN_ERR "%s: failed to create block cache\n",
__func__);

1
arch/powerpc/kvm/book3s_hv_ras.c
View File

@ -9,6 +9,7 @@
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/kernel.h>
#include <asm/lppaca.h>
#include <asm/opal.h>
#include <asm/mce.h>
#include <asm/machdep.h>

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