PCI: xilinx-nwl: Fix register misspelling
[ Upstream commit a437027ae1730b8dc379c75fa0dd7d3036917400 ]
MSIC -> MISC
Fixes: c2a7ff18ed
("PCI: xilinx-nwl: Expand error logging")
Link: https://lore.kernel.org/r/20240531161337.864994-4-sean.anderson@linux.dev
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -79,8 +79,8 @@
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#define MSGF_MISC_SR_NON_FATAL_DEV BIT(22)
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#define MSGF_MISC_SR_FATAL_DEV BIT(23)
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#define MSGF_MISC_SR_LINK_DOWN BIT(24)
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#define MSGF_MSIC_SR_LINK_AUTO_BWIDTH BIT(25)
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#define MSGF_MSIC_SR_LINK_BWIDTH BIT(26)
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#define MSGF_MISC_SR_LINK_AUTO_BWIDTH BIT(25)
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#define MSGF_MISC_SR_LINK_BWIDTH BIT(26)
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#define MSGF_MISC_SR_MASKALL (MSGF_MISC_SR_RXMSG_AVAIL | \
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MSGF_MISC_SR_RXMSG_OVER | \
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@ -95,8 +95,8 @@
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MSGF_MISC_SR_NON_FATAL_DEV | \
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MSGF_MISC_SR_FATAL_DEV | \
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MSGF_MISC_SR_LINK_DOWN | \
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MSGF_MSIC_SR_LINK_AUTO_BWIDTH | \
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MSGF_MSIC_SR_LINK_BWIDTH)
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MSGF_MISC_SR_LINK_AUTO_BWIDTH | \
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MSGF_MISC_SR_LINK_BWIDTH)
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/* Legacy interrupt status mask bits */
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#define MSGF_LEG_SR_INTA BIT(0)
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@ -305,10 +305,10 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, void *data)
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if (misc_stat & MSGF_MISC_SR_FATAL_DEV)
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dev_err(dev, "Fatal Error Detected\n");
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if (misc_stat & MSGF_MSIC_SR_LINK_AUTO_BWIDTH)
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if (misc_stat & MSGF_MISC_SR_LINK_AUTO_BWIDTH)
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dev_info(dev, "Link Autonomous Bandwidth Management Status bit set\n");
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if (misc_stat & MSGF_MSIC_SR_LINK_BWIDTH)
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if (misc_stat & MSGF_MISC_SR_LINK_BWIDTH)
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dev_info(dev, "Link Bandwidth Management Status bit set\n");
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/* Clear misc interrupt status */
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