Merge 5.10.14 into android12-5.10
Changes in 5.10.14
net: dsa: microchip: Adjust reset release timing to match reference reset circuit
net: stmmac: dwmac-intel-plat: remove config data on error
net: fec: put child node on error path
net: octeontx2: Make sure the buffer is 128 byte aligned
stmmac: intel: Configure EHL PSE0 GbE and PSE1 GbE to 32 bits DMA addressing
mlxsw: spectrum_span: Do not overwrite policer configuration
net: dsa: bcm_sf2: put device node before return
net: switchdev: don't set port_obj_info->handled true when -EOPNOTSUPP
ibmvnic: Ensure that CRQ entry read are correctly ordered
iommu/io-pgtable-arm: Support coherency for Mali LPAE
drm/panfrost: Support cache-coherent integrations
arm64: dts: meson: Describe G12b GPU as coherent
arm64: Fix kernel address detection of __is_lm_address()
arm64: Do not pass tagged addresses to __is_lm_address()
Revert "x86/setup: don't remove E820_TYPE_RAM for pfn 0"
ARM: 9025/1: Kconfig: CPU_BIG_ENDIAN depends on !LD_IS_LLD
iommu/vt-d: Do not use flush-queue when caching-mode is on
phy: cpcap-usb: Fix warning for missing regulator_disable
tools/power/x86/intel-speed-select: Set scaling_max_freq to base_frequency
tools/power/x86/intel-speed-select: Set higher of cpuinfo_max_freq or base_frequency
platform/x86: touchscreen_dmi: Add swap-x-y quirk for Goodix touchscreen on Estar Beauty HD tablet
platform/x86: intel-vbtn: Support for tablet mode on Dell Inspiron 7352
habanalabs: fix dma_addr passed to dma_mmap_coherent
locking/lockdep: Avoid noinstr warning for DEBUG_LOCKDEP
x86: __always_inline __{rd,wr}msr()
scsi: scsi_transport_srp: Don't block target in failfast state
scsi: libfc: Avoid invoking response handler twice if ep is already completed
scsi: fnic: Fix memleak in vnic_dev_init_devcmd2
ASoC: SOF: Intel: hda: Resume codec to do jack detection
ALSA: hda: Add AlderLake-P PCI ID and HDMI codec vid
objtool: Don't add empty symbols to the rbtree
mac80211: fix incorrect strlen of .write in debugfs
mac80211: fix fast-rx encryption check
mac80211: fix encryption key selection for 802.3 xmit
scsi: ibmvfc: Set default timeout to avoid crash during migration
ALSA: hda: Add Cometlake-R PCI ID
i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO
udf: fix the problem that the disc content is not displayed
nvme: check the PRINFO bit before deciding the host buffer length
nvme-rdma: avoid request double completion for concurrent nvme_rdma_timeout
nvme-tcp: avoid request double completion for concurrent nvme_tcp_timeout
nvme-pci: allow use of cmb on v1.4 controllers
nvmet: set right status on error in id-ns handler
platform/x86: thinkpad_acpi: Add P53/73 firmware to fan_quirk_table for dual fan control
selftests/powerpc: Only test lwm/stmw on big endian
drm/amd/display: Update dram_clock_change_latency for DCN2.1
drm/amd/display: Allow PSTATE chnage when no displays are enabled
drm/amd/display: Change function decide_dp_link_settings to avoid infinite looping
drm/amd/display: Use hardware sequencer functions for PG control
drm/amd/display: Fixed corruptions on HPDRX link loss restore
habanalabs: zero pci counters packet before submit to FW
habanalabs: fix backward compatibility of idle check
habanalabs: disable FW events on device removal
objtool: Don't fail the kernel build on fatal errors
x86/cpu: Add another Alder Lake CPU to the Intel family
kthread: Extract KTHREAD_IS_PER_CPU
workqueue: Restrict affinity change to rescuer
Linux 5.10.14
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I14bb472e4128e97ea84e91547b9223d1157b93c8
This commit is contained in:
Greg Kroah-Hartman
Alistair Delva
commit
d0d8327012
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
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||||
VERSION = 5
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||||
PATCHLEVEL = 10
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||||
SUBLEVEL = 13
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||||
SUBLEVEL = 14
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||||
EXTRAVERSION =
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||||
NAME = Kleptomaniac Octopus
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||||
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||||
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@ -743,6 +743,7 @@ config SWP_EMULATE
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config CPU_BIG_ENDIAN
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bool "Build big-endian kernel"
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depends on ARCH_SUPPORTS_BIG_ENDIAN
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depends on !LD_IS_LLD
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help
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Say Y if you plan on running a kernel in big-endian mode.
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Note that your board must be properly built and your board
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@ -135,3 +135,7 @@ map1 {
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};
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};
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};
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&mali {
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dma-coherent;
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};
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@ -249,11 +249,11 @@ static inline const void *__tag_set(const void *addr, u8 tag)
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/*
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* The linear kernel range starts at the bottom of the virtual address
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* space. Testing the top bit for the start of the region is a
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* sufficient check and avoids having to worry about the tag.
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* Check whether an arbitrary address is within the linear map, which
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* lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the
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* kernel's TTBR1 address range.
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*/
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#define __is_lm_address(addr) (!(((u64)addr) & BIT(vabits_actual - 1)))
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#define __is_lm_address(addr) (((u64)(addr) ^ PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET))
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#define __lm_to_phys(addr) (((addr) & ~PAGE_OFFSET) + PHYS_OFFSET)
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#define __kimg_to_phys(addr) ((addr) - kimage_voffset)
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@ -352,7 +352,7 @@ static inline void *phys_to_virt(phys_addr_t x)
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#endif /* !CONFIG_SPARSEMEM_VMEMMAP || CONFIG_DEBUG_VIRTUAL */
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#define virt_addr_valid(addr) ({ \
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__typeof__(addr) __addr = addr; \
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__typeof__(addr) __addr = __tag_reset(addr); \
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__is_lm_address(__addr) && pfn_valid(virt_to_pfn(__addr)); \
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})
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@ -9,7 +9,7 @@
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phys_addr_t __virt_to_phys(unsigned long x)
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{
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WARN(!__is_lm_address(x),
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WARN(!__is_lm_address(__tag_reset(x)),
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"virt_to_phys used for non-linear address: %pK (%pS)\n",
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(void *)x,
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(void *)x);
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@ -97,6 +97,7 @@
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#define INTEL_FAM6_LAKEFIELD 0x8A
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#define INTEL_FAM6_ALDERLAKE 0x97
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#define INTEL_FAM6_ALDERLAKE_L 0x9A
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/* "Small Core" Processors (Atom) */
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@ -86,7 +86,7 @@ static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {}
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* think of extending them - you will be slapped with a stinking trout or a frozen
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* shark will reach you, wherever you are! You've been warned.
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*/
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static inline unsigned long long notrace __rdmsr(unsigned int msr)
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static __always_inline unsigned long long __rdmsr(unsigned int msr)
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{
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DECLARE_ARGS(val, low, high);
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@ -98,7 +98,7 @@ static inline unsigned long long notrace __rdmsr(unsigned int msr)
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return EAX_EDX_VAL(val, low, high);
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}
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static inline void notrace __wrmsr(unsigned int msr, u32 low, u32 high)
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static __always_inline void __wrmsr(unsigned int msr, u32 low, u32 high)
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{
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asm volatile("1: wrmsr\n"
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"2:\n"
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@ -665,6 +665,17 @@ static void __init trim_platform_memory_ranges(void)
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static void __init trim_bios_range(void)
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{
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/*
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* A special case is the first 4Kb of memory;
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* This is a BIOS owned area, not kernel ram, but generally
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* not listed as such in the E820 table.
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*
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* This typically reserves additional memory (64KiB by default)
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* since some BIOSes are known to corrupt low memory. See the
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* Kconfig help text for X86_RESERVE_LOW.
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*/
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e820__range_update(0, PAGE_SIZE, E820_TYPE_RAM, E820_TYPE_RESERVED);
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/*
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* special case: Some BIOSes report the PC BIOS
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* area (640Kb -> 1Mb) as RAM even though it is not.
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@ -722,15 +733,6 @@ early_param("reservelow", parse_reservelow);
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static void __init trim_low_memory_range(void)
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{
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/*
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* A special case is the first 4Kb of memory;
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* This is a BIOS owned area, not kernel ram, but generally
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* not listed as such in the E820 table.
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*
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* This typically reserves additional memory (64KiB by default)
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* since some BIOSes are known to corrupt low memory. See the
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* Kconfig help text for X86_RESERVE_LOW.
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*/
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memblock_reserve(0, ALIGN(reserve_low, PAGE_SIZE));
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}
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@ -239,6 +239,7 @@ static void dcn3_update_clocks(struct clk_mgr *clk_mgr_base,
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struct dmcu *dmcu = clk_mgr_base->ctx->dc->res_pool->dmcu;
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bool force_reset = false;
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bool update_uclk = false;
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bool p_state_change_support;
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if (dc->work_arounds.skip_clock_update || !clk_mgr->smu_present)
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return;
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@ -279,8 +280,9 @@ static void dcn3_update_clocks(struct clk_mgr *clk_mgr_base,
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clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz;
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clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support;
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if (should_update_pstate_support(safe_to_lower, new_clocks->p_state_change_support, clk_mgr_base->clks.p_state_change_support)) {
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clk_mgr_base->clks.p_state_change_support = new_clocks->p_state_change_support;
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p_state_change_support = new_clocks->p_state_change_support || (display_count == 0);
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if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_change_support)) {
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clk_mgr_base->clks.p_state_change_support = p_state_change_support;
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/* to disable P-State switching, set UCLK min = max */
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if (!clk_mgr_base->clks.p_state_change_support)
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@ -2375,6 +2375,9 @@ static bool decide_dp_link_settings(struct dc_link *link, struct dc_link_setting
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initial_link_setting;
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uint32_t link_bw;
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if (req_bw > dc_link_bandwidth_kbps(link, &link->verified_link_cap))
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return false;
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/* search for the minimum link setting that:
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* 1. is supported according to the link training result
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* 2. could support the b/w requested by the timing
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@ -3020,14 +3023,14 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link *link, union hpd_irq_data *out_hpd
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for (i = 0; i < MAX_PIPES; i++) {
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pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
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if (pipe_ctx && pipe_ctx->stream && !pipe_ctx->stream->dpms_off &&
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pipe_ctx->stream->link == link)
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pipe_ctx->stream->link == link && !pipe_ctx->prev_odm_pipe)
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core_link_disable_stream(pipe_ctx);
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}
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for (i = 0; i < MAX_PIPES; i++) {
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pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
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if (pipe_ctx && pipe_ctx->stream && !pipe_ctx->stream->dpms_off &&
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pipe_ctx->stream->link == link)
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pipe_ctx->stream->link == link && !pipe_ctx->prev_odm_pipe)
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core_link_enable_stream(link->dc->current_state, pipe_ctx);
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}
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@ -646,8 +646,13 @@ static void power_on_plane(
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if (REG(DC_IP_REQUEST_CNTL)) {
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REG_SET(DC_IP_REQUEST_CNTL, 0,
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IP_REQUEST_EN, 1);
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hws->funcs.dpp_pg_control(hws, plane_id, true);
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hws->funcs.hubp_pg_control(hws, plane_id, true);
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if (hws->funcs.dpp_pg_control)
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hws->funcs.dpp_pg_control(hws, plane_id, true);
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if (hws->funcs.hubp_pg_control)
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hws->funcs.hubp_pg_control(hws, plane_id, true);
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REG_SET(DC_IP_REQUEST_CNTL, 0,
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IP_REQUEST_EN, 0);
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DC_LOG_DEBUG(
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@ -1079,8 +1084,13 @@ void dcn10_plane_atomic_power_down(struct dc *dc,
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if (REG(DC_IP_REQUEST_CNTL)) {
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REG_SET(DC_IP_REQUEST_CNTL, 0,
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IP_REQUEST_EN, 1);
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hws->funcs.dpp_pg_control(hws, dpp->inst, false);
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hws->funcs.hubp_pg_control(hws, hubp->inst, false);
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if (hws->funcs.dpp_pg_control)
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hws->funcs.dpp_pg_control(hws, dpp->inst, false);
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if (hws->funcs.hubp_pg_control)
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hws->funcs.hubp_pg_control(hws, hubp->inst, false);
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dpp->funcs->dpp_reset(dpp);
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REG_SET(DC_IP_REQUEST_CNTL, 0,
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IP_REQUEST_EN, 0);
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@ -1069,8 +1069,13 @@ static void dcn20_power_on_plane(
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if (REG(DC_IP_REQUEST_CNTL)) {
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REG_SET(DC_IP_REQUEST_CNTL, 0,
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IP_REQUEST_EN, 1);
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dcn20_dpp_pg_control(hws, pipe_ctx->plane_res.dpp->inst, true);
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dcn20_hubp_pg_control(hws, pipe_ctx->plane_res.hubp->inst, true);
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if (hws->funcs.dpp_pg_control)
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hws->funcs.dpp_pg_control(hws, pipe_ctx->plane_res.dpp->inst, true);
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if (hws->funcs.hubp_pg_control)
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hws->funcs.hubp_pg_control(hws, pipe_ctx->plane_res.hubp->inst, true);
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REG_SET(DC_IP_REQUEST_CNTL, 0,
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IP_REQUEST_EN, 0);
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DC_LOG_DEBUG(
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@ -295,7 +295,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
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.num_banks = 8,
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.num_chans = 4,
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.vmm_page_size_bytes = 4096,
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.dram_clock_change_latency_us = 23.84,
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.dram_clock_change_latency_us = 11.72,
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.return_bus_width_bytes = 64,
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.dispclk_dppclk_vco_speed_mhz = 3600,
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.xfc_bus_transport_time_us = 4,
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@ -88,6 +88,7 @@ struct panfrost_device {
|
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/* pm_domains for devices with more than one. */
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struct device *pm_domain_devs[MAX_PM_DOMAINS];
|
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struct device_link *pm_domain_links[MAX_PM_DOMAINS];
|
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bool coherent;
|
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|
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struct panfrost_features features;
|
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const struct panfrost_compatible *comp;
|
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|
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@ -587,6 +587,8 @@ static int panfrost_probe(struct platform_device *pdev)
|
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if (!pfdev->comp)
|
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return -ENODEV;
|
||||
|
||||
pfdev->coherent = device_get_dma_attr(&pdev->dev) == DEV_DMA_COHERENT;
|
||||
|
||||
/* Allocate and initialze the DRM device. */
|
||||
ddev = drm_dev_alloc(&panfrost_drm_driver, &pdev->dev);
|
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if (IS_ERR(ddev))
|
||||
|
||||
@ -218,6 +218,7 @@ static const struct drm_gem_object_funcs panfrost_gem_funcs = {
|
||||
*/
|
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struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, size_t size)
|
||||
{
|
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struct panfrost_device *pfdev = dev->dev_private;
|
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struct panfrost_gem_object *obj;
|
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|
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obj = kzalloc(sizeof(*obj), GFP_KERNEL);
|
||||
@ -227,6 +228,7 @@ struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, size_t
|
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INIT_LIST_HEAD(&obj->mappings.list);
|
||||
mutex_init(&obj->mappings.lock);
|
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obj->base.base.funcs = &panfrost_gem_funcs;
|
||||
obj->base.map_cached = pfdev->coherent;
|
||||
|
||||
return &obj->base.base;
|
||||
}
|
||||
|
||||
@ -371,6 +371,7 @@ int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv)
|
||||
.pgsize_bitmap = SZ_4K | SZ_2M,
|
||||
.ias = FIELD_GET(0xff, pfdev->features.mmu_features),
|
||||
.oas = FIELD_GET(0xff00, pfdev->features.mmu_features),
|
||||
.coherent_walk = pfdev->coherent,
|
||||
.tlb = &mmu_tlb_ops,
|
||||
.iommu_dev = pfdev->dev,
|
||||
};
|
||||
|
||||
@ -326,6 +326,8 @@ static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg)
|
||||
/* read back register to make sure that register writes completed */
|
||||
if (reg != I2C_TX_FIFO)
|
||||
readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
|
||||
else if (i2c_dev->is_vi)
|
||||
readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS));
|
||||
}
|
||||
|
||||
static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg)
|
||||
@ -339,6 +341,21 @@ static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
|
||||
writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
|
||||
}
|
||||
|
||||
static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data,
|
||||
unsigned int reg, unsigned int len)
|
||||
{
|
||||
u32 *data32 = data;
|
||||
|
||||
/*
|
||||
* VI I2C controller has known hardware bug where writes get stuck
|
||||
* when immediate multiple writes happen to TX_FIFO register.
|
||||
* Recommended software work around is to read I2C register after
|
||||
* each write to TX_FIFO register to flush out the data.
|
||||
*/
|
||||
while (len--)
|
||||
i2c_writel(i2c_dev, *data32++, reg);
|
||||
}
|
||||
|
||||
static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,
|
||||
unsigned int reg, unsigned int len)
|
||||
{
|
||||
@ -811,7 +828,10 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
|
||||
i2c_dev->msg_buf_remaining = buf_remaining;
|
||||
i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD;
|
||||
|
||||
i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
|
||||
if (i2c_dev->is_vi)
|
||||
i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
|
||||
else
|
||||
i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
|
||||
|
||||
buf += words_to_transfer * BYTES_PER_FIFO_WORD;
|
||||
}
|
||||
|
||||
@ -3350,6 +3350,11 @@ static int __init init_dmars(void)
|
||||
|
||||
if (!ecap_pass_through(iommu->ecap))
|
||||
hw_pass_through = 0;
|
||||
|
||||
if (!intel_iommu_strict && cap_caching_mode(iommu->cap)) {
|
||||
pr_warn("Disable batched IOTLB flush due to virtualization");
|
||||
intel_iommu_strict = 1;
|
||||
}
|
||||
intel_svm_check(iommu);
|
||||
}
|
||||
|
||||
|
||||
@ -425,7 +425,13 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data,
|
||||
<< ARM_LPAE_PTE_ATTRINDX_SHIFT);
|
||||
}
|
||||
|
||||
if (prot & IOMMU_CACHE)
|
||||
/*
|
||||
* Also Mali has its own notions of shareability wherein its Inner
|
||||
* domain covers the cores within the GPU, and its Outer domain is
|
||||
* "outside the GPU" (i.e. either the Inner or System domain in CPU
|
||||
* terms, depending on coherency).
|
||||
*/
|
||||
if (prot & IOMMU_CACHE && data->iop.fmt != ARM_MALI_LPAE)
|
||||
pte |= ARM_LPAE_PTE_SH_IS;
|
||||
else
|
||||
pte |= ARM_LPAE_PTE_SH_OS;
|
||||
@ -1031,6 +1037,9 @@ arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
|
||||
cfg->arm_mali_lpae_cfg.transtab = virt_to_phys(data->pgd) |
|
||||
ARM_MALI_LPAE_TTBR_READ_INNER |
|
||||
ARM_MALI_LPAE_TTBR_ADRMODE_TABLE;
|
||||
if (cfg->coherent_walk)
|
||||
cfg->arm_mali_lpae_cfg.transtab |= ARM_MALI_LPAE_TTBR_SHARE_OUTER;
|
||||
|
||||
return &data->iop;
|
||||
|
||||
out_free_data:
|
||||
|
||||
@ -1425,6 +1425,15 @@ void hl_device_fini(struct hl_device *hdev)
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable PCI access from device F/W so it won't send us additional
|
||||
* interrupts. We disable MSI/MSI-X at the halt_engines function and we
|
||||
* can't have the F/W sending us interrupts after that. We need to
|
||||
* disable the access here because if the device is marked disable, the
|
||||
* message won't be send. Also, in case of heartbeat, the device CPU is
|
||||
* marked as disable so this message won't be sent
|
||||
*/
|
||||
hl_fw_send_pci_access_msg(hdev, CPUCP_PACKET_DISABLE_PCI_ACCESS);
|
||||
|
||||
/* Mark device as disabled */
|
||||
hdev->disabled = true;
|
||||
|
||||
|
||||
@ -385,6 +385,10 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
|
||||
}
|
||||
counters->rx_throughput = result;
|
||||
|
||||
memset(&pkt, 0, sizeof(pkt));
|
||||
pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_THROUGHPUT_GET <<
|
||||
CPUCP_PKT_CTL_OPCODE_SHIFT);
|
||||
|
||||
/* Fetch PCI tx counter */
|
||||
pkt.index = cpu_to_le32(cpucp_pcie_throughput_tx);
|
||||
rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
|
||||
@ -397,6 +401,7 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
|
||||
counters->tx_throughput = result;
|
||||
|
||||
/* Fetch PCI replay counter */
|
||||
memset(&pkt, 0, sizeof(pkt));
|
||||
pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_REPLAY_CNT_GET <<
|
||||
CPUCP_PKT_CTL_OPCODE_SHIFT);
|
||||
|
||||
|
||||
@ -133,6 +133,8 @@ static int hw_idle(struct hl_device *hdev, struct hl_info_args *args)
|
||||
|
||||
hw_idle.is_idle = hdev->asic_funcs->is_device_idle(hdev,
|
||||
&hw_idle.busy_engines_mask_ext, NULL);
|
||||
hw_idle.busy_engines_mask =
|
||||
lower_32_bits(hw_idle.busy_engines_mask_ext);
|
||||
|
||||
return copy_to_user(out, &hw_idle,
|
||||
min((size_t) max_size, sizeof(hw_idle))) ? -EFAULT : 0;
|
||||
|
||||
@ -3119,7 +3119,8 @@ static int gaudi_cb_mmap(struct hl_device *hdev, struct vm_area_struct *vma,
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP |
|
||||
VM_DONTCOPY | VM_NORESERVE;
|
||||
|
||||
rc = dma_mmap_coherent(hdev->dev, vma, cpu_addr, dma_addr, size);
|
||||
rc = dma_mmap_coherent(hdev->dev, vma, cpu_addr,
|
||||
(dma_addr - HOST_PHYS_BASE), size);
|
||||
if (rc)
|
||||
dev_err(hdev->dev, "dma_mmap_coherent error %d", rc);
|
||||
|
||||
|
||||
@ -2675,7 +2675,8 @@ static int goya_cb_mmap(struct hl_device *hdev, struct vm_area_struct *vma,
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP |
|
||||
VM_DONTCOPY | VM_NORESERVE;
|
||||
|
||||
rc = dma_mmap_coherent(hdev->dev, vma, cpu_addr, dma_addr, size);
|
||||
rc = dma_mmap_coherent(hdev->dev, vma, cpu_addr,
|
||||
(dma_addr - HOST_PHYS_BASE), size);
|
||||
if (rc)
|
||||
dev_err(hdev->dev, "dma_mmap_coherent error %d", rc);
|
||||
|
||||
|
||||
@ -509,15 +509,19 @@ static int bcm_sf2_mdio_register(struct dsa_switch *ds)
|
||||
/* Find our integrated MDIO bus node */
|
||||
dn = of_find_compatible_node(NULL, NULL, "brcm,unimac-mdio");
|
||||
priv->master_mii_bus = of_mdio_find_bus(dn);
|
||||
if (!priv->master_mii_bus)
|
||||
if (!priv->master_mii_bus) {
|
||||
of_node_put(dn);
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
get_device(&priv->master_mii_bus->dev);
|
||||
priv->master_mii_dn = dn;
|
||||
|
||||
priv->slave_mii_bus = devm_mdiobus_alloc(ds->dev);
|
||||
if (!priv->slave_mii_bus)
|
||||
if (!priv->slave_mii_bus) {
|
||||
of_node_put(dn);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
priv->slave_mii_bus->priv = priv;
|
||||
priv->slave_mii_bus->name = "sf2 slave mii";
|
||||
|
||||
@ -400,7 +400,7 @@ int ksz_switch_register(struct ksz_device *dev,
|
||||
gpiod_set_value_cansleep(dev->reset_gpio, 1);
|
||||
usleep_range(10000, 12000);
|
||||
gpiod_set_value_cansleep(dev->reset_gpio, 0);
|
||||
usleep_range(100, 1000);
|
||||
msleep(100);
|
||||
}
|
||||
|
||||
mutex_init(&dev->dev_mutex);
|
||||
|
||||
@ -2165,9 +2165,9 @@ static int fec_enet_mii_init(struct platform_device *pdev)
|
||||
fep->mii_bus->parent = &pdev->dev;
|
||||
|
||||
err = of_mdiobus_register(fep->mii_bus, node);
|
||||
of_node_put(node);
|
||||
if (err)
|
||||
goto err_out_free_mdiobus;
|
||||
of_node_put(node);
|
||||
|
||||
mii_cnt++;
|
||||
|
||||
@ -2180,6 +2180,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
|
||||
err_out_free_mdiobus:
|
||||
mdiobus_free(fep->mii_bus);
|
||||
err_out:
|
||||
of_node_put(node);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
@ -4979,6 +4979,12 @@ static void ibmvnic_tasklet(struct tasklet_struct *t)
|
||||
while (!done) {
|
||||
/* Pull all the valid messages off the CRQ */
|
||||
while ((crq = ibmvnic_next_crq(adapter)) != NULL) {
|
||||
/* This barrier makes sure ibmvnic_next_crq()'s
|
||||
* crq->generic.first & IBMVNIC_CRQ_CMD_RSP is loaded
|
||||
* before ibmvnic_handle_crq()'s
|
||||
* switch(gen_crq->first) and switch(gen_crq->cmd).
|
||||
*/
|
||||
dma_rmb();
|
||||
ibmvnic_handle_crq(crq, adapter);
|
||||
crq->generic.first = 0;
|
||||
}
|
||||
|
||||
@ -473,10 +473,11 @@ dma_addr_t __otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool)
|
||||
dma_addr_t iova;
|
||||
u8 *buf;
|
||||
|
||||
buf = napi_alloc_frag(pool->rbsize);
|
||||
buf = napi_alloc_frag(pool->rbsize + OTX2_ALIGN);
|
||||
if (unlikely(!buf))
|
||||
return -ENOMEM;
|
||||
|
||||
buf = PTR_ALIGN(buf, OTX2_ALIGN);
|
||||
iova = dma_map_single_attrs(pfvf->dev, buf, pool->rbsize,
|
||||
DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC);
|
||||
if (unlikely(dma_mapping_error(pfvf->dev, iova))) {
|
||||
|
||||
@ -157,6 +157,7 @@ mlxsw_sp1_span_entry_cpu_deconfigure(struct mlxsw_sp_span_entry *span_entry)
|
||||
|
||||
static const
|
||||
struct mlxsw_sp_span_entry_ops mlxsw_sp1_span_entry_ops_cpu = {
|
||||
.is_static = true,
|
||||
.can_handle = mlxsw_sp1_span_cpu_can_handle,
|
||||
.parms_set = mlxsw_sp1_span_entry_cpu_parms,
|
||||
.configure = mlxsw_sp1_span_entry_cpu_configure,
|
||||
@ -214,6 +215,7 @@ mlxsw_sp_span_entry_phys_deconfigure(struct mlxsw_sp_span_entry *span_entry)
|
||||
|
||||
static const
|
||||
struct mlxsw_sp_span_entry_ops mlxsw_sp_span_entry_ops_phys = {
|
||||
.is_static = true,
|
||||
.can_handle = mlxsw_sp_port_dev_check,
|
||||
.parms_set = mlxsw_sp_span_entry_phys_parms,
|
||||
.configure = mlxsw_sp_span_entry_phys_configure,
|
||||
@ -721,6 +723,7 @@ mlxsw_sp2_span_entry_cpu_deconfigure(struct mlxsw_sp_span_entry *span_entry)
|
||||
|
||||
static const
|
||||
struct mlxsw_sp_span_entry_ops mlxsw_sp2_span_entry_ops_cpu = {
|
||||
.is_static = true,
|
||||
.can_handle = mlxsw_sp2_span_cpu_can_handle,
|
||||
.parms_set = mlxsw_sp2_span_entry_cpu_parms,
|
||||
.configure = mlxsw_sp2_span_entry_cpu_configure,
|
||||
@ -1036,6 +1039,9 @@ static void mlxsw_sp_span_respin_work(struct work_struct *work)
|
||||
if (!refcount_read(&curr->ref_count))
|
||||
continue;
|
||||
|
||||
if (curr->ops->is_static)
|
||||
continue;
|
||||
|
||||
err = curr->ops->parms_set(mlxsw_sp, curr->to_dev, &sparms);
|
||||
if (err)
|
||||
continue;
|
||||
|
||||
@ -60,6 +60,7 @@ struct mlxsw_sp_span_entry {
|
||||
};
|
||||
|
||||
struct mlxsw_sp_span_entry_ops {
|
||||
bool is_static;
|
||||
bool (*can_handle)(const struct net_device *to_dev);
|
||||
int (*parms_set)(struct mlxsw_sp *mlxsw_sp,
|
||||
const struct net_device *to_dev,
|
||||
|
||||
@ -129,7 +129,7 @@ static int intel_eth_plat_probe(struct platform_device *pdev)
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev,
|
||||
"Failed to set tx_clk\n");
|
||||
return ret;
|
||||
goto err_remove_config_dt;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -143,7 +143,7 @@ static int intel_eth_plat_probe(struct platform_device *pdev)
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev,
|
||||
"Failed to set clk_ptp_ref\n");
|
||||
return ret;
|
||||
goto err_remove_config_dt;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -375,6 +375,7 @@ static int ehl_pse0_common_data(struct pci_dev *pdev,
|
||||
struct plat_stmmacenet_data *plat)
|
||||
{
|
||||
plat->bus_id = 2;
|
||||
plat->addr64 = 32;
|
||||
return ehl_common_data(pdev, plat);
|
||||
}
|
||||
|
||||
@ -406,6 +407,7 @@ static int ehl_pse1_common_data(struct pci_dev *pdev,
|
||||
struct plat_stmmacenet_data *plat)
|
||||
{
|
||||
plat->bus_id = 3;
|
||||
plat->addr64 = 32;
|
||||
return ehl_common_data(pdev, plat);
|
||||
}
|
||||
|
||||
|
||||
@ -1489,8 +1489,21 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
||||
}
|
||||
|
||||
length = (io.nblocks + 1) << ns->lba_shift;
|
||||
meta_len = (io.nblocks + 1) * ns->ms;
|
||||
metadata = nvme_to_user_ptr(io.metadata);
|
||||
|
||||
if ((io.control & NVME_RW_PRINFO_PRACT) &&
|
||||
ns->ms == sizeof(struct t10_pi_tuple)) {
|
||||
/*
|
||||
* Protection information is stripped/inserted by the
|
||||
* controller.
|
||||
*/
|
||||
if (nvme_to_user_ptr(io.metadata))
|
||||
return -EINVAL;
|
||||
meta_len = 0;
|
||||
metadata = NULL;
|
||||
} else {
|
||||
meta_len = (io.nblocks + 1) * ns->ms;
|
||||
metadata = nvme_to_user_ptr(io.metadata);
|
||||
}
|
||||
|
||||
if (ns->features & NVME_NS_EXT_LBAS) {
|
||||
length += meta_len;
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
#include <linux/t10-pi.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/io-64-nonatomic-lo-hi.h>
|
||||
#include <linux/io-64-nonatomic-hi-lo.h>
|
||||
#include <linux/sed-opal.h>
|
||||
#include <linux/pci-p2pdma.h>
|
||||
|
||||
@ -1825,6 +1826,9 @@ static void nvme_map_cmb(struct nvme_dev *dev)
|
||||
if (dev->cmb_size)
|
||||
return;
|
||||
|
||||
if (NVME_CAP_CMBS(dev->ctrl.cap))
|
||||
writel(NVME_CMBMSC_CRE, dev->bar + NVME_REG_CMBMSC);
|
||||
|
||||
dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
|
||||
if (!dev->cmbsz)
|
||||
return;
|
||||
@ -1838,6 +1842,16 @@ static void nvme_map_cmb(struct nvme_dev *dev)
|
||||
if (offset > bar_size)
|
||||
return;
|
||||
|
||||
/*
|
||||
* Tell the controller about the host side address mapping the CMB,
|
||||
* and enable CMB decoding for the NVMe 1.4+ scheme:
|
||||
*/
|
||||
if (NVME_CAP_CMBS(dev->ctrl.cap)) {
|
||||
hi_lo_writeq(NVME_CMBMSC_CRE | NVME_CMBMSC_CMSE |
|
||||
(pci_bus_address(pdev, bar) + offset),
|
||||
dev->bar + NVME_REG_CMBMSC);
|
||||
}
|
||||
|
||||
/*
|
||||
* Controllers may support a CMB size larger than their BAR,
|
||||
* for example, due to being behind a bridge. Reduce the CMB to
|
||||
|
||||
@ -97,6 +97,7 @@ struct nvme_rdma_queue {
|
||||
struct completion cm_done;
|
||||
bool pi_support;
|
||||
int cq_size;
|
||||
struct mutex queue_lock;
|
||||
};
|
||||
|
||||
struct nvme_rdma_ctrl {
|
||||
@ -579,6 +580,7 @@ static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
|
||||
int ret;
|
||||
|
||||
queue = &ctrl->queues[idx];
|
||||
mutex_init(&queue->queue_lock);
|
||||
queue->ctrl = ctrl;
|
||||
if (idx && ctrl->ctrl.max_integrity_segments)
|
||||
queue->pi_support = true;
|
||||
@ -598,7 +600,8 @@ static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
|
||||
if (IS_ERR(queue->cm_id)) {
|
||||
dev_info(ctrl->ctrl.device,
|
||||
"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
|
||||
return PTR_ERR(queue->cm_id);
|
||||
ret = PTR_ERR(queue->cm_id);
|
||||
goto out_destroy_mutex;
|
||||
}
|
||||
|
||||
if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
|
||||
@ -628,6 +631,8 @@ static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
|
||||
out_destroy_cm_id:
|
||||
rdma_destroy_id(queue->cm_id);
|
||||
nvme_rdma_destroy_queue_ib(queue);
|
||||
out_destroy_mutex:
|
||||
mutex_destroy(&queue->queue_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -639,9 +644,10 @@ static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
|
||||
|
||||
static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
|
||||
{
|
||||
if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
|
||||
return;
|
||||
__nvme_rdma_stop_queue(queue);
|
||||
mutex_lock(&queue->queue_lock);
|
||||
if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
|
||||
__nvme_rdma_stop_queue(queue);
|
||||
mutex_unlock(&queue->queue_lock);
|
||||
}
|
||||
|
||||
static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
|
||||
@ -651,6 +657,7 @@ static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
|
||||
|
||||
nvme_rdma_destroy_queue_ib(queue);
|
||||
rdma_destroy_id(queue->cm_id);
|
||||
mutex_destroy(&queue->queue_lock);
|
||||
}
|
||||
|
||||
static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
|
||||
|
||||
@ -76,6 +76,7 @@ struct nvme_tcp_queue {
|
||||
struct work_struct io_work;
|
||||
int io_cpu;
|
||||
|
||||
struct mutex queue_lock;
|
||||
struct mutex send_mutex;
|
||||
struct llist_head req_list;
|
||||
struct list_head send_list;
|
||||
@ -1219,6 +1220,7 @@ static void nvme_tcp_free_queue(struct nvme_ctrl *nctrl, int qid)
|
||||
|
||||
sock_release(queue->sock);
|
||||
kfree(queue->pdu);
|
||||
mutex_destroy(&queue->queue_lock);
|
||||
}
|
||||
|
||||
static int nvme_tcp_init_connection(struct nvme_tcp_queue *queue)
|
||||
@ -1380,6 +1382,7 @@ static int nvme_tcp_alloc_queue(struct nvme_ctrl *nctrl,
|
||||
struct nvme_tcp_queue *queue = &ctrl->queues[qid];
|
||||
int ret, rcv_pdu_size;
|
||||
|
||||
mutex_init(&queue->queue_lock);
|
||||
queue->ctrl = ctrl;
|
||||
init_llist_head(&queue->req_list);
|
||||
INIT_LIST_HEAD(&queue->send_list);
|
||||
@ -1398,7 +1401,7 @@ static int nvme_tcp_alloc_queue(struct nvme_ctrl *nctrl,
|
||||
if (ret) {
|
||||
dev_err(nctrl->device,
|
||||
"failed to create socket: %d\n", ret);
|
||||
return ret;
|
||||
goto err_destroy_mutex;
|
||||
}
|
||||
|
||||
/* Single syn retry */
|
||||
@ -1507,6 +1510,8 @@ static int nvme_tcp_alloc_queue(struct nvme_ctrl *nctrl,
|
||||
err_sock:
|
||||
sock_release(queue->sock);
|
||||
queue->sock = NULL;
|
||||
err_destroy_mutex:
|
||||
mutex_destroy(&queue->queue_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1534,9 +1539,10 @@ static void nvme_tcp_stop_queue(struct nvme_ctrl *nctrl, int qid)
|
||||
struct nvme_tcp_ctrl *ctrl = to_tcp_ctrl(nctrl);
|
||||
struct nvme_tcp_queue *queue = &ctrl->queues[qid];
|
||||
|
||||
if (!test_and_clear_bit(NVME_TCP_Q_LIVE, &queue->flags))
|
||||
return;
|
||||
__nvme_tcp_stop_queue(queue);
|
||||
mutex_lock(&queue->queue_lock);
|
||||
if (test_and_clear_bit(NVME_TCP_Q_LIVE, &queue->flags))
|
||||
__nvme_tcp_stop_queue(queue);
|
||||
mutex_unlock(&queue->queue_lock);
|
||||
}
|
||||
|
||||
static int nvme_tcp_start_queue(struct nvme_ctrl *nctrl, int idx)
|
||||
|
||||
@ -487,8 +487,10 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req)
|
||||
|
||||
/* return an all zeroed buffer if we can't find an active namespace */
|
||||
ns = nvmet_find_namespace(ctrl, req->cmd->identify.nsid);
|
||||
if (!ns)
|
||||
if (!ns) {
|
||||
status = NVME_SC_INVALID_NS;
|
||||
goto done;
|
||||
}
|
||||
|
||||
nvmet_ns_revalidate(ns);
|
||||
|
||||
@ -541,7 +543,9 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req)
|
||||
id->nsattr |= (1 << 0);
|
||||
nvmet_put_namespace(ns);
|
||||
done:
|
||||
status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));
|
||||
if (!status)
|
||||
status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));
|
||||
|
||||
kfree(id);
|
||||
out:
|
||||
nvmet_req_complete(req, status);
|
||||
|
||||
@ -662,35 +662,42 @@ static int cpcap_usb_phy_probe(struct platform_device *pdev)
|
||||
generic_phy = devm_phy_create(ddata->dev, NULL, &ops);
|
||||
if (IS_ERR(generic_phy)) {
|
||||
error = PTR_ERR(generic_phy);
|
||||
return PTR_ERR(generic_phy);
|
||||
goto out_reg_disable;
|
||||
}
|
||||
|
||||
phy_set_drvdata(generic_phy, ddata);
|
||||
|
||||
phy_provider = devm_of_phy_provider_register(ddata->dev,
|
||||
of_phy_simple_xlate);
|
||||
if (IS_ERR(phy_provider))
|
||||
return PTR_ERR(phy_provider);
|
||||
if (IS_ERR(phy_provider)) {
|
||||
error = PTR_ERR(phy_provider);
|
||||
goto out_reg_disable;
|
||||
}
|
||||
|
||||
error = cpcap_usb_init_optional_pins(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
goto out_reg_disable;
|
||||
|
||||
cpcap_usb_init_optional_gpios(ddata);
|
||||
|
||||
error = cpcap_usb_init_iio(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
goto out_reg_disable;
|
||||
|
||||
error = cpcap_usb_init_interrupts(pdev, ddata);
|
||||
if (error)
|
||||
return error;
|
||||
goto out_reg_disable;
|
||||
|
||||
usb_add_phy_dev(&ddata->phy);
|
||||
atomic_set(&ddata->active, 1);
|
||||
schedule_delayed_work(&ddata->detect_work, msecs_to_jiffies(1));
|
||||
|
||||
return 0;
|
||||
|
||||
out_reg_disable:
|
||||
regulator_disable(ddata->vusb);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static int cpcap_usb_phy_remove(struct platform_device *pdev)
|
||||
|
||||
@ -216,6 +216,12 @@ static const struct dmi_system_id dmi_switches_allow_list[] = {
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Switch SA5-271"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7352"),
|
||||
},
|
||||
},
|
||||
{} /* Array terminator */
|
||||
};
|
||||
|
||||
|
||||
@ -8782,6 +8782,7 @@ static const struct tpacpi_quirk fan_quirk_table[] __initconst = {
|
||||
TPACPI_Q_LNV3('N', '1', 'T', TPACPI_FAN_2CTL), /* P71 */
|
||||
TPACPI_Q_LNV3('N', '1', 'U', TPACPI_FAN_2CTL), /* P51 */
|
||||
TPACPI_Q_LNV3('N', '2', 'C', TPACPI_FAN_2CTL), /* P52 / P72 */
|
||||
TPACPI_Q_LNV3('N', '2', 'N', TPACPI_FAN_2CTL), /* P53 / P73 */
|
||||
TPACPI_Q_LNV3('N', '2', 'E', TPACPI_FAN_2CTL), /* P1 / X1 Extreme (1st gen) */
|
||||
TPACPI_Q_LNV3('N', '2', 'O', TPACPI_FAN_2CTL), /* P1 / X1 Extreme (2nd gen) */
|
||||
TPACPI_Q_LNV3('N', '2', 'V', TPACPI_FAN_2CTL), /* P1 / X1 Extreme (3nd gen) */
|
||||
|
||||
@ -263,6 +263,16 @@ static const struct ts_dmi_data digma_citi_e200_data = {
|
||||
.properties = digma_citi_e200_props,
|
||||
};
|
||||
|
||||
static const struct property_entry estar_beauty_hd_props[] = {
|
||||
PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"),
|
||||
{ }
|
||||
};
|
||||
|
||||
static const struct ts_dmi_data estar_beauty_hd_data = {
|
||||
.acpi_name = "GDIX1001:00",
|
||||
.properties = estar_beauty_hd_props,
|
||||
};
|
||||
|
||||
static const struct property_entry gp_electronic_t701_props[] = {
|
||||
PROPERTY_ENTRY_U32("touchscreen-size-x", 960),
|
||||
PROPERTY_ENTRY_U32("touchscreen-size-y", 640),
|
||||
@ -942,6 +952,14 @@ const struct dmi_system_id touchscreen_dmi_table[] = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* Estar Beauty HD (MID 7316R) */
|
||||
.driver_data = (void *)&estar_beauty_hd_data,
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Estar"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "eSTAR BEAUTY HD Intel Quad core"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* GP-electronic T701 */
|
||||
.driver_data = (void *)&gp_electronic_t701_data,
|
||||
|
||||
@ -444,7 +444,8 @@ static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
|
||||
fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
|
||||
if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
|
||||
pr_err("error in devcmd2 init");
|
||||
return -ENODEV;
|
||||
err = -ENODEV;
|
||||
goto err_free_wq;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -460,7 +461,7 @@ static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
|
||||
err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
|
||||
DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
|
||||
if (err)
|
||||
goto err_free_wq;
|
||||
goto err_disable_wq;
|
||||
|
||||
vdev->devcmd2->result =
|
||||
(struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
|
||||
@ -481,8 +482,9 @@ static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
|
||||
|
||||
err_free_desc_ring:
|
||||
vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
|
||||
err_free_wq:
|
||||
err_disable_wq:
|
||||
vnic_wq_disable(&vdev->devcmd2->wq);
|
||||
err_free_wq:
|
||||
vnic_wq_free(&vdev->devcmd2->wq);
|
||||
err_free_devcmd2:
|
||||
kfree(vdev->devcmd2);
|
||||
|
||||
@ -2957,8 +2957,10 @@ static int ibmvfc_slave_configure(struct scsi_device *sdev)
|
||||
unsigned long flags = 0;
|
||||
|
||||
spin_lock_irqsave(shost->host_lock, flags);
|
||||
if (sdev->type == TYPE_DISK)
|
||||
if (sdev->type == TYPE_DISK) {
|
||||
sdev->allow_restart = 1;
|
||||
blk_queue_rq_timeout(sdev->request_queue, 120 * HZ);
|
||||
}
|
||||
spin_unlock_irqrestore(shost->host_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1624,8 +1624,13 @@ static void fc_exch_recv_seq_resp(struct fc_exch_mgr *mp, struct fc_frame *fp)
|
||||
rc = fc_exch_done_locked(ep);
|
||||
WARN_ON(fc_seq_exch(sp) != ep);
|
||||
spin_unlock_bh(&ep->ex_lock);
|
||||
if (!rc)
|
||||
if (!rc) {
|
||||
fc_exch_delete(ep);
|
||||
} else {
|
||||
FC_EXCH_DBG(ep, "ep is completed already,"
|
||||
"hence skip calling the resp\n");
|
||||
goto skip_resp;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1644,6 +1649,7 @@ static void fc_exch_recv_seq_resp(struct fc_exch_mgr *mp, struct fc_frame *fp)
|
||||
if (!fc_invoke_resp(ep, sp, fp))
|
||||
fc_frame_free(fp);
|
||||
|
||||
skip_resp:
|
||||
fc_exch_release(ep);
|
||||
return;
|
||||
rel:
|
||||
@ -1900,10 +1906,16 @@ static void fc_exch_reset(struct fc_exch *ep)
|
||||
|
||||
fc_exch_hold(ep);
|
||||
|
||||
if (!rc)
|
||||
if (!rc) {
|
||||
fc_exch_delete(ep);
|
||||
} else {
|
||||
FC_EXCH_DBG(ep, "ep is completed already,"
|
||||
"hence skip calling the resp\n");
|
||||
goto skip_resp;
|
||||
}
|
||||
|
||||
fc_invoke_resp(ep, sp, ERR_PTR(-FC_EX_CLOSED));
|
||||
skip_resp:
|
||||
fc_seq_set_resp(sp, NULL, ep->arg);
|
||||
fc_exch_release(ep);
|
||||
}
|
||||
|
||||
@ -541,7 +541,14 @@ int srp_reconnect_rport(struct srp_rport *rport)
|
||||
res = mutex_lock_interruptible(&rport->mutex);
|
||||
if (res)
|
||||
goto out;
|
||||
scsi_target_block(&shost->shost_gendev);
|
||||
if (rport->state != SRP_RPORT_FAIL_FAST)
|
||||
/*
|
||||
* sdev state must be SDEV_TRANSPORT_OFFLINE, transition
|
||||
* to SDEV_BLOCK is illegal. Calling scsi_target_unblock()
|
||||
* later is ok though, scsi_internal_device_unblock_nowait()
|
||||
* treats SDEV_TRANSPORT_OFFLINE like SDEV_BLOCK.
|
||||
*/
|
||||
scsi_target_block(&shost->shost_gendev);
|
||||
res = rport->state != SRP_RPORT_LOST ? i->f->reconnect(rport) : -ENODEV;
|
||||
pr_debug("%s (state %d): transport.reconnect() returned %d\n",
|
||||
dev_name(&shost->shost_gendev), rport->state, res);
|
||||
|
||||
@ -705,6 +705,7 @@ static int udf_check_vsd(struct super_block *sb)
|
||||
struct buffer_head *bh = NULL;
|
||||
int nsr = 0;
|
||||
struct udf_sb_info *sbi;
|
||||
loff_t session_offset;
|
||||
|
||||
sbi = UDF_SB(sb);
|
||||
if (sb->s_blocksize < sizeof(struct volStructDesc))
|
||||
@ -712,7 +713,8 @@ static int udf_check_vsd(struct super_block *sb)
|
||||
else
|
||||
sectorsize = sb->s_blocksize;
|
||||
|
||||
sector += (((loff_t)sbi->s_session) << sb->s_blocksize_bits);
|
||||
session_offset = (loff_t)sbi->s_session << sb->s_blocksize_bits;
|
||||
sector += session_offset;
|
||||
|
||||
udf_debug("Starting at sector %u (%lu byte sectors)\n",
|
||||
(unsigned int)(sector >> sb->s_blocksize_bits),
|
||||
@ -757,8 +759,7 @@ static int udf_check_vsd(struct super_block *sb)
|
||||
|
||||
if (nsr > 0)
|
||||
return 1;
|
||||
else if (!bh && sector - (sbi->s_session << sb->s_blocksize_bits) ==
|
||||
VSD_FIRST_SECTOR_OFFSET)
|
||||
else if (!bh && sector - session_offset == VSD_FIRST_SECTOR_OFFSET)
|
||||
return -1;
|
||||
else
|
||||
return 0;
|
||||
|
||||
@ -33,6 +33,9 @@ struct task_struct *kthread_create_on_cpu(int (*threadfn)(void *data),
|
||||
unsigned int cpu,
|
||||
const char *namefmt);
|
||||
|
||||
void kthread_set_per_cpu(struct task_struct *k, int cpu);
|
||||
bool kthread_is_per_cpu(struct task_struct *k);
|
||||
|
||||
/**
|
||||
* kthread_run - create and wake a thread.
|
||||
* @threadfn: the function to run until signal_pending(current).
|
||||
|
||||
@ -116,6 +116,9 @@ enum {
|
||||
NVME_REG_BPMBL = 0x0048, /* Boot Partition Memory Buffer
|
||||
* Location
|
||||
*/
|
||||
NVME_REG_CMBMSC = 0x0050, /* Controller Memory Buffer Memory
|
||||
* Space Control
|
||||
*/
|
||||
NVME_REG_PMRCAP = 0x0e00, /* Persistent Memory Capabilities */
|
||||
NVME_REG_PMRCTL = 0x0e04, /* Persistent Memory Region Control */
|
||||
NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */
|
||||
@ -135,6 +138,7 @@ enum {
|
||||
#define NVME_CAP_CSS(cap) (((cap) >> 37) & 0xff)
|
||||
#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
|
||||
#define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf)
|
||||
#define NVME_CAP_CMBS(cap) (((cap) >> 57) & 0x1)
|
||||
|
||||
#define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7)
|
||||
#define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff)
|
||||
@ -192,6 +196,8 @@ enum {
|
||||
NVME_CSTS_SHST_OCCUR = 1 << 2,
|
||||
NVME_CSTS_SHST_CMPLT = 2 << 2,
|
||||
NVME_CSTS_SHST_MASK = 3 << 2,
|
||||
NVME_CMBMSC_CRE = 1 << 0,
|
||||
NVME_CMBMSC_CMSE = 1 << 1,
|
||||
};
|
||||
|
||||
struct nvme_id_power_state {
|
||||
|
||||
@ -494,11 +494,36 @@ struct task_struct *kthread_create_on_cpu(int (*threadfn)(void *data),
|
||||
return p;
|
||||
kthread_bind(p, cpu);
|
||||
/* CPU hotplug need to bind once again when unparking the thread. */
|
||||
set_bit(KTHREAD_IS_PER_CPU, &to_kthread(p)->flags);
|
||||
to_kthread(p)->cpu = cpu;
|
||||
return p;
|
||||
}
|
||||
|
||||
void kthread_set_per_cpu(struct task_struct *k, int cpu)
|
||||
{
|
||||
struct kthread *kthread = to_kthread(k);
|
||||
if (!kthread)
|
||||
return;
|
||||
|
||||
WARN_ON_ONCE(!(k->flags & PF_NO_SETAFFINITY));
|
||||
|
||||
if (cpu < 0) {
|
||||
clear_bit(KTHREAD_IS_PER_CPU, &kthread->flags);
|
||||
return;
|
||||
}
|
||||
|
||||
kthread->cpu = cpu;
|
||||
set_bit(KTHREAD_IS_PER_CPU, &kthread->flags);
|
||||
}
|
||||
|
||||
bool kthread_is_per_cpu(struct task_struct *k)
|
||||
{
|
||||
struct kthread *kthread = to_kthread(k);
|
||||
if (!kthread)
|
||||
return false;
|
||||
|
||||
return test_bit(KTHREAD_IS_PER_CPU, &kthread->flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* kthread_unpark - unpark a thread created by kthread_create().
|
||||
* @k: thread created by kthread_create().
|
||||
|
||||
@ -5271,12 +5271,15 @@ static void __lock_unpin_lock(struct lockdep_map *lock, struct pin_cookie cookie
|
||||
/*
|
||||
* Check whether we follow the irq-flags state precisely:
|
||||
*/
|
||||
static void check_flags(unsigned long flags)
|
||||
static noinstr void check_flags(unsigned long flags)
|
||||
{
|
||||
#if defined(CONFIG_PROVE_LOCKING) && defined(CONFIG_DEBUG_LOCKDEP)
|
||||
if (!debug_locks)
|
||||
return;
|
||||
|
||||
/* Get the warning out.. */
|
||||
instrumentation_begin();
|
||||
|
||||
if (irqs_disabled_flags(flags)) {
|
||||
if (DEBUG_LOCKS_WARN_ON(lockdep_hardirqs_enabled())) {
|
||||
printk("possible reason: unannotated irqs-off.\n");
|
||||
@ -5304,6 +5307,8 @@ static void check_flags(unsigned long flags)
|
||||
|
||||
if (!debug_locks)
|
||||
print_irqtrace_events(current);
|
||||
|
||||
instrumentation_end();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
@ -188,6 +188,7 @@ __smpboot_create_thread(struct smp_hotplug_thread *ht, unsigned int cpu)
|
||||
kfree(td);
|
||||
return PTR_ERR(tsk);
|
||||
}
|
||||
kthread_set_per_cpu(tsk, cpu);
|
||||
/*
|
||||
* Park the thread so that it could start right on the CPU
|
||||
* when it is available.
|
||||
|
||||
@ -1862,12 +1862,6 @@ static void worker_attach_to_pool(struct worker *worker,
|
||||
{
|
||||
mutex_lock(&wq_pool_attach_mutex);
|
||||
|
||||
/*
|
||||
* set_cpus_allowed_ptr() will fail if the cpumask doesn't have any
|
||||
* online CPUs. It'll be re-applied when any of the CPUs come up.
|
||||
*/
|
||||
set_cpus_allowed_ptr(worker->task, pool->attrs->cpumask);
|
||||
|
||||
/*
|
||||
* The wq_pool_attach_mutex ensures %POOL_DISASSOCIATED remains
|
||||
* stable across this function. See the comments above the flag
|
||||
@ -1876,6 +1870,9 @@ static void worker_attach_to_pool(struct worker *worker,
|
||||
if (pool->flags & POOL_DISASSOCIATED)
|
||||
worker->flags |= WORKER_UNBOUND;
|
||||
|
||||
if (worker->rescue_wq)
|
||||
set_cpus_allowed_ptr(worker->task, pool->attrs->cpumask);
|
||||
|
||||
list_add_tail(&worker->node, &pool->workers);
|
||||
worker->pool = pool;
|
||||
|
||||
|
||||
@ -120,18 +120,17 @@ static ssize_t aqm_write(struct file *file,
|
||||
{
|
||||
struct ieee80211_local *local = file->private_data;
|
||||
char buf[100];
|
||||
size_t len;
|
||||
|
||||
if (count > sizeof(buf))
|
||||
if (count >= sizeof(buf))
|
||||
return -EINVAL;
|
||||
|
||||
if (copy_from_user(buf, user_buf, count))
|
||||
return -EFAULT;
|
||||
|
||||
buf[sizeof(buf) - 1] = '\0';
|
||||
len = strlen(buf);
|
||||
if (len > 0 && buf[len-1] == '\n')
|
||||
buf[len-1] = 0;
|
||||
if (count && buf[count - 1] == '\n')
|
||||
buf[count - 1] = '\0';
|
||||
else
|
||||
buf[count] = '\0';
|
||||
|
||||
if (sscanf(buf, "fq_limit %u", &local->fq.limit) == 1)
|
||||
return count;
|
||||
@ -177,18 +176,17 @@ static ssize_t airtime_flags_write(struct file *file,
|
||||
{
|
||||
struct ieee80211_local *local = file->private_data;
|
||||
char buf[16];
|
||||
size_t len;
|
||||
|
||||
if (count > sizeof(buf))
|
||||
if (count >= sizeof(buf))
|
||||
return -EINVAL;
|
||||
|
||||
if (copy_from_user(buf, user_buf, count))
|
||||
return -EFAULT;
|
||||
|
||||
buf[sizeof(buf) - 1] = 0;
|
||||
len = strlen(buf);
|
||||
if (len > 0 && buf[len - 1] == '\n')
|
||||
buf[len - 1] = 0;
|
||||
if (count && buf[count - 1] == '\n')
|
||||
buf[count - 1] = '\0';
|
||||
else
|
||||
buf[count] = '\0';
|
||||
|
||||
if (kstrtou16(buf, 0, &local->airtime_flags))
|
||||
return -EINVAL;
|
||||
@ -237,20 +235,19 @@ static ssize_t aql_txq_limit_write(struct file *file,
|
||||
{
|
||||
struct ieee80211_local *local = file->private_data;
|
||||
char buf[100];
|
||||
size_t len;
|
||||
u32 ac, q_limit_low, q_limit_high, q_limit_low_old, q_limit_high_old;
|
||||
struct sta_info *sta;
|
||||
|
||||
if (count > sizeof(buf))
|
||||
if (count >= sizeof(buf))
|
||||
return -EINVAL;
|
||||
|
||||
if (copy_from_user(buf, user_buf, count))
|
||||
return -EFAULT;
|
||||
|
||||
buf[sizeof(buf) - 1] = 0;
|
||||
len = strlen(buf);
|
||||
if (len > 0 && buf[len - 1] == '\n')
|
||||
buf[len - 1] = 0;
|
||||
if (count && buf[count - 1] == '\n')
|
||||
buf[count - 1] = '\0';
|
||||
else
|
||||
buf[count] = '\0';
|
||||
|
||||
if (sscanf(buf, "%u %u %u", &ac, &q_limit_low, &q_limit_high) != 3)
|
||||
return -EINVAL;
|
||||
@ -306,18 +303,17 @@ static ssize_t force_tx_status_write(struct file *file,
|
||||
{
|
||||
struct ieee80211_local *local = file->private_data;
|
||||
char buf[3];
|
||||
size_t len;
|
||||
|
||||
if (count > sizeof(buf))
|
||||
if (count >= sizeof(buf))
|
||||
return -EINVAL;
|
||||
|
||||
if (copy_from_user(buf, user_buf, count))
|
||||
return -EFAULT;
|
||||
|
||||
buf[sizeof(buf) - 1] = '\0';
|
||||
len = strlen(buf);
|
||||
if (len > 0 && buf[len - 1] == '\n')
|
||||
buf[len - 1] = 0;
|
||||
if (count && buf[count - 1] == '\n')
|
||||
buf[count - 1] = '\0';
|
||||
else
|
||||
buf[count] = '\0';
|
||||
|
||||
if (buf[0] == '0' && buf[1] == '\0')
|
||||
local->force_tx_status = 0;
|
||||
|
||||
@ -4191,6 +4191,8 @@ void ieee80211_check_fast_rx(struct sta_info *sta)
|
||||
|
||||
rcu_read_lock();
|
||||
key = rcu_dereference(sta->ptk[sta->ptk_idx]);
|
||||
if (!key)
|
||||
key = rcu_dereference(sdata->default_unicast_key);
|
||||
if (key) {
|
||||
switch (key->conf.cipher) {
|
||||
case WLAN_CIPHER_SUITE_TKIP:
|
||||
|
||||
@ -4278,7 +4278,6 @@ netdev_tx_t ieee80211_subif_start_xmit_8023(struct sk_buff *skb,
|
||||
struct ethhdr *ehdr = (struct ethhdr *)skb->data;
|
||||
struct ieee80211_key *key;
|
||||
struct sta_info *sta;
|
||||
bool offload = true;
|
||||
|
||||
if (unlikely(skb->len < ETH_HLEN)) {
|
||||
kfree_skb(skb);
|
||||
@ -4294,18 +4293,22 @@ netdev_tx_t ieee80211_subif_start_xmit_8023(struct sk_buff *skb,
|
||||
|
||||
if (unlikely(IS_ERR_OR_NULL(sta) || !sta->uploaded ||
|
||||
!test_sta_flag(sta, WLAN_STA_AUTHORIZED) ||
|
||||
sdata->control_port_protocol == ehdr->h_proto))
|
||||
offload = false;
|
||||
else if ((key = rcu_dereference(sta->ptk[sta->ptk_idx])) &&
|
||||
(!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE) ||
|
||||
key->conf.cipher == WLAN_CIPHER_SUITE_TKIP))
|
||||
offload = false;
|
||||
sdata->control_port_protocol == ehdr->h_proto))
|
||||
goto skip_offload;
|
||||
|
||||
if (offload)
|
||||
ieee80211_8023_xmit(sdata, dev, sta, key, skb);
|
||||
else
|
||||
ieee80211_subif_start_xmit(skb, dev);
|
||||
key = rcu_dereference(sta->ptk[sta->ptk_idx]);
|
||||
if (!key)
|
||||
key = rcu_dereference(sdata->default_unicast_key);
|
||||
|
||||
if (key && (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE) ||
|
||||
key->conf.cipher == WLAN_CIPHER_SUITE_TKIP))
|
||||
goto skip_offload;
|
||||
|
||||
ieee80211_8023_xmit(sdata, dev, sta, key, skb);
|
||||
goto out;
|
||||
|
||||
skip_offload:
|
||||
ieee80211_subif_start_xmit(skb, dev);
|
||||
out:
|
||||
rcu_read_unlock();
|
||||
|
||||
|
||||
@ -460,10 +460,11 @@ static int __switchdev_handle_port_obj_add(struct net_device *dev,
|
||||
extack = switchdev_notifier_info_to_extack(&port_obj_info->info);
|
||||
|
||||
if (check_cb(dev)) {
|
||||
/* This flag is only checked if the return value is success. */
|
||||
port_obj_info->handled = true;
|
||||
return add_cb(dev, port_obj_info->obj, port_obj_info->trans,
|
||||
extack);
|
||||
err = add_cb(dev, port_obj_info->obj, port_obj_info->trans,
|
||||
extack);
|
||||
if (err != -EOPNOTSUPP)
|
||||
port_obj_info->handled = true;
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Switch ports might be stacked under e.g. a LAG. Ignore the
|
||||
@ -515,9 +516,10 @@ static int __switchdev_handle_port_obj_del(struct net_device *dev,
|
||||
int err = -EOPNOTSUPP;
|
||||
|
||||
if (check_cb(dev)) {
|
||||
/* This flag is only checked if the return value is success. */
|
||||
port_obj_info->handled = true;
|
||||
return del_cb(dev, port_obj_info->obj);
|
||||
err = del_cb(dev, port_obj_info->obj);
|
||||
if (err != -EOPNOTSUPP)
|
||||
port_obj_info->handled = true;
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Switch ports might be stacked under e.g. a LAG. Ignore the
|
||||
@ -568,9 +570,10 @@ static int __switchdev_handle_port_attr_set(struct net_device *dev,
|
||||
int err = -EOPNOTSUPP;
|
||||
|
||||
if (check_cb(dev)) {
|
||||
port_attr_info->handled = true;
|
||||
return set_cb(dev, port_attr_info->attr,
|
||||
port_attr_info->trans);
|
||||
err = set_cb(dev, port_attr_info->attr, port_attr_info->trans);
|
||||
if (err != -EOPNOTSUPP)
|
||||
port_attr_info->handled = true;
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Switch ports might be stacked under e.g. a LAG. Ignore the
|
||||
|
||||
@ -2484,6 +2484,9 @@ static const struct pci_device_id azx_ids[] = {
|
||||
/* CometLake-S */
|
||||
{ PCI_DEVICE(0x8086, 0xa3f0),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
/* CometLake-R */
|
||||
{ PCI_DEVICE(0x8086, 0xf0c8),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
/* Icelake */
|
||||
{ PCI_DEVICE(0x8086, 0x34c8),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
@ -2507,6 +2510,9 @@ static const struct pci_device_id azx_ids[] = {
|
||||
/* Alderlake-S */
|
||||
{ PCI_DEVICE(0x8086, 0x7ad0),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
/* Alderlake-P */
|
||||
{ PCI_DEVICE(0x8086, 0x51c8),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
/* Elkhart Lake */
|
||||
{ PCI_DEVICE(0x8086, 0x4b55),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
|
||||
@ -4349,6 +4349,7 @@ HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
|
||||
|
||||
@ -93,8 +93,7 @@ void hda_codec_jack_check(struct snd_sof_dev *sdev)
|
||||
* has been recorded in STATESTS
|
||||
*/
|
||||
if (codec->jacktbl.used)
|
||||
schedule_delayed_work(&codec->jackpoll_work,
|
||||
codec->jackpoll_interval);
|
||||
pm_request_resume(&codec->core.dev);
|
||||
}
|
||||
#else
|
||||
void hda_codec_jack_wake_enable(struct snd_sof_dev *sdev) {}
|
||||
|
||||
@ -3059,14 +3059,10 @@ int check(struct objtool_file *file)
|
||||
}
|
||||
|
||||
out:
|
||||
if (ret < 0) {
|
||||
/*
|
||||
* Fatal error. The binary is corrupt or otherwise broken in
|
||||
* some way, or objtool itself is broken. Fail the kernel
|
||||
* build.
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* For now, don't fail the kernel build on fatal warnings. These
|
||||
* errors are still fairly common due to the growing matrix of
|
||||
* supported toolchains and their recent pace of change.
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -425,6 +425,13 @@ static int read_symbols(struct elf *elf)
|
||||
list_add(&sym->list, entry);
|
||||
elf_hash_add(elf->symbol_hash, &sym->hash, sym->idx);
|
||||
elf_hash_add(elf->symbol_name_hash, &sym->name_hash, str_hash(sym->name));
|
||||
|
||||
/*
|
||||
* Don't store empty STT_NOTYPE symbols in the rbtree. They
|
||||
* can exist within a function, confusing the sorting.
|
||||
*/
|
||||
if (!sym->len)
|
||||
rb_erase(&sym->node, &sym->sec->symbol_tree);
|
||||
}
|
||||
|
||||
if (stats)
|
||||
|
||||
@ -1245,6 +1245,8 @@ static void dump_isst_config(int arg)
|
||||
isst_ctdp_display_information_end(outf);
|
||||
}
|
||||
|
||||
static void adjust_scaling_max_from_base_freq(int cpu);
|
||||
|
||||
static void set_tdp_level_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
|
||||
void *arg4)
|
||||
{
|
||||
@ -1263,6 +1265,9 @@ static void set_tdp_level_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
|
||||
int pkg_id = get_physical_package_id(cpu);
|
||||
int die_id = get_physical_die_id(cpu);
|
||||
|
||||
/* Wait for updated base frequencies */
|
||||
usleep(2000);
|
||||
|
||||
fprintf(stderr, "Option is set to online/offline\n");
|
||||
ctdp_level.core_cpumask_size =
|
||||
alloc_cpu_set(&ctdp_level.core_cpumask);
|
||||
@ -1279,6 +1284,7 @@ static void set_tdp_level_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
|
||||
if (CPU_ISSET_S(i, ctdp_level.core_cpumask_size, ctdp_level.core_cpumask)) {
|
||||
fprintf(stderr, "online cpu %d\n", i);
|
||||
set_cpu_online_offline(i, 1);
|
||||
adjust_scaling_max_from_base_freq(i);
|
||||
} else {
|
||||
fprintf(stderr, "offline cpu %d\n", i);
|
||||
set_cpu_online_offline(i, 0);
|
||||
@ -1436,6 +1442,31 @@ static int set_cpufreq_scaling_min_max(int cpu, int max, int freq)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int no_turbo(void)
|
||||
{
|
||||
return parse_int_file(0, "/sys/devices/system/cpu/intel_pstate/no_turbo");
|
||||
}
|
||||
|
||||
static void adjust_scaling_max_from_base_freq(int cpu)
|
||||
{
|
||||
int base_freq, scaling_max_freq;
|
||||
|
||||
scaling_max_freq = parse_int_file(0, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_max_freq", cpu);
|
||||
base_freq = get_cpufreq_base_freq(cpu);
|
||||
if (scaling_max_freq < base_freq || no_turbo())
|
||||
set_cpufreq_scaling_min_max(cpu, 1, base_freq);
|
||||
}
|
||||
|
||||
static void adjust_scaling_min_from_base_freq(int cpu)
|
||||
{
|
||||
int base_freq, scaling_min_freq;
|
||||
|
||||
scaling_min_freq = parse_int_file(0, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_min_freq", cpu);
|
||||
base_freq = get_cpufreq_base_freq(cpu);
|
||||
if (scaling_min_freq < base_freq)
|
||||
set_cpufreq_scaling_min_max(cpu, 0, base_freq);
|
||||
}
|
||||
|
||||
static int set_clx_pbf_cpufreq_scaling_min_max(int cpu)
|
||||
{
|
||||
struct isst_pkg_ctdp_level_info *ctdp_level;
|
||||
@ -1533,6 +1564,7 @@ static void set_scaling_min_to_cpuinfo_max(int cpu)
|
||||
continue;
|
||||
|
||||
set_cpufreq_scaling_min_max_from_cpuinfo(i, 1, 0);
|
||||
adjust_scaling_min_from_base_freq(i);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -443,7 +443,6 @@ int test_alignment_handler_integer(void)
|
||||
LOAD_DFORM_TEST(ldu);
|
||||
LOAD_XFORM_TEST(ldx);
|
||||
LOAD_XFORM_TEST(ldux);
|
||||
LOAD_DFORM_TEST(lmw);
|
||||
STORE_DFORM_TEST(stb);
|
||||
STORE_XFORM_TEST(stbx);
|
||||
STORE_DFORM_TEST(stbu);
|
||||
@ -462,7 +461,11 @@ int test_alignment_handler_integer(void)
|
||||
STORE_XFORM_TEST(stdx);
|
||||
STORE_DFORM_TEST(stdu);
|
||||
STORE_XFORM_TEST(stdux);
|
||||
|
||||
#ifdef __BIG_ENDIAN__
|
||||
LOAD_DFORM_TEST(lmw);
|
||||
STORE_DFORM_TEST(stmw);
|
||||
#endif
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user