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clk: qcom: Add reset support for IRIS and XO clocks

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Add reset support for gcc_iris_ss_hf_axi_clk,
gcc_iris_ss_spd_axi_clk and video_cc_xo_clk for NEO.

Change-Id: Ia2e9ab2ba91ee4dd42053e96a9b756139fcbcfdb
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
This commit is contained in:
Kalpak Kawadkar 2022-06-04 09:43:45 +05:30
parent e2a34edec2
commit c6e83926f0
2 changed files with 4 additions and 1 deletions
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2
drivers/clk/qcom/gcc-neo.c
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@ -2514,6 +2514,8 @@ static const struct qcom_reset_map gcc_neo_resets[] = {
[GCC_VIDEO_AXI0_CLK_ARES] = { 0x42018, 2 },
[GCC_VIDEO_AXI1_CLK_ARES] = { 0x42024, 2 },
[GCC_VIDEO_BCR] = { 0x42000 },
[GCC_IRIS_SS_HF_AXI_CLK_ARES] = { 0x42030, 2 },
[GCC_IRIS_SS_SPD_AXI_CLK_ARES] = { 0x70020, 2 },
};

3
drivers/clk/qcom/videocc-neo.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk-provider.h>
@ -418,6 +418,7 @@ static const struct qcom_reset_map video_cc_neo_resets[] = {
[CVP_VIDEO_CC_MVS1_BCR] = { 0x80c8 },
[VIDEO_CC_MVS1C_CLK_ARES] = { 0x8090, 2 },
[CVP_VIDEO_CC_MVS1C_BCR] = { 0x8074 },
[VIDEO_CC_XO_CLK_ARES] = { 0x8124, 2 },
};
static const struct regmap_config video_cc_neo_regmap_config = {