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Merge "Merge keystone/android12-5.10-keystone-qcom-release.101+ (49a1520) into msm-5.10"

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qctecmdr 2022-05-05 13:50:38 -07:00 committed by Gerrit - the friendly Code Review server
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62
Documentation/ABI/testing/sysfs-bus-iio-lptimer-stm32
View File

@ -1,62 +0,0 @@
What: /sys/bus/iio/devices/iio:deviceX/in_count0_preset
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the current preset value. Writing sets the
preset value. Encoder counts continuously from 0 to preset
value, depending on direction (up/down).
What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible quadrature modes.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device counter quadrature modes:
- non-quadrature:
Encoder IN1 input servers as the count input (up
direction).
- quadrature:
Encoder IN1 and IN2 inputs are mixed to get direction
and count.
What: /sys/bus/iio/devices/iio:deviceX/in_count_polarity_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible active edges.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_polarity
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device encoder/counter active edge:
- rising-edge
- falling-edge
- both-edges
In non-quadrature mode, device counts up on active edge.
In quadrature mode, encoder counting scenarios are as follows:
+---------+----------+--------------------+--------------------+
| Active | Level on | IN1 signal | IN2 signal |
| edge | opposite +----------+---------+----------+---------+
| | signal | Rising | Falling | Rising | Falling |
+---------+----------+----------+---------+----------+---------+
| Rising | High -> | Down | - | Up | - |
| edge | Low -> | Up | - | Down | - |
+---------+----------+----------+---------+----------+---------+
| Falling | High -> | - | Up | - | Down |
| edge | Low -> | - | Down | - | Up |
+---------+----------+----------+---------+----------+---------+
| Both | High -> | Down | Up | Up | Down |
| edges | Low -> | Up | Down | Down | Up |
+---------+----------+----------+---------+----------+---------+

3
Documentation/accounting/psi.rst
View File

@ -92,7 +92,8 @@ Triggers can be set on more than one psi metric and more than one trigger
for the same psi metric can be specified. However for each trigger a separate
file descriptor is required to be able to poll it separately from others,
therefore for each trigger a separate open() syscall should be made even
when opening the same psi interface file.
when opening the same psi interface file. Write operations to a file descriptor
with an already existing psi trigger will fail with EBUSY.
Monitors activate only when system enters stall state for the monitored
psi metric and deactivates upon exit from the stall state. While system is

2
Documentation/admin-guide/hw-vuln/spectre.rst
View File

@ -483,7 +483,7 @@ Spectre variant 2
before invoking any firmware code to prevent Spectre variant 2 exploits
using the firmware.
Using kernel address space randomization (CONFIG_RANDOMIZE_SLAB=y
Using kernel address space randomization (CONFIG_RANDOMIZE_BASE=y
and CONFIG_SLAB_FREELIST_RANDOM=y in the kernel configuration) makes
attacks on the kernel generally more difficult.

10
Documentation/admin-guide/kernel-parameters.txt
View File

@ -1662,6 +1662,8 @@
architectures force reset to be always executed
i8042.unlock [HW] Unlock (ignore) the keylock
i8042.kbdreset [HW] Reset device connected to KBD port
i8042.probe_defer
[HW] Allow deferred probing upon i8042 probe errors
i810= [HW,DRM]
@ -2352,8 +2354,12 @@
Default is 1 (enabled)
kvm-intel.emulate_invalid_guest_state=
[KVM,Intel] Enable emulation of invalid guest states
Default is 0 (disabled)
[KVM,Intel] Disable emulation of invalid guest state.
Ignored if kvm-intel.enable_unrestricted_guest=1, as
guest state is never invalid for unrestricted guests.
This param doesn't apply to nested guests (L2), as KVM
never emulates invalid L2 guest state.
Default is 1 (enabled)
kvm-intel.flexpriority=
[KVM,Intel] Disable FlexPriority feature (TPR shadow).

7
Documentation/driver-api/dmaengine/dmatest.rst
View File

@ -143,13 +143,14 @@ Part 5 - Handling channel allocation
Allocating Channels
-------------------
Channels are required to be configured prior to starting the test run.
Attempting to run the test without configuring the channels will fail.
Channels do not need to be configured prior to starting a test run. Attempting
to run the test without configuring the channels will result in testing any
channels that are available.
Example::
% echo 1 > /sys/module/dmatest/parameters/run
dmatest: Could not start test, no channels configured
dmatest: No channels configured, continue with any
Channels are registered using the "channel" parameter. Channels can be requested by their
name, once requested, the channel is registered and a pending thread is added to the test list.

4
Documentation/driver-api/firewire.rst
View File

@ -19,7 +19,7 @@ of kernel interfaces is available via exported symbols in `firewire-core` module
Firewire char device data structures
====================================
.. include:: /ABI/stable/firewire-cdev
.. include:: ../ABI/stable/firewire-cdev
:literal:
.. kernel-doc:: include/uapi/linux/firewire-cdev.h
@ -28,7 +28,7 @@ Firewire char device data structures
Firewire device probing and sysfs interfaces
============================================
.. include:: /ABI/stable/sysfs-bus-firewire
.. include:: ../ABI/stable/sysfs-bus-firewire
:literal:
.. kernel-doc:: drivers/firewire/core-device.c

10
Documentation/firmware-guide/acpi/dsd/data-node-references.rst
View File

@ -5,7 +5,7 @@
Referencing hierarchical data nodes
===================================
:Copyright: |copy| 2018 Intel Corporation
:Copyright: |copy| 2018, 2021 Intel Corporation
:Author: Sakari Ailus <sakari.ailus@linux.intel.com>
ACPI in general allows referring to device objects in the tree only.
@ -52,12 +52,14 @@ the ANOD object which is also the final target node of the reference.
Name (NOD0, Package() {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "reg", 0 },
Package () { "random-property", 3 },
}
})
Name (NOD1, Package() {
ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () { "reg", 1 },
Package () { "anothernode", "ANOD" },
}
})
@ -74,7 +76,11 @@ the ANOD object which is also the final target node of the reference.
Name (_DSD, Package () {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "reference", ^DEV0, "node@1", "anothernode" },
Package () {
"reference", Package () {
^DEV0, "node@1", "anothernode"
}
},
}
})
}

18
Documentation/gpu/todo.rst
View File

@ -273,24 +273,6 @@ Contact: Daniel Vetter, Noralf Tronnes
Level: Advanced
Garbage collect fbdev scrolling acceleration
--------------------------------------------
Scroll acceleration is disabled in fbcon by hard-wiring p->scrollmode =
SCROLL_REDRAW. There's a ton of code this will allow us to remove:
- lots of code in fbcon.c
- a bunch of the hooks in fbcon_ops, maybe the remaining hooks could be called
directly instead of the function table (with a switch on p->rotate)
- fb_copyarea is unused after this, and can be deleted from all drivers
Note that not all acceleration code can be deleted, since clearing and cursor
support is still accelerated, which might be good candidates for further
deletion projects.
Contact: Daniel Vetter
Level: Intermediate
idr_init_base()
---------------

10
Documentation/hwmon/lm90.rst
View File

@ -265,6 +265,16 @@ Supported chips:
https://www.ti.com/litv/pdf/sbos686
* Texas Instruments TMP461
Prefix: 'tmp461'
Addresses scanned: I2C 0x48 through 0x4F
Datasheet: Publicly available at TI website
https://www.ti.com/lit/gpn/tmp461
Author: Jean Delvare <jdelvare@suse.de>

47
Documentation/kbuild/gcc-plugins.rst
View File

@ -11,16 +11,13 @@ compiler [1]_. They are useful for runtime instrumentation and static analysis.
We can analyse, change and add further code during compilation via
callbacks [2]_, GIMPLE [3]_, IPA [4]_ and RTL passes [5]_.
The GCC plugin infrastructure of the kernel supports all gcc versions from
4.5 to 6.0, building out-of-tree modules, cross-compilation and building in a
separate directory.
Plugin source files have to be compilable by both a C and a C++ compiler as well
because gcc versions 4.5 and 4.6 are compiled by a C compiler,
gcc-4.7 can be compiled by a C or a C++ compiler,
and versions 4.8+ can only be compiled by a C++ compiler.
The GCC plugin infrastructure of the kernel supports building out-of-tree
modules, cross-compilation and building in a separate directory.
Plugin source files have to be compilable by a C++ compiler.
Currently the GCC plugin infrastructure supports only the x86, arm, arm64 and
powerpc architectures.
Currently the GCC plugin infrastructure supports only some architectures.
Grep "select HAVE_GCC_PLUGINS" to find out which architectures support
GCC plugins.
This infrastructure was ported from grsecurity [6]_ and PaX [7]_.
@ -47,20 +44,13 @@ Files
This is a compatibility header for GCC plugins.
It should be always included instead of individual gcc headers.
**$(src)/scripts/gcc-plugin.sh**
This script checks the availability of the included headers in
gcc-common.h and chooses the proper host compiler to build the plugins
(gcc-4.7 can be built by either gcc or g++).
**$(src)/scripts/gcc-plugins/gcc-generate-gimple-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-ipa-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h,
$(src)/scripts/gcc-plugins/gcc-generate-rtl-pass.h**
These headers automatically generate the registration structures for
GIMPLE, SIMPLE_IPA, IPA and RTL passes. They support all gcc versions
from 4.5 to 6.0.
GIMPLE, SIMPLE_IPA, IPA and RTL passes.
They should be preferred to creating the structures by hand.
@ -68,21 +58,25 @@ Usage
=====
You must install the gcc plugin headers for your gcc version,
e.g., on Ubuntu for gcc-4.9::
e.g., on Ubuntu for gcc-10::
apt-get install gcc-4.9-plugin-dev
apt-get install gcc-10-plugin-dev
Or on Fedora::
dnf install gcc-plugin-devel
Enable a GCC plugin based feature in the kernel config::
Enable the GCC plugin infrastructure and some plugin(s) you want to use
in the kernel config::
CONFIG_GCC_PLUGIN_CYC_COMPLEXITY = y
CONFIG_GCC_PLUGINS=y
CONFIG_GCC_PLUGIN_CYC_COMPLEXITY=y
CONFIG_GCC_PLUGIN_LATENT_ENTROPY=y
...
To compile only the plugin(s)::
To compile the minimum tool set including the plugin(s)::
make gcc-plugins
make scripts
or just run the kernel make and compile the whole kernel with
the cyclomatic complexity GCC plugin.
@ -91,7 +85,8 @@ the cyclomatic complexity GCC plugin.
4. How to add a new GCC plugin
==============================
The GCC plugins are in $(src)/scripts/gcc-plugins/. You can use a file or a directory
here. It must be added to $(src)/scripts/gcc-plugins/Makefile,
$(src)/scripts/Makefile.gcc-plugins and $(src)/arch/Kconfig.
The GCC plugins are in scripts/gcc-plugins/. You need to put plugin source files
right under scripts/gcc-plugins/. Creating subdirectories is not supported.
It must be added to scripts/gcc-plugins/Makefile, scripts/Makefile.gcc-plugins
and a relevant Kconfig file.
See the cyc_complexity_plugin.c (CONFIG_GCC_PLUGIN_CYC_COMPLEXITY) GCC plugin.

9
Documentation/locking/locktypes.rst
View File

@ -439,11 +439,9 @@ preemption. The following substitution works on both kernels::
spin_lock(&p->lock);
p->count += this_cpu_read(var2);
On a non-PREEMPT_RT kernel migrate_disable() maps to preempt_disable()
which makes the above code fully equivalent. On a PREEMPT_RT kernel
migrate_disable() ensures that the task is pinned on the current CPU which
in turn guarantees that the per-CPU access to var1 and var2 are staying on
the same CPU.
the same CPU while the task remains preemptible.
The migrate_disable() substitution is not valid for the following
scenario::
@ -456,9 +454,8 @@ scenario::
p = this_cpu_ptr(&var1);
p->val = func2();
While correct on a non-PREEMPT_RT kernel, this breaks on PREEMPT_RT because
here migrate_disable() does not protect against reentrancy from a
preempting task. A correct substitution for this case is::
This breaks because migrate_disable() does not protect against reentrancy from
a preempting task. A correct substitution for this case is::
func()
{

11
Documentation/networking/bonding.rst
View File

@ -196,11 +196,12 @@ ad_actor_sys_prio
ad_actor_system
In an AD system, this specifies the mac-address for the actor in
protocol packet exchanges (LACPDUs). The value cannot be NULL or
multicast. It is preferred to have the local-admin bit set for this
mac but driver does not enforce it. If the value is not given then
system defaults to using the masters' mac address as actors' system
address.
protocol packet exchanges (LACPDUs). The value cannot be a multicast
address. If the all-zeroes MAC is specified, bonding will internally
use the MAC of the bond itself. It is preferred to have the
local-admin bit set for this mac but driver does not enforce it. If
the value is not given then system defaults to using the masters'
mac address as actors' system address.
This parameter has effect only in 802.3ad mode and is available through
SysFs interface.

16
Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst
View File

@ -440,6 +440,22 @@ NOTE: For 82599-based network connections, if you are enabling jumbo frames in
a virtual function (VF), jumbo frames must first be enabled in the physical
function (PF). The VF MTU setting cannot be larger than the PF MTU.
NBASE-T Support
---------------
The ixgbe driver supports NBASE-T on some devices. However, the advertisement
of NBASE-T speeds is suppressed by default, to accommodate broken network
switches which cannot cope with advertised NBASE-T speeds. Use the ethtool
command to enable advertising NBASE-T speeds on devices which support it::
ethtool -s eth? advertise 0x1800000001028
On Linux systems with INTERFACES(5), this can be specified as a pre-up command
in /etc/network/interfaces so that the interface is always brought up with
NBASE-T support, e.g.::
iface eth? inet dhcp
pre-up ethtool -s eth? advertise 0x1800000001028 || true
Generic Receive Offload, aka GRO
--------------------------------
The driver supports the in-kernel software implementation of GRO. GRO has

3
Documentation/networking/ipvs-sysctl.rst
View File

@ -37,8 +37,7 @@ conn_reuse_mode - INTEGER
0: disable any special handling on port reuse. The new
connection will be delivered to the same real server that was
servicing the previous connection. This will effectively
disable expire_nodest_conn.
servicing the previous connection.
bit 1: enable rescheduling of new connections when it is safe.
That is, whenever expire_nodest_conn and for TCP sockets, when

2
Documentation/sound/hd-audio/models.rst
View File

@ -326,6 +326,8 @@ usi-headset
Headset support on USI machines
dual-codecs
Lenovo laptops with dual codecs
alc285-hp-amp-init
HP laptops which require speaker amplifier initialization (ALC285)
ALC680
======

1
MAINTAINERS
View File

@ -7310,7 +7310,6 @@ L: linux-hardening@vger.kernel.org
S: Maintained
F: Documentation/kbuild/gcc-plugins.rst
F: scripts/Makefile.gcc-plugins
F: scripts/gcc-plugin.sh
F: scripts/gcc-plugins/
GCOV BASED KERNEL PROFILING

2
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 81
SUBLEVEL = 101
EXTRAVERSION =
NAME = Dare mighty things

2
android/ACK_SHA
View File

@ -1 +1 @@
ce5963469cb42a79c04d0c62286d6d0377c84988
9a3296275731b804ed62feb618e0d49564c101b3

15996
android/abi_gki_aarch64.xml
View File

File diff suppressed because it is too large Load Diff

51
android/abi_gki_aarch64_oplus
View File

@ -5,8 +5,10 @@
add_device_randomness
add_memory
add_memory_subsection
add_swap_extent
add_taint
add_timer
add_to_page_cache_lru
add_uevent_var
add_wait_queue
adjust_managed_page_count
@ -148,6 +150,7 @@
class_interface_unregister
__class_register
class_unregister
__cleancache_get_page
cleanup_srcu_struct
clear_page
__ClearPageMovable
@ -222,6 +225,7 @@
config_group_init_type_name
config_item_get
config_item_put
congestion_wait
console_drivers
console_printk
console_stop
@ -857,6 +861,9 @@
__fdget
fd_install
fget
filemap_allow_speculation
filemap_check_errors
filemap_map_pages
filp_close
filp_open_block
find_get_pid
@ -921,6 +928,7 @@
fwnode_property_read_u32_array
fwnode_property_read_u64_array
gcd
generate_random_uuid
generic_device_group
generic_file_llseek
generic_handle_irq
@ -1302,6 +1310,7 @@
kobj_sysfs_ops
krealloc
kset_create_and_add
kset_register
ksize
ksoftirqd
kstat
@ -1388,6 +1397,7 @@
lzorle1x_1_compress
match_hex
match_int
match_strdup
match_string
match_token
mbox_chan_received_data
@ -1450,7 +1460,10 @@
__memset_io
memstart_addr
memunmap
migrate_page_copy
migrate_page_move_mapping
migrate_pages
migrate_page_states
migrate_swap
mii_check_media
mii_ethtool_get_link_ksettings
@ -1675,9 +1688,17 @@
on_each_cpu_cond
oops_in_progress
overflowuid
page_cache_ra_unbounded
page_cache_sync_ra
pagecache_write_begin
pagecache_write_end
page_endio
__page_file_index
__page_file_mapping
page_get_link
page_mapping
__page_pinner_migration_failed
page_symlink
panic
panic_notifier_list
panic_timeout
@ -1732,6 +1753,11 @@
pci_write_config_dword
pcpu_nr_pages
PDE_DATA
percpu_counter_add_batch
percpu_counter_destroy
__percpu_counter_init
percpu_counter_set
__percpu_counter_sum
__per_cpu_offset
per_cpu_ptr_to_phys
perf_aux_output_begin
@ -1905,10 +1931,12 @@
qcom_smem_state_update_bits
queue_delayed_work_on
queue_work_on
radix_tree_gang_lookup
radix_tree_insert
radix_tree_iter_delete
radix_tree_lookup
radix_tree_next_chunk
radix_tree_preload
___ratelimit
rational_best_approximation
raw_notifier_call_chain
@ -1957,6 +1985,7 @@
rdev_get_drvdata
rdev_get_id
rdev_get_regmap
read_cache_page_gfp
reboot_mode
refcount_dec_and_lock
refcount_dec_not_one
@ -2248,6 +2277,7 @@
__sg_page_iter_start
sg_scsi_ioctl
show_regs
shrink_slab
sigprocmask
si_mem_available
si_meminfo
@ -2432,6 +2462,7 @@
__sw_hweight32
__sw_hweight64
__sw_hweight8
swp_swap_info
sync_file_create
sync_file_get_fence
synchronize_irq
@ -2686,6 +2717,7 @@
__traceiter_android_vh_show_resume_epoch_val
__traceiter_android_vh_show_stack_hash
__traceiter_android_vh_show_suspend_epoch_val
__traceiter_android_vh_shrink_node_memcgs
__traceiter_android_vh_sync_txn_recvd
__traceiter_android_vh_syscall_prctl_finished
__traceiter_android_vh_timer_calc_index
@ -2694,6 +2726,8 @@
__traceiter_android_vh_tune_swappiness
__traceiter_android_vh_page_referenced_check_bypass
__traceiter_android_vh_drain_all_pages_bypass
__traceiter_android_vh_cma_drain_all_pages_bypass
__traceiter_android_vh_pcplist_add_cma_pages_bypass
__traceiter_android_vh_ufs_compl_command
__traceiter_android_vh_ufs_send_command
__traceiter_android_vh_ufs_send_tm_command
@ -2890,6 +2924,7 @@
__tracepoint_android_vh_show_resume_epoch_val
__tracepoint_android_vh_show_stack_hash
__tracepoint_android_vh_show_suspend_epoch_val
__tracepoint_android_vh_shrink_node_memcgs
__tracepoint_android_vh_sync_txn_recvd
__tracepoint_android_vh_syscall_prctl_finished
__tracepoint_android_vh_timer_calc_index
@ -2898,6 +2933,8 @@
__tracepoint_android_vh_tune_swappiness
__tracepoint_android_vh_page_referenced_check_bypass
__tracepoint_android_vh_drain_all_pages_bypass
__tracepoint_android_vh_cma_drain_all_pages_bypass
__tracepoint_android_vh_pcplist_add_cma_pages_bypass
__tracepoint_android_vh_ufs_compl_command
__tracepoint_android_vh_ufs_send_command
__tracepoint_android_vh_ufs_send_tm_command
@ -2940,6 +2977,8 @@
trace_seq_printf
trace_seq_putc
tracing_off
truncate_inode_pages_range
truncate_pagecache_range
try_module_get
try_to_free_mem_cgroup_pages
try_wait_for_completion
@ -3162,6 +3201,11 @@
usb_unregister_notify
__usecs_to_jiffies
usleep_range
utf8_casefold
utf8_load
utf8s_to_utf16s
utf8_strncasecmp_folded
utf8_unload
uuid_null
v4l2_async_notifier_add_fwnode_subdev
v4l2_async_notifier_add_subdev
@ -3310,6 +3354,7 @@
vm_map_pages
vm_map_ram
vm_node_stat
vm_unmap_aliases
vm_unmapped_area
vm_unmap_ram
vm_zone_stat
@ -3324,10 +3369,13 @@
wait_for_completion
wait_for_completion_interruptible
wait_for_completion_interruptible_timeout
wait_for_completion_io
wait_for_completion_io_timeout
wait_for_completion_killable
wait_for_completion_killable_timeout
wait_for_completion_timeout
wait_for_stable_page
wait_on_page_writeback
wait_woken
__wake_up
wake_up_if_idle
@ -3339,6 +3387,7 @@
wakeup_source_register
wakeup_source_remove
wakeup_source_unregister
walk_page_range
__warn_printk
watchdog_init_timeout
watchdog_set_restart_priority
@ -3350,10 +3399,12 @@
ww_mutex_lock
ww_mutex_unlock
__xa_alloc
__xa_clear_mark
xa_destroy
xa_erase
xa_find
xa_find_after
xa_get_mark
xa_load
xa_store
xhci_add_endpoint

14
arch/arm/Kconfig.debug
View File

@ -415,12 +415,12 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX25.
config DEBUG_IMX21_IMX27_UART
bool "i.MX21 and i.MX27 Debug UART"
depends on SOC_IMX21 || SOC_IMX27
config DEBUG_IMX27_UART
bool "i.MX27 Debug UART"
depends on SOC_IMX27
help
Say Y here if you want kernel low-level debugging support
on i.MX21 or i.MX27.
on i.MX27.
config DEBUG_IMX28_UART
bool "i.MX28 Debug UART"
@ -1538,7 +1538,7 @@ config DEBUG_IMX_UART_PORT
int "i.MX Debug UART Port Selection"
depends on DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX27_UART || \
DEBUG_IMX31_UART || \
DEBUG_IMX35_UART || \
DEBUG_IMX50_UART || \
@ -1606,12 +1606,12 @@ config DEBUG_LL_INCLUDE
default "debug/icedcc.S" if DEBUG_ICEDCC
default "debug/imx.S" if DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX27_UART || \
DEBUG_IMX31_UART || \
DEBUG_IMX35_UART || \
DEBUG_IMX50_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX53_UART ||\
DEBUG_IMX53_UART || \
DEBUG_IMX6Q_UART || \
DEBUG_IMX6SL_UART || \
DEBUG_IMX6SX_UART || \

22
arch/arm/boot/compressed/efi-header.S
View File

@ -9,16 +9,22 @@
#include <linux/sizes.h>
.macro __nop
#ifdef CONFIG_EFI_STUB
@ This is almost but not quite a NOP, since it does clobber the
@ condition flags. But it is the best we can do for EFI, since
@ PE/COFF expects the magic string "MZ" at offset 0, while the
@ ARM/Linux boot protocol expects an executable instruction
@ there.
.inst MZ_MAGIC | (0x1310 << 16) @ tstne r0, #0x4d000
#else
AR_CLASS( mov r0, r0 )
M_CLASS( nop.w )
.endm
.macro __initial_nops
#ifdef CONFIG_EFI_STUB
@ This is a two-instruction NOP, which happens to bear the
@ PE/COFF signature "MZ" in the first two bytes, so the kernel
@ is accepted as an EFI binary. Booting via the UEFI stub
@ will not execute those instructions, but the ARM/Linux
@ boot protocol does, so we need some NOPs here.
.inst MZ_MAGIC | (0xe225 << 16) @ eor r5, r5, 0x4d000
eor r5, r5, 0x4d000 @ undo previous insn
#else
__nop
__nop
#endif
.endm

3
arch/arm/boot/compressed/head.S
View File

@ -197,7 +197,8 @@ start:
* were patching the initial instructions of the kernel, i.e
* had started to exploit this "patch area".
*/
.rept 7
__initial_nops
.rept 5
__nop
.endr
#ifndef CONFIG_THUMB2_KERNEL

1
arch/arm/boot/dts/Makefile
View File

@ -731,6 +731,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
logicpd-som-lv-37xx-devkit.dtb \
omap3430-sdp.dtb \
omap3-beagle.dtb \
omap3-beagle-ab4.dtb \
omap3-beagle-xm.dtb \
omap3-beagle-xm-ab.dtb \
omap3-cm-t3517.dtb \

4
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -168,7 +168,7 @@ i2c1: i2c@11100 {
};
uart0: serial@12000 {
compatible = "marvell,armada-38x-uart";
compatible = "marvell,armada-38x-uart", "ns16550a";
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
@ -178,7 +178,7 @@ uart0: serial@12000 {
};
uart1: serial@12100 {
compatible = "marvell,armada-38x-uart";
compatible = "marvell,armada-38x-uart", "ns16550a";
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -77,7 +77,7 @@ pmu {
interrupt-affinity = <&cpu0>, <&cpu1>;
};
mpcore@19000000 {
mpcore-bus@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
@ -219,7 +219,7 @@ dma: dma@20000 {
status = "disabled";
};
sdio: sdhci@21000 {
sdio: mmc@21000 {
compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x21000 0x100>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;

10
arch/arm/boot/dts/bcm2711.dtsi
View File

@ -480,11 +480,17 @@ pcie0: pcie@7d500000 {
#address-cells = <3>;
#interrupt-cells = <1>;
#size-cells = <2>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pcie", "msi";
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &gicv2 GIC_SPI 144
IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &gicv2 GIC_SPI 145
IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &gicv2 GIC_SPI 146
IRQ_TYPE_LEVEL_HIGH>;
msi-controller;
msi-parent = <&pcie0>;
@ -549,6 +555,8 @@ &gpio {
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&gpio 0 0 58>;
gpclk0_gpio49: gpclk0_gpio49 {
pin-gpclk {
pins = "gpio49";

2
arch/arm/boot/dts/bcm283x.dtsi
View File

@ -126,6 +126,8 @@ gpio: gpio@7e200000 {
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&gpio 0 0 54>;
/* Defines common pin muxing groups
*
* While each pin can have its mux selected

22
arch/arm/boot/dts/bcm53016-meraki-mr32.dts
View File

@ -195,3 +195,25 @@ partition4@800000 {
};
};
};
&srab {
status = "okay";
ports {
port@0 {
reg = <0>;
label = "poe";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
duplex-full;
};
};
};
};

4
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -242,6 +242,8 @@ chipcommon: chipcommon@0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pcie0: pcie@12000 {
@ -408,7 +410,7 @@ uart2: serial@18008000 {
i2c0: i2c@18009000 {
compatible = "brcm,iproc-i2c";
reg = <0x18009000 0x50>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;

2
arch/arm/boot/dts/exynos4210-i9100.dts
View File

@ -765,7 +765,7 @@ bluetooth {
compatible = "brcm,bcm4330-bt";
shutdown-gpios = <&gpl0 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpl1 0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpl1 0 GPIO_ACTIVE_LOW>;
device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
};

2
arch/arm/boot/dts/gemini-nas4220b.dts
View File

@ -84,7 +84,7 @@ flash@30000000 {
partitions {
compatible = "redboot-fis";
/* Eraseblock at 0xfe0000 */
fis-index-block = <0x1fc>;
fis-index-block = <0x7f>;
};
};

1
arch/arm/boot/dts/imx23-evk.dts
View File

@ -79,7 +79,6 @@ hog_pins_a: hog@0 {
MX23_PAD_LCD_RESET__GPIO_1_18
MX23_PAD_PWM3__GPIO_1_29
MX23_PAD_PWM4__GPIO_1_30
MX23_PAD_SSP1_DETECT__SSP1_DETECT
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;

5
arch/arm/boot/dts/imx6qdl-udoo.dtsi
View File

@ -5,6 +5,8 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
backlight = &backlight;
@ -226,6 +228,7 @@ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
>;
};
@ -304,7 +307,7 @@ &usbotg {
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
non-removable;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
status = "okay";
};

1
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
View File

@ -289,6 +289,7 @@ mdio {
ethphy: ethernet-phy@1 {
reg = <1>;
qca,clk-out-frequency = <125000000>;
};
};
};

2
arch/arm/boot/dts/imx6ull-pinfunc.h
View File

@ -82,6 +82,6 @@
#define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0 0x0200 0x048C 0x0000 0x9 0x0
#endif /* __DTS_IMX6ULL_PINFUNC_H */

2
arch/arm/boot/dts/imx7ulp.dtsi
View File

@ -259,7 +259,7 @@ wdog1: watchdog@403d0000 {
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
timeout-sec = <40>;
};

2
arch/arm/boot/dts/ls1021a-tsn.dts
View File

@ -251,7 +251,7 @@ &qspi {
flash@0 {
/* Rev. A uses 64MB flash, Rev. B & C use 32MB flash */
compatible = "jedec,spi-nor", "s25fl256s1", "s25fl512s";
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
#address-cells = <1>;
#size-cells = <1>;

66
arch/arm/boot/dts/ls1021a.dtsi
View File

@ -331,39 +331,6 @@ tmu: tmu@1f00000 {
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
dspi0: spi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
@ -1018,4 +985,37 @@ ftm_alarm0: timer0@29d0000 {
big-endian;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
};

8
arch/arm/boot/dts/meson.dtsi
View File

@ -42,14 +42,14 @@ hwrng: rng@8100 {
};
uart_A: serial@84c0 {
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
compatible = "amlogic,meson6-uart";
reg = <0x84c0 0x18>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
uart_B: serial@84dc {
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
compatible = "amlogic,meson6-uart";
reg = <0x84dc 0x18>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@ -87,7 +87,7 @@ saradc: adc@8680 {
};
uart_C: serial@8700 {
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
compatible = "amlogic,meson6-uart";
reg = <0x8700 0x18>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@ -203,7 +203,7 @@ ir_receiver: ir-receiver@480 {
};
uart_AO: serial@4c0 {
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart";
reg = <0x4c0 0x18>;
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
status = "disabled";

24
arch/arm/boot/dts/meson8.dtsi
View File

@ -598,27 +598,27 @@ &timer_abcde {
};
&uart_AO {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8-uart", "amlogic,meson-ao-uart";
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_A {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&usb0 {

24
arch/arm/boot/dts/meson8b.dtsi
View File

@ -586,27 +586,27 @@ &timer_abcde {
};
&uart_AO {
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart";
clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_A {
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;
clock-names = "baud", "xtal", "pclk";
compatible = "amlogic,meson8b-uart";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk", "baud";
};
&usb0 {

2
arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
View File

@ -29,7 +29,7 @@ ethernet@gpmc {
compatible = "smsc,lan9221","smsc,lan9115";
bank-width = <2>;
gpmc,mux-add-data;
gpmc,mux-add-data = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <42>;
gpmc,cs-wr-off-ns = <36>;

47
arch/arm/boot/dts/omap3-beagle-ab4.dts Normal file
View File

@ -0,0 +1,47 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "omap3-beagle.dts"
/ {
model = "TI OMAP3 BeagleBoard A to B4";
compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
};
/*
* Workaround for capacitor C70 issue, see "Boards revision A and < B5"
* section at https://elinux.org/BeagleBoard_Community
*/
/* Unusable as clocksource because of unreliable oscillator */
&counter32k {
status = "disabled";
};
/* Unusable as clockevent because of unreliable oscillator, allow to idle */
&timer1_target {
/delete-property/ti,no-reset-on-init;
/delete-property/ti,no-idle;
timer@0 {
/delete-property/ti,timer-alwon;
};
};
/* Preferred always-on timer for clocksource */
&timer12_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
/* Always clocked by secure_32k_fck */
};
};
/* Preferred timer for clockevent */
&timer2_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
assigned-clocks = <&gpt2_fck>;
assigned-clock-parents = <&sys_ck>;
};
};

33
arch/arm/boot/dts/omap3-beagle.dts
View File

@ -304,39 +304,6 @@ &usbhsehci {
phys = <0 &hsusb2_phy>;
};
/* Unusable as clocksource because of unreliable oscillator */
&counter32k {
status = "disabled";
};
/* Unusable as clockevent because if unreliable oscillator, allow to idle */
&timer1_target {
/delete-property/ti,no-reset-on-init;
/delete-property/ti,no-idle;
timer@0 {
/delete-property/ti,timer-alwon;
};
};
/* Preferred always-on timer for clocksource */
&timer12_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
/* Always clocked by secure_32k_fck */
};
};
/* Preferred timer for clockevent */
&timer2_target {
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
assigned-clocks = <&gpt2_fck>;
assigned-clock-parents = <&sys_ck>;
};
};
&twl_gpio {
ti,use-leds;
/* pullups: BIT(1) */

50
arch/arm/boot/dts/omap3-n900.dts
View File

@ -8,6 +8,7 @@
#include "omap34xx.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/*
* Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
@ -630,63 +631,92 @@ indicator {
};
lp5523: lp5523@32 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "national,lp5523";
reg = <0x32>;
clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
enable-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
chan0 {
led@0 {
reg = <0>;
chan-name = "lp5523:kb1";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
chan1 {
led@1 {
reg = <1>;
chan-name = "lp5523:kb2";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
chan2 {
led@2 {
reg = <2>;
chan-name = "lp5523:kb3";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
chan3 {
led@3 {
reg = <3>;
chan-name = "lp5523:kb4";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
chan4 {
led@4 {
reg = <4>;
chan-name = "lp5523:b";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
};
chan5 {
led@5 {
reg = <5>;
chan-name = "lp5523:g";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
chan6 {
led@6 {
reg = <6>;
chan-name = "lp5523:r";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
chan7 {
led@7 {
reg = <7>;
chan-name = "lp5523:kb5";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
chan8 {
led@8 {
reg = <8>;
chan-name = "lp5523:kb6";
led-cur = /bits/ 8 <50>;
max-cur = /bits/ 8 <100>;
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_KBD_BACKLIGHT;
};
};

2
arch/arm/boot/dts/omap3-overo-tobiduo-common.dtsi
View File

@ -22,7 +22,7 @@ smsc2: ethernet@4,0 {
compatible = "smsc,lan9221","smsc,lan9115";
bank-width = <2>;
gpmc,mux-add-data;
gpmc,mux-add-data = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <42>;
gpmc,cs-wr-off-ns = <36>;

6
arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
View File

@ -19,12 +19,12 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
memory@42000000 {
reg = <0x42000000 0x3e000000>;
device_type = "memory";
};
mdio0: mdio@0 {
mdio0: mdio-0 {
status = "okay";
compatible = "virtual,mdio-gpio";
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
@ -91,7 +91,7 @@ port@5 {
};
};
mdio1: mdio@1 {
mdio1: mdio-1 {
status = "okay";
compatible = "virtual,mdio-gpio";
gpios = <&qcom_pinmux 11 GPIO_ACTIVE_HIGH>,

2
arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
View File

@ -12,7 +12,7 @@ &qspi {
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00aa";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_arria5_socdk.dts
View File

@ -119,7 +119,7 @@ &qspi {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q256a";
compatible = "micron,n25q256a", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
View File

@ -124,7 +124,7 @@ &qspi {
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
View File

@ -169,7 +169,7 @@ &qspi {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
View File

@ -80,7 +80,7 @@ &qspi {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q256a";
compatible = "micron,n25q256a", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;

2
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
View File

@ -116,7 +116,7 @@ &qspi {
flash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q512a";
compatible = "micron,n25q512a", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

4
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
View File

@ -224,7 +224,7 @@ &qspi {
n25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128";
compatible = "micron,n25q128", "jedec,spi-nor";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
@ -241,7 +241,7 @@ n25q128@0 {
n25q00@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <1>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;

12
arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
View File

@ -154,10 +154,6 @@ sdi0_per1@80126000 {
cap-sd-highspeed;
cap-mmc-highspeed;
/* All direction control is used */
st,sig-dir-cmd;
st,sig-dir-dat0;
st,sig-dir-dat2;
st,sig-dir-dat31;
st,sig-pin-fbclk;
full-pwr-cycle;
vmmc-supply = <&ab8500_ldo_aux3_reg>;
@ -262,10 +258,10 @@ ab8500_ldo_aux1 {
};
ab8500_ldo_aux2 {
/* Supplies the Cypress TMA140 touchscreen only with 3.3V */
/* Supplies the Cypress TMA140 touchscreen only with 3.0V */
regulator-name = "AUX2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
ab8500_ldo_aux3 {
@ -284,9 +280,9 @@ ab8500_ldo_aux4 {
ab8500_ldo_aux5 {
regulator-name = "AUX5";
/* Intended for 1V8 for touchscreen but actually left unused */
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <2790000>;
regulator-always-on;
};
ab8500_ldo_aux6 {

2
arch/arm/boot/dts/stm32f429-disco.dts
View File

@ -192,7 +192,7 @@ l3gd20: l3gd20@0 {
display: display@1{
/* Connect panel-ilitek-9341 to ltdc */
compatible = "st,sf-tc240t-9370-t";
compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
reg = <1>;
spi-3wire;
spi-max-frequency = <10000000>;

4
arch/arm/boot/dts/sun8i-a33.dtsi
View File

@ -46,7 +46,7 @@
#include <dt-bindings/thermal/thermal.h>
/ {
cpu0_opp_table: opp_table0 {
cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -164,7 +164,7 @@ iio-hwmon {
io-channels = <&ths>;
};
mali_opp_table: gpu-opp-table {
mali_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-144000000 {

4
arch/arm/boot/dts/sun8i-a83t.dtsi
View File

@ -200,7 +200,7 @@ de: display-engine {
status = "disabled";
};
cpu0_opp_table: opp_table0 {
cpu0_opp_table: opp-table-cluster0 {
compatible = "operating-points-v2";
opp-shared;
@ -253,7 +253,7 @@ opp-1200000000 {
};
};
cpu1_opp_table: opp_table1 {
cpu1_opp_table: opp-table-cluster1 {
compatible = "operating-points-v2";
opp-shared;

4
arch/arm/boot/dts/sun8i-h3.dtsi
View File

@ -44,7 +44,7 @@
#include <dt-bindings/thermal/thermal.h>
/ {
cpu0_opp_table: opp_table0 {
cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -112,7 +112,7 @@ cpu3: cpu@3 {
};
};
gpu_opp_table: gpu-opp-table {
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-120000000 {

18
arch/arm/include/debug/imx-uart.h
View File

@ -11,13 +11,6 @@
#define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR
#define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n)
#define IMX21_UART1_BASE_ADDR 0x1000a000
#define IMX21_UART2_BASE_ADDR 0x1000b000
#define IMX21_UART3_BASE_ADDR 0x1000c000
#define IMX21_UART4_BASE_ADDR 0x1000d000
#define IMX21_UART_BASE_ADDR(n) IMX21_UART##n##_BASE_ADDR
#define IMX21_UART_BASE(n) IMX21_UART_BASE_ADDR(n)
#define IMX25_UART1_BASE_ADDR 0x43f90000
#define IMX25_UART2_BASE_ADDR 0x43f94000
#define IMX25_UART3_BASE_ADDR 0x5000c000
@ -26,6 +19,13 @@
#define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR
#define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n)
#define IMX27_UART1_BASE_ADDR 0x1000a000
#define IMX27_UART2_BASE_ADDR 0x1000b000
#define IMX27_UART3_BASE_ADDR 0x1000c000
#define IMX27_UART4_BASE_ADDR 0x1000d000
#define IMX27_UART_BASE_ADDR(n) IMX27_UART##n##_BASE_ADDR
#define IMX27_UART_BASE(n) IMX27_UART_BASE_ADDR(n)
#define IMX31_UART1_BASE_ADDR 0x43f90000
#define IMX31_UART2_BASE_ADDR 0x43f94000
#define IMX31_UART3_BASE_ADDR 0x5000c000
@ -112,10 +112,10 @@
#ifdef CONFIG_DEBUG_IMX1_UART
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX1)
#elif defined(CONFIG_DEBUG_IMX21_IMX27_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX21)
#elif defined(CONFIG_DEBUG_IMX25_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX25)
#elif defined(CONFIG_DEBUG_IMX27_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX27)
#elif defined(CONFIG_DEBUG_IMX31_UART)
#define UART_PADDR IMX_DEBUG_UART_BASE(IMX31)
#elif defined(CONFIG_DEBUG_IMX35_UART)

8
arch/arm/kernel/entry-armv.S
View File

@ -596,11 +596,9 @@ call_fpe:
tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2
reteq lr
and r8, r0, #0x00000f00 @ mask out CP number
THUMB( lsr r8, r8, #8 )
mov r7, #1
add r6, r10, #TI_USED_CP
ARM( strb r7, [r6, r8, lsr #8] ) @ set appropriate used_cp[]
THUMB( strb r7, [r6, r8] ) @ set appropriate used_cp[]
add r6, r10, r8, lsr #8 @ add used_cp[] array offset first
strb r7, [r6, #TI_USED_CP] @ set appropriate used_cp[]
#ifdef CONFIG_IWMMXT
@ Test if we need to give access to iWMMXt coprocessors
ldr r5, [r10, #TI_FLAGS]
@ -609,7 +607,7 @@ call_fpe:
bcs iwmmxt_task_enable
#endif
ARM( add pc, pc, r8, lsr #6 )
THUMB( lsl r8, r8, #2 )
THUMB( lsr r8, r8, #6 )
THUMB( add pc, r8 )
nop

17
arch/arm/kernel/perf_callchain.c
View File

@ -62,9 +62,10 @@ user_backtrace(struct frame_tail __user *tail,
void
perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
struct frame_tail __user *tail;
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
if (guest_cbs && guest_cbs->is_in_guest()) {
/* We don't support guest os callchain now */
return;
}
@ -98,9 +99,10 @@ callchain_trace(struct stackframe *fr,
void
perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
struct stackframe fr;
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
if (guest_cbs && guest_cbs->is_in_guest()) {
/* We don't support guest os callchain now */
return;
}
@ -111,18 +113,21 @@ perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *re
unsigned long perf_instruction_pointer(struct pt_regs *regs)
{
if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
return perf_guest_cbs->get_guest_ip();
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
if (guest_cbs && guest_cbs->is_in_guest())
return guest_cbs->get_guest_ip();
return instruction_pointer(regs);
}
unsigned long perf_misc_flags(struct pt_regs *regs)
{
struct perf_guest_info_callbacks *guest_cbs = perf_get_guest_cbs();
int misc = 0;
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
if (perf_guest_cbs->is_user_mode())
if (guest_cbs && guest_cbs->is_in_guest()) {
if (guest_cbs->is_user_mode())
misc |= PERF_RECORD_MISC_GUEST_USER;
else
misc |= PERF_RECORD_MISC_GUEST_KERNEL;

5
arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
View File

@ -154,8 +154,10 @@ static int __init rcar_gen2_regulator_quirk(void)
return -ENODEV;
for_each_matching_node_and_match(np, rcar_gen2_quirk_match, &id) {
if (!of_device_is_available(np))
if (!of_device_is_available(np)) {
of_node_put(np);
break;
}
ret = of_property_read_u32(np, "reg", &addr);
if (ret) /* Skip invalid entry and continue */
@ -164,6 +166,7 @@ static int __init rcar_gen2_regulator_quirk(void)
quirk = kzalloc(sizeof(*quirk), GFP_KERNEL);
if (!quirk) {
ret = -ENOMEM;
of_node_put(np);
goto err_mem;
}

2
arch/arm/mach-socfpga/Kconfig
View File

@ -2,6 +2,7 @@
menuconfig ARCH_SOCFPGA
bool "Altera SOCFPGA family"
depends on ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER
select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_AMBA
select ARM_GIC
@ -18,6 +19,7 @@ menuconfig ARCH_SOCFPGA
select PL310_ERRATA_727915
select PL310_ERRATA_753970 if PL310
select PL310_ERRATA_769419
select RESET_CONTROLLER
if ARCH_SOCFPGA
config SOCFPGA_SUSPEND

2
arch/arm/mach-socfpga/core.h
View File

@ -33,7 +33,7 @@ extern void __iomem *sdr_ctl_base_addr;
u32 socfpga_sdram_self_refresh(u32 sdr_base);
extern unsigned int socfpga_sdram_self_refresh_sz;
extern char secondary_trampoline, secondary_trampoline_end;
extern char secondary_trampoline[], secondary_trampoline_end[];
extern unsigned long socfpga_cpu1start_addr;

8
arch/arm/mach-socfpga/platsmp.c
View File

@ -20,14 +20,14 @@
static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
int trampoline_size = secondary_trampoline_end - secondary_trampoline;
if (socfpga_cpu1start_addr) {
/* This will put CPU #1 into reset. */
writel(RSTMGR_MPUMODRST_CPU1,
rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
memcpy(phys_to_virt(0), secondary_trampoline, trampoline_size);
writel(__pa_symbol(secondary_startup),
sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
@ -45,12 +45,12 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
int trampoline_size = secondary_trampoline_end - secondary_trampoline;
if (socfpga_cpu1start_addr) {
writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +
SOCFPGA_A10_RSTMGR_MODMPURST);
memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
memcpy(phys_to_virt(0), secondary_trampoline, trampoline_size);
writel(__pa_symbol(secondary_startup),
sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));

39
arch/arm/mm/init.c
View File

@ -125,11 +125,22 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max_low,
int pfn_valid(unsigned long pfn)
{
phys_addr_t addr = __pfn_to_phys(pfn);
unsigned long pageblock_size = PAGE_SIZE * pageblock_nr_pages;
if (__phys_to_pfn(addr) != pfn)
return 0;
return memblock_is_map_memory(addr);
/*
* If address less than pageblock_size bytes away from a present
* memory chunk there still will be a memory map entry for it
* because we round freed memory map to the pageblock boundaries.
*/
if (memblock_overlaps_region(&memblock.memory,
ALIGN_DOWN(addr, pageblock_size),
pageblock_size))
return 1;
return 0;
}
EXPORT_SYMBOL(pfn_valid);
#endif
@ -313,14 +324,14 @@ static void __init free_unused_memmap(void)
*/
start = min(start,
ALIGN(prev_end, PAGES_PER_SECTION));
#else
/*
* Align down here since the VM subsystem insists that the
* memmap entries are valid from the bank start aligned to
* MAX_ORDER_NR_PAGES.
*/
start = round_down(start, MAX_ORDER_NR_PAGES);
#endif
/*
* Align down here since many operations in VM subsystem
* presume that there are no holes in the memory map inside
* a pageblock
*/
start = round_down(start, pageblock_nr_pages);
/*
* If we had a previous bank, and there is a space
* between the current bank and the previous, free it.
@ -329,17 +340,19 @@ static void __init free_unused_memmap(void)
free_memmap(prev_end, start);
/*
* Align up here since the VM subsystem insists that the
* memmap entries are valid from the bank end aligned to
* MAX_ORDER_NR_PAGES.
* Align up here since many operations in VM subsystem
* presume that there are no holes in the memory map inside
* a pageblock
*/
prev_end = ALIGN(end, MAX_ORDER_NR_PAGES);
prev_end = ALIGN(end, pageblock_nr_pages);
}
#ifdef CONFIG_SPARSEMEM
if (!IS_ALIGNED(prev_end, PAGES_PER_SECTION))
if (!IS_ALIGNED(prev_end, PAGES_PER_SECTION)) {
prev_end = ALIGN(end, pageblock_nr_pages);
free_memmap(prev_end,
ALIGN(prev_end, PAGES_PER_SECTION));
}
#endif
}

4
arch/arm/mm/ioremap.c
View File

@ -27,6 +27,7 @@
#include <linux/vmalloc.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include <linux/memblock.h>
#include <asm/cp15.h>
#include <asm/cputype.h>
@ -284,7 +285,8 @@ static void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
* Don't allow RAM to be mapped with mismatched attributes - this
* causes problems with ARMv6+
*/
if (WARN_ON(pfn_valid(pfn) && mtype != MT_MEMORY_RW))
if (WARN_ON(memblock_is_map_memory(PFN_PHYS(pfn)) &&
mtype != MT_MEMORY_RW))
return NULL;
area = get_vm_area_caller(size, VM_IOREMAP, caller);

3
arch/arm64/Kconfig
View File

@ -1329,7 +1329,8 @@ config KUSER_HELPERS
config COMPAT_VDSO
bool "Enable vDSO for 32-bit applications"
depends on !CPU_BIG_ENDIAN && "$(CROSS_COMPILE_COMPAT)" != ""
depends on !CPU_BIG_ENDIAN
depends on (CC_IS_CLANG && LD_IS_LLD) || "$(CROSS_COMPILE_COMPAT)" != ""
select GENERIC_COMPAT_VDSO
default y
help

6
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
View File

@ -343,19 +343,19 @@ r_i2c1: i2c@7081800 {
};
thermal-zones {
cpu-thermal-zone {
cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
};
ddr-thermal-zone {
ddr-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 2>;
};
gpu-thermal-zone {
gpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;

2
arch/arm64/boot/dts/allwinner/sun50i-a64-cpu-opp.dtsi
View File

@ -4,7 +4,7 @@
*/
/ {
cpu0_opp_table: opp_table0 {
cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;

2
arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi
View File

@ -2,7 +2,7 @@
// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
/ {
cpu_opp_table: cpu-opp-table {
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;

2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
View File

@ -69,7 +69,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

2
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
View File

@ -204,7 +204,7 @@ cpu-hot-limit {
};
};
gpu_thermal {
gpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;

2
arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
View File

@ -3,7 +3,7 @@
// Copyright (C) 2020 Clément Péron <peron.clem@gmail.com>
/ {
cpu_opp_table: cpu-opp-table {
cpu_opp_table: opp-table-cpu {
compatible = "allwinner,sun50i-h6-operating-points";
nvmem-cells = <&cpu_speed_grade>;
opp-shared;

2
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@ -52,7 +52,7 @@ efuse: efuse {
secure-monitor = <&sm>;
};
gpu_opp_table: gpu-opp-table {
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-124999998 {

6
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
View File

@ -15,7 +15,7 @@ aliases {
ethernet0 = &ethmac;
};
dioo2133: audio-amplifier-0 {
dio2133: audio-amplifier-0 {
compatible = "simple-audio-amplifier";
enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
VCC-supply = <&vcc_5v>;
@ -215,7 +215,7 @@ sound {
audio-widgets = "Line", "Lineout";
audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
<&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
<&dioo2133>;
<&dio2133>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
@ -543,7 +543,7 @@ &spifc {
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
mx25u64: spi-flash@0 {
mx25u64: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mxicy,mx25u6435f", "jedec,spi-nor";

3
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
View File

@ -6,6 +6,7 @@
*/
#include "meson-gxbb.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
@ -64,6 +65,7 @@ vddio_ao18: regulator-vddio_ao18 {
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
@ -161,6 +163,7 @@ &hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&vddio_ao18>;
};
&hdmi_tx_tmds_port {

14
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
View File

@ -261,11 +261,6 @@ temperature-sensor@4c {
vcc-supply = <&sb_3v3>;
};
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
};
eeprom@56 {
compatible = "atmel,24c512";
reg = <0x56>;
@ -307,6 +302,15 @@ mux: mux-controller {
};
&i2c1 {
status = "okay";
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
};
};
&enetc_port1 {
phy-handle = <&qds_phy1>;
phy-connection-type = "rgmii-id";

16
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View File

@ -673,56 +673,56 @@ ptp-timer@8b95000 {
};
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core2_watchdog: wdt@c020000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc020000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core3_watchdog: wdt@c030000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc030000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core2_watchdog: wdt@c120000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc120000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core3_watchdog: wdt@c130000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc130000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk";

16
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View File

@ -351,56 +351,56 @@ serial3: serial@21d0600 {
};
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster3_core0_watchdog: wdt@c200000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc200000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster3_core1_watchdog: wdt@c210000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc210000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster4_core0_watchdog: wdt@c300000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc300000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";
};
cluster4_core1_watchdog: wdt@c310000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc310000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk";

7
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View File

@ -866,11 +866,12 @@ fec1: ethernet@30be0000 {
assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>,
<&clk IMX8MM_CLK_ENET_TIMER>,
<&clk IMX8MM_CLK_ENET_REF>,
<&clk IMX8MM_CLK_ENET_TIMER>;
<&clk IMX8MM_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
<&clk IMX8MM_SYS_PLL2_100M>,
<&clk IMX8MM_SYS_PLL2_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
<&clk IMX8MM_SYS_PLL2_125M>,
<&clk IMX8MM_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";

7
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@ -753,11 +753,12 @@ fec1: ethernet@30be0000 {
assigned-clocks = <&clk IMX8MN_CLK_ENET_AXI>,
<&clk IMX8MN_CLK_ENET_TIMER>,
<&clk IMX8MN_CLK_ENET_REF>,
<&clk IMX8MN_CLK_ENET_TIMER>;
<&clk IMX8MN_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
<&clk IMX8MN_SYS_PLL2_100M>,
<&clk IMX8MN_SYS_PLL2_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
<&clk IMX8MN_SYS_PLL2_125M>,
<&clk IMX8MN_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";

2
arch/arm64/boot/dts/freescale/imx8mp-evk.dts
View File

@ -62,6 +62,8 @@ ethphy1: ethernet-phy@1 {
reg = <1>;
eee-broken-1000t;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
};
};
};

7
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -725,11 +725,12 @@ fec: ethernet@30be0000 {
assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
<&clk IMX8MP_CLK_ENET_TIMER>,
<&clk IMX8MP_CLK_ENET_REF>,
<&clk IMX8MP_CLK_ENET_TIMER>;
<&clk IMX8MP_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
<&clk IMX8MP_SYS_PLL2_125M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
status = "disabled";

2
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@ -524,7 +524,7 @@ lcdif: lcd-controller@30320000 {
assigned-clock-rates = <0>, <0>, <0>, <594000000>;
status = "disabled";
port@0 {
port {
lcdif_mipi_dsi: endpoint {
remote-endpoint = <&mipi_dsi_lcdif_in>;
};

4
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
View File

@ -1086,7 +1086,7 @@ dwmmc2: dwmmc2@ff3ff000 {
};
watchdog0: watchdog@e8a06000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a06000 0x0 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>,
@ -1095,7 +1095,7 @@ watchdog0: watchdog@e8a06000 {
};
watchdog1: watchdog@e8a07000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a07000 0x0 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>,

2
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
View File

@ -840,7 +840,7 @@ dwmmc_2: dwmmc2@f723f000 {
};
watchdog0: watchdog@f8005000 {
compatible = "arm,sp805-wdt", "arm,primecell";
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xf8005000 0x0 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ao_ctrl HI6220_WDT0_PCLK>,

15
arch/arm64/boot/dts/marvell/cn9130.dtsi
View File

@ -11,6 +11,13 @@ / {
model = "Marvell Armada CN9130 SoC";
compatible = "marvell,cn9130", "marvell,armada-ap807-quad",
"marvell,armada-ap807";
aliases {
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
spi1 = &cp0_spi0;
spi2 = &cp0_spi1;
};
};
/*
@ -35,3 +42,11 @@ / {
#undef CP11X_PCIE0_BASE
#undef CP11X_PCIE1_BASE
#undef CP11X_PCIE2_BASE
&cp0_gpio1 {
status = "okay";
};
&cp0_gpio2 {
status = "okay";
};

2
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@ -985,7 +985,7 @@ sdmmc3_1v8: sdmmc3-1v8 {
ccplex@e000000 {
compatible = "nvidia,tegra186-ccplex-cluster";
reg = <0x0 0x0e000000 0x0 0x3fffff>;
reg = <0x0 0x0e000000 0x0 0x400000>;
nvidia,bpmp = <&bpmp>;
};

9
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@ -782,13 +782,12 @@ hda@3510000 {
reg = <0x3510000 0x10000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_HDA>,
<&bpmp TEGRA194_CLK_HDA2CODEC_2X>,
<&bpmp TEGRA194_CLK_HDA2HDMICODEC>;
clock-names = "hda", "hda2codec_2x", "hda2hdmi";
<&bpmp TEGRA194_CLK_HDA2HDMICODEC>,
<&bpmp TEGRA194_CLK_HDA2CODEC_2X>;
clock-names = "hda", "hda2hdmi", "hda2codec_2x";
resets = <&bpmp TEGRA194_RESET_HDA>,
<&bpmp TEGRA194_RESET_HDA2CODEC_2X>,
<&bpmp TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "hda", "hda2codec_2x", "hda2hdmi";
reset-names = "hda", "hda2hdmi";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_HDAR &emc>,
<&mc TEGRA194_MEMORY_CLIENT_HDAW &emc>;

4
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -200,7 +200,7 @@ cryptobam: dma@704000 {
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <1>;
qcom,controlled-remotely = <1>;
qcom,controlled-remotely;
qcom,config-pipe-trust-reg = <0>;
};
@ -221,7 +221,7 @@ tlmm: pinctrl@1000000 {
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&tlmm 0 80>;
gpio-ranges = <&tlmm 0 0 80>;
interrupt-controller;
#interrupt-cells = <2>;

4
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -18,8 +18,8 @@ / {
#size-cells = <2>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
sdhc2 = &sdhc_2; /* SDC2 SD card slot */
mmc0 = &sdhc_1; /* SDC1 eMMC slot */
mmc1 = &sdhc_2; /* SDC2 SD card slot */
};
chosen { };

3
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -645,9 +645,6 @@ gpu@b00000 {
nvmem-cells = <&gpu_speed_bin>;
nvmem-cell-names = "speed_bin";
qcom,gpu-quirk-two-pass-use-wfi;
qcom,gpu-quirk-fault-detect-mask;
operating-points-v2 = <&gpu_opp_table>;
gpu_opp_table: opp-table {

20
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -300,38 +300,42 @@ idle-states {
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
idle-state-name = "little-retention";
/* CPU Retention (C2D), L2 Active */
arm,psci-suspend-param = <0x00000002>;
entry-latency-us = <81>;
exit-latency-us = <86>;
min-residency-us = <200>;
min-residency-us = <504>;
};
LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
compatible = "arm,idle-state";
idle-state-name = "little-power-collapse";
/* CPU + L2 Power Collapse (C3, D4) */
arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <273>;
exit-latency-us = <612>;
min-residency-us = <1000>;
entry-latency-us = <814>;
exit-latency-us = <4562>;
min-residency-us = <9183>;
local-timer-stop;
};
BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
compatible = "arm,idle-state";
idle-state-name = "big-retention";
/* CPU Retention (C2D), L2 Active */
arm,psci-suspend-param = <0x00000002>;
entry-latency-us = <79>;
exit-latency-us = <82>;
min-residency-us = <200>;
min-residency-us = <1302>;
};
BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
compatible = "arm,idle-state";
idle-state-name = "big-power-collapse";
/* CPU + L2 Power Collapse (C3, D4) */
arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <336>;
exit-latency-us = <525>;
min-residency-us = <1000>;
entry-latency-us = <724>;
exit-latency-us = <2027>;
min-residency-us = <9419>;
local-timer-stop;
};
};

27
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
View File

@ -365,6 +365,10 @@ dai@0 {
dai@1 {
reg = <1>;
};
dai@2 {
reg = <2>;
};
};
&sound {
@ -377,6 +381,7 @@ &sound {
"SpkrLeft IN", "SPK1 OUT",
"SpkrRight IN", "SPK2 OUT",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL3", "MultiMedia3 Playback",
"MultiMedia2 Capture", "MM_UL2";
mm1-dai-link {
@ -393,6 +398,13 @@ cpu {
};
};
mm3-dai-link {
link-name = "MultiMedia3";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
slim-dai-link {
link-name = "SLIM Playback";
cpu {
@ -422,6 +434,21 @@ codec {
sound-dai = <&wcd9340 1>;
};
};
slim-wcd-dai-link {
link-name = "SLIM WCD Playback";
cpu {
sound-dai = <&q6afedai SLIMBUS_1_RX>;
};
platform {
sound-dai = <&q6routing>;
};
codec {
sound-dai = <&wcd9340 2>;
};
};
};
&tlmm {

1
arch/arm64/boot/dts/renesas/cat875.dtsi
View File

@ -18,6 +18,7 @@ &avb {
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
status = "okay";
phy0: ethernet-phy@0 {

2
arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts
View File

@ -91,7 +91,7 @@ vcc_sd: vcc-sd {
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vim-supply = <&vcc_io>;
vin-supply = <&vcc_io>;
};
vdd_core: vdd-core {

1
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
View File

@ -699,7 +699,6 @@ &sdmmc {
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
};

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