This is the 5.10.224 stable release

-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmbCv24ACgkQONu9yGCS
 aT7lNRAAzP2lSCUHROaMTldoQdahqoWqwFSiMI9p32HYLTerpg1GHVsi1IUvD+pv
 zhmUG9w+ACbSbZ9337G61FeEDCIBzgqaIXLCtbK2Be9nWMa9I1ZtMSFUKoSmVJBw
 YbrI/UOscJmAf44G6DeMp+N+/S2o7INK463u51SYjufo/zhFF8KsYElm23p06kgn
 lTkkUAoo9mSVvEr64zbjwLrWyBWTlcvYH/xrkWeJWXl+hBv0K5Ig9IBm0sc0DSQR
 fErADzDLFkmD9pduZbMwbzUUzC8ST41KKjTgClaHQhSMeoLoWT8CJM5Swwds4XVE
 JkoClkqnj3+stYFpLFm9UUgZ12wu/9slzgRCN6fTraSNT8gE9F9BRJXFGL+3S5OO
 oHKZYEEPTZDsD3PihgufJ4Ft27+KpMUzAgQUmVH/y47wrVJ2pf4fCK8LKT0MbjBi
 pjZaDRCxwo1aORL3+jYJBVRecrNqQ0DhacYOKznhb2KKeaHojIwLaE6k/W/0Q8U5
 1uMYv+NJ3LWDNzGcNUTCfNtuDELOpkp24Xc8RN0MK2iMMMyfjMpgKssjSBZtz0QW
 NH0UVpfiWKECKH+m03NeFnYdMuK8/VyM8vatkcemz0FfgJP2UazeiVwSujfS2r2S
 0TtsCMPP3kgKa9mAnni7lQs4wkG+OTNDNZqbuDqFZ1rHUS2Usrg=
 =8i2e
 -----END PGP SIGNATURE-----

Merge 5.10.224 into android12-5.10-lts

Changes in 5.10.224
	EDAC/skx_common: Add new ADXL components for 2-level memory
	EDAC, i10nm: make skx_common.o a separate module
	platform/chrome: cros_ec_debugfs: fix wrong EC message version
	hfsplus: fix to avoid false alarm of circular locking
	x86/of: Return consistent error type from x86_of_pci_irq_enable()
	x86/pci/intel_mid_pci: Fix PCIBIOS_* return code handling
	x86/pci/xen: Fix PCIBIOS_* return code handling
	x86/platform/iosf_mbi: Convert PCIBIOS_* return codes to errnos
	hwmon: (adt7475) Fix default duty on fan is disabled
	pwm: stm32: Always do lazy disabling
	hwmon: (max6697) Fix underflow when writing limit attributes
	hwmon: (max6697) Fix swapped temp{1,8} critical alarms
	arm64: dts: qcom: sdm845: add power-domain to UFS PHY
	soc: qcom: rpmh-rsc: Ensure irqs aren't disabled by rpmh_rsc_send_data() callers
	arm64: dts: qcom: msm8996: specify UFS core_clk frequencies
	soc: qcom: pdr: protect locator_addr with the main mutex
	soc: qcom: pdr: fix parsing of domains lists
	arm64: dts: rockchip: Increase VOP clk rate on RK3328
	ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node
	ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset
	ARM: dts: imx6qdl-kontron-samx6i: fix board reset
	ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects
	ARM: dts: imx6qdl-kontron-samx6i: fix PCIe reset polarity
	arm64: dts: mediatek: mt8183-kukui: Drop bogus output-enable property
	arm64: dts: mediatek: mt7622: fix "emmc" pinctrl mux
	arm64: dts: amlogic: gx: correct hdmi clocks
	m68k: atari: Fix TT bootup freeze / unexpected (SCU) interrupt messages
	x86/xen: Convert comma to semicolon
	m68k: cmpxchg: Fix return value for default case in __arch_xchg()
	ARM: pxa: spitz: use gpio descriptors for audio
	ARM: spitz: fix GPIO assignment for backlight
	firmware: turris-mox-rwtm: Fix checking return value of wait_for_completion_timeout()
	firmware: turris-mox-rwtm: Initialize completion before mailbox
	wifi: brcmsmac: LCN PHY code is used for BCM4313 2G-only device
	selftests/bpf: Fix prog numbers in test_sockmap
	net: esp: cleanup esp_output_tail_tcp() in case of unsupported ESPINTCP
	net/smc: Allow SMC-D 1MB DMB allocations
	net/smc: set rmb's SG_MAX_SINGLE_ALLOC limitation only when CONFIG_ARCH_NO_SG_CHAIN is defined
	selftests/bpf: Check length of recv in test_sockmap
	lib: objagg: Fix general protection fault
	mlxsw: spectrum_acl_erp: Fix object nesting warning
	mlxsw: spectrum_acl_bloom_filter: Make mlxsw_sp_acl_bf_key_encode() more flexible
	mlxsw: spectrum_acl: Fix ACL scale regression and firmware errors
	ath11k: dp: stop rx pktlog before suspend
	wifi: ath11k: fix wrong handling of CCMP256 and GCMP ciphers
	wifi: cfg80211: fix typo in cfg80211_calculate_bitrate_he()
	wifi: cfg80211: handle 2x996 RU allocation in cfg80211_calculate_bitrate_he()
	net: fec: Refactor: #define magic constants
	net: fec: Fix FEC_ECR_EN1588 being cleared on link-down
	ipvs: Avoid unnecessary calls to skb_is_gso_sctp
	netfilter: nf_tables: rise cap on SELinux secmark context
	perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation
	perf: Fix perf_aux_size() for greater-than 32-bit size
	perf: Prevent passing zero nr_pages to rb_alloc_aux()
	qed: Improve the stack space of filter_config()
	wifi: virt_wifi: avoid reporting connection success with wrong SSID
	gss_krb5: Fix the error handling path for crypto_sync_skcipher_setkey
	wifi: virt_wifi: don't use strlen() in const context
	selftests/bpf: Close fd in error path in drop_on_reuseport
	bpf: annotate BTF show functions with __printf
	bna: adjust 'name' buf size of bna_tcb and bna_ccb structures
	bpf: Eliminate remaining "make W=1" warnings in kernel/bpf/btf.o
	selftests: forwarding: devlink_lib: Wait for udev events after reloading
	xdp: fix invalid wait context of page_pool_destroy()
	drm/panel: boe-tv101wum-nl6: If prepare fails, disable GPIO before regulators
	drm/panel: boe-tv101wum-nl6: Check for errors on the NOP in prepare()
	media: dvb-usb: Fix unexpected infinite loop in dvb_usb_read_remote_control()
	media: imon: Fix race getting ictx->lock
	saa7134: Unchecked i2c_transfer function result fixed
	media: uvcvideo: Allow entity-defined get_info and get_cur
	media: uvcvideo: Override default flags
	media: renesas: vsp1: Fix _irqsave and _irq mix
	media: renesas: vsp1: Store RPF partition configuration per RPF instance
	leds: trigger: Unregister sysfs attributes before calling deactivate()
	perf report: Fix condition in sort__sym_cmp()
	drm/etnaviv: fix DMA direction handling for cached RW buffers
	drm/qxl: Add check for drm_cvt_mode
	Revert "leds: led-core: Fix refcount leak in of_led_get()"
	ext4: fix infinite loop when replaying fast_commit
	media: venus: flush all buffers in output plane streamoff
	mfd: omap-usb-tll: Use struct_size to allocate tll
	xprtrdma: Rename frwr_release_mr()
	xprtrdma: Fix rpcrdma_reqs_reset()
	SUNRPC: avoid soft lockup when transmitting UDP to reachable server.
	ext4: avoid writing unitialized memory to disk in EA inodes
	sparc64: Fix incorrect function signature and add prototype for prom_cif_init
	SUNRPC: Fixup gss_status tracepoint error output
	PCI: Fix resource double counting on remove & rescan
	coresight: Fix ref leak when of_coresight_parse_endpoint() fails
	Input: qt1050 - handle CHIP_ID reading error
	RDMA/mlx4: Fix truncated output warning in mad.c
	RDMA/mlx4: Fix truncated output warning in alias_GUID.c
	RDMA/rxe: Don't set BTH_ACK_MASK for UC or UD QPs
	ASoC: max98088: Check for clk_prepare_enable() error
	mtd: make mtd_test.c a separate module
	RDMA/device: Return error earlier if port in not valid
	Input: elan_i2c - do not leave interrupt disabled on suspend failure
	MIPS: Octeron: remove source file executable bit
	powerpc/xmon: Fix disassembly CPU feature checks
	macintosh/therm_windtunnel: fix module unload.
	RDMA/hns: Fix missing pagesize and alignment check in FRMR
	bnxt_re: Fix imm_data endianness
	netfilter: ctnetlink: use helper function to calculate expect ID
	net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports
	net: dsa: b53: Limit chip-wide jumbo frame config to CPU ports
	pinctrl: rockchip: update rk3308 iomux routes
	pinctrl: core: fix possible memory leak when pinctrl_enable() fails
	pinctrl: single: fix possible memory leak when pinctrl_enable() fails
	pinctrl: ti: ti-iodelay: Drop if block with always false condition
	pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails
	pinctrl: freescale: mxs: Fix refcount of child
	fs/proc/task_mmu: indicate PM_FILE for PMD-mapped file THP
	fs/nilfs2: remove some unused macros to tame gcc
	nilfs2: avoid undefined behavior in nilfs_cnt32_ge macro
	rtc: interface: Add RTC offset to alarm after fix-up
	dt-bindings: thermal: correct thermal zone node name limit
	tick/broadcast: Make takeover of broadcast hrtimer reliable
	net: netconsole: Disable target before netpoll cleanup
	af_packet: Handle outgoing VLAN packets without hardware offloading
	ipv6: take care of scope when choosing the src addr
	sched/fair: set_load_weight() must also call reweight_task() for SCHED_IDLE tasks
	char: tpm: Fix possible memory leak in tpm_bios_measurements_open()
	media: venus: fix use after free in vdec_close
	hfs: fix to initialize fields of hfs_inode_info after hfs_alloc_inode()
	ext2: Verify bitmap and itable block numbers before using them
	drm/gma500: fix null pointer dereference in cdv_intel_lvds_get_modes
	drm/gma500: fix null pointer dereference in psb_intel_lvds_get_modes
	scsi: qla2xxx: Fix optrom version displayed in FDMI
	drm/amd/display: Check for NULL pointer
	sched/fair: Use all little CPUs for CPU-bound workloads
	apparmor: use kvfree_sensitive to free data->data
	task_work: s/task_work_cancel()/task_work_cancel_func()/
	task_work: Introduce task_work_cancel() again
	udf: Avoid using corrupted block bitmap buffer
	m68k: amiga: Turn off Warp1260 interrupts during boot
	ext4: check dot and dotdot of dx_root before making dir indexed
	ext4: make sure the first directory block is not a hole
	wifi: mwifiex: Fix interface type change
	leds: ss4200: Convert PCIBIOS_* return codes to errnos
	jbd2: make jbd2_journal_get_max_txn_bufs() internal
	KVM: VMX: Split out the non-virtualization part of vmx_interrupt_blocked()
	tools/memory-model: Fix bug in lock.cat
	hwrng: amd - Convert PCIBIOS_* return codes to errnos
	PCI: hv: Return zero, not garbage, when reading PCI_INTERRUPT_PIN
	PCI: rockchip: Use GPIOD_OUT_LOW flag while requesting ep_gpio
	binder: fix hang of unregistered readers
	dev/parport: fix the array out-of-bounds risk
	scsi: qla2xxx: Return ENOBUFS if sg_cnt is more than one for ELS cmds
	f2fs: fix to don't dirty inode for readonly filesystem
	clk: davinci: da8xx-cfgchip: Initialize clk_init_data before use
	ubi: eba: properly rollback inside self_check_eba
	decompress_bunzip2: fix rare decompression failure
	kbuild: Fix '-S -c' in x86 stack protector scripts
	kobject_uevent: Fix OOB access within zap_modalias_env()
	devres: Fix devm_krealloc() wasting memory
	rtc: cmos: Fix return value of nvmem callbacks
	scsi: qla2xxx: During vport delete send async logout explicitly
	scsi: qla2xxx: Fix for possible memory corruption
	scsi: qla2xxx: Fix flash read failure
	scsi: qla2xxx: Complete command early within lock
	scsi: qla2xxx: validate nvme_local_port correctly
	perf/x86/intel/pt: Fix topa_entry base length
	perf/x86/intel/pt: Fix a topa_entry base address calculation
	rtc: isl1208: Fix return value of nvmem callbacks
	watchdog/perf: properly initialize the turbo mode timestamp and rearm counter
	platform: mips: cpu_hwmon: Disable driver on unsupported hardware
	RDMA/iwcm: Fix a use-after-free related to destroying CM IDs
	selftests/sigaltstack: Fix ppc64 GCC build
	rbd: don't assume rbd_is_lock_owner() for exclusive mappings
	MIPS: ip30: ip30-console: Add missing include
	MIPS: Loongson64: env: Hook up Loongsson-2K
	drm/panfrost: Mark simple_ondemand governor as softdep
	rbd: rename RBD_LOCK_STATE_RELEASING and releasing_wait
	rbd: don't assume RBD_LOCK_STATE_LOCKED for exclusive mappings
	Bluetooth: btusb: Add RTL8852BE device 0489:e125 to device tables
	Bluetooth: btusb: Add Realtek RTL8852BE support ID 0x13d3:0x3591
	nilfs2: handle inconsistent state in nilfs_btnode_create_block()
	io_uring/io-wq: limit retrying worker initialisation
	kernel: rerun task_work while freezing in get_signal()
	kdb: address -Wformat-security warnings
	kdb: Use the passed prompt in kdb_position_cursor()
	jfs: Fix array-index-out-of-bounds in diFree
	um: time-travel: fix time-travel-start option
	f2fs: fix start segno of large section
	libbpf: Fix no-args func prototype BTF dumping syntax
	dma: fix call order in dmam_free_coherent
	MIPS: SMP-CPS: Fix address for GCR_ACCESS register for CM3 and later
	ipv4: Fix incorrect source address in Record Route option
	net: bonding: correctly annotate RCU in bond_should_notify_peers()
	netfilter: nft_set_pipapo_avx2: disable softinterrupts
	tipc: Return non-zero value from tipc_udp_addr2str() on error
	net: stmmac: Correct byte order of perfect_match
	net: nexthop: Initialize all fields in dumped nexthops
	bpf: Fix a segment issue when downgrading gso_size
	mISDN: Fix a use after free in hfcmulti_tx()
	apparmor: Fix null pointer deref when receiving skb during sock creation
	powerpc: fix a file leak in kvm_vcpu_ioctl_enable_cap()
	lirc: rc_dev_get_from_fd(): fix file leak
	ASoC: Intel: use soc_intel_is_byt_cr() only when IOSF_MBI is reachable
	ceph: fix incorrect kmalloc size of pagevec mempool
	nvme: split command copy into a helper
	nvme-pci: add missing condition check for existence of mapped data
	fs: don't allow non-init s_user_ns for filesystems without FS_USERNS_MOUNT
	powerpc/configs: Update defconfig with now user-visible CONFIG_FSL_IFC
	fuse: name fs_context consistently
	fuse: verify {g,u}id mount options correctly
	sysctl: always initialize i_uid/i_gid
	ext4: factor out a common helper to query extent map
	ext4: check the extent status again before inserting delalloc block
	soc: xilinx: move PM_INIT_FINALIZE to zynqmp_pm_domains driver
	drivers: soc: xilinx: check return status of get_api_version()
	driver core: Cast to (void *) with __force for __percpu pointer
	devres: Fix memory leakage caused by driver API devm_free_percpu()
	genirq: Allow the PM device to originate from irq domain
	irqchip/imx-irqsteer: Constify irq_chip struct
	irqchip/imx-irqsteer: Add runtime PM support
	irqchip/imx-irqsteer: Handle runtime power management correctly
	remoteproc: imx_rproc: ignore mapping vdev regions
	remoteproc: imx_rproc: Fix ignoring mapping vdev regions
	remoteproc: imx_rproc: Skip over memory region when node value is NULL
	drm/nouveau: prime: fix refcount underflow
	drm/vmwgfx: Fix overlay when using Screen Targets
	sched: act_ct: take care of padding in struct zones_ht_key
	net/iucv: fix use after free in iucv_sock_close()
	net/mlx5e: Add a check for the return value from mlx5_port_set_eth_ptys
	ipv6: fix ndisc_is_useropt() handling for PIO
	riscv/mm: Add handling for VM_FAULT_SIGSEGV in mm_fault_error()
	platform/chrome: cros_ec_proto: Lock device when updating MKBP version
	HID: wacom: Modify pen IDs
	protect the fetch of ->fd[fd] in do_dup2() from mispredictions
	ALSA: usb-audio: Correct surround channels in UAC1 channel map
	ALSA: hda/realtek: Add quirk for Acer Aspire E5-574G
	net: usb: sr9700: fix uninitialized variable use in sr_mdio_read
	r8169: don't increment tx_dropped in case of NETDEV_TX_BUSY
	mptcp: fix duplicate data handling
	netfilter: ipset: Add list flush to cancel_gc
	genirq: Allow irq_chip registration functions to take a const irq_chip
	irqchip/mbigen: Fix mbigen node address layout
	x86/mm: Fix pti_clone_pgtable() alignment assumption
	x86/mm: Fix pti_clone_entry_text() for i386
	sctp: move hlist_node and hashent out of sctp_ep_common
	sctp: Fix null-ptr-deref in reuseport_add_sock().
	net: usb: qmi_wwan: fix memory leak for not ip packets
	net: linkwatch: use system_unbound_wq
	Bluetooth: l2cap: always unlock channel in l2cap_conless_channel()
	net: dsa: bcm_sf2: Fix a possible memory leak in bcm_sf2_mdio_register()
	l2tp: fix lockdep splat
	net: fec: Stop PPS on driver remove
	rcutorture: Fix rcu_torture_fwd_cb_cr() data race
	md: do not delete safemode_timer in mddev_suspend
	md/raid5: avoid BUG_ON() while continue reshape after reassembling
	clocksource/drivers/sh_cmt: Address race condition for clock events
	ACPI: battery: create alarm sysfs attribute atomically
	ACPI: SBS: manage alarm sysfs attribute through psy core
	selftests/bpf: Fix send_signal test with nested CONFIG_PARAVIRT
	PCI: Add Edimax Vendor ID to pci_ids.h
	udf: prevent integer overflow in udf_bitmap_free_blocks()
	wifi: nl80211: don't give key data to userspace
	btrfs: fix bitmap leak when loading free space cache on duplicate entry
	drm/amdgpu: Fix the null pointer dereference to ras_manager
	drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules
	media: uvcvideo: Ignore empty TS packets
	media: uvcvideo: Fix the bandwdith quirk on USB 3.x
	jbd2: avoid memleak in jbd2_journal_write_metadata_buffer
	s390/sclp: Prevent release of buffer in I/O
	SUNRPC: Fix a race to wake a sync task
	sched/cputime: Fix mul_u64_u64_div_u64() precision for cputime
	ext4: fix wrong unit use in ext4_mb_find_by_goal
	arm64: cpufeature: Force HWCAP to be based on the sysreg visible to user-space
	arm64: Add Neoverse-V2 part
	arm64: cputype: Add Cortex-X4 definitions
	arm64: cputype: Add Neoverse-V3 definitions
	arm64: errata: Add workaround for Arm errata 3194386 and 3312417
	arm64: cputype: Add Cortex-X3 definitions
	arm64: cputype: Add Cortex-A720 definitions
	arm64: cputype: Add Cortex-X925 definitions
	arm64: errata: Unify speculative SSBS errata logic
	arm64: errata: Expand speculative SSBS workaround
	arm64: cputype: Add Cortex-X1C definitions
	arm64: cputype: Add Cortex-A725 definitions
	arm64: errata: Expand speculative SSBS workaround (again)
	i2c: smbus: Improve handling of stuck alerts
	ASoC: codecs: wsa881x: Correct Soundwire ports mask
	i2c: smbus: Send alert notifications to all devices if source not found
	bpf: kprobe: remove unused declaring of bpf_kprobe_override
	kprobes: Fix to check symbol prefixes correctly
	spi: spi-fsl-lpspi: Fix scldiv calculation
	ALSA: usb-audio: Re-add ScratchAmp quirk entries
	drm/client: fix null pointer dereference in drm_client_modeset_probe
	ALSA: line6: Fix racy access to midibuf
	ALSA: hda: Add HP MP9 G4 Retail System AMS to force connect list
	ALSA: hda/hdmi: Yet more pin fix for HP EliteDesk 800 G4
	usb: vhci-hcd: Do not drop references before new references are gained
	USB: serial: debug: do not echo input by default
	usb: gadget: core: Check for unset descriptor
	usb: gadget: u_serial: Set start_delayed during suspend
	scsi: ufs: core: Fix hba->last_dme_cmd_tstamp timestamp updating logic
	tick/broadcast: Move per CPU pointer access into the atomic section
	ntp: Clamp maxerror and esterror to operating range
	driver core: Fix uevent_show() vs driver detach race
	ntp: Safeguard against time_constant overflow
	scsi: mpt3sas: Remove scsi_dma_map() error messages
	scsi: mpt3sas: Avoid IOMMU page faults on REPORT ZONES
	irqchip/meson-gpio: support more than 8 channels gpio irq
	irqchip/meson-gpio: Convert meson_gpio_irq_controller::lock to 'raw_spinlock_t'
	serial: core: check uartclk for zero to avoid divide by zero
	irqchip/xilinx: Fix shift out of bounds
	genirq/irqdesc: Honor caller provided affinity in alloc_desc()
	power: supply: axp288_charger: Fix constant_charge_voltage writes
	power: supply: axp288_charger: Round constant_charge_voltage writes down
	tracing: Fix overflow in get_free_elt()
	padata: Fix possible divide-by-0 panic in padata_mt_helper()
	x86/mtrr: Check if fixed MTRRs exist before saving them
	drm/bridge: analogix_dp: properly handle zero sized AUX transactions
	drm/mgag200: Set DDC timeout in milliseconds
	mptcp: sched: check both directions for backup
	mptcp: distinguish rcv vs sent backup flag in requests
	mptcp: fix NL PM announced address accounting
	mptcp: mib: count MPJ with backup flag
	mptcp: export local_address
	mptcp: pm: fix backup support in signal endpoints
	samples: Add fs error monitoring example
	samples: Make fs-monitor depend on libc and headers
	Add gitignore file for samples/fanotify/ subdirectory
	Fix gcc 4.9 build issue in 5.10.y
	PCI/DPC: Fix use-after-free on concurrent DPC and hot-removal
	netfilter: nf_tables: set element extended ACK reporting support
	netfilter: nf_tables: use timestamp to check for set element timeout
	netfilter: nf_tables: allow clone callbacks to sleep
	netfilter: nf_tables: prefer nft_chain_validate
	drm/i915/gem: Fix Virtual Memory mapping boundaries calculation
	powerpc: Avoid nmi_enter/nmi_exit in real mode interrupt.
	arm64: cpufeature: Fix the visibility of compat hwcaps
	media: uvcvideo: Use entity get_cur in uvc_ctrl_set
	exec: Fix ToCToU between perm check and set-uid/gid usage
	nvme/pci: Add APST quirk for Lenovo N60z laptop
	vdpa: Make use of PFN_PHYS/PFN_UP/PFN_DOWN helper macro
	vhost-vdpa: switch to use vmf_insert_pfn() in the fault handler
	wifi: cfg80211: restrict NL80211_ATTR_TXQ_QUANTUM values
	ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode
	media: Revert "media: dvb-usb: Fix unexpected infinite loop in dvb_usb_read_remote_control()"
	Linux 5.10.224

Change-Id: I7cd19d506c4c86df918a280598946060a494a161
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman 2024-08-28 09:27:06 +00:00
commit b84ad15be5
349 changed files with 2883 additions and 1392 deletions

View File

@ -92,7 +92,7 @@ operation if the source belongs to the supported system register space.
The infrastructure emulates only the following system register space:: The infrastructure emulates only the following system register space::
Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7 Op0=3, Op1=0, CRn=0, CRm=0,2,3,4,5,6,7
(See Table C5-6 'System instruction encodings for non-Debug System (See Table C5-6 'System instruction encodings for non-Debug System
register accesses' in ARMv8 ARM DDI 0487A.h, for the list of register accesses' in ARMv8 ARM DDI 0487A.h, for the list of
@ -291,6 +291,42 @@ infrastructure:
| RPRES | [7-4] | y | | RPRES | [7-4] | y |
+------------------------------+---------+---------+ +------------------------------+---------+---------+
10) MVFR0_EL1 - AArch32 Media and VFP Feature Register 0
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
| FPDP | [11-8] | y |
+------------------------------+---------+---------+
11) MVFR1_EL1 - AArch32 Media and VFP Feature Register 1
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
| SIMDFMAC | [31-28] | y |
+------------------------------+---------+---------+
| SIMDSP | [19-16] | y |
+------------------------------+---------+---------+
| SIMDInt | [15-12] | y |
+------------------------------+---------+---------+
| SIMDLS | [11-8] | y |
+------------------------------+---------+---------+
12) ID_ISAR5_EL1 - AArch32 Instruction Set Attribute Register 5
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
| CRC32 | [19-16] | y |
+------------------------------+---------+---------+
| SHA2 | [15-12] | y |
+------------------------------+---------+---------+
| SHA1 | [11-8] | y |
+------------------------------+---------+---------+
| AES | [7-4] | y |
+------------------------------+---------+---------+
Appendix I: Example Appendix I: Example
------------------- -------------------

View File

@ -94,6 +94,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 | | ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 | | ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 |
@ -102,6 +104,30 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 | | ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 | | ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #1349291 | N/A | | ARM | Neoverse-N1 | #1349291 | N/A |
@ -110,6 +136,16 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 | | ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-500 | #841119,826419 | N/A | | ARM | MMU-500 | #841119,826419 | N/A |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+

View File

@ -49,7 +49,10 @@ properties:
to take when the temperature crosses those thresholds. to take when the temperature crosses those thresholds.
patternProperties: patternProperties:
"^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$": # Node name is limited in size due to Linux kernel requirements - 19
# characters in total (see THERMAL_NAME_LENGTH, including terminating NUL
# byte):
"^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$":
type: object type: object
description: description:
Each thermal zone node contains information about how frequently it Each thermal zone node contains information about how frequently it

View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
VERSION = 5 VERSION = 5
PATCHLEVEL = 10 PATCHLEVEL = 10
SUBLEVEL = 223 SUBLEVEL = 224
EXTRAVERSION = EXTRAVERSION =
NAME = Dare mighty things NAME = Dare mighty things

View File

@ -5,31 +5,8 @@
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-kontron-samx6i.dtsi" #include "imx6qdl-kontron-samx6i.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ { / {
model = "Kontron SMARC sAMX6i Quad/Dual"; model = "Kontron SMARC sAMX6i Quad/Dual";
compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; compatible = "kontron,imx6q-samx6i", "fsl,imx6q";
}; };
/* Quad/Dual SoMs have 3 chip-select signals */
&ecspi4 {
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
<&gpio3 29 GPIO_ACTIVE_LOW>,
<&gpio3 25 GPIO_ACTIVE_LOW>;
};
&pinctrl_ecspi4 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
/* SPI4_IMX_CS2# - connected to internal flash */
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
/* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
>;
};

View File

@ -244,7 +244,8 @@ &ecspi4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>; pinctrl-0 = <&pinctrl_ecspi4>;
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
<&gpio3 29 GPIO_ACTIVE_LOW>; <&gpio3 29 GPIO_ACTIVE_LOW>,
<&gpio3 25 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */ /* default boot source: workaround #1 for errata ERR006282 */
@ -259,8 +260,20 @@ smarc_flash: flash@0 {
&fec { &fec {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>; pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii"; phy-connection-type = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; phy-handle = <&ethphy>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
reset-assert-us = <1000>;
};
};
}; };
&i2c_intern { &i2c_intern {
@ -448,6 +461,8 @@ MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
/* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */ /* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
>; >;
}; };
@ -500,7 +515,7 @@ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 /* RST_GBE0_PHY# */
>; >;
}; };
@ -713,7 +728,7 @@ &pcie {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>; pinctrl-0 = <&pinctrl_pcie>;
wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; reset-gpio = <&gpio3 13 GPIO_ACTIVE_LOW>;
}; };
/* LCD_BKLT_PWM */ /* LCD_BKLT_PWM */
@ -801,5 +816,6 @@ &wdog1 {
/* CPLD is feeded by watchdog (hardwired) */ /* CPLD is feeded by watchdog (hardwired) */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog1>; pinctrl-0 = <&pinctrl_wdog1>;
fsl,ext-reset-output;
status = "okay"; status = "okay";
}; };

View File

@ -43,7 +43,7 @@
#include <linux/platform_data/mmc-pxamci.h> #include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h> #include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/video-pxafb.h> #include <linux/platform_data/video-pxafb.h>
#include <mach/spitz.h> #include "spitz.h"
#include "sharpsl_pm.h" #include "sharpsl_pm.h"
#include <mach/smemc.h> #include <mach/smemc.h>
@ -516,10 +516,8 @@ static struct pxa2xx_spi_chip spitz_ads7846_chip = {
static struct gpiod_lookup_table spitz_lcdcon_gpio_table = { static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
.dev_id = "spi2.1", .dev_id = "spi2.1",
.table = { .table = {
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_CONT, GPIO_LOOKUP("sharp-scoop.1", 6, "BL_CONT", GPIO_ACTIVE_LOW),
"BL_CONT", GPIO_ACTIVE_LOW), GPIO_LOOKUP("sharp-scoop.1", 7, "BL_ON", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_ON,
"BL_ON", GPIO_ACTIVE_HIGH),
{ }, { },
}, },
}; };
@ -527,10 +525,8 @@ static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
static struct gpiod_lookup_table akita_lcdcon_gpio_table = { static struct gpiod_lookup_table akita_lcdcon_gpio_table = {
.dev_id = "spi2.1", .dev_id = "spi2.1",
.table = { .table = {
GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_CONT, GPIO_LOOKUP("i2c-max7310", 3, "BL_ON", GPIO_ACTIVE_HIGH),
"BL_CONT", GPIO_ACTIVE_LOW), GPIO_LOOKUP("i2c-max7310", 4, "BL_CONT", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_ON,
"BL_ON", GPIO_ACTIVE_HIGH),
{ }, { },
}, },
}; };
@ -954,11 +950,36 @@ static void __init spitz_i2c_init(void)
static inline void spitz_i2c_init(void) {} static inline void spitz_i2c_init(void) {}
#endif #endif
static struct gpiod_lookup_table spitz_audio_gpio_table = {
.dev_id = "spitz-audio",
.table = {
GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.1", 8, "mic", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct gpiod_lookup_table akita_audio_gpio_table = {
.dev_id = "spitz-audio",
.table = {
GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("i2c-max7310", 2, "mic", GPIO_ACTIVE_HIGH),
{ },
},
};
/****************************************************************************** /******************************************************************************
* Audio devices * Audio devices
******************************************************************************/ ******************************************************************************/
static inline void spitz_audio_init(void) static inline void spitz_audio_init(void)
{ {
if (machine_is_akita())
gpiod_add_lookup_table(&akita_audio_gpio_table);
else
gpiod_add_lookup_table(&spitz_audio_gpio_table);
platform_device_register_simple("spitz-audio", -1, NULL, 0); platform_device_register_simple("spitz-audio", -1, NULL, 0);
} }

View File

@ -11,7 +11,7 @@
#define __ASM_ARCH_SPITZ_H 1 #define __ASM_ARCH_SPITZ_H 1
#endif #endif
#include "irqs.h" /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */ #include <mach/irqs.h> /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */
#include <linux/fb.h> #include <linux/fb.h>
/* Spitz/Akita GPIOs */ /* Spitz/Akita GPIOs */

View File

@ -20,7 +20,7 @@
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/spitz.h> #include "spitz.h"
#include "pxa27x.h" #include "pxa27x.h"
#include "sharpsl_pm.h" #include "sharpsl_pm.h"

View File

@ -770,6 +770,44 @@ config ARM64_ERRATUM_2457168
If unsure, say Y. If unsure, say Y.
config ARM64_ERRATUM_3194386
bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing"
default y
help
This option adds the workaround for the following errata:
* ARM Cortex-A76 erratum 3324349
* ARM Cortex-A77 erratum 3324348
* ARM Cortex-A78 erratum 3324344
* ARM Cortex-A78C erratum 3324346
* ARM Cortex-A78C erratum 3324347
* ARM Cortex-A710 erratam 3324338
* ARM Cortex-A720 erratum 3456091
* ARM Cortex-A725 erratum 3456106
* ARM Cortex-X1 erratum 3324344
* ARM Cortex-X1C erratum 3324346
* ARM Cortex-X2 erratum 3324338
* ARM Cortex-X3 erratum 3324335
* ARM Cortex-X4 erratum 3194386
* ARM Cortex-X925 erratum 3324334
* ARM Neoverse-N1 erratum 3324349
* ARM Neoverse N2 erratum 3324339
* ARM Neoverse-V1 erratum 3324341
* ARM Neoverse V2 erratum 3324336
* ARM Neoverse-V3 erratum 3312417
On affected cores "MSR SSBS, #0" instructions may not affect
subsequent speculative instructions, which may permit unexepected
speculative store bypassing.
Work around this problem by placing a Speculation Barrier (SB) or
Instruction Synchronization Barrier (ISB) after kernel changes to
SSBS. The presence of the SSBS special-purpose register is hidden
from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such that userspace
will use the PR_SPEC_STORE_BYPASS prctl to change SSBS.
If unsure, say Y.
config CAVIUM_ERRATUM_22375 config CAVIUM_ERRATUM_22375
bool "Cavium erratum 22375, 24313" bool "Cavium erratum 22375, 24313"
default y default y

View File

@ -311,8 +311,8 @@ &hdmi_tx {
<&reset RESET_HDMI_SYSTEM_RESET>, <&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>; <&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>, clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_CLK81>, <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_GCLK_VENCI_INT0>; <&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci"; clock-names = "isfr", "iahb", "venci";
}; };

View File

@ -323,8 +323,8 @@ &hdmi_tx {
<&reset RESET_HDMI_SYSTEM_RESET>, <&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>; <&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>, clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_CLK81>, <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_GCLK_VENCI_INT0>; <&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci"; clock-names = "isfr", "iahb", "venci";
}; };

View File

@ -285,8 +285,8 @@ asm_sel {
/* eMMC is shared pin with parallel NAND */ /* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default { emmc_pins_default: emmc-pins-default {
mux { mux {
function = "emmc", "emmc_rst"; function = "emmc";
groups = "emmc"; groups = "emmc", "emmc_rst";
}; };
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",

View File

@ -249,8 +249,8 @@ &pio {
/* eMMC is shared pin with parallel NAND */ /* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default { emmc_pins_default: emmc-pins-default {
mux { mux {
function = "emmc", "emmc_rst"; function = "emmc";
groups = "emmc"; groups = "emmc", "emmc_rst";
}; };
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",

View File

@ -628,7 +628,6 @@ pins_tx {
}; };
pins_rts { pins_rts {
pinmux = <PINMUX_GPIO47__FUNC_URTS1>; pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
output-enable;
}; };
pins_cts { pins_cts {
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>; pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
@ -647,7 +646,6 @@ pins_tx {
}; };
pins_rts { pins_rts {
pinmux = <PINMUX_GPIO47__FUNC_URTS1>; pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
output-enable;
}; };
pins_cts { pins_cts {
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>; pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;

View File

@ -927,7 +927,7 @@ ufshc: ufshc@624000 {
<&gcc GCC_UFS_RX_SYMBOL_0_CLK>; <&gcc GCC_UFS_RX_SYMBOL_0_CLK>;
freq-table-hz = freq-table-hz =
<100000000 200000000>, <100000000 200000000>,
<0 0>, <100000000 200000000>,
<0 0>, <0 0>,
<0 0>, <0 0>,
<0 0>, <0 0>,

View File

@ -2125,6 +2125,8 @@ ufs_mem_phy: phy@1d87000 {
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>; <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
power-domains = <&gcc UFS_PHY_GDSC>;
resets = <&ufs_mem_hc 0>; resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy"; reset-names = "ufsphy";
status = "disabled"; status = "disabled";

View File

@ -811,8 +811,8 @@ cru: clock-controller@ff440000 {
<0>, <24000000>, <0>, <24000000>,
<24000000>, <24000000>, <24000000>, <24000000>,
<15000000>, <15000000>, <15000000>, <15000000>,
<100000000>, <100000000>, <300000000>, <100000000>,
<100000000>, <100000000>, <400000000>, <100000000>,
<50000000>, <100000000>, <50000000>, <100000000>,
<100000000>, <100000000>, <100000000>, <100000000>,
<50000000>, <50000000>, <50000000>, <50000000>,

View File

@ -73,8 +73,9 @@
#define ARM64_SPECTRE_BHB 62 #define ARM64_SPECTRE_BHB 62
#define ARM64_WORKAROUND_2457168 63 #define ARM64_WORKAROUND_2457168 63
#define ARM64_WORKAROUND_1742098 64 #define ARM64_WORKAROUND_1742098 64
#define ARM64_WORKAROUND_SPECULATIVE_SSBS 65
/* kabi: reserve 65 - 76 for future cpu capabilities */ /* kabi: reserve 66 - 76 for future cpu capabilities */
#define ARM64_NCAPS 76 #define ARM64_NCAPS 76
#endif /* __ASM_CPUCAPS_H */ #endif /* __ASM_CPUCAPS_H */

View File

@ -84,6 +84,14 @@
#define ARM_CPU_PART_CORTEX_X2 0xD48 #define ARM_CPU_PART_CORTEX_X2 0xD48
#define ARM_CPU_PART_NEOVERSE_N2 0xD49 #define ARM_CPU_PART_NEOVERSE_N2 0xD49
#define ARM_CPU_PART_CORTEX_A78C 0xD4B #define ARM_CPU_PART_CORTEX_A78C 0xD4B
#define ARM_CPU_PART_CORTEX_X1C 0xD4C
#define ARM_CPU_PART_CORTEX_X3 0xD4E
#define ARM_CPU_PART_NEOVERSE_V2 0xD4F
#define ARM_CPU_PART_CORTEX_A720 0xD81
#define ARM_CPU_PART_CORTEX_X4 0xD82
#define ARM_CPU_PART_NEOVERSE_V3 0xD84
#define ARM_CPU_PART_CORTEX_X925 0xD85
#define ARM_CPU_PART_CORTEX_A725 0xD87
#define APM_CPU_PART_POTENZA 0x000 #define APM_CPU_PART_POTENZA 0x000
@ -136,6 +144,14 @@
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
#define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
#define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C)
#define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3)
#define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2)
#define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720)
#define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
#define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)
#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)
#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)

View File

@ -366,6 +366,30 @@ static struct midr_range broken_aarch32_aes[] = {
}; };
#endif #endif
#ifdef CONFIG_ARM64_ERRATUM_3194386
static const struct midr_range erratum_spec_ssbs_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
{}
};
#endif
const struct arm64_cpu_capabilities arm64_errata[] = { const struct arm64_cpu_capabilities arm64_errata[] = {
#ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE
{ {
@ -582,6 +606,13 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
CAP_MIDR_RANGE_LIST(broken_aarch32_aes), CAP_MIDR_RANGE_LIST(broken_aarch32_aes),
.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
}, },
#endif
#ifdef CONFIG_ARM64_ERRATUM_3194386
{
.desc = "SSBS not fully self-synchronizing",
.capability = ARM64_WORKAROUND_SPECULATIVE_SSBS,
ERRATA_MIDR_RANGE_LIST(erratum_spec_ssbs_list),
},
#endif #endif
{ {
} }

View File

@ -423,6 +423,30 @@ static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
ARM64_FTR_END, ARM64_FTR_END,
}; };
static const struct arm64_ftr_bits ftr_mvfr0[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPROUND_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPSHVEC_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPSQRT_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPDIVIDE_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPTRAP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPDP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_FPSP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR0_SIMD_SHIFT, 4, 0),
ARM64_FTR_END,
};
static const struct arm64_ftr_bits ftr_mvfr1[] = {
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_SIMDFMAC_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_FPHP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_SIMDHP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_SIMDSP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_SIMDINT_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_SIMDLS_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_FPDNAN_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR1_FPFTZ_SHIFT, 4, 0),
ARM64_FTR_END,
};
static const struct arm64_ftr_bits ftr_mvfr2[] = { static const struct arm64_ftr_bits ftr_mvfr2[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR2_FPMISC_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR2_FPMISC_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR2_SIMDMISC_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MVFR2_SIMDMISC_SHIFT, 4, 0),
@ -448,10 +472,10 @@ static const struct arm64_ftr_bits ftr_id_isar0[] = {
static const struct arm64_ftr_bits ftr_id_isar5[] = { static const struct arm64_ftr_bits ftr_id_isar5[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_RDM_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_RDM_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_CRC32_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_CRC32_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SHA2_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SHA2_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SHA1_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SHA1_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_AES_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_AES_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SEVL_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SEVL_SHIFT, 4, 0),
ARM64_FTR_END, ARM64_FTR_END,
}; };
@ -558,7 +582,7 @@ static const struct arm64_ftr_bits ftr_zcr[] = {
* Common ftr bits for a 32bit register with all hidden, strict * Common ftr bits for a 32bit register with all hidden, strict
* attributes, with 4bit feature fields and a default safe value of * attributes, with 4bit feature fields and a default safe value of
* 0. Covers the following 32bit registers: * 0. Covers the following 32bit registers:
* id_isar[1-4], id_mmfr[1-3], id_pfr1, mvfr[0-1] * id_isar[1-3], id_mmfr[1-3]
*/ */
static const struct arm64_ftr_bits ftr_generic_32bits[] = { static const struct arm64_ftr_bits ftr_generic_32bits[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 28, 4, 0),
@ -625,8 +649,8 @@ static const struct __ftr_reg_entry {
ARM64_FTR_REG(SYS_ID_ISAR6_EL1, ftr_id_isar6), ARM64_FTR_REG(SYS_ID_ISAR6_EL1, ftr_id_isar6),
/* Op1 = 0, CRn = 0, CRm = 3 */ /* Op1 = 0, CRn = 0, CRm = 3 */
ARM64_FTR_REG(SYS_MVFR0_EL1, ftr_generic_32bits), ARM64_FTR_REG(SYS_MVFR0_EL1, ftr_mvfr0),
ARM64_FTR_REG(SYS_MVFR1_EL1, ftr_generic_32bits), ARM64_FTR_REG(SYS_MVFR1_EL1, ftr_mvfr1),
ARM64_FTR_REG(SYS_MVFR2_EL1, ftr_mvfr2), ARM64_FTR_REG(SYS_MVFR2_EL1, ftr_mvfr2),
ARM64_FTR_REG(SYS_ID_PFR2_EL1, ftr_id_pfr2), ARM64_FTR_REG(SYS_ID_PFR2_EL1, ftr_id_pfr2),
ARM64_FTR_REG(SYS_ID_DFR1_EL1, ftr_id_dfr1), ARM64_FTR_REG(SYS_ID_DFR1_EL1, ftr_id_dfr1),
@ -1292,17 +1316,39 @@ feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
return val >= entry->min_field_value; return val >= entry->min_field_value;
} }
static u64
read_scoped_sysreg(const struct arm64_cpu_capabilities *entry, int scope)
{
WARN_ON(scope == SCOPE_LOCAL_CPU && preemptible());
if (scope == SCOPE_SYSTEM)
return read_sanitised_ftr_reg(entry->sys_reg);
else
return __read_sysreg_by_encoding(entry->sys_reg);
}
static bool
has_user_cpuid_feature(const struct arm64_cpu_capabilities *entry, int scope)
{
int mask;
struct arm64_ftr_reg *regp;
u64 val = read_scoped_sysreg(entry, scope);
regp = get_arm64_ftr_reg(entry->sys_reg);
if (!regp)
return false;
mask = cpuid_feature_extract_unsigned_field(regp->user_mask,
entry->field_pos);
if (!mask)
return false;
return feature_matches(val, entry);
}
static bool static bool
has_cpuid_feature(const struct arm64_cpu_capabilities *entry, int scope) has_cpuid_feature(const struct arm64_cpu_capabilities *entry, int scope)
{ {
u64 val; u64 val = read_scoped_sysreg(entry, scope);
WARN_ON(scope == SCOPE_LOCAL_CPU && preemptible());
if (scope == SCOPE_SYSTEM)
val = read_sanitised_ftr_reg(entry->sys_reg);
else
val = __read_sysreg_by_encoding(entry->sys_reg);
return feature_matches(val, entry); return feature_matches(val, entry);
} }
@ -1899,6 +1945,17 @@ static bool is_kvm_protected_mode(const struct arm64_cpu_capabilities *entry, in
} }
#endif /* CONFIG_KVM */ #endif /* CONFIG_KVM */
static void user_feature_fixup(void)
{
if (cpus_have_cap(ARM64_WORKAROUND_SPECULATIVE_SSBS)) {
struct arm64_ftr_reg *regp;
regp = get_arm64_ftr_reg(SYS_ID_AA64PFR1_EL1);
if (regp)
regp->user_mask &= ~GENMASK(7, 4); /* SSBS */
}
}
static void elf_hwcap_fixup(void) static void elf_hwcap_fixup(void)
{ {
#ifdef CONFIG_ARM64_ERRATUM_1742098 #ifdef CONFIG_ARM64_ERRATUM_1742098
@ -2355,7 +2412,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
}; };
#define HWCAP_CPUID_MATCH(reg, field, s, min_value) \ #define HWCAP_CPUID_MATCH(reg, field, s, min_value) \
.matches = has_cpuid_feature, \ .matches = has_user_cpuid_feature, \
.sys_reg = reg, \ .sys_reg = reg, \
.field_pos = field, \ .field_pos = field, \
.sign = s, \ .sign = s, \
@ -2929,6 +2986,7 @@ void __init setup_cpu_features(void)
u32 cwg; u32 cwg;
setup_system_capabilities(); setup_system_capabilities();
user_feature_fixup();
setup_elf_hwcaps(arm64_elf_hwcaps); setup_elf_hwcaps(arm64_elf_hwcaps);
if (system_supports_32bit_el0()) { if (system_supports_32bit_el0()) {
@ -3013,7 +3071,7 @@ static void __maybe_unused cpu_enable_cnp(struct arm64_cpu_capabilities const *c
/* /*
* We emulate only the following system register space. * We emulate only the following system register space.
* Op0 = 0x3, CRn = 0x0, Op1 = 0x0, CRm = [0, 4 - 7] * Op0 = 0x3, CRn = 0x0, Op1 = 0x0, CRm = [0, 2 - 7]
* See Table C5-6 System instruction encodings for System register accesses, * See Table C5-6 System instruction encodings for System register accesses,
* ARMv8 ARM(ARM DDI 0487A.f) for more details. * ARMv8 ARM(ARM DDI 0487A.f) for more details.
*/ */
@ -3023,7 +3081,7 @@ static inline bool __attribute_const__ is_emulated(u32 id)
sys_reg_CRn(id) == 0x0 && sys_reg_CRn(id) == 0x0 &&
sys_reg_Op1(id) == 0x0 && sys_reg_Op1(id) == 0x0 &&
(sys_reg_CRm(id) == 0 || (sys_reg_CRm(id) == 0 ||
((sys_reg_CRm(id) >= 4) && (sys_reg_CRm(id) <= 7)))); ((sys_reg_CRm(id) >= 2) && (sys_reg_CRm(id) <= 7))));
} }
/* /*

View File

@ -570,6 +570,18 @@ static enum mitigation_state spectre_v4_enable_hw_mitigation(void)
/* SCTLR_EL1.DSSBS was initialised to 0 during boot */ /* SCTLR_EL1.DSSBS was initialised to 0 during boot */
set_pstate_ssbs(0); set_pstate_ssbs(0);
/*
* SSBS is self-synchronizing and is intended to affect subsequent
* speculative instructions, but some CPUs can speculate with a stale
* value of SSBS.
*
* Mitigate this with an unconditional speculation barrier, as CPUs
* could mis-speculate branches and bypass a conditional barrier.
*/
if (IS_ENABLED(CONFIG_ARM64_ERRATUM_3194386))
spec_bar();
return SPECTRE_MITIGATED; return SPECTRE_MITIGATED;
} }

View File

@ -179,6 +179,15 @@ int __init amiga_parse_bootinfo(const struct bi_record *record)
dev->slotsize = be16_to_cpu(cd->cd_SlotSize); dev->slotsize = be16_to_cpu(cd->cd_SlotSize);
dev->boardaddr = be32_to_cpu(cd->cd_BoardAddr); dev->boardaddr = be32_to_cpu(cd->cd_BoardAddr);
dev->boardsize = be32_to_cpu(cd->cd_BoardSize); dev->boardsize = be32_to_cpu(cd->cd_BoardSize);
/* CS-LAB Warp 1260 workaround */
if (be16_to_cpu(dev->rom.er_Manufacturer) == ZORRO_MANUF(ZORRO_PROD_CSLAB_WARP_1260) &&
dev->rom.er_Product == ZORRO_PROD(ZORRO_PROD_CSLAB_WARP_1260)) {
/* turn off all interrupts */
pr_info("Warp 1260 card detected: applying interrupt storm workaround\n");
*(uint32_t *)(dev->boardaddr + 0x1000) = 0xfff;
}
} else } else
pr_warn("amiga_parse_bootinfo: too many AutoConfig devices\n"); pr_warn("amiga_parse_bootinfo: too many AutoConfig devices\n");
#endif /* CONFIG_ZORRO */ #endif /* CONFIG_ZORRO */

View File

@ -302,11 +302,7 @@ void __init atari_init_IRQ(void)
if (ATARIHW_PRESENT(SCU)) { if (ATARIHW_PRESENT(SCU)) {
/* init the SCU if present */ /* init the SCU if present */
tt_scu.sys_mask = 0x10; /* enable VBL (for the cursor) and tt_scu.sys_mask = 0x0; /* disable all interrupts */
* disable HSYNC interrupts (who
* needs them?) MFP and SCC are
* enabled in VME mask
*/
tt_scu.vme_mask = 0x60; /* enable MFP and SCC ints */ tt_scu.vme_mask = 0x60; /* enable MFP and SCC ints */
} else { } else {
/* If no SCU and no Hades, the HSYNC interrupt needs to be /* If no SCU and no Hades, the HSYNC interrupt needs to be

View File

@ -33,7 +33,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
x = tmp; x = tmp;
break; break;
default: default:
tmp = __invalid_xchg_size(x, ptr, size); x = __invalid_xchg_size(x, ptr, size);
break; break;
} }

View File

@ -38,12 +38,14 @@ enum loongson_cpu_type {
Legacy_1B = 0x5, Legacy_1B = 0x5,
Legacy_2G = 0x6, Legacy_2G = 0x6,
Legacy_2H = 0x7, Legacy_2H = 0x7,
Legacy_2K = 0x8,
Loongson_1A = 0x100, Loongson_1A = 0x100,
Loongson_1B = 0x101, Loongson_1B = 0x101,
Loongson_2E = 0x200, Loongson_2E = 0x200,
Loongson_2F = 0x201, Loongson_2F = 0x201,
Loongson_2G = 0x202, Loongson_2G = 0x202,
Loongson_2H = 0x203, Loongson_2H = 0x203,
Loongson_2K = 0x204,
Loongson_3A = 0x300, Loongson_3A = 0x300,
Loongson_3B = 0x301 Loongson_3B = 0x301
}; };

View File

@ -228,6 +228,10 @@ GCR_ACCESSOR_RO(32, 0x0d0, gic_status)
GCR_ACCESSOR_RO(32, 0x0f0, cpc_status) GCR_ACCESSOR_RO(32, 0x0f0, cpc_status)
#define CM_GCR_CPC_STATUS_EX BIT(0) #define CM_GCR_CPC_STATUS_EX BIT(0)
/* GCR_ACCESS - Controls core/IOCU access to GCRs */
GCR_ACCESSOR_RW(32, 0x120, access_cm3)
#define CM_GCR_ACCESS_ACCESSEN GENMASK(7, 0)
/* GCR_L2_CONFIG - Indicates L2 cache configuration when Config5.L2C=1 */ /* GCR_L2_CONFIG - Indicates L2 cache configuration when Config5.L2C=1 */
GCR_ACCESSOR_RW(32, 0x130, l2_config) GCR_ACCESSOR_RW(32, 0x130, l2_config)
#define CM_GCR_L2_CONFIG_BYPASS BIT(20) #define CM_GCR_L2_CONFIG_BYPASS BIT(20)

View File

@ -229,7 +229,10 @@ static void boot_core(unsigned int core, unsigned int vpe_id)
write_gcr_co_reset_ext_base(CM_GCR_Cx_RESET_EXT_BASE_UEB); write_gcr_co_reset_ext_base(CM_GCR_Cx_RESET_EXT_BASE_UEB);
/* Ensure the core can access the GCRs */ /* Ensure the core can access the GCRs */
if (mips_cm_revision() < CM_REV_CM3)
set_gcr_access(1 << core); set_gcr_access(1 << core);
else
set_gcr_access_cm3(1 << core);
if (mips_cpc_present()) { if (mips_cpc_present()) {
/* Reset the core */ /* Reset the core */

View File

@ -65,6 +65,12 @@ void __init prom_init_env(void)
cpu_clock_freq = ecpu->cpu_clock_freq; cpu_clock_freq = ecpu->cpu_clock_freq;
loongson_sysconf.cputype = ecpu->cputype; loongson_sysconf.cputype = ecpu->cputype;
switch (ecpu->cputype) { switch (ecpu->cputype) {
case Legacy_2K:
case Loongson_2K:
smp_group[0] = 0x900000001fe11000;
loongson_sysconf.cores_per_node = 2;
loongson_sysconf.cores_per_package = 2;
break;
case Legacy_3A: case Legacy_3A:
case Loongson_3A: case Loongson_3A:
loongson_sysconf.cores_per_node = 4; loongson_sysconf.cores_per_node = 4;
@ -213,6 +219,8 @@ void __init prom_init_env(void)
default: default:
break; break;
} }
} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) {
loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin;
} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) { } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
if (loongson_sysconf.bridgetype == LS7A) if (loongson_sysconf.bridgetype == LS7A)
loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin; loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;

0
arch/mips/pci/pcie-octeon.c Executable file → Normal file
View File

View File

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
#include <linux/io.h> #include <linux/io.h>
#include <linux/processor.h>
#include <asm/sn/ioc3.h> #include <asm/sn/ioc3.h>

View File

@ -24,6 +24,7 @@ CONFIG_FS_ENET=y
CONFIG_FSL_CORENET_CF=y CONFIG_FSL_CORENET_CF=y
CONFIG_FSL_DMA=y CONFIG_FSL_DMA=y
CONFIG_FSL_HV_MANAGER=y CONFIG_FSL_HV_MANAGER=y
CONFIG_FSL_IFC=y
CONFIG_FSL_PQ_MDIO=y CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_RIO=y CONFIG_FSL_RIO=y
CONFIG_FSL_XGMAC_MDIO=y CONFIG_FSL_XGMAC_MDIO=y
@ -58,6 +59,7 @@ CONFIG_INPUT_FF_MEMLESS=m
CONFIG_MARVELL_PHY=y CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS_MUX_GPIO=y CONFIG_MDIO_BUS_MUX_GPIO=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MEMORY=y
CONFIG_MMC_SDHCI_OF_ESDHC=y CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y

View File

@ -15,6 +15,16 @@
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
#endif /* __powerpc64__ */ #endif /* __powerpc64__ */
#if defined(CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK) && defined(CONFIG_SMP)
#include <linux/jump_label.h>
DECLARE_STATIC_KEY_FALSE(__percpu_first_chunk_is_paged);
#define percpu_first_chunk_is_paged \
(static_key_enabled(&__percpu_first_chunk_is_paged.key))
#else
#define percpu_first_chunk_is_paged false
#endif /* CONFIG_PPC64 && CONFIG_SMP */
#include <asm-generic/percpu.h> #include <asm-generic/percpu.h>
#include <asm/paca.h> #include <asm/paca.h>

View File

@ -594,8 +594,15 @@ long notrace machine_check_early(struct pt_regs *regs)
u8 ftrace_enabled = this_cpu_get_ftrace_enabled(); u8 ftrace_enabled = this_cpu_get_ftrace_enabled();
this_cpu_set_ftrace_enabled(0); this_cpu_set_ftrace_enabled(0);
/* Do not use nmi_enter/exit for pseries hpte guest */ /*
if (radix_enabled() || !firmware_has_feature(FW_FEATURE_LPAR)) * Do not use nmi_enter/exit for pseries hpte guest
*
* Likewise, do not use it in real mode if percpu first chunk is not
* embedded. With CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK enabled there
* are chances where percpu allocation can come from vmalloc area.
*/
if ((radix_enabled() || !firmware_has_feature(FW_FEATURE_LPAR)) &&
!percpu_first_chunk_is_paged)
nmi_enter(); nmi_enter();
hv_nmi_check_nonrecoverable(regs); hv_nmi_check_nonrecoverable(regs);
@ -606,7 +613,8 @@ long notrace machine_check_early(struct pt_regs *regs)
if (ppc_md.machine_check_early) if (ppc_md.machine_check_early)
handled = ppc_md.machine_check_early(regs); handled = ppc_md.machine_check_early(regs);
if (radix_enabled() || !firmware_has_feature(FW_FEATURE_LPAR)) if ((radix_enabled() || !firmware_has_feature(FW_FEATURE_LPAR)) &&
!percpu_first_chunk_is_paged)
nmi_exit(); nmi_exit();
this_cpu_set_ftrace_enabled(ftrace_enabled); this_cpu_set_ftrace_enabled(ftrace_enabled);

View File

@ -824,6 +824,7 @@ static int pcpu_cpu_distance(unsigned int from, unsigned int to)
unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
EXPORT_SYMBOL(__per_cpu_offset); EXPORT_SYMBOL(__per_cpu_offset);
DEFINE_STATIC_KEY_FALSE(__percpu_first_chunk_is_paged);
static void __init pcpu_populate_pte(unsigned long addr) static void __init pcpu_populate_pte(unsigned long addr)
{ {
@ -903,6 +904,7 @@ void __init setup_per_cpu_areas(void)
if (rc < 0) if (rc < 0)
panic("cannot initialize percpu area (err=%d)", rc); panic("cannot initialize percpu area (err=%d)", rc);
static_key_enable(&__percpu_first_chunk_is_paged.key);
delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
for_each_possible_cpu(cpu) { for_each_possible_cpu(cpu) {
__per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];

View File

@ -835,8 +835,14 @@ void machine_check_exception(struct pt_regs *regs)
* This is silly. The BOOK3S_64 should just call a different function * This is silly. The BOOK3S_64 should just call a different function
* rather than expecting semantics to magically change. Something * rather than expecting semantics to magically change. Something
* like 'non_nmi_machine_check_exception()', perhaps? * like 'non_nmi_machine_check_exception()', perhaps?
*
* Do not use nmi_enter/exit in real mode if percpu first chunk is
* not embedded. With CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK enabled
* there are chances where percpu allocation can come from
* vmalloc area.
*/ */
const bool nmi = !IS_ENABLED(CONFIG_PPC_BOOK3S_64); const bool nmi = !IS_ENABLED(CONFIG_PPC_BOOK3S_64) &&
!percpu_first_chunk_is_paged;
if (nmi) nmi_enter(); if (nmi) nmi_enter();

View File

@ -1956,8 +1956,10 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
break; break;
r = -ENXIO; r = -ENXIO;
if (!xive_enabled()) if (!xive_enabled()) {
fdput(f);
break; break;
}
r = -EPERM; r = -EPERM;
dev = kvm_device_from_filp(f.file); dev = kvm_device_from_filp(f.file);

View File

@ -122,32 +122,21 @@ int print_insn_powerpc (unsigned long insn, unsigned long memaddr)
bool insn_is_short; bool insn_is_short;
ppc_cpu_t dialect; ppc_cpu_t dialect;
dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON;
| PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC;
if (cpu_has_feature(CPU_FTRS_POWER5)) if (IS_ENABLED(CONFIG_PPC64))
dialect |= PPC_OPCODE_POWER5; dialect |= PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL |
PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 |
PPC_OPCODE_POWER9;
if (cpu_has_feature(CPU_FTRS_CELL)) if (cpu_has_feature(CPU_FTR_TM))
dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC); dialect |= PPC_OPCODE_HTM;
if (cpu_has_feature(CPU_FTRS_POWER6)) if (cpu_has_feature(CPU_FTR_ALTIVEC))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC); dialect |= PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2;
if (cpu_has_feature(CPU_FTRS_POWER7)) if (cpu_has_feature(CPU_FTR_VSX))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 dialect |= PPC_OPCODE_VSX | PPC_OPCODE_VSX3;
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
if (cpu_has_feature(CPU_FTRS_POWER8))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX);
if (cpu_has_feature(CPU_FTRS_POWER9))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
| PPC_OPCODE_VSX | PPC_OPCODE_VSX3);
/* Get the major opcode of the insn. */ /* Get the major opcode of the insn. */
opcode = NULL; opcode = NULL;

View File

@ -39,26 +39,27 @@ static inline void no_context(struct pt_regs *regs, unsigned long addr)
static inline void mm_fault_error(struct pt_regs *regs, unsigned long addr, vm_fault_t fault) static inline void mm_fault_error(struct pt_regs *regs, unsigned long addr, vm_fault_t fault)
{ {
if (!user_mode(regs)) {
no_context(regs, addr);
return;
}
if (fault & VM_FAULT_OOM) { if (fault & VM_FAULT_OOM) {
/* /*
* We ran out of memory, call the OOM killer, and return the userspace * We ran out of memory, call the OOM killer, and return the userspace
* (which will retry the fault, or kill us if we got oom-killed). * (which will retry the fault, or kill us if we got oom-killed).
*/ */
if (!user_mode(regs)) {
no_context(regs, addr);
return;
}
pagefault_out_of_memory(); pagefault_out_of_memory();
return; return;
} else if (fault & VM_FAULT_SIGBUS) { } else if (fault & VM_FAULT_SIGBUS) {
/* Kernel mode? Handle exceptions or die */ /* Kernel mode? Handle exceptions or die */
if (!user_mode(regs)) {
no_context(regs, addr);
return;
}
do_trap(regs, SIGBUS, BUS_ADRERR, addr); do_trap(regs, SIGBUS, BUS_ADRERR, addr);
return; return;
} else if (fault & VM_FAULT_SIGSEGV) {
do_trap(regs, SIGSEGV, SEGV_MAPERR, addr);
return;
} }
BUG(); BUG();
} }

View File

@ -247,6 +247,7 @@ void prom_sun4v_guest_soft_state(void);
int prom_ihandle2path(int handle, char *buffer, int bufsize); int prom_ihandle2path(int handle, char *buffer, int bufsize);
/* Client interface level routines. */ /* Client interface level routines. */
void prom_cif_init(void *cif_handler);
void p1275_cmd_direct(unsigned long *); void p1275_cmd_direct(unsigned long *);
#endif /* !(__SPARC64_OPLIB_H) */ #endif /* !(__SPARC64_OPLIB_H) */

View File

@ -26,9 +26,6 @@ phandle prom_chosen_node;
* routines in the prom library. * routines in the prom library.
* It gets passed the pointer to the PROM vector. * It gets passed the pointer to the PROM vector.
*/ */
extern void prom_cif_init(void *);
void __init prom_init(void *cif_handler) void __init prom_init(void *cif_handler)
{ {
phandle node; phandle node;

View File

@ -49,7 +49,7 @@ void p1275_cmd_direct(unsigned long *args)
local_irq_restore(flags); local_irq_restore(flags);
} }
void prom_cif_init(void *cif_handler, void *cif_stack) void prom_cif_init(void *cif_handler)
{ {
p1275buf.prom_cif_handler = (void (*)(long *))cif_handler; p1275buf.prom_cif_handler = (void (*)(long *))cif_handler;
} }

View File

@ -756,9 +756,9 @@ int setup_time_travel_start(char *str)
return 1; return 1;
} }
__setup("time-travel-start", setup_time_travel_start); __setup("time-travel-start=", setup_time_travel_start);
__uml_help(setup_time_travel_start, __uml_help(setup_time_travel_start,
"time-travel-start=<seconds>\n" "time-travel-start=<nanoseconds>\n"
"Configure the UML instance's wall clock to start at this value rather than\n" "Configure the UML instance's wall clock to start at this value rather than\n"
"the host's wall clock at the time of UML boot.\n"); "the host's wall clock at the time of UML boot.\n");
#endif #endif

View File

@ -861,7 +861,7 @@ static void pt_update_head(struct pt *pt)
*/ */
static void *pt_buffer_region(struct pt_buffer *buf) static void *pt_buffer_region(struct pt_buffer *buf)
{ {
return phys_to_virt(TOPA_ENTRY(buf->cur, buf->cur_idx)->base << TOPA_SHIFT); return phys_to_virt((phys_addr_t)TOPA_ENTRY(buf->cur, buf->cur_idx)->base << TOPA_SHIFT);
} }
/** /**
@ -973,7 +973,7 @@ pt_topa_entry_for_page(struct pt_buffer *buf, unsigned int pg)
* order allocations, there shouldn't be many of these. * order allocations, there shouldn't be many of these.
*/ */
list_for_each_entry(topa, &buf->tables, list) { list_for_each_entry(topa, &buf->tables, list) {
if (topa->offset + topa->size > pg << PAGE_SHIFT) if (topa->offset + topa->size > (unsigned long)pg << PAGE_SHIFT)
goto found; goto found;
} }

View File

@ -33,8 +33,8 @@ struct topa_entry {
u64 rsvd2 : 1; u64 rsvd2 : 1;
u64 size : 4; u64 size : 4;
u64 rsvd3 : 2; u64 rsvd3 : 2;
u64 base : 36; u64 base : 40;
u64 rsvd4 : 16; u64 rsvd4 : 12;
}; };
/* TSC to Core Crystal Clock Ratio */ /* TSC to Core Crystal Clock Ratio */

View File

@ -817,7 +817,7 @@ void mtrr_save_state(void)
{ {
int first_cpu; int first_cpu;
if (!mtrr_enabled()) if (!mtrr_enabled() || !mtrr_state.have_fixed)
return; return;
first_cpu = cpumask_first(cpu_online_mask); first_cpu = cpumask_first(cpu_online_mask);

View File

@ -92,7 +92,7 @@ static int x86_of_pci_irq_enable(struct pci_dev *dev)
ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
if (ret) if (ret)
return ret; return pcibios_err_to_errno(ret);
if (!pin) if (!pin)
return 0; return 0;

View File

@ -4738,14 +4738,19 @@ static int vmx_nmi_allowed(struct kvm_vcpu *vcpu, bool for_injection)
return !vmx_nmi_blocked(vcpu); return !vmx_nmi_blocked(vcpu);
} }
bool __vmx_interrupt_blocked(struct kvm_vcpu *vcpu)
{
return !(vmx_get_rflags(vcpu) & X86_EFLAGS_IF) ||
(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
}
bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu) bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu)
{ {
if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu))
return false; return false;
return !(vmx_get_rflags(vcpu) & X86_EFLAGS_IF) || return __vmx_interrupt_blocked(vcpu);
(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
} }
static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection) static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection)

View File

@ -359,6 +359,7 @@ bool vmx_guest_inject_ac(struct kvm_vcpu *vcpu);
void update_exception_bitmap(struct kvm_vcpu *vcpu); void update_exception_bitmap(struct kvm_vcpu *vcpu);
void vmx_update_msr_bitmap(struct kvm_vcpu *vcpu); void vmx_update_msr_bitmap(struct kvm_vcpu *vcpu);
bool vmx_nmi_blocked(struct kvm_vcpu *vcpu); bool vmx_nmi_blocked(struct kvm_vcpu *vcpu);
bool __vmx_interrupt_blocked(struct kvm_vcpu *vcpu);
bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu); bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu);
bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu); bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu);
void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked); void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked);

View File

@ -374,14 +374,14 @@ pti_clone_pgtable(unsigned long start, unsigned long end,
*/ */
*target_pmd = *pmd; *target_pmd = *pmd;
addr += PMD_SIZE; addr = round_up(addr + 1, PMD_SIZE);
} else if (level == PTI_CLONE_PTE) { } else if (level == PTI_CLONE_PTE) {
/* Walk the page-table down to the pte level */ /* Walk the page-table down to the pte level */
pte = pte_offset_kernel(pmd, addr); pte = pte_offset_kernel(pmd, addr);
if (pte_none(*pte)) { if (pte_none(*pte)) {
addr += PAGE_SIZE; addr = round_up(addr + 1, PAGE_SIZE);
continue; continue;
} }
@ -401,7 +401,7 @@ pti_clone_pgtable(unsigned long start, unsigned long end,
/* Clone the PTE */ /* Clone the PTE */
*target_pte = *pte; *target_pte = *pte;
addr += PAGE_SIZE; addr = round_up(addr + 1, PAGE_SIZE);
} else { } else {
BUG(); BUG();
@ -497,7 +497,7 @@ static void pti_clone_entry_text(void)
{ {
pti_clone_pgtable((unsigned long) __entry_text_start, pti_clone_pgtable((unsigned long) __entry_text_start,
(unsigned long) __entry_text_end, (unsigned long) __entry_text_end,
PTI_CLONE_PMD); PTI_LEVEL_KERNEL_IMAGE);
/* /*
* If CFI is enabled, also map jump tables, so the entry code can * If CFI is enabled, also map jump tables, so the entry code can

View File

@ -223,9 +223,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
return 0; return 0;
ret = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); ret = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
if (ret < 0) { if (ret) {
dev_warn(&dev->dev, "Failed to read interrupt line: %d\n", ret); dev_warn(&dev->dev, "Failed to read interrupt line: %d\n", ret);
return ret; return pcibios_err_to_errno(ret);
} }
switch (intel_mid_identify_cpu()) { switch (intel_mid_identify_cpu()) {

View File

@ -37,10 +37,10 @@ static int xen_pcifront_enable_irq(struct pci_dev *dev)
u8 gsi; u8 gsi;
rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
if (rc < 0) { if (rc) {
dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
rc); rc);
return rc; return pcibios_err_to_errno(rc);
} }
/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
pirq = gsi; pirq = gsi;

View File

@ -62,7 +62,7 @@ static int iosf_mbi_pci_read_mdr(u32 mcrx, u32 mcr, u32 *mdr)
fail_read: fail_read:
dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result); dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result);
return result; return pcibios_err_to_errno(result);
} }
static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr) static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr)
@ -91,7 +91,7 @@ static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr)
fail_write: fail_write:
dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result); dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result);
return result; return pcibios_err_to_errno(result);
} }
int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr)

View File

@ -736,7 +736,7 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops,
* immediate unmapping. * immediate unmapping.
*/ */
map_ops[i].status = GNTST_general_error; map_ops[i].status = GNTST_general_error;
unmap[0].host_addr = map_ops[i].host_addr, unmap[0].host_addr = map_ops[i].host_addr;
unmap[0].handle = map_ops[i].handle; unmap[0].handle = map_ops[i].handle;
map_ops[i].handle = ~0; map_ops[i].handle = ~0;
if (map_ops[i].flags & GNTMAP_device_map) if (map_ops[i].flags & GNTMAP_device_map)
@ -746,7 +746,7 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops,
if (kmap_ops) { if (kmap_ops) {
kmap_ops[i].status = GNTST_general_error; kmap_ops[i].status = GNTST_general_error;
unmap[1].host_addr = kmap_ops[i].host_addr, unmap[1].host_addr = kmap_ops[i].host_addr;
unmap[1].handle = kmap_ops[i].handle; unmap[1].handle = kmap_ops[i].handle;
kmap_ops[i].handle = ~0; kmap_ops[i].handle = ~0;
if (kmap_ops[i].flags & GNTMAP_device_map) if (kmap_ops[i].flags & GNTMAP_device_map)

View File

@ -670,12 +670,18 @@ static ssize_t acpi_battery_alarm_store(struct device *dev,
return count; return count;
} }
static const struct device_attribute alarm_attr = { static struct device_attribute alarm_attr = {
.attr = {.name = "alarm", .mode = 0644}, .attr = {.name = "alarm", .mode = 0644},
.show = acpi_battery_alarm_show, .show = acpi_battery_alarm_show,
.store = acpi_battery_alarm_store, .store = acpi_battery_alarm_store,
}; };
static struct attribute *acpi_battery_attrs[] = {
&alarm_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(acpi_battery);
/* /*
* The Battery Hooking API * The Battery Hooking API
* *
@ -812,7 +818,10 @@ static void __exit battery_hook_exit(void)
static int sysfs_add_battery(struct acpi_battery *battery) static int sysfs_add_battery(struct acpi_battery *battery)
{ {
struct power_supply_config psy_cfg = { .drv_data = battery, }; struct power_supply_config psy_cfg = {
.drv_data = battery,
.attr_grp = acpi_battery_groups,
};
bool full_cap_broken = false; bool full_cap_broken = false;
if (!ACPI_BATTERY_CAPACITY_VALID(battery->full_charge_capacity) && if (!ACPI_BATTERY_CAPACITY_VALID(battery->full_charge_capacity) &&
@ -857,7 +866,7 @@ static int sysfs_add_battery(struct acpi_battery *battery)
return result; return result;
} }
battery_hook_add_battery(battery); battery_hook_add_battery(battery);
return device_create_file(&battery->bat->dev, &alarm_attr); return 0;
} }
static void sysfs_remove_battery(struct acpi_battery *battery) static void sysfs_remove_battery(struct acpi_battery *battery)
@ -868,7 +877,6 @@ static void sysfs_remove_battery(struct acpi_battery *battery)
return; return;
} }
battery_hook_remove_battery(battery); battery_hook_remove_battery(battery);
device_remove_file(&battery->bat->dev, &alarm_attr);
power_supply_unregister(battery->bat); power_supply_unregister(battery->bat);
battery->bat = NULL; battery->bat = NULL;
mutex_unlock(&battery->sysfs_lock); mutex_unlock(&battery->sysfs_lock);

View File

@ -77,7 +77,6 @@ struct acpi_battery {
u16 spec; u16 spec;
u8 id; u8 id;
u8 present:1; u8 present:1;
u8 have_sysfs_alarm:1;
}; };
#define to_acpi_battery(x) power_supply_get_drvdata(x) #define to_acpi_battery(x) power_supply_get_drvdata(x)
@ -462,12 +461,18 @@ static ssize_t acpi_battery_alarm_store(struct device *dev,
return count; return count;
} }
static const struct device_attribute alarm_attr = { static struct device_attribute alarm_attr = {
.attr = {.name = "alarm", .mode = 0644}, .attr = {.name = "alarm", .mode = 0644},
.show = acpi_battery_alarm_show, .show = acpi_battery_alarm_show,
.store = acpi_battery_alarm_store, .store = acpi_battery_alarm_store,
}; };
static struct attribute *acpi_battery_attrs[] = {
&alarm_attr.attr,
NULL
};
ATTRIBUTE_GROUPS(acpi_battery);
/* -------------------------------------------------------------------------- /* --------------------------------------------------------------------------
Driver Interface Driver Interface
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
@ -509,7 +514,10 @@ static int acpi_battery_read(struct acpi_battery *battery)
static int acpi_battery_add(struct acpi_sbs *sbs, int id) static int acpi_battery_add(struct acpi_sbs *sbs, int id)
{ {
struct acpi_battery *battery = &sbs->battery[id]; struct acpi_battery *battery = &sbs->battery[id];
struct power_supply_config psy_cfg = { .drv_data = battery, }; struct power_supply_config psy_cfg = {
.drv_data = battery,
.attr_grp = acpi_battery_groups,
};
int result; int result;
battery->id = id; battery->id = id;
@ -539,10 +547,6 @@ static int acpi_battery_add(struct acpi_sbs *sbs, int id)
goto end; goto end;
} }
result = device_create_file(&battery->bat->dev, &alarm_attr);
if (result)
goto end;
battery->have_sysfs_alarm = 1;
end: end:
printk(KERN_INFO PREFIX "%s [%s]: Battery Slot [%s] (battery %s)\n", printk(KERN_INFO PREFIX "%s [%s]: Battery Slot [%s] (battery %s)\n",
ACPI_SBS_DEVICE_NAME, acpi_device_bid(sbs->device), ACPI_SBS_DEVICE_NAME, acpi_device_bid(sbs->device),
@ -554,11 +558,8 @@ static void acpi_battery_remove(struct acpi_sbs *sbs, int id)
{ {
struct acpi_battery *battery = &sbs->battery[id]; struct acpi_battery *battery = &sbs->battery[id];
if (battery->bat) { if (battery->bat)
if (battery->have_sysfs_alarm)
device_remove_file(&battery->bat->dev, &alarm_attr);
power_supply_unregister(battery->bat); power_supply_unregister(battery->bat);
}
} }
static int acpi_charger_add(struct acpi_sbs *sbs) static int acpi_charger_add(struct acpi_sbs *sbs)

View File

@ -550,9 +550,7 @@ static bool binder_has_work(struct binder_thread *thread, bool do_proc_work)
static bool binder_available_for_proc_work_ilocked(struct binder_thread *thread) static bool binder_available_for_proc_work_ilocked(struct binder_thread *thread)
{ {
return !thread->transaction_stack && return !thread->transaction_stack &&
binder_worklist_empty_ilocked(&thread->todo) && binder_worklist_empty_ilocked(&thread->todo);
(thread->looper & (BINDER_LOOPER_STATE_ENTERED |
BINDER_LOOPER_STATE_REGISTERED));
} }
static void binder_wakeup_poll_threads_ilocked(struct binder_proc *proc, static void binder_wakeup_poll_threads_ilocked(struct binder_proc *proc,

View File

@ -25,6 +25,7 @@
#include <linux/mutex.h> #include <linux/mutex.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/netdevice.h> #include <linux/netdevice.h>
#include <linux/rcupdate.h>
#include <linux/sched/signal.h> #include <linux/sched/signal.h>
#include <linux/sched/mm.h> #include <linux/sched/mm.h>
#include <linux/sysfs.h> #include <linux/sysfs.h>
@ -2194,6 +2195,7 @@ static int dev_uevent(struct kset *kset, struct kobject *kobj,
struct kobj_uevent_env *env) struct kobj_uevent_env *env)
{ {
struct device *dev = kobj_to_dev(kobj); struct device *dev = kobj_to_dev(kobj);
struct device_driver *driver;
int retval = 0; int retval = 0;
/* add device node properties if present */ /* add device node properties if present */
@ -2222,8 +2224,12 @@ static int dev_uevent(struct kset *kset, struct kobject *kobj,
if (dev->type && dev->type->name) if (dev->type && dev->type->name)
add_uevent_var(env, "DEVTYPE=%s", dev->type->name); add_uevent_var(env, "DEVTYPE=%s", dev->type->name);
if (dev->driver) /* Synchronize with module_remove_driver() */
add_uevent_var(env, "DRIVER=%s", dev->driver->name); rcu_read_lock();
driver = READ_ONCE(dev->driver);
if (driver)
add_uevent_var(env, "DRIVER=%s", driver->name);
rcu_read_unlock();
/* Add common DT information about the device */ /* Add common DT information about the device */
of_device_uevent(dev, env); of_device_uevent(dev, env);
@ -2293,11 +2299,8 @@ static ssize_t uevent_show(struct device *dev, struct device_attribute *attr,
if (!env) if (!env)
return -ENOMEM; return -ENOMEM;
/* Synchronize with really_probe() */
device_lock(dev);
/* let the kset specific function add its keys */ /* let the kset specific function add its keys */
retval = kset->uevent_ops->uevent(kset, &dev->kobj, env); retval = kset->uevent_ops->uevent(kset, &dev->kobj, env);
device_unlock(dev);
if (retval) if (retval)
goto out; goto out;

View File

@ -901,9 +901,12 @@ void *devm_krealloc(struct device *dev, void *ptr, size_t new_size, gfp_t gfp)
/* /*
* Otherwise: allocate new, larger chunk. We need to allocate before * Otherwise: allocate new, larger chunk. We need to allocate before
* taking the lock as most probably the caller uses GFP_KERNEL. * taking the lock as most probably the caller uses GFP_KERNEL.
* alloc_dr() will call check_dr_size() to reserve extra memory
* for struct devres automatically, so size @new_size user request
* is delivered to it directly as devm_kmalloc() does.
*/ */
new_dr = alloc_dr(devm_kmalloc_release, new_dr = alloc_dr(devm_kmalloc_release,
total_new_size, gfp, dev_to_node(dev)); new_size, gfp, dev_to_node(dev));
if (!new_dr) if (!new_dr)
return NULL; return NULL;
@ -1227,7 +1230,11 @@ EXPORT_SYMBOL_GPL(__devm_alloc_percpu);
*/ */
void devm_free_percpu(struct device *dev, void __percpu *pdata) void devm_free_percpu(struct device *dev, void __percpu *pdata)
{ {
WARN_ON(devres_destroy(dev, devm_percpu_release, devm_percpu_match, /*
(void *)pdata)); * Use devres_release() to prevent memory leakage as
* devm_free_pages() does.
*/
WARN_ON(devres_release(dev, devm_percpu_release, devm_percpu_match,
(__force void *)pdata));
} }
EXPORT_SYMBOL_GPL(devm_free_percpu); EXPORT_SYMBOL_GPL(devm_free_percpu);

View File

@ -7,6 +7,7 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/string.h> #include <linux/string.h>
#include <linux/rcupdate.h>
#include "base.h" #include "base.h"
static char *make_driver_name(struct device_driver *drv) static char *make_driver_name(struct device_driver *drv)
@ -77,6 +78,9 @@ void module_remove_driver(struct device_driver *drv)
if (!drv) if (!drv)
return; return;
/* Synchronize with dev_uevent() */
synchronize_rcu();
sysfs_remove_link(&drv->p->kobj, "module"); sysfs_remove_link(&drv->p->kobj, "module");
if (drv->owner) if (drv->owner)

View File

@ -362,7 +362,7 @@ enum rbd_watch_state {
enum rbd_lock_state { enum rbd_lock_state {
RBD_LOCK_STATE_UNLOCKED, RBD_LOCK_STATE_UNLOCKED,
RBD_LOCK_STATE_LOCKED, RBD_LOCK_STATE_LOCKED,
RBD_LOCK_STATE_RELEASING, RBD_LOCK_STATE_QUIESCING,
}; };
/* WatchNotify::ClientId */ /* WatchNotify::ClientId */
@ -422,7 +422,7 @@ struct rbd_device {
struct list_head running_list; struct list_head running_list;
struct completion acquire_wait; struct completion acquire_wait;
int acquire_err; int acquire_err;
struct completion releasing_wait; struct completion quiescing_wait;
spinlock_t object_map_lock; spinlock_t object_map_lock;
u8 *object_map; u8 *object_map;
@ -525,7 +525,7 @@ static bool __rbd_is_lock_owner(struct rbd_device *rbd_dev)
lockdep_assert_held(&rbd_dev->lock_rwsem); lockdep_assert_held(&rbd_dev->lock_rwsem);
return rbd_dev->lock_state == RBD_LOCK_STATE_LOCKED || return rbd_dev->lock_state == RBD_LOCK_STATE_LOCKED ||
rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING; rbd_dev->lock_state == RBD_LOCK_STATE_QUIESCING;
} }
static bool rbd_is_lock_owner(struct rbd_device *rbd_dev) static bool rbd_is_lock_owner(struct rbd_device *rbd_dev)
@ -3522,13 +3522,14 @@ static void rbd_lock_del_request(struct rbd_img_request *img_req)
lockdep_assert_held(&rbd_dev->lock_rwsem); lockdep_assert_held(&rbd_dev->lock_rwsem);
spin_lock(&rbd_dev->lock_lists_lock); spin_lock(&rbd_dev->lock_lists_lock);
if (!list_empty(&img_req->lock_item)) { if (!list_empty(&img_req->lock_item)) {
rbd_assert(!list_empty(&rbd_dev->running_list));
list_del_init(&img_req->lock_item); list_del_init(&img_req->lock_item);
need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING && need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_QUIESCING &&
list_empty(&rbd_dev->running_list)); list_empty(&rbd_dev->running_list));
} }
spin_unlock(&rbd_dev->lock_lists_lock); spin_unlock(&rbd_dev->lock_lists_lock);
if (need_wakeup) if (need_wakeup)
complete(&rbd_dev->releasing_wait); complete(&rbd_dev->quiescing_wait);
} }
static int rbd_img_exclusive_lock(struct rbd_img_request *img_req) static int rbd_img_exclusive_lock(struct rbd_img_request *img_req)
@ -3541,11 +3542,6 @@ static int rbd_img_exclusive_lock(struct rbd_img_request *img_req)
if (rbd_lock_add_request(img_req)) if (rbd_lock_add_request(img_req))
return 1; return 1;
if (rbd_dev->opts->exclusive) {
WARN_ON(1); /* lock got released? */
return -EROFS;
}
/* /*
* Note the use of mod_delayed_work() in rbd_acquire_lock() * Note the use of mod_delayed_work() in rbd_acquire_lock()
* and cancel_delayed_work() in wake_lock_waiters(). * and cancel_delayed_work() in wake_lock_waiters().
@ -4237,16 +4233,16 @@ static bool rbd_quiesce_lock(struct rbd_device *rbd_dev)
/* /*
* Ensure that all in-flight IO is flushed. * Ensure that all in-flight IO is flushed.
*/ */
rbd_dev->lock_state = RBD_LOCK_STATE_RELEASING; rbd_dev->lock_state = RBD_LOCK_STATE_QUIESCING;
rbd_assert(!completion_done(&rbd_dev->releasing_wait)); rbd_assert(!completion_done(&rbd_dev->quiescing_wait));
if (list_empty(&rbd_dev->running_list)) if (list_empty(&rbd_dev->running_list))
return true; return true;
up_write(&rbd_dev->lock_rwsem); up_write(&rbd_dev->lock_rwsem);
wait_for_completion(&rbd_dev->releasing_wait); wait_for_completion(&rbd_dev->quiescing_wait);
down_write(&rbd_dev->lock_rwsem); down_write(&rbd_dev->lock_rwsem);
if (rbd_dev->lock_state != RBD_LOCK_STATE_RELEASING) if (rbd_dev->lock_state != RBD_LOCK_STATE_QUIESCING)
return false; return false;
rbd_assert(list_empty(&rbd_dev->running_list)); rbd_assert(list_empty(&rbd_dev->running_list));
@ -4657,6 +4653,10 @@ static void rbd_reacquire_lock(struct rbd_device *rbd_dev)
rbd_warn(rbd_dev, "failed to update lock cookie: %d", rbd_warn(rbd_dev, "failed to update lock cookie: %d",
ret); ret);
if (rbd_dev->opts->exclusive)
rbd_warn(rbd_dev,
"temporarily releasing lock on exclusive mapping");
/* /*
* Lock cookie cannot be updated on older OSDs, so do * Lock cookie cannot be updated on older OSDs, so do
* a manual release and queue an acquire. * a manual release and queue an acquire.
@ -5455,7 +5455,7 @@ static struct rbd_device *__rbd_dev_create(struct rbd_spec *spec)
INIT_LIST_HEAD(&rbd_dev->acquiring_list); INIT_LIST_HEAD(&rbd_dev->acquiring_list);
INIT_LIST_HEAD(&rbd_dev->running_list); INIT_LIST_HEAD(&rbd_dev->running_list);
init_completion(&rbd_dev->acquire_wait); init_completion(&rbd_dev->acquire_wait);
init_completion(&rbd_dev->releasing_wait); init_completion(&rbd_dev->quiescing_wait);
spin_lock_init(&rbd_dev->object_map_lock); spin_lock_init(&rbd_dev->object_map_lock);
@ -6660,11 +6660,6 @@ static int rbd_add_acquire_lock(struct rbd_device *rbd_dev)
if (ret) if (ret)
return ret; return ret;
/*
* The lock may have been released by now, unless automatic lock
* transitions are disabled.
*/
rbd_assert(!rbd_dev->opts->exclusive || rbd_is_lock_owner(rbd_dev));
return 0; return 0;
} }

View File

@ -428,6 +428,10 @@ static const struct usb_device_id blacklist_table[] = {
BTUSB_WIDEBAND_SPEECH }, BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3571), .driver_info = BTUSB_REALTEK | { USB_DEVICE(0x13d3, 0x3571), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH }, BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3591), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x0489, 0xe125), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
/* Realtek Bluetooth devices */ /* Realtek Bluetooth devices */
{ USB_VENDOR_AND_INTERFACE_INFO(0x0bda, 0xe0, 0x01, 0x01), { USB_VENDOR_AND_INTERFACE_INFO(0x0bda, 0xe0, 0x01, 0x01),

View File

@ -142,8 +142,10 @@ static int __init mod_init(void)
found: found:
err = pci_read_config_dword(pdev, 0x58, &pmbase); err = pci_read_config_dword(pdev, 0x58, &pmbase);
if (err) if (err) {
err = pcibios_err_to_errno(err);
goto put_dev; goto put_dev;
}
pmbase &= 0x0000FF00; pmbase &= 0x0000FF00;
if (pmbase == 0) { if (pmbase == 0) {

View File

@ -47,6 +47,8 @@ static int tpm_bios_measurements_open(struct inode *inode,
if (!err) { if (!err) {
seq = file->private_data; seq = file->private_data;
seq->private = chip; seq->private = chip;
} else {
put_device(&chip->dev);
} }
return err; return err;

View File

@ -505,7 +505,7 @@ da8xx_cfgchip_register_usb0_clk48(struct device *dev,
const char * const parent_names[] = { "usb_refclkin", "pll0_auxclk" }; const char * const parent_names[] = { "usb_refclkin", "pll0_auxclk" };
struct clk *fck_clk; struct clk *fck_clk;
struct da8xx_usb0_clk48 *usb0; struct da8xx_usb0_clk48 *usb0;
struct clk_init_data init; struct clk_init_data init = {};
int ret; int ret;
fck_clk = devm_clk_get(dev, "fck"); fck_clk = devm_clk_get(dev, "fck");
@ -580,7 +580,7 @@ da8xx_cfgchip_register_usb1_clk48(struct device *dev,
{ {
const char * const parent_names[] = { "usb0_clk48", "usb_refclkin" }; const char * const parent_names[] = { "usb0_clk48", "usb_refclkin" };
struct da8xx_usb1_clk48 *usb1; struct da8xx_usb1_clk48 *usb1;
struct clk_init_data init; struct clk_init_data init = {};
int ret; int ret;
usb1 = devm_kzalloc(dev, sizeof(*usb1), GFP_KERNEL); usb1 = devm_kzalloc(dev, sizeof(*usb1), GFP_KERNEL);

View File

@ -530,6 +530,7 @@ static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)
static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id) static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
{ {
struct sh_cmt_channel *ch = dev_id; struct sh_cmt_channel *ch = dev_id;
unsigned long flags;
/* clear flags */ /* clear flags */
sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) &
@ -560,6 +561,8 @@ static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
ch->flags &= ~FLAG_SKIPEVENT; ch->flags &= ~FLAG_SKIPEVENT;
raw_spin_lock_irqsave(&ch->lock, flags);
if (ch->flags & FLAG_REPROGRAM) { if (ch->flags & FLAG_REPROGRAM) {
ch->flags &= ~FLAG_REPROGRAM; ch->flags &= ~FLAG_REPROGRAM;
sh_cmt_clock_event_program_verify(ch, 1); sh_cmt_clock_event_program_verify(ch, 1);
@ -572,6 +575,8 @@ static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
ch->flags &= ~FLAG_IRQCONTEXT; ch->flags &= ~FLAG_IRQCONTEXT;
raw_spin_unlock_irqrestore(&ch->lock, flags);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
@ -770,12 +775,18 @@ static int sh_cmt_clock_event_next(unsigned long delta,
struct clock_event_device *ced) struct clock_event_device *ced)
{ {
struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);
unsigned long flags;
BUG_ON(!clockevent_state_oneshot(ced)); BUG_ON(!clockevent_state_oneshot(ced));
raw_spin_lock_irqsave(&ch->lock, flags);
if (likely(ch->flags & FLAG_IRQCONTEXT)) if (likely(ch->flags & FLAG_IRQCONTEXT))
ch->next_match_value = delta - 1; ch->next_match_value = delta - 1;
else else
sh_cmt_set_next(ch, delta - 1); __sh_cmt_set_next(ch, delta - 1);
raw_spin_unlock_irqrestore(&ch->lock, flags);
return 0; return 0;
} }

View File

@ -58,11 +58,13 @@ obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac_mod.o
layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o
obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o
skx_edac-y := skx_common.o skx_base.o skx_edac_common-y := skx_common.o
obj-$(CONFIG_EDAC_SKX) += skx_edac.o
i10nm_edac-y := skx_common.o i10nm_base.o skx_edac-y := skx_base.o
obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o obj-$(CONFIG_EDAC_SKX) += skx_edac.o skx_edac_common.o
i10nm_edac-y := i10nm_base.o
obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o skx_edac_common.o
obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o
obj-$(CONFIG_EDAC_CELL) += cell_edac.o obj-$(CONFIG_EDAC_CELL) += cell_edac.o

View File

@ -27,6 +27,9 @@ static const char * const component_names[] = {
[INDEX_MEMCTRL] = "MemoryControllerId", [INDEX_MEMCTRL] = "MemoryControllerId",
[INDEX_CHANNEL] = "ChannelId", [INDEX_CHANNEL] = "ChannelId",
[INDEX_DIMM] = "DimmSlotId", [INDEX_DIMM] = "DimmSlotId",
[INDEX_NM_MEMCTRL] = "NmMemoryControllerId",
[INDEX_NM_CHANNEL] = "NmChannelId",
[INDEX_NM_DIMM] = "NmDimmSlotId",
}; };
static int component_indices[ARRAY_SIZE(component_names)]; static int component_indices[ARRAY_SIZE(component_names)];
@ -34,14 +37,16 @@ static int adxl_component_count;
static const char * const *adxl_component_names; static const char * const *adxl_component_names;
static u64 *adxl_values; static u64 *adxl_values;
static char *adxl_msg; static char *adxl_msg;
static unsigned long adxl_nm_bitmap;
static char skx_msg[MSG_SIZE]; static char skx_msg[MSG_SIZE];
static skx_decode_f skx_decode; static skx_decode_f skx_decode;
static skx_show_retry_log_f skx_show_retry_rd_err_log; static skx_show_retry_log_f skx_show_retry_rd_err_log;
static u64 skx_tolm, skx_tohm; static u64 skx_tolm, skx_tohm;
static LIST_HEAD(dev_edac_list); static LIST_HEAD(dev_edac_list);
static bool skx_mem_cfg_2lm;
int __init skx_adxl_get(void) int skx_adxl_get(void)
{ {
const char * const *names; const char * const *names;
int i, j; int i, j;
@ -56,14 +61,25 @@ int __init skx_adxl_get(void)
for (j = 0; names[j]; j++) { for (j = 0; names[j]; j++) {
if (!strcmp(component_names[i], names[j])) { if (!strcmp(component_names[i], names[j])) {
component_indices[i] = j; component_indices[i] = j;
if (i >= INDEX_NM_FIRST)
adxl_nm_bitmap |= 1 << i;
break; break;
} }
} }
if (!names[j]) if (!names[j] && i < INDEX_NM_FIRST)
goto err; goto err;
} }
if (skx_mem_cfg_2lm) {
if (!adxl_nm_bitmap)
skx_printk(KERN_NOTICE, "Not enough ADXL components for 2-level memory.\n");
else
edac_dbg(2, "adxl_nm_bitmap: 0x%lx\n", adxl_nm_bitmap);
}
adxl_component_names = names; adxl_component_names = names;
while (*names++) while (*names++)
adxl_component_count++; adxl_component_count++;
@ -92,14 +108,16 @@ int __init skx_adxl_get(void)
return -ENODEV; return -ENODEV;
} }
EXPORT_SYMBOL_GPL(skx_adxl_get);
void __exit skx_adxl_put(void) void skx_adxl_put(void)
{ {
kfree(adxl_values); kfree(adxl_values);
kfree(adxl_msg); kfree(adxl_msg);
} }
EXPORT_SYMBOL_GPL(skx_adxl_put);
static bool skx_adxl_decode(struct decoded_addr *res) static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_mem)
{ {
struct skx_dev *d; struct skx_dev *d;
int i, len = 0; int i, len = 0;
@ -116,11 +134,20 @@ static bool skx_adxl_decode(struct decoded_addr *res)
} }
res->socket = (int)adxl_values[component_indices[INDEX_SOCKET]]; res->socket = (int)adxl_values[component_indices[INDEX_SOCKET]];
if (error_in_1st_level_mem) {
res->imc = (adxl_nm_bitmap & BIT_NM_MEMCTRL) ?
(int)adxl_values[component_indices[INDEX_NM_MEMCTRL]] : -1;
res->channel = (adxl_nm_bitmap & BIT_NM_CHANNEL) ?
(int)adxl_values[component_indices[INDEX_NM_CHANNEL]] : -1;
res->dimm = (adxl_nm_bitmap & BIT_NM_DIMM) ?
(int)adxl_values[component_indices[INDEX_NM_DIMM]] : -1;
} else {
res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]]; res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]];
res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]]; res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]];
res->dimm = (int)adxl_values[component_indices[INDEX_DIMM]]; res->dimm = (int)adxl_values[component_indices[INDEX_DIMM]];
}
if (res->imc > NUM_IMC - 1) { if (res->imc > NUM_IMC - 1 || res->imc < 0) {
skx_printk(KERN_ERR, "Bad imc %d\n", res->imc); skx_printk(KERN_ERR, "Bad imc %d\n", res->imc);
return false; return false;
} }
@ -151,11 +178,18 @@ static bool skx_adxl_decode(struct decoded_addr *res)
return true; return true;
} }
void skx_set_mem_cfg(bool mem_cfg_2lm)
{
skx_mem_cfg_2lm = mem_cfg_2lm;
}
EXPORT_SYMBOL_GPL(skx_set_mem_cfg);
void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log) void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log)
{ {
skx_decode = decode; skx_decode = decode;
skx_show_retry_rd_err_log = show_retry_log; skx_show_retry_rd_err_log = show_retry_log;
} }
EXPORT_SYMBOL_GPL(skx_set_decode);
int skx_get_src_id(struct skx_dev *d, int off, u8 *id) int skx_get_src_id(struct skx_dev *d, int off, u8 *id)
{ {
@ -169,6 +203,7 @@ int skx_get_src_id(struct skx_dev *d, int off, u8 *id)
*id = GET_BITFIELD(reg, 12, 14); *id = GET_BITFIELD(reg, 12, 14);
return 0; return 0;
} }
EXPORT_SYMBOL_GPL(skx_get_src_id);
int skx_get_node_id(struct skx_dev *d, u8 *id) int skx_get_node_id(struct skx_dev *d, u8 *id)
{ {
@ -182,6 +217,7 @@ int skx_get_node_id(struct skx_dev *d, u8 *id)
*id = GET_BITFIELD(reg, 0, 2); *id = GET_BITFIELD(reg, 0, 2);
return 0; return 0;
} }
EXPORT_SYMBOL_GPL(skx_get_node_id);
static int get_width(u32 mtr) static int get_width(u32 mtr)
{ {
@ -247,6 +283,7 @@ int skx_get_all_bus_mappings(struct res_config *cfg, struct list_head **list)
*list = &dev_edac_list; *list = &dev_edac_list;
return ndev; return ndev;
} }
EXPORT_SYMBOL_GPL(skx_get_all_bus_mappings);
int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm) int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm)
{ {
@ -286,6 +323,7 @@ int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm)
pci_dev_put(pdev); pci_dev_put(pdev);
return -ENODEV; return -ENODEV;
} }
EXPORT_SYMBOL_GPL(skx_get_hi_lo);
static int skx_get_dimm_attr(u32 reg, int lobit, int hibit, int add, static int skx_get_dimm_attr(u32 reg, int lobit, int hibit, int add,
int minval, int maxval, const char *name) int minval, int maxval, const char *name)
@ -339,6 +377,7 @@ int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
return 1; return 1;
} }
EXPORT_SYMBOL_GPL(skx_get_dimm_info);
int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc, int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
int chan, int dimmno, const char *mod_str) int chan, int dimmno, const char *mod_str)
@ -387,6 +426,7 @@ int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
return (size == 0 || size == ~0ull) ? 0 : 1; return (size == 0 || size == ~0ull) ? 0 : 1;
} }
EXPORT_SYMBOL_GPL(skx_get_nvdimm_info);
int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev, int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
const char *ctl_name, const char *mod_str, const char *ctl_name, const char *mod_str,
@ -454,6 +494,7 @@ int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
imc->mci = NULL; imc->mci = NULL;
return rc; return rc;
} }
EXPORT_SYMBOL_GPL(skx_register_mci);
static void skx_unregister_mci(struct skx_imc *imc) static void skx_unregister_mci(struct skx_imc *imc)
{ {
@ -565,6 +606,21 @@ static void skx_mce_output_error(struct mem_ctl_info *mci,
optype, skx_msg); optype, skx_msg);
} }
static bool skx_error_in_1st_level_mem(const struct mce *m)
{
u32 errcode;
if (!skx_mem_cfg_2lm)
return false;
errcode = GET_BITFIELD(m->status, 0, 15);
if ((errcode & 0xef80) != 0x280)
return false;
return true;
}
int skx_mce_check_error(struct notifier_block *nb, unsigned long val, int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
void *data) void *data)
{ {
@ -584,7 +640,7 @@ int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
res.addr = mce->addr; res.addr = mce->addr;
if (adxl_component_count) { if (adxl_component_count) {
if (!skx_adxl_decode(&res)) if (!skx_adxl_decode(&res, skx_error_in_1st_level_mem(mce)))
return NOTIFY_DONE; return NOTIFY_DONE;
} else if (!skx_decode || !skx_decode(&res)) { } else if (!skx_decode || !skx_decode(&res)) {
return NOTIFY_DONE; return NOTIFY_DONE;
@ -618,6 +674,7 @@ int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
mce->kflags |= MCE_HANDLED_EDAC; mce->kflags |= MCE_HANDLED_EDAC;
return NOTIFY_DONE; return NOTIFY_DONE;
} }
EXPORT_SYMBOL_GPL(skx_mce_check_error);
void skx_remove(void) void skx_remove(void)
{ {
@ -653,3 +710,8 @@ void skx_remove(void)
kfree(d); kfree(d);
} }
} }
EXPORT_SYMBOL_GPL(skx_remove);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Tony Luck");
MODULE_DESCRIPTION("MC Driver for Intel server processors");

View File

@ -9,6 +9,8 @@
#ifndef _SKX_COMM_EDAC_H #ifndef _SKX_COMM_EDAC_H
#define _SKX_COMM_EDAC_H #define _SKX_COMM_EDAC_H
#include <linux/bits.h>
#define MSG_SIZE 1024 #define MSG_SIZE 1024
/* /*
@ -90,9 +92,17 @@ enum {
INDEX_MEMCTRL, INDEX_MEMCTRL,
INDEX_CHANNEL, INDEX_CHANNEL,
INDEX_DIMM, INDEX_DIMM,
INDEX_NM_FIRST,
INDEX_NM_MEMCTRL = INDEX_NM_FIRST,
INDEX_NM_CHANNEL,
INDEX_NM_DIMM,
INDEX_MAX INDEX_MAX
}; };
#define BIT_NM_MEMCTRL BIT_ULL(INDEX_NM_MEMCTRL)
#define BIT_NM_CHANNEL BIT_ULL(INDEX_NM_CHANNEL)
#define BIT_NM_DIMM BIT_ULL(INDEX_NM_DIMM)
struct decoded_addr { struct decoded_addr {
struct skx_dev *dev; struct skx_dev *dev;
u64 addr; u64 addr;
@ -124,9 +134,10 @@ typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci);
typedef bool (*skx_decode_f)(struct decoded_addr *res); typedef bool (*skx_decode_f)(struct decoded_addr *res);
typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len); typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len);
int __init skx_adxl_get(void); int skx_adxl_get(void);
void __exit skx_adxl_put(void); void skx_adxl_put(void);
void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log); void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log);
void skx_set_mem_cfg(bool mem_cfg_2lm);
int skx_get_src_id(struct skx_dev *d, int off, u8 *id); int skx_get_src_id(struct skx_dev *d, int off, u8 *id);
int skx_get_node_id(struct skx_dev *d, u8 *id); int skx_get_node_id(struct skx_dev *d, u8 *id);

View File

@ -199,9 +199,8 @@ static int mox_get_board_info(struct mox_rwtm *rwtm)
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2))
if (ret < 0) return -ETIMEDOUT;
return ret;
ret = mox_get_status(MBOX_CMD_BOARD_INFO, reply->retval); ret = mox_get_status(MBOX_CMD_BOARD_INFO, reply->retval);
if (ret == -ENODATA) { if (ret == -ENODATA) {
@ -235,9 +234,8 @@ static int mox_get_board_info(struct mox_rwtm *rwtm)
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2))
if (ret < 0) return -ETIMEDOUT;
return ret;
ret = mox_get_status(MBOX_CMD_ECDSA_PUB_KEY, reply->retval); ret = mox_get_status(MBOX_CMD_ECDSA_PUB_KEY, reply->retval);
if (ret == -ENODATA) { if (ret == -ENODATA) {
@ -274,9 +272,8 @@ static int check_get_random_support(struct mox_rwtm *rwtm)
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2))
if (ret < 0) return -ETIMEDOUT;
return ret;
return mox_get_status(MBOX_CMD_GET_RANDOM, rwtm->reply.retval); return mox_get_status(MBOX_CMD_GET_RANDOM, rwtm->reply.retval);
} }
@ -499,6 +496,7 @@ static int turris_mox_rwtm_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, rwtm); platform_set_drvdata(pdev, rwtm);
mutex_init(&rwtm->busy); mutex_init(&rwtm->busy);
init_completion(&rwtm->cmd_done);
rwtm->mbox_client.dev = dev; rwtm->mbox_client.dev = dev;
rwtm->mbox_client.rx_callback = mox_rwtm_rx_callback; rwtm->mbox_client.rx_callback = mox_rwtm_rx_callback;
@ -512,8 +510,6 @@ static int turris_mox_rwtm_probe(struct platform_device *pdev)
goto remove_files; goto remove_files;
} }
init_completion(&rwtm->cmd_done);
ret = mox_get_board_info(rwtm); ret = mox_get_board_info(rwtm);
if (ret < 0) if (ret < 0)
dev_warn(dev, "Cannot read board information: %i\n", ret); dev_warn(dev, "Cannot read board information: %i\n", ret);

View File

@ -1351,12 +1351,15 @@ static void amdgpu_ras_interrupt_process_handler(struct work_struct *work)
int amdgpu_ras_interrupt_dispatch(struct amdgpu_device *adev, int amdgpu_ras_interrupt_dispatch(struct amdgpu_device *adev,
struct ras_dispatch_if *info) struct ras_dispatch_if *info)
{ {
struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); struct ras_manager *obj;
struct ras_ih_data *data = &obj->ih_data; struct ras_ih_data *data;
obj = amdgpu_ras_find_obj(adev, &info->head);
if (!obj) if (!obj)
return -EINVAL; return -EINVAL;
data = &obj->ih_data;
if (data->inuse == 0) if (data->inuse == 0)
return 0; return 0;

View File

@ -154,6 +154,7 @@ const struct dc_plane_status *dc_plane_get_status(
if (pipe_ctx->plane_state != plane_state) if (pipe_ctx->plane_state != plane_state)
continue; continue;
if (pipe_ctx->plane_state)
pipe_ctx->plane_state->status.is_flip_pending = false; pipe_ctx->plane_state->status.is_flip_pending = false;
break; break;

View File

@ -2983,8 +2983,7 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
const struct pp_power_state *current_ps) const struct pp_power_state *current_ps)
{ {
struct amdgpu_device *adev = hwmgr->adev; struct amdgpu_device *adev = hwmgr->adev;
struct smu7_power_state *smu7_ps = struct smu7_power_state *smu7_ps;
cast_phw_smu7_power_state(&request_ps->hardware);
uint32_t sclk; uint32_t sclk;
uint32_t mclk; uint32_t mclk;
struct PP_Clocks minimum_clocks = {0}; struct PP_Clocks minimum_clocks = {0};
@ -2998,6 +2997,10 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
int32_t count; int32_t count;
int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0;
smu7_ps = cast_phw_smu7_power_state(&request_ps->hardware);
if (!smu7_ps)
return -EINVAL;
data->battery_state = (PP_StateUILabel_Battery == data->battery_state = (PP_StateUILabel_Battery ==
request_ps->classification.ui_label); request_ps->classification.ui_label);

View File

@ -1051,16 +1051,18 @@ static int smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
struct pp_power_state *prequest_ps, struct pp_power_state *prequest_ps,
const struct pp_power_state *pcurrent_ps) const struct pp_power_state *pcurrent_ps)
{ {
struct smu8_power_state *smu8_ps = struct smu8_power_state *smu8_ps;
cast_smu8_power_state(&prequest_ps->hardware); const struct smu8_power_state *smu8_current_ps;
const struct smu8_power_state *smu8_current_ps =
cast_const_smu8_power_state(&pcurrent_ps->hardware);
struct smu8_hwmgr *data = hwmgr->backend; struct smu8_hwmgr *data = hwmgr->backend;
struct PP_Clocks clocks = {0, 0, 0, 0}; struct PP_Clocks clocks = {0, 0, 0, 0};
bool force_high; bool force_high;
smu8_ps = cast_smu8_power_state(&prequest_ps->hardware);
smu8_current_ps = cast_const_smu8_power_state(&pcurrent_ps->hardware);
if (!smu8_ps || !smu8_current_ps)
return -EINVAL;
smu8_ps->need_dfs_bypass = true; smu8_ps->need_dfs_bypass = true;
data->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label); data->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label);

View File

@ -3232,8 +3232,7 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
const struct pp_power_state *current_ps) const struct pp_power_state *current_ps)
{ {
struct amdgpu_device *adev = hwmgr->adev; struct amdgpu_device *adev = hwmgr->adev;
struct vega10_power_state *vega10_ps = struct vega10_power_state *vega10_ps;
cast_phw_vega10_power_state(&request_ps->hardware);
uint32_t sclk; uint32_t sclk;
uint32_t mclk; uint32_t mclk;
struct PP_Clocks minimum_clocks = {0}; struct PP_Clocks minimum_clocks = {0};
@ -3251,6 +3250,10 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0;
uint32_t latency; uint32_t latency;
vega10_ps = cast_phw_vega10_power_state(&request_ps->hardware);
if (!vega10_ps)
return -EINVAL;
data->battery_state = (PP_StateUILabel_Battery == data->battery_state = (PP_StateUILabel_Battery ==
request_ps->classification.ui_label); request_ps->classification.ui_label);

View File

@ -1115,7 +1115,6 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
u32 status_reg; u32 status_reg;
u8 *buffer = msg->buffer; u8 *buffer = msg->buffer;
unsigned int i; unsigned int i;
int num_transferred = 0;
int ret; int ret;
/* Buffer size of AUX CH is 16 bytes */ /* Buffer size of AUX CH is 16 bytes */
@ -1167,7 +1166,6 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
reg = buffer[i]; reg = buffer[i];
writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 +
4 * i); 4 * i);
num_transferred++;
} }
} }
@ -1215,7 +1213,6 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 +
4 * i); 4 * i);
buffer[i] = (unsigned char)reg; buffer[i] = (unsigned char)reg;
num_transferred++;
} }
} }
@ -1232,7 +1229,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
(msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_READ) (msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_READ)
msg->reply = DP_AUX_NATIVE_REPLY_ACK; msg->reply = DP_AUX_NATIVE_REPLY_ACK;
return num_transferred > 0 ? num_transferred : -EBUSY; return msg->size;
aux_error: aux_error:
/* if aux err happen, reset aux */ /* if aux err happen, reset aux */

View File

@ -866,6 +866,11 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width,
kfree(modeset->mode); kfree(modeset->mode);
modeset->mode = drm_mode_duplicate(dev, mode); modeset->mode = drm_mode_duplicate(dev, mode);
if (!modeset->mode) {
ret = -ENOMEM;
break;
}
drm_connector_get(connector); drm_connector_get(connector);
modeset->connectors[modeset->num_connectors++] = connector; modeset->connectors[modeset->num_connectors++] = connector;
modeset->x = offset->x; modeset->x = offset->x;

View File

@ -364,9 +364,11 @@ static void *etnaviv_gem_vmap_impl(struct etnaviv_gem_object *obj)
static inline enum dma_data_direction etnaviv_op_to_dma_dir(u32 op) static inline enum dma_data_direction etnaviv_op_to_dma_dir(u32 op)
{ {
if (op & ETNA_PREP_READ) op &= ETNA_PREP_READ | ETNA_PREP_WRITE;
if (op == ETNA_PREP_READ)
return DMA_FROM_DEVICE; return DMA_FROM_DEVICE;
else if (op & ETNA_PREP_WRITE) else if (op == ETNA_PREP_WRITE)
return DMA_TO_DEVICE; return DMA_TO_DEVICE;
else else
return DMA_BIDIRECTIONAL; return DMA_BIDIRECTIONAL;

View File

@ -310,6 +310,9 @@ static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
if (mode_dev->panel_fixed_mode != NULL) { if (mode_dev->panel_fixed_mode != NULL) {
struct drm_display_mode *mode = struct drm_display_mode *mode =
drm_mode_duplicate(dev, mode_dev->panel_fixed_mode); drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
if (!mode)
return 0;
drm_mode_probed_add(connector, mode); drm_mode_probed_add(connector, mode);
return 1; return 1;
} }

View File

@ -508,6 +508,9 @@ static int psb_intel_lvds_get_modes(struct drm_connector *connector)
if (mode_dev->panel_fixed_mode != NULL) { if (mode_dev->panel_fixed_mode != NULL) {
struct drm_display_mode *mode = struct drm_display_mode *mode =
drm_mode_duplicate(dev, mode_dev->panel_fixed_mode); drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
if (!mode)
return 0;
drm_mode_probed_add(connector, mode); drm_mode_probed_add(connector, mode);
return 1; return 1;
} }

View File

@ -273,6 +273,41 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
return i915_error_to_vmf_fault(err); return i915_error_to_vmf_fault(err);
} }
static void set_address_limits(struct vm_area_struct *area,
struct i915_vma *vma,
unsigned long obj_offset,
unsigned long *start_vaddr,
unsigned long *end_vaddr)
{
unsigned long vm_start, vm_end, vma_size; /* user's memory parameters */
long start, end; /* memory boundaries */
/*
* Let's move into the ">> PAGE_SHIFT"
* domain to be sure not to lose bits
*/
vm_start = area->vm_start >> PAGE_SHIFT;
vm_end = area->vm_end >> PAGE_SHIFT;
vma_size = vma->size >> PAGE_SHIFT;
/*
* Calculate the memory boundaries by considering the offset
* provided by the user during memory mapping and the offset
* provided for the partial mapping.
*/
start = vm_start;
start -= obj_offset;
start += vma->ggtt_view.partial.offset;
end = start + vma_size;
start = max_t(long, start, vm_start);
end = min_t(long, end, vm_end);
/* Let's move back into the "<< PAGE_SHIFT" domain */
*start_vaddr = (unsigned long)start << PAGE_SHIFT;
*end_vaddr = (unsigned long)end << PAGE_SHIFT;
}
static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
{ {
#define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT) #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT)
@ -285,14 +320,18 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
struct i915_ggtt *ggtt = &i915->ggtt; struct i915_ggtt *ggtt = &i915->ggtt;
bool write = area->vm_flags & VM_WRITE; bool write = area->vm_flags & VM_WRITE;
struct i915_gem_ww_ctx ww; struct i915_gem_ww_ctx ww;
unsigned long obj_offset;
unsigned long start, end; /* memory boundaries */
intel_wakeref_t wakeref; intel_wakeref_t wakeref;
struct i915_vma *vma; struct i915_vma *vma;
pgoff_t page_offset; pgoff_t page_offset;
unsigned long pfn;
int srcu; int srcu;
int ret; int ret;
/* We don't use vmf->pgoff since that has the fake offset */ obj_offset = area->vm_pgoff - drm_vma_node_start(&mmo->vma_node);
page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT; page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT;
page_offset += obj_offset;
trace_i915_gem_object_fault(obj, page_offset, true, write); trace_i915_gem_object_fault(obj, page_offset, true, write);
@ -363,12 +402,14 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
if (ret) if (ret)
goto err_unpin; goto err_unpin;
set_address_limits(area, vma, obj_offset, &start, &end);
pfn = (ggtt->gmadr.start + i915_ggtt_offset(vma)) >> PAGE_SHIFT;
pfn += (start - area->vm_start) >> PAGE_SHIFT;
pfn += obj_offset - vma->ggtt_view.partial.offset;
/* Finally, remap it using the new GTT offset */ /* Finally, remap it using the new GTT offset */
ret = remap_io_mapping(area, ret = remap_io_mapping(area, start, pfn, end - start, &ggtt->iomap);
area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT),
(ggtt->gmadr.start + vma->node.start) >> PAGE_SHIFT,
min_t(u64, vma->size, area->vm_end - area->vm_start),
&ggtt->iomap);
if (ret) if (ret)
goto err_fence; goto err_fence;

View File

@ -134,7 +134,7 @@ struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev)
i2c->adapter.algo_data = &i2c->bit; i2c->adapter.algo_data = &i2c->bit;
i2c->bit.udelay = 10; i2c->bit.udelay = 10;
i2c->bit.timeout = 2; i2c->bit.timeout = usecs_to_jiffies(2200);
i2c->bit.data = i2c; i2c->bit.data = i2c;
i2c->bit.setsda = mga_gpio_setsda; i2c->bit.setsda = mga_gpio_setsda;
i2c->bit.setscl = mga_gpio_setscl; i2c->bit.setscl = mga_gpio_setscl;

View File

@ -81,7 +81,8 @@ struct drm_gem_object *nouveau_gem_prime_import_sg_table(struct drm_device *dev,
* to the caller, instead of a normal nouveau_bo ttm reference. */ * to the caller, instead of a normal nouveau_bo ttm reference. */
ret = drm_gem_object_init(dev, &nvbo->bo.base, size); ret = drm_gem_object_init(dev, &nvbo->bo.base, size);
if (ret) { if (ret) {
nouveau_bo_ref(NULL, &nvbo); drm_gem_object_release(&nvbo->bo.base);
kfree(nvbo);
obj = ERR_PTR(-ENOMEM); obj = ERR_PTR(-ENOMEM);
goto unlock; goto unlock;
} }

View File

@ -553,7 +553,11 @@ static int boe_panel_prepare(struct drm_panel *panel)
usleep_range(5000, 10000); usleep_range(5000, 10000);
if (boe->desc->lp11_before_reset) { if (boe->desc->lp11_before_reset) {
mipi_dsi_dcs_nop(boe->dsi); ret = mipi_dsi_dcs_nop(boe->dsi);
if (ret < 0) {
dev_err(&boe->dsi->dev, "Failed to send NOP: %d\n", ret);
goto poweroff;
}
usleep_range(1000, 2000); usleep_range(1000, 2000);
} }
gpiod_set_value(boe->enable_gpio, 1); gpiod_set_value(boe->enable_gpio, 1);
@ -574,13 +578,13 @@ static int boe_panel_prepare(struct drm_panel *panel)
return 0; return 0;
poweroff: poweroff:
gpiod_set_value(boe->enable_gpio, 0);
regulator_disable(boe->avee); regulator_disable(boe->avee);
poweroffavdd: poweroffavdd:
regulator_disable(boe->avdd); regulator_disable(boe->avdd);
poweroff1v8: poweroff1v8:
usleep_range(5000, 7000); usleep_range(5000, 7000);
regulator_disable(boe->pp1800); regulator_disable(boe->pp1800);
gpiod_set_value(boe->enable_gpio, 0);
return ret; return ret;
} }

View File

@ -681,3 +681,4 @@ module_platform_driver(panfrost_driver);
MODULE_AUTHOR("Panfrost Project Developers"); MODULE_AUTHOR("Panfrost Project Developers");
MODULE_DESCRIPTION("Panfrost DRM Driver"); MODULE_DESCRIPTION("Panfrost DRM Driver");
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
MODULE_SOFTDEP("pre: governor_simpleondemand");

View File

@ -232,6 +232,9 @@ static int qxl_add_mode(struct drm_connector *connector,
return 0; return 0;
mode = drm_cvt_mode(dev, width, height, 60, false, false, false); mode = drm_cvt_mode(dev, width, height, 60, false, false, false);
if (!mode)
return 0;
if (preferred) if (preferred)
mode->type |= DRM_MODE_TYPE_PREFERRED; mode->type |= DRM_MODE_TYPE_PREFERRED;
mode->hdisplay = width; mode->hdisplay = width;

View File

@ -98,7 +98,7 @@ static int vmw_overlay_send_put(struct vmw_private *dev_priv,
{ {
struct vmw_escape_video_flush *flush; struct vmw_escape_video_flush *flush;
size_t fifo_size; size_t fifo_size;
bool have_so = (dev_priv->active_display_unit == vmw_du_screen_object); bool have_so = (dev_priv->active_display_unit != vmw_du_legacy);
int i, num_items; int i, num_items;
SVGAGuestPtr ptr; SVGAGuestPtr ptr;

View File

@ -714,13 +714,12 @@ static int wacom_intuos_get_tool_type(int tool_id)
case 0x8e2: /* IntuosHT2 pen */ case 0x8e2: /* IntuosHT2 pen */
case 0x022: case 0x022:
case 0x200: /* Pro Pen 3 */ case 0x200: /* Pro Pen 3 */
case 0x04200: /* Pro Pen 3 */
case 0x10842: /* MobileStudio Pro Pro Pen slim */ case 0x10842: /* MobileStudio Pro Pro Pen slim */
case 0x14802: /* Intuos4/5 13HD/24HD Classic Pen */ case 0x14802: /* Intuos4/5 13HD/24HD Classic Pen */
case 0x16802: /* Cintiq 13HD Pro Pen */ case 0x16802: /* Cintiq 13HD Pro Pen */
case 0x18802: /* DTH2242 Pen */ case 0x18802: /* DTH2242 Pen */
case 0x10802: /* Intuos4/5 13HD/24HD General Pen */ case 0x10802: /* Intuos4/5 13HD/24HD General Pen */
case 0x80842: /* Intuos Pro and Cintiq Pro 3D Pen */ case 0x8842: /* Intuos Pro and Cintiq Pro 3D Pen */
tool_type = BTN_TOOL_PEN; tool_type = BTN_TOOL_PEN;
break; break;

View File

@ -1770,7 +1770,7 @@ static void adt7475_read_pwm(struct i2c_client *client, int index)
data->pwm[CONTROL][index] &= ~0xE0; data->pwm[CONTROL][index] &= ~0xE0;
data->pwm[CONTROL][index] |= (7 << 5); data->pwm[CONTROL][index] |= (7 << 5);
i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), i2c_smbus_write_byte_data(client, PWM_REG(index),
data->pwm[INPUT][index]); data->pwm[INPUT][index]);
i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index),

View File

@ -312,6 +312,7 @@ static ssize_t temp_store(struct device *dev,
return ret; return ret;
mutex_lock(&data->update_lock); mutex_lock(&data->update_lock);
temp = clamp_val(temp, -1000000, 1000000); /* prevent underflow */
temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset; temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset;
temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127); temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127);
data->temp[nr][index] = temp; data->temp[nr][index] = temp;
@ -429,14 +430,14 @@ static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, alarm, 20);
static SENSOR_DEVICE_ATTR_RO(temp7_max_alarm, alarm, 21); static SENSOR_DEVICE_ATTR_RO(temp7_max_alarm, alarm, 21);
static SENSOR_DEVICE_ATTR_RO(temp8_max_alarm, alarm, 23); static SENSOR_DEVICE_ATTR_RO(temp8_max_alarm, alarm, 23);
static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 14); static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 15);
static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 8); static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 8);
static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, 9); static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, 9);
static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, alarm, 10); static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, alarm, 10);
static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, alarm, 11); static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, alarm, 11);
static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, alarm, 12); static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, alarm, 12);
static SENSOR_DEVICE_ATTR_RO(temp7_crit_alarm, alarm, 13); static SENSOR_DEVICE_ATTR_RO(temp7_crit_alarm, alarm, 13);
static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 15); static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 14);
static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 1); static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 1);
static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2); static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2);

View File

@ -323,9 +323,11 @@ static int of_get_coresight_platform_data(struct device *dev,
continue; continue;
ret = of_coresight_parse_endpoint(dev, ep, pdata); ret = of_coresight_parse_endpoint(dev, ep, pdata);
if (ret) if (ret) {
of_node_put(ep);
return ret; return ret;
} }
}
return 0; return 0;
} }

View File

@ -34,6 +34,7 @@ static int smbus_do_alert(struct device *dev, void *addrp)
struct i2c_client *client = i2c_verify_client(dev); struct i2c_client *client = i2c_verify_client(dev);
struct alert_data *data = addrp; struct alert_data *data = addrp;
struct i2c_driver *driver; struct i2c_driver *driver;
int ret;
if (!client || client->addr != data->addr) if (!client || client->addr != data->addr)
return 0; return 0;
@ -47,16 +48,47 @@ static int smbus_do_alert(struct device *dev, void *addrp)
device_lock(dev); device_lock(dev);
if (client->dev.driver) { if (client->dev.driver) {
driver = to_i2c_driver(client->dev.driver); driver = to_i2c_driver(client->dev.driver);
if (driver->alert) if (driver->alert) {
/* Stop iterating after we find the device */
driver->alert(client, data->type, data->data); driver->alert(client, data->type, data->data);
else ret = -EBUSY;
} else {
dev_warn(&client->dev, "no driver alert()!\n"); dev_warn(&client->dev, "no driver alert()!\n");
} else ret = -EOPNOTSUPP;
}
} else {
dev_dbg(&client->dev, "alert with no driver\n"); dev_dbg(&client->dev, "alert with no driver\n");
ret = -ENODEV;
}
device_unlock(dev); device_unlock(dev);
/* Stop iterating after we find the device */ return ret;
return -EBUSY; }
/* Same as above, but call back all drivers with alert handler */
static int smbus_do_alert_force(struct device *dev, void *addrp)
{
struct i2c_client *client = i2c_verify_client(dev);
struct alert_data *data = addrp;
struct i2c_driver *driver;
if (!client || (client->flags & I2C_CLIENT_TEN))
return 0;
/*
* Drivers should either disable alerts, or provide at least
* a minimal handler. Lock so the driver won't change.
*/
device_lock(dev);
if (client->dev.driver) {
driver = to_i2c_driver(client->dev.driver);
if (driver->alert)
driver->alert(client, data->type, data->data);
}
device_unlock(dev);
return 0;
} }
/* /*
@ -67,6 +99,7 @@ static irqreturn_t smbus_alert(int irq, void *d)
{ {
struct i2c_smbus_alert *alert = d; struct i2c_smbus_alert *alert = d;
struct i2c_client *ara; struct i2c_client *ara;
unsigned short prev_addr = I2C_CLIENT_END; /* Not a valid address */
ara = alert->ara; ara = alert->ara;
@ -94,8 +127,25 @@ static irqreturn_t smbus_alert(int irq, void *d)
data.addr, data.data); data.addr, data.data);
/* Notify driver for the device which issued the alert */ /* Notify driver for the device which issued the alert */
device_for_each_child(&ara->adapter->dev, &data, status = device_for_each_child(&ara->adapter->dev, &data,
smbus_do_alert); smbus_do_alert);
/*
* If we read the same address more than once, and the alert
* was not handled by a driver, it won't do any good to repeat
* the loop because it will never terminate. Try again, this
* time calling the alert handlers of all devices connected to
* the bus, and abort the loop afterwards. If this helps, we
* are all set. If it doesn't, there is nothing else we can do,
* so we might as well abort the loop.
* Note: This assumes that a driver with alert handler handles
* the alert properly and clears it if necessary.
*/
if (data.addr == prev_addr && status != -EBUSY) {
device_for_each_child(&ara->adapter->dev, &data,
smbus_do_alert_force);
break;
}
prev_addr = data.addr;
} }
return IRQ_HANDLED; return IRQ_HANDLED;

View File

@ -2106,6 +2106,9 @@ int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev,
unsigned long flags; unsigned long flags;
int ret; int ret;
if (!rdma_is_port_valid(ib_dev, port))
return -EINVAL;
/* /*
* Drivers wish to call this before ib_register_driver, so we have to * Drivers wish to call this before ib_register_driver, so we have to
* setup the port data early. * setup the port data early.
@ -2114,9 +2117,6 @@ int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev,
if (ret) if (ret)
return ret; return ret;
if (!rdma_is_port_valid(ib_dev, port))
return -EINVAL;
pdata = &ib_dev->port_data[port]; pdata = &ib_dev->port_data[port];
spin_lock_irqsave(&pdata->netdev_lock, flags); spin_lock_irqsave(&pdata->netdev_lock, flags);
old_ndev = rcu_dereference_protected( old_ndev = rcu_dereference_protected(

View File

@ -370,8 +370,10 @@ EXPORT_SYMBOL(iw_cm_disconnect);
* *
* Clean up all resources associated with the connection and release * Clean up all resources associated with the connection and release
* the initial reference taken by iw_create_cm_id. * the initial reference taken by iw_create_cm_id.
*
* Returns true if and only if the last cm_id_priv reference has been dropped.
*/ */
static void destroy_cm_id(struct iw_cm_id *cm_id) static bool destroy_cm_id(struct iw_cm_id *cm_id)
{ {
struct iwcm_id_private *cm_id_priv; struct iwcm_id_private *cm_id_priv;
struct ib_qp *qp; struct ib_qp *qp;
@ -441,7 +443,7 @@ static void destroy_cm_id(struct iw_cm_id *cm_id)
iwpm_remove_mapping(&cm_id->local_addr, RDMA_NL_IWCM); iwpm_remove_mapping(&cm_id->local_addr, RDMA_NL_IWCM);
} }
(void)iwcm_deref_id(cm_id_priv); return iwcm_deref_id(cm_id_priv);
} }
/* /*
@ -452,7 +454,8 @@ static void destroy_cm_id(struct iw_cm_id *cm_id)
*/ */
void iw_destroy_cm_id(struct iw_cm_id *cm_id) void iw_destroy_cm_id(struct iw_cm_id *cm_id)
{ {
destroy_cm_id(cm_id); if (!destroy_cm_id(cm_id))
flush_workqueue(iwcm_wq);
} }
EXPORT_SYMBOL(iw_destroy_cm_id); EXPORT_SYMBOL(iw_destroy_cm_id);
@ -1036,7 +1039,7 @@ static void cm_work_handler(struct work_struct *_work)
if (!test_bit(IWCM_F_DROP_EVENTS, &cm_id_priv->flags)) { if (!test_bit(IWCM_F_DROP_EVENTS, &cm_id_priv->flags)) {
ret = process_event(cm_id_priv, &levent); ret = process_event(cm_id_priv, &levent);
if (ret) if (ret)
destroy_cm_id(&cm_id_priv->id); WARN_ON_ONCE(destroy_cm_id(&cm_id_priv->id));
} else } else
pr_debug("dropping event %d\n", levent.event); pr_debug("dropping event %d\n", levent.event);
if (iwcm_deref_id(cm_id_priv)) if (iwcm_deref_id(cm_id_priv))

View File

@ -2357,7 +2357,7 @@ static int bnxt_re_build_send_wqe(struct bnxt_re_qp *qp,
break; break;
case IB_WR_SEND_WITH_IMM: case IB_WR_SEND_WITH_IMM:
wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM; wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM;
wqe->send.imm_data = wr->ex.imm_data; wqe->send.imm_data = be32_to_cpu(wr->ex.imm_data);
break; break;
case IB_WR_SEND_WITH_INV: case IB_WR_SEND_WITH_INV:
wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV; wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV;
@ -2387,7 +2387,7 @@ static int bnxt_re_build_rdma_wqe(const struct ib_send_wr *wr,
break; break;
case IB_WR_RDMA_WRITE_WITH_IMM: case IB_WR_RDMA_WRITE_WITH_IMM:
wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM; wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM;
wqe->rdma.imm_data = wr->ex.imm_data; wqe->rdma.imm_data = be32_to_cpu(wr->ex.imm_data);
break; break;
case IB_WR_RDMA_READ: case IB_WR_RDMA_READ:
wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_READ; wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_READ;
@ -3334,7 +3334,7 @@ static void bnxt_re_process_res_shadow_qp_wc(struct bnxt_re_qp *gsi_sqp,
wc->byte_len = orig_cqe->length; wc->byte_len = orig_cqe->length;
wc->qp = &gsi_qp->ib_qp; wc->qp = &gsi_qp->ib_qp;
wc->ex.imm_data = orig_cqe->immdata; wc->ex.imm_data = cpu_to_be32(le32_to_cpu(orig_cqe->immdata));
wc->src_qp = orig_cqe->src_qp; wc->src_qp = orig_cqe->src_qp;
memcpy(wc->smac, orig_cqe->smac, ETH_ALEN); memcpy(wc->smac, orig_cqe->smac, ETH_ALEN);
if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) { if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) {
@ -3474,7 +3474,7 @@ int bnxt_re_poll_cq(struct ib_cq *ib_cq, int num_entries, struct ib_wc *wc)
continue; continue;
} }
wc->qp = &qp->ib_qp; wc->qp = &qp->ib_qp;
wc->ex.imm_data = cqe->immdata; wc->ex.imm_data = cpu_to_be32(le32_to_cpu(cqe->immdata));
wc->src_qp = cqe->src_qp; wc->src_qp = cqe->src_qp;
memcpy(wc->smac, cqe->smac, ETH_ALEN); memcpy(wc->smac, cqe->smac, ETH_ALEN);
wc->port_num = 1; wc->port_num = 1;

View File

@ -162,7 +162,7 @@ struct bnxt_qplib_swqe {
/* Send, with imm, inval key */ /* Send, with imm, inval key */
struct { struct {
union { union {
__be32 imm_data; u32 imm_data;
u32 inv_key; u32 inv_key;
}; };
u32 q_key; u32 q_key;
@ -180,7 +180,7 @@ struct bnxt_qplib_swqe {
/* RDMA write, with imm, read */ /* RDMA write, with imm, read */
struct { struct {
union { union {
__be32 imm_data; u32 imm_data;
u32 inv_key; u32 inv_key;
}; };
u64 remote_va; u64 remote_va;
@ -372,7 +372,7 @@ struct bnxt_qplib_cqe {
u16 cfa_meta; u16 cfa_meta;
u64 wr_id; u64 wr_id;
union { union {
__be32 immdata; __le32 immdata;
u32 invrkey; u32 invrkey;
}; };
u64 qp_handle; u64 qp_handle;

View File

@ -98,6 +98,7 @@
#define MR_TYPE_DMA 0x03 #define MR_TYPE_DMA 0x03
#define HNS_ROCE_FRMR_MAX_PA 512 #define HNS_ROCE_FRMR_MAX_PA 512
#define HNS_ROCE_FRMR_ALIGN_SIZE 128
#define PKEY_ID 0xffff #define PKEY_ID 0xffff
#define GUID_LEN 8 #define GUID_LEN 8
@ -267,6 +268,9 @@ enum {
#define HNS_HW_PAGE_SHIFT 12 #define HNS_HW_PAGE_SHIFT 12
#define HNS_HW_PAGE_SIZE (1 << HNS_HW_PAGE_SHIFT) #define HNS_HW_PAGE_SIZE (1 << HNS_HW_PAGE_SHIFT)
#define HNS_HW_MAX_PAGE_SHIFT 27
#define HNS_HW_MAX_PAGE_SIZE (1 << HNS_HW_MAX_PAGE_SHIFT)
struct hns_roce_uar { struct hns_roce_uar {
u64 pfn; u64 pfn;
unsigned long index; unsigned long index;

View File

@ -486,6 +486,11 @@ int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
struct hns_roce_mtr *mtr = &mr->pbl_mtr; struct hns_roce_mtr *mtr = &mr->pbl_mtr;
int ret, sg_num = 0; int ret, sg_num = 0;
if (!IS_ALIGNED(*sg_offset, HNS_ROCE_FRMR_ALIGN_SIZE) ||
ibmr->page_size < HNS_HW_PAGE_SIZE ||
ibmr->page_size > HNS_HW_MAX_PAGE_SIZE)
return sg_num;
mr->npages = 0; mr->npages = 0;
mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count, mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count,
sizeof(dma_addr_t), GFP_KERNEL); sizeof(dma_addr_t), GFP_KERNEL);

View File

@ -832,7 +832,7 @@ void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev)
int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev) int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev)
{ {
char alias_wq_name[15]; char alias_wq_name[22];
int ret = 0; int ret = 0;
int i, j; int i, j;
union ib_gid gid; union ib_gid gid;

Some files were not shown because too many files have changed in this diff Show More