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soc: qcom: edac: Remove CONFIG_EDAC_PANIC_ON_CE

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Use function hook to panic system when correctable error is detected,
so CONFIG_EDAC_PANIC_ON_CE is no more needed.

Change-Id: I19df70f449ed27e4010dae5cfd3f28557b0b99d6
Signed-off-by: Huang Yiwei <hyiwei@codeaurora.org>
This commit is contained in:
Huang Yiwei 2020-09-22 10:14:50 +08:00
parent b79bf46545
commit b388f0c33e
6 changed files with 25 additions and 78 deletions
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13
drivers/edac/Kconfig
View File

@ -493,17 +493,6 @@ config EDAC_TI
help
Support for error detection and correction on the TI SoCs.
config EDAC_PANIC_ON_CE
depends on EDAC
bool "Panic on correctable errors"
help
Forcibly cause a kernel panic if an correctable error (CE) is
detected, even though the error is (by definition) correctable and
would otherwise result in no adverse system effects. This feature reduce
debugging times on hardware which may be operating at voltages or
frequencies outside normal specification.
For production builds, you should say 'N' here.
config EDAC_KRYO_ARM64
depends on ARM64
tristate "ARM KRYO Gold and Silver L1/L2/L3/SCU Caches"
@ -516,7 +505,6 @@ config EDAC_KRYO_ARM64
config EDAC_KRYO_ARM64_PANIC_ON_CE
depends on EDAC_KRYO_ARM64
select EDAC_PANIC_ON_CE
bool "Panic on correctable errors - Kryo"
help
Forcibly cause a kernel panic on kryo if an correctable error (CE) is
@ -551,7 +539,6 @@ config EDAC_QCOM
config EDAC_QCOM_LLCC_PANIC_ON_CE
depends on EDAC_QCOM
select EDAC_PANIC_ON_CE
bool "panic on correctable errors - qcom llcc"
help
Forcibly cause kernel panic if a correctable error (CE) is

15
drivers/edac/edac_device.c
View File

@ -548,14 +548,6 @@ static inline int edac_device_get_log_ue(struct edac_device_ctl_info *edac_dev)
return edac_dev->log_ue;
}
#ifdef CONFIG_EDAC_PANIC_ON_CE
static inline int edac_device_get_panic_on_ce(struct edac_device_ctl_info
*edac_dev)
{
return edac_dev->panic_on_ce;
}
#endif
static inline int edac_device_get_panic_on_ue(struct edac_device_ctl_info
*edac_dev)
{
@ -605,13 +597,6 @@ void edac_device_handle_ce_count(struct edac_device_ctl_info *edac_dev,
"CE: %s instance: %s block: %s count: %d '%s'\n",
edac_dev->ctl_name, instance->name,
block ? block->name : "N/A", count, msg);
#ifdef CONFIG_EDAC_PANIC_ON_CE
if (edac_device_get_panic_on_ce(edac_dev))
panic("EDAC %s: CE instance: %s block %s '%s'\n",
edac_dev->ctl_name, instance->name,
block ? block->name : "N/A", msg);
#endif
}
EXPORT_SYMBOL_GPL(edac_device_handle_ce_count);

3
drivers/edac/edac_device.h
View File

@ -159,9 +159,6 @@ struct edac_device_ctl_info {
/* Per instance controls for this edac_device */
int log_ue; /* boolean for logging UEs */
int log_ce; /* boolean for logging CEs */
#ifdef CONFIG_EDAC_PANIC_ON_CE
int panic_on_ce; /* boolean for panic'ing on an CE */
#endif
int panic_on_ue; /* boolean for panic'ing on an UE */
unsigned poll_msec; /* number of milliseconds to poll interval */
unsigned long delay; /* number of jiffies for poll_msec */

34
drivers/edac/edac_device_sysfs.c
View File

@ -62,15 +62,6 @@ static ssize_t edac_device_ctl_log_ce_store(struct edac_device_ctl_info
return count;
}
#ifdef CONFIG_EDAC_PANIC_ON_CE
/* 'panic_on_ce' */
static ssize_t edac_device_ctl_panic_on_ce_show(struct edac_device_ctl_info
*ctl_info, char *data)
{
return snprintf(data, PAGE_SIZE, "%u\n", ctl_info->panic_on_ce);
}
#endif
/* 'panic_on_ue' */
static ssize_t edac_device_ctl_panic_on_ue_show(struct edac_device_ctl_info
*ctl_info, char *data)
@ -78,23 +69,6 @@ static ssize_t edac_device_ctl_panic_on_ue_show(struct edac_device_ctl_info
return sprintf(data, "%u\n", ctl_info->panic_on_ue);
}
#ifdef CONFIG_EDAC_PANIC_ON_CE
static ssize_t edac_device_ctl_panic_on_ce_store(struct edac_device_ctl_info
*ctl_info, const char *data,
size_t count)
{
unsigned long val;
/* if parameter is zero, turn off flag, if non-zero turn on flag */
if (kstrtoul(data, 0, &val) < 0)
return -EINVAL;
ctl_info->panic_on_ce = !!val;
return count;
}
#endif
static ssize_t edac_device_ctl_panic_on_ue_store(struct edac_device_ctl_info
*ctl_info, const char *data,
size_t count)
@ -182,11 +156,6 @@ CTL_INFO_ATTR(log_ue, S_IRUGO | S_IWUSR,
edac_device_ctl_log_ue_show, edac_device_ctl_log_ue_store);
CTL_INFO_ATTR(log_ce, S_IRUGO | S_IWUSR,
edac_device_ctl_log_ce_show, edac_device_ctl_log_ce_store);
#ifdef CONFIG_EDAC_PANIC_ON_CE
CTL_INFO_ATTR(panic_on_ce, 0644,
edac_device_ctl_panic_on_ce_show,
edac_device_ctl_panic_on_ce_store);
#endif
CTL_INFO_ATTR(panic_on_ue, S_IRUGO | S_IWUSR,
edac_device_ctl_panic_on_ue_show,
edac_device_ctl_panic_on_ue_store);
@ -195,9 +164,6 @@ CTL_INFO_ATTR(poll_msec, S_IRUGO | S_IWUSR,
/* Base Attributes of the EDAC_DEVICE ECC object */
static struct ctl_info_attribute *device_ctrl_attr[] = {
#ifdef CONFIG_EDAC_PANIC_ON_CE
&attr_ctl_info_panic_on_ce,
#endif
&attr_ctl_info_panic_on_ue,
&attr_ctl_info_log_ue,
&attr_ctl_info_log_ce,

21
drivers/edac/kryo_arm64_edac.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#include <linux/kernel.h>
@ -96,6 +96,15 @@ static inline void clear_errxstatus_valid(u64 val)
asm volatile("msr s3_0_c5_c4_2, %0" : : "r" (val));
}
static void kryo_edac_handle_ce(struct edac_device_ctl_info *edac_dev,
int inst_nr, int block_nr, const char *msg)
{
edac_device_handle_ce(edac_dev, inst_nr, block_nr, msg);
#ifdef CONFIG_EDAC_KRYO_ARM64_PANIC_ON_CE
panic("EDAC %s CE: %s\n", edac_dev->ctl_name, msg);
#endif
}
struct errors_edac {
const char * const msg;
void (*func)(struct edac_device_ctl_info *edac_dev,
@ -103,11 +112,11 @@ struct errors_edac {
};
static const struct errors_edac errors[] = {
{"Kryo L1 Correctable Error", edac_device_handle_ce },
{"Kryo L1 Correctable Error", kryo_edac_handle_ce },
{"Kryo L1 Uncorrectable Error", edac_device_handle_ue },
{"Kryo L2 Correctable Error", edac_device_handle_ce },
{"Kryo L2 Correctable Error", kryo_edac_handle_ce },
{"Kryo L2 Uncorrectable Error", edac_device_handle_ue },
{"L3 Correctable Error", edac_device_handle_ce },
{"L3 Correctable Error", kryo_edac_handle_ce },
{"L3 Uncorrectable Error", edac_device_handle_ue },
};
@ -475,9 +484,6 @@ static int kryo_cpu_erp_probe(struct platform_device *pdev)
drv->edev_ctl->mod_name = dev_name(dev);
drv->edev_ctl->dev_name = dev_name(dev);
drv->edev_ctl->ctl_name = "cache";
#ifdef CONFIG_EDAC_KRYO_ARM64_PANIC_ON_CE
drv->edev_ctl->panic_on_ce = ARM64_ERP_PANIC_ON_CE;
#endif
drv->edev_ctl->panic_on_ue = ARM64_ERP_PANIC_ON_UE;
drv->nb_pm.notifier_call = kryo_pmu_cpu_pm_notify;
platform_set_drvdata(pdev, drv);
@ -532,7 +538,6 @@ static int kryo_cpu_erp_remove(struct platform_device *pdev)
struct erp_drvdata *drv = dev_get_drvdata(&pdev->dev);
struct edac_device_ctl_info *edac_ctl = drv->edev_ctl;
if (drv->erp_cpu_drvdata != NULL) {
on_each_cpu(l1_l2_irq_disable, &(drv->ppi), 1);
free_percpu_irq(drv->ppi, drv->erp_cpu_drvdata);

17
drivers/edac/qcom_edac.c
View File

@ -258,6 +258,16 @@ dump_syn_reg_values(struct llcc_drv_data *drv, u32 bank, int err_type)
return qcom_llcc_clear_error_status(err_type, drv);
}
static void llcc_edac_handle_ce(struct edac_device_ctl_info *edac_dev,
int inst_nr, int block_nr, const char *msg)
{
edac_device_handle_ce(edac_dev, inst_nr, block_nr, msg);
#ifdef CONFIG_EDAC_KRYO_ARM64_PANIC_ON_CE
panic("EDAC %s CE: %s\n", edac_dev->ctl_name, msg);
#endif
}
static int
dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank)
{
@ -270,7 +280,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank)
switch (err_type) {
case LLCC_DRAM_CE:
edac_device_handle_ce(edev_ctl, 0, bank,
llcc_edac_handle_ce(edev_ctl, 0, bank,
"LLCC Data RAM correctable Error");
break;
case LLCC_DRAM_UE:
@ -278,7 +288,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank)
"LLCC Data RAM uncorrectable Error");
break;
case LLCC_TRAM_CE:
edac_device_handle_ce(edev_ctl, 0, bank,
llcc_edac_handle_ce(edev_ctl, 0, bank,
"LLCC Tag RAM correctable Error");
break;
case LLCC_TRAM_UE:
@ -372,9 +382,6 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev)
edev_ctl->dev_name = dev_name(dev);
edev_ctl->ctl_name = "llcc";
edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE;
#ifdef CONFIG_EDAC_QCOM_LLCC_PANIC_ON_CE
edev_ctl->panic_on_ce = LLCC_ERP_PANIC_ON_CE;
#endif
edev_ctl->pvt_info = llcc_driv_data;
/* Request for ecc irq */