PCI: Cleanup PCI_REBAR_CTRL_BAR_SHIFT handling
Cleanup PCI_REBAR_CTRL_BAR_SHIFT handling. That was hard coded instead of properly defined in the header for some reason. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -1193,7 +1193,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev)
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res = pdev->resource + bar_idx;
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size = order_base_2((resource_size(res) >> 20) | 1) - 1;
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ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
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ctrl |= size << 8;
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ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT;
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pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
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}
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}
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@ -3098,7 +3098,7 @@ int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
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return pos;
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pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
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return (ctrl & PCI_REBAR_CTRL_BAR_SIZE) >> 8;
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return (ctrl & PCI_REBAR_CTRL_BAR_SIZE) >> PCI_REBAR_CTRL_BAR_SHIFT;
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}
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/**
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@ -3121,7 +3121,7 @@ int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size)
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pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
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ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
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ctrl |= size << 8;
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ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT;
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pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
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return 0;
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}
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@ -960,8 +960,9 @@
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#define PCI_REBAR_CTRL 8 /* control register */
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#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */
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#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */
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#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */
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#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */
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#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */
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#define PCI_REBAR_CTRL_BAR_SHIFT 8 /* shift for BAR size */
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/* Dynamic Power Allocation */
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#define PCI_DPA_CAP 4 /* capability register */
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