Merge "icc: dt-bindings: Update endpoint IDs for interconnects for SHIMA"

This commit is contained in:
qctecmdr 2020-07-04 14:21:07 -07:00 committed by Gerrit - the friendly Code Review server
commit a665d68f73

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@ -16,50 +16,46 @@
#define MASTER_QSPI_0 7
#define MASTER_QUP_0 8
#define MASTER_QUP_1 9
#define MASTER_QUP_2 10
#define MASTER_A1NOC_CFG 11
#define MASTER_A2NOC_CFG 12
#define MASTER_A1NOC_SNOC 13
#define MASTER_A2NOC_SNOC 14
#define MASTER_CAMNOC_HF 15
#define MASTER_CAMNOC_ICP 16
#define MASTER_CAMNOC_SF 17
#define MASTER_COMPUTE_NOC 18
#define MASTER_A1NOC_CFG 10
#define MASTER_A2NOC_CFG 11
#define MASTER_A1NOC_SNOC 12
#define MASTER_A2NOC_SNOC 13
#define MASTER_CAMNOC_HF 14
#define MASTER_CAMNOC_ICP 15
#define MASTER_CAMNOC_SF 16
#define MASTER_COMPUTE_NOC 17
#define MASTER_CNOC_A2NOC 18
#define MASTER_CNOC_DC_NOC 19
#define MASTER_GEM_NOC_CFG 20
#define MASTER_GEM_NOC_CNOC 21
#define MASTER_GEM_NOC_PCIE_SNOC 22
#define MASTER_GFX3D 23
#define MASTER_CNOC_MNOC_CFG 24
#define MASTER_MNOC_HF_MEM_NOC 25
#define MASTER_MNOC_SF_MEM_NOC 26
#define MASTER_ANOC_PCIE_GEM_NOC 27
#define MASTER_SNOC_CFG 28
#define MASTER_SNOC_GC_MEM_NOC 29
#define MASTER_SNOC_SF_MEM_NOC 30
#define MASTER_VIDEO_P0 31
#define MASTER_VIDEO_PROC 32
#define MASTER_QUP_CORE_0 33
#define MASTER_QUP_CORE_1 34
#define MASTER_QUP_CORE_2 35
#define MASTER_CRYPTO 36
#define MASTER_IPA 37
#define MASTER_MDP0 38
#define MASTER_MDP1 39
#define MASTER_CDSP_PROC 40
#define MASTER_PIMEM 41
#define MASTER_ROTATOR 42
#define MASTER_GIC 43
#define MASTER_PCIE_0 44
#define MASTER_PCIE_1 45
#define MASTER_QDSS_DAP 46
#define MASTER_QDSS_ETR 47
#define MASTER_SDCC_1 48
#define MASTER_SDCC_2 49
#define MASTER_SDCC_4 50
#define MASTER_UFS_CARD 51
#define MASTER_UFS_MEM 52
#define MASTER_USB3_0 53
#define MASTER_MDP0 24
#define MASTER_MDP1 25
#define MASTER_CNOC_MNOC_CFG 26
#define MASTER_MNOC_HF_MEM_NOC 27
#define MASTER_MNOC_SF_MEM_NOC 28
#define MASTER_ANOC_PCIE_GEM_NOC 29
#define MASTER_SNOC_CFG 30
#define MASTER_SNOC_GC_MEM_NOC 31
#define MASTER_SNOC_SF_MEM_NOC 32
#define MASTER_VIDEO_P0 33
#define MASTER_VIDEO_PROC 34
#define MASTER_QUP_CORE_0 35
#define MASTER_QUP_CORE_1 36
#define MASTER_CRYPTO 37
#define MASTER_IPA 38
#define MASTER_CDSP_PROC 39
#define MASTER_PIMEM 40
#define MASTER_GIC 41
#define MASTER_PCIE_0 42
#define MASTER_PCIE_1 43
#define MASTER_QDSS_DAP 44
#define MASTER_QDSS_ETR 45
#define MASTER_SDCC_2 46
#define MASTER_SDCC_4 47
#define MASTER_UFS_MEM 48
#define MASTER_USB3_0 49
#define SLAVE_EBI1 512
#define SLAVE_AHB2PHY_SOUTH 513
#define SLAVE_AHB2PHY_NORTH 514
@ -69,86 +65,88 @@
#define SLAVE_CLK_CTL 518
#define SLAVE_CDSP_CFG 519
#define SLAVE_RBCPR_CX_CFG 520
#define SLAVE_RBCPR_MMCX_CFG 521
#define SLAVE_RBCPR_MX_CFG 522
#define SLAVE_CRYPTO_0_CFG 523
#define SLAVE_CX_RDPM 524
#define SLAVE_DCC_CFG 525
#define SLAVE_DISPLAY_CFG 526
#define SLAVE_GFX3D_CFG 527
#define SLAVE_HWKM 528
#define SLAVE_IMEM_CFG 529
#define SLAVE_IPA_CFG 530
#define SLAVE_IPC_ROUTER_CFG 531
#define SLAVE_LLCC_CFG 532
#define SLAVE_LPASS 533
#define SLAVE_LPASS_CORE_CFG 534
#define SLAVE_LPASS_LPI_CFG 535
#define SLAVE_LPASS_MPU_CFG 536
#define SLAVE_LPASS_TOP_CFG 537
#define SLAVE_MSS_PROC_MS_MPU_CFG 538
#define SLAVE_MCDMA_MS_MPU_CFG 539
#define SLAVE_CNOC_MSS 540
#define SLAVE_MX_RDPM 541
#define SLAVE_PCIE_0_CFG 542
#define SLAVE_PCIE_1_CFG 543
#define SLAVE_PDM 544
#define SLAVE_PIMEM_CFG 545
#define SLAVE_PKA_WRAPPER_CFG 546
#define SLAVE_PMU_WRAPPER_CFG 547
#define SLAVE_QDSS_CFG 548
#define SLAVE_QSPI_0 549
#define SLAVE_QUP_0 550
#define SLAVE_QUP_1 551
#define SLAVE_QUP_2 552
#define SLAVE_SDCC_1 553
#define SLAVE_SDCC_2 554
#define SLAVE_SDCC_4 555
#define SLAVE_SECURITY 556
#define SLAVE_SPSS_CFG 557
#define SLAVE_TCSR 558
#define SLAVE_TLMM 559
#define SLAVE_UFS_CARD_CFG 560
#define SLAVE_UFS_MEM_CFG 561
#define SLAVE_USB3_0 562
#define SLAVE_VENUS_CFG 563
#define SLAVE_VSENSE_CTRL_CFG 564
#define SLAVE_A1NOC_CFG 565
#define SLAVE_A1NOC_SNOC 566
#define SLAVE_A2NOC_CFG 567
#define SLAVE_A2NOC_SNOC 568
#define SLAVE_DDRSS_CFG 569
#define SLAVE_GEM_NOC_CNOC 570
#define SLAVE_GEM_NOC_CFG 571
#define SLAVE_SNOC_GEM_NOC_GC 572
#define SLAVE_SNOC_GEM_NOC_SF 573
#define SLAVE_LLCC 574
#define SLAVE_MNOC_HF_MEM_NOC 575
#define SLAVE_MNOC_SF_MEM_NOC 576
#define SLAVE_CNOC_MNOC_CFG 577
#define SLAVE_CDSP_MEM_NOC 578
#define SLAVE_MEM_NOC_PCIE_SNOC 579
#define SLAVE_ANOC_PCIE_GEM_NOC 580
#define SLAVE_SNOC_CFG 581
#define SLAVE_QUP_CORE_0 582
#define SLAVE_QUP_CORE_1 583
#define SLAVE_BOOT_IMEM 584
#define SLAVE_IMEM 585
#define SLAVE_PIMEM 586
#define SLAVE_SERVICE_NSP_NOC 587
#define SLAVE_SERVICE_A1NOC 588
#define SLAVE_SERVICE_A2NOC 589
#define SLAVE_SERVICE_CNOC 590
#define SLAVE_SERVICE_GEM_NOC_1 591
#define SLAVE_SERVICE_MNOC 592
#define SLAVE_SERVICES_LPASS_AML_NOC 593
#define SLAVE_SERVICE_LPASS_AG_NOC 594
#define SLAVE_SERVICE_GEM_NOC_2 595
#define SLAVE_SERVICE_SNOC 596
#define SLAVE_SERVICE_GEM_NOC 597
#define SLAVE_PCIE_0 598
#define SLAVE_PCIE_1 599
#define SLAVE_QDSS_STM 600
#define SLAVE_TCU 601
#define SLAVE_RBCPR_MXC_CFG 521
#define SLAVE_CRYPTO_0_CFG 522
#define SLAVE_CX_RDPM 523
#define SLAVE_DCC_CFG 524
#define SLAVE_DISPLAY_CFG 525
#define SLAVE_GFX3D_CFG 526
#define SLAVE_HWKM 527
#define SLAVE_IMEM_CFG 528
#define SLAVE_IPA_CFG 529
#define SLAVE_IPC_ROUTER_CFG 530
#define SLAVE_LLCC_CFG 531
#define SLAVE_LPASS 532
#define SLAVE_LPASS_CORE_CFG 533
#define SLAVE_LPASS_LPI_CFG 534
#define SLAVE_LPASS_MPU_CFG 535
#define SLAVE_LPASS_TOP_CFG 536
#define SLAVE_MSS_PROC_MS_MPU_CFG 537
#define SLAVE_MCDMA_MS_MPU_CFG 538
#define SLAVE_CNOC_MSS 539
#define SLAVE_MX_RDPM 540
#define SLAVE_PCIE_0_CFG 541
#define SLAVE_PCIE_1_CFG 542
#define SLAVE_PDM 543
#define SLAVE_PIMEM_CFG 544
#define SLAVE_PKA_WRAPPER_CFG 545
#define SLAVE_PMU_WRAPPER_CFG 546
#define SLAVE_QDSS_CFG 547
#define SLAVE_QSPI_0 548
#define SLAVE_QUP_0 549
#define SLAVE_QUP_1 550
#define SLAVE_SDC_1 551
#define SLAVE_SDCC_2 552
#define SLAVE_SDCC_4 553
#define SLAVE_SECURITY 554
#define SLAVE_TCSR 555
#define SLAVE_TLMM 556
#define SLAVE_UFS_MEM_CFG 557
#define SLAVE_USB3_0 558
#define SLAVE_VENUS_CFG 559
#define SLAVE_VSENSE_CTRL_CFG 560
#define SLAVE_A1NOC_CFG 561
#define SLAVE_A1NOC_SNOC 562
#define SLAVE_A2NOC_CFG 563
#define SLAVE_A2NOC_SNOC 564
#define SLAVE_CNOC_A2NOC 565
#define SLAVE_DDRSS_CFG 566
#define SLAVE_GEM_NOC_CNOC 567
#define SLAVE_GEM_NOC_CFG 568
#define SLAVE_SNOC_GEM_NOC_GC 569
#define SLAVE_SNOC_GEM_NOC_SF 570
#define SLAVE_LLCC 571
#define SLAVE_MNOC_HF_MEM_NOC 572
#define SLAVE_MNOC_SF_MEM_NOC 573
#define SLAVE_CNOC_MNOC_CFG 574
#define SLAVE_CDSP_MEM_NOC 575
#define SLAVE_MEM_NOC_PCIE_SNOC 576
#define SLAVE_ANOC_PCIE_GEM_NOC 577
#define SLAVE_SNOC_CFG 578
#define SLAVE_QUP_CORE_0 579
#define SLAVE_QUP_CORE_1 580
#define SLAVE_BOOT_IMEM 581
#define SLAVE_IMEM 582
#define SLAVE_PIMEM 583
#define SLAVE_SERVICE_NSP_NOC 584
#define SLAVE_SERVICE_A1NOC 585
#define SLAVE_SERVICE_A2NOC 586
#define SLAVE_SERVICE_GEM_NOC_1 587
#define SLAVE_SERVICE_MNOC 588
#define SLAVE_SERVICES_LPASS_AML_NOC 589
#define SLAVE_SERVICE_LPASS_AG_NOC 590
#define SLAVE_SERVICE_GEM_NOC_2 591
#define SLAVE_SERVICE_SNOC 592
#define SLAVE_SERVICE_GEM_NOC 593
#define SLAVE_PCIE_0 594
#define SLAVE_PCIE_1 595
#define SLAVE_QDSS_STM 596
#define SLAVE_TCU 597
#define MASTER_LLCC_DISP 1000
#define MASTER_MDP0_DISP 1001
#define MASTER_MDP1_DISP 1002
#define MASTER_MNOC_HF_MEM_NOC_DISP 1003
#define SLAVE_EBI1_DISP 1512
#define SLAVE_LLCC_DISP 1513
#define SLAVE_MNOC_HF_MEM_NOC_DISP 1514
#endif