android/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Qualcomm ARM64 DT updates for v5.10

Browse Source 
Cleanup, refactor and modernize MSM8916 by sorting nodes, moving device
 and platform specific parts to their respective files, add and use
 labels for reference nodes and use IRQ defines. Migrate TCSR mutex off
 the depricated binding, add resin node for PM8916.
 
 Add LPASS clock controller for SC7180. Fix the LLCC reg, increase
 interconnect-cells, drop flags on MDSS irqs. Add interconnects for
 display, eMMC and SD-card, specify 'sustainable_power' for CPU thermal
 zones, improve pinconf states related to UART and Bluetooth. Add new DT
 for Lazor and Trogdor.
 
 Increase #interconnect-cells for SDM845 to allow tags, add OPP tables
 and power-domains for Venus and interconnects for display. Fix the ports
 on the HDMI nodes for DB845c and add DT for the Xiaomi Poco F1.
 
 Add interconnect providers, fix up primary USB's clock and use
 dt-binding defines for GPU clocks on SM8150.
 
 Add interconnect providers, CPUfreq, thermal configuration and missing
 uarts for SM8250. Fix up naming of debug uart, add always-on supply
 clock to gcc, fix up the sleep clock rate and define OPP tables for all
 QUP devices. Then add a new DeviceTree for the QRB5165 RB5 board.
 
 Enable watchdog on IPQ8074 and use the appropriate compatible for the
 PMU node. Enable DVFS support for IPQ6018.
 
 Finally correct the spelling of "interrupts" in MSM8992 uart node, fix
 missing # in PM660 #interrupt-cells, add second VFE power-domain to
 camss in MSM8996 and sort the Makefile.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl9sGmAbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F7n4QANwKflwOuE+KDK5/SCNb
 T7xYWw8ZV1GylHh3E52I42EmpkNDojepBUcjGMy+CZecZzD6cmivKRPu//X6GYzE
 MCE+1Z6pUugiDFpcQ2xuY62H1nw+52FeiF9Ze9lITvsKv6nGb+9iVjwU34PXGxuj
 uzUCTwqjF/At52zEO+nU0GoN51r3KZgnQEaI/dgTiSV5m0mb8eIG29oq0qB7RTno
 mcM8SWcewUHJOJP0/MzdFVE1Vp1MyiL5U7ilKKCCBg5U2Jwzif7Ugv5ZqR3wQ1vD
 I3Si9WaLechmCUPWsc6xuysreIdzUrWg37gL+FUdWLj+eWQw6NWjdJDZQM/Zr1DC
 XLxHYVliVr164XwTbZOR+JjaJKBOd1b399N8PKGaDYmlHZqP4L81LbfNvB3rkH2o
 Y1NuKksicUWt9E6+tAIIceBxBbUW4T2z4FEqwd4edFYxknAk/kr0iVT796Unv9lT
 mcsZW7zjN7ob1hqRlUNgPk/u8zASz0/7kGTEyJAbf8Q8MsJSkqvteJpFo0xcVM0W
 ty0sC8g7yGgEkuz9Ou5KIXT/5ulinhR+NjoBi1bG8mtgkDnw4k2hyEIpNbuWx5iP
 7CjM5ECDV5DK+Q1IXLDyQfrpUIRs9u9QOhoGuNvEztl9q/irJo26m0EEUrIoEgMI
 mH/AQkwMrY2x9aXGhtAjOxW9
 =yiGd
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for v5.10

Cleanup, refactor and modernize MSM8916 by sorting nodes, moving device
and platform specific parts to their respective files, add and use
labels for reference nodes and use IRQ defines. Migrate TCSR mutex off
the depricated binding, add resin node for PM8916.

Add LPASS clock controller for SC7180. Fix the LLCC reg, increase
interconnect-cells, drop flags on MDSS irqs. Add interconnects for
display, eMMC and SD-card, specify 'sustainable_power' for CPU thermal
zones, improve pinconf states related to UART and Bluetooth. Add new DT
for Lazor and Trogdor.

Increase #interconnect-cells for SDM845 to allow tags, add OPP tables
and power-domains for Venus and interconnects for display. Fix the ports
on the HDMI nodes for DB845c and add DT for the Xiaomi Poco F1.

Add interconnect providers, fix up primary USB's clock and use
dt-binding defines for GPU clocks on SM8150.

Add interconnect providers, CPUfreq, thermal configuration and missing
uarts for SM8250. Fix up naming of debug uart, add always-on supply
clock to gcc, fix up the sleep clock rate and define OPP tables for all
QUP devices. Then add a new DeviceTree for the QRB5165 RB5 board.

Enable watchdog on IPQ8074 and use the appropriate compatible for the
PMU node. Enable DVFS support for IPQ6018.

Finally correct the spelling of "interrupts" in MSM8992 uart node, fix
missing # in PM660 #interrupt-cells, add second VFE power-domain to
camss in MSM8996 and sort the Makefile.

* tag 'qcom-arm64-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (75 commits)
  arm64: dts: qcom: sm8250: Add thermal zones and throttling support
  arm64: dts: qcom: sm8250: Add cpufreq hw node
  arm64: dts: qcom: sdm845: Add interconnects property for display
  arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider
  arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider
  arm64: dts: qcom: sm8250: add interconnect nodes
  arm64: dts: qcom: sm8150: add interconnect nodes
  arm64: dts: qcom: sc7180: Increase the number of interconnect cells
  arm64: dts: qcom: sdm845: Increase the number of interconnect cells
  arm64: dts: qcom: Makefile: Sort lines
  arm64: dts: qcom: pm8916: Sort nodes
  arm64: dts: qcom: msm8916: Sort nodes
  arm64: dts: qcom: msm8916: Pad addresses
  arm64: dts: qcom: msm8916: Rename "x-smp2p" to "smp2p-x"
  arm64: dts: qcom: msm8916: Use more generic node names
  arm64: dts: qcom: msm8916: Add MSM8916-specific compatibles to SCM/MSS
  arm64: dts: qcom: msm8916: Minor style fixes
  arm64: dts: qcom: msm8916: Drop qcom,tcsr-mutex syscon
  arm64: dts: qcom: msm8916: Use IRQ defines, add IRQ types
  arm64: dts: qcom: msm8916: Fix MDP/DSI interrupts
  ...

Link: https://lore.kernel.org/r/20200924040607.180039-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-09-26 10:21:19 -07:00
commit a1c259cdb0
38 changed files with 6865 additions and 2547 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -40,6 +40,7 @@ description: |
sdm630
sdm660
sdm845
sm8250
The 'board' element must be one of the following strings:
@ -47,6 +48,8 @@ description: |
cp01-c1
dragonboard
hk01
hk10-c1
hk10-c2
idp
liquid
mtp
@ -148,6 +151,8 @@ properties:
- items:
- enum:
- qcom,ipq8074-hk01
- qcom,ipq8074-hk10-c1
- qcom,ipq8074-hk10-c2
- const: qcom,ipq8074
- items:
@ -165,4 +170,10 @@ properties:
- qcom,ipq6018-cp01-c1
- const: qcom,ipq6018
- items:
- enum:
- qcom,qrb5165-rb5
- qcom,sm8250-mtp
- const: qcom,sm8250
...

1
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
View File

@ -16,6 +16,7 @@ maintainers:
properties:
compatible:
enum:
- qcom,ipq6018-apcs-apps-global
- qcom,ipq8074-apcs-apps-global
- qcom,msm8916-apcs-kpss-global
- qcom,msm8994-apcs-kpss-global

14
arch/arm64/boot/dts/qcom/Makefile
View File

@ -4,8 +4,8 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a3u-eur.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a5u-eur.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8992-bullhead-rev-101.dtb
@ -18,7 +18,16 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-asus-novago-tp370ql.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-kb.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
@ -30,8 +39,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb

854
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
View File

@ -3,38 +3,13 @@
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*/
#include "msm8916.dtsi"
#include "pm8916.dtsi"
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
#include <dt-bindings/sound/apq8016-lpass.h>
/*
* GPIO name legend: proper name = the GPIO line is used as GPIO
* NC = not connected (pin out but not routed from the chip to
* anything the board)
* "[PER]" = pin is muxed for [peripheral] (not GPIO)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Line names are taken from the schematic "DragonBoard410c"
* dated monday, august 31, 2015. Page 5 in particular.
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Board naming of a line and the schematic name of
* the same line are in conflict, the 96Board specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART3. This is only for the informational lines i.e. "[FOO]",
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
* ones actually used for GPIO.
*/
/ {
aliases {
serial0 = &blsp1_uart2;
@ -76,7 +51,7 @@ camera_vddd_1v5: camera-vddd-1v5 {
};
reserved-memory {
ramoops@bff00000{
ramoops@bff00000 {
compatible = "ramoops";
reg = <0x0 0xbff00000 0x0 0x100000>;
@ -86,226 +61,45 @@ ramoops@bff00000{
};
};
soc {
pinctrl@1000000 {
gpio-line-names =
"[UART0_TX]", /* GPIO_0, LSEC pin 5 */
"[UART0_RX]", /* GPIO_1, LSEC pin 7 */
"[UART0_CTS_N]", /* GPIO_2, LSEC pin 3 */
"[UART0_RTS_N]", /* GPIO_3, LSEC pin 9 */
"[UART1_TX]", /* GPIO_4, LSEC pin 11 */
"[UART1_RX]", /* GPIO_5, LSEC pin 13 */
"[I2C0_SDA]", /* GPIO_8, LSEC pin 17 */
"[I2C0_SCL]", /* GPIO_7, LSEC pin 15 */
"[SPI1_DOUT]", /* SPI1_MOSI, HSEC pin 1 */
"[SPI1_DIN]", /* SPI1_MISO, HSEC pin 11 */
"[SPI1_CS]", /* SPI1_CS_N, HSEC pin 7 */
"[SPI1_SCLK]", /* SPI1_CLK, HSEC pin 9 */
"GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */
"GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */
"[I2C3_SDA]", /* HSEC pin 38 */
"[I2C3_SCL]", /* HSEC pin 36 */
"[SPI0_MOSI]", /* LSEC pin 14 */
"[SPI0_MISO]", /* LSEC pin 10 */
"[SPI0_CS_N]", /* LSEC pin 12 */
"[SPI0_CLK]", /* LSEC pin 8 */
"HDMI_HPD_N", /* GPIO 20 */
"USR_LED_1_CTRL",
"[I2C1_SDA]", /* GPIO_22, LSEC pin 21 */
"[I2C1_SCL]", /* GPIO_23, LSEC pin 19 */
"GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */
"GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */
"[CSI0_MCLK]", /* HSEC pin 15 */
"[CSI1_MCLK]", /* HSEC pin 17 */
"GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */
"[I2C2_SDA]", /* HSEC pin 34 */
"[I2C2_SCL]", /* HSEC pin 32 */
"DSI2HDMI_INT_N",
"DSI_SW_SEL_APQ",
"GPIO-L", /* LS_EXP_GPIO_L, LSEC pin 34 */
"GPIO-J", /* LS_EXP_GPIO_J, LSEC pin 32 */
"GPIO-I", /* LS_EXP_GPIO_I, LSEC pin 31 */
"GPIO-A", /* LS_EXP_GPIO_A, LSEC pin 23 */
"FORCED_USB_BOOT",
"SD_CARD_DET_N",
"[WCSS_BT_SSBI]",
"[WCSS_WLAN_DATA_2]", /* GPIO 40 */
"[WCSS_WLAN_DATA_1]",
"[WCSS_WLAN_DATA_0]",
"[WCSS_WLAN_SET]",
"[WCSS_WLAN_CLK]",
"[WCSS_FM_SSBI]",
"[WCSS_FM_SDI]",
"[WCSS_BT_DAT_CTL]",
"[WCSS_BT_DAT_STB]",
"NC",
"NC", /* GPIO 50 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 60 */
"NC",
"NC",
"[CDC_PDM0_CLK]",
"[CDC_PDM0_SYNC]",
"[CDC_PDM0_TX0]",
"[CDC_PDM0_RX0]",
"[CDC_PDM0_RX1]",
"[CDC_PDM0_RX2]",
"GPIO-D", /* LS_EXP_GPIO_D, LSEC pin 26 */
"NC", /* GPIO 70 */
"NC",
"NC",
"NC",
"NC", /* GPIO 74 */
"NC",
"NC",
"NC",
"NC",
"NC",
"BOOT_CONFIG_0", /* GPIO 80 */
"BOOT_CONFIG_1",
"BOOT_CONFIG_2",
"BOOT_CONFIG_3",
"NC",
"NC",
"BOOT_CONFIG_5",
"NC",
"NC",
"NC",
"NC", /* GPIO 90 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 100 */
"NC",
"NC",
"NC",
"SSBI_GPS",
"NC",
"NC",
"KEY_VOLP_N",
"NC",
"NC",
"[LS_EXP_MI2S_WS]", /* GPIO 110 */
"NC",
"NC",
"[LS_EXP_MI2S_SCK]",
"[LS_EXP_MI2S_DATA0]",
"GPIO-E", /* LS_EXP_GPIO_E, LSEC pin 27 */
"NC",
"[DSI2HDMI_MI2S_WS]",
"[DSI2HDMI_MI2S_SCK]",
"[DSI2HDMI_MI2S_DATA0]",
"USR_LED_2_CTRL", /* GPIO 120 */
"SB_HS_ID";
usb2513 {
compatible = "smsc,usb3503";
reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
initial-mode = <1>;
};
dma@7884000 {
status = "okay";
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
serial@78af000 {
label = "LS-UART0";
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp1_uart1_default>;
pinctrl-1 = <&blsp1_uart1_sleep>;
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7533_out>;
};
};
};
serial@78b0000 {
label = "LS-UART1";
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp1_uart2_default>;
pinctrl-1 = <&blsp1_uart2_sleep>;
};
i2c@78b6000 {
/* On Low speed expansion */
label = "LS-I2C0";
status = "okay";
};
i2c@78b8000 {
/* On High speed expansion */
label = "HS-I2C2";
status = "okay";
adv_bridge: bridge@39 {
status = "okay";
compatible = "adi,adv7533";
reg = <0x39>;
interrupt-parent = <&msmgpio>;
interrupts = <31 2>;
adi,dsi-lanes = <4>;
clocks = <&rpmcc RPM_SMD_BB_CLK2>;
clock-names = "cec";
pd-gpios = <&msmgpio 32 0>;
avdd-supply = <&pm8916_l6>;
v1p2-supply = <&pm8916_l6>;
v3p3-supply = <&pm8916_l17>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
#sound-dai-cells = <1>;
ports {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
port@0 {
reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
pinctrl-names = "default";
pinctrl-0 = <&msm_key_volp_n_default>;
port@1 {
reg = <1>;
adv7533_out: endpoint {
remote-endpoint = <&hdmi_con>;
button@0 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
};
};
};
};
};
i2c@78ba000 {
/* On Low speed expansion */
label = "LS-I2C1";
status = "okay";
};
spi@78b7000 {
/* On High speed expansion */
label = "HS-SPI1";
status = "okay";
};
spi@78b9000 {
/* On Low speed expansion */
label = "LS-SPI0";
status = "okay";
};
leds {
pinctrl-names = "default";
@ -358,107 +152,185 @@ led@6 {
default-state = "off";
};
};
};
sdhci@7824000 {
vmmc-supply = <&pm8916_l8>;
vqmmc-supply = <&pm8916_l5>;
&blsp_dma {
status = "okay";
};
&blsp_i2c2 {
/* On Low speed expansion */
status = "okay";
label = "LS-I2C0";
};
&blsp_i2c4 {
/* On High speed expansion */
status = "okay";
label = "HS-I2C2";
adv_bridge: bridge@39 {
status = "okay";
compatible = "adi,adv7533";
reg = <0x39>;
interrupt-parent = <&msmgpio>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
adi,dsi-lanes = <4>;
clocks = <&rpmcc RPM_SMD_BB_CLK2>;
clock-names = "cec";
pd-gpios = <&msmgpio 32 GPIO_ACTIVE_HIGH>;
avdd-supply = <&pm8916_l6>;
v1p2-supply = <&pm8916_l6>;
v3p3-supply = <&pm8916_l17>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
#sound-dai-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
adv7533_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
&blsp_i2c6 {
/* On Low speed expansion */
status = "okay";
label = "LS-I2C1";
};
&blsp_spi3 {
/* On High speed expansion */
status = "okay";
label = "HS-SPI1";
};
&blsp_spi5 {
/* On Low speed expansion */
status = "okay";
label = "LS-SPI0";
};
&blsp1_uart1 {
status = "okay";
label = "LS-UART0";
};
&blsp1_uart2 {
status = "okay";
label = "LS-UART1";
};
&camss {
status = "okay";
ports {
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&ov5640_ep>;
status = "okay";
};
};
};
};
&cci {
status = "okay";
};
&cci_i2c0 {
camera_rear@3b {
compatible = "ovti,ov5640";
reg = <0x3b>;
enable-gpios = <&msmgpio 34 GPIO_ACTIVE_HIGH>;
reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
clock-frequency = <23880000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v8>;
vddd-supply = <&camera_vddd_1v5>;
/* No camera mezzanine by default */
status = "disabled";
port {
ov5640_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
&dsi0_out {
data-lanes = <0 1 2 3>;
remote-endpoint = <&adv7533_in>;
};
&lpass {
status = "okay";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
&pronto {
status = "okay";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
status = "okay";
};
};
sdhci@7864000 {
vmmc-supply = <&pm8916_l11>;
vqmmc-supply = <&pm8916_l12>;
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 0x1>;
status = "okay";
};
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
usb@78d9000 {
extcon = <&usb_id>, <&usb_id>;
status = "okay";
adp-disable;
hnp-disable;
srp-disable;
dr_mode = "otg";
pinctrl-names = "default", "device";
pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>;
pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>;
ulpi {
phy {
v1p8-supply = <&pm8916_l7>;
v3p3-supply = <&pm8916_l13>;
extcon = <&usb_id>;
};
};
};
lpass@7708000 {
status = "okay";
};
mdss@1a00000 {
&sound {
status = "okay";
mdp@1a01000 {
status = "okay";
};
dsi@1a98000 {
status = "okay";
vdda-supply = <&pm8916_l2>;
vddio-supply = <&pm8916_l6>;
ports {
port@1 {
endpoint {
remote-endpoint = <&adv7533_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
dsi-phy@1a98300 {
status = "okay";
vddio-supply = <&pm8916_l6>;
};
};
lpass_codec: codec{
status = "okay";
};
/*
Internal Codec
playback - Primary MI2S
capture - Ter MI2S
External Primary:
playback - secondary MI2S
capture - Quat MI2S
External Secondary:
playback - Quat MI2S
capture - Quat MI2S
*/
sound: sound {
compatible = "qcom,apq8016-sbc-sndcard";
reg = <0x07702000 0x4>, <0x07702004 0x4>;
reg-names = "mic-iomux", "spkr-iomux";
status = "okay";
pinctrl-0 = <&cdc_pdm_lines_act &ext_sec_tlmm_lines_act &ext_mclk_tlmm_lines_act>;
pinctrl-1 = <&cdc_pdm_lines_sus &ext_sec_tlmm_lines_sus &ext_mclk_tlmm_lines_sus>;
pinctrl-names = "default", "sleep";
@ -496,168 +368,50 @@ codec {
sound-dai = <&lpass_codec 1>, <&wcd_codec 1>;
};
};
};
};
spmi@200f000 {
pm8916@0 {
gpios@c000 {
gpio-line-names =
"USR_LED_3_CTRL",
"USR_LED_4_CTRL",
"USB_HUB_RESET_N_PM",
"USB_SW_SEL_PM";
};
mpps@a000 {
gpio-line-names =
"VDD_PX_BIAS",
"WLAN_LED_CTRL",
"BT_LED_CTRL",
"GPIO-F"; /* LS_EXP_GPIO_F, LSEC pin 28 */
};
};
};
wcnss@a21b000 {
&usb {
status = "okay";
};
extcon = <&usb_id>, <&usb_id>;
tpiu@820000 { status = "okay"; };
funnel@821000 { status = "okay"; };
replicator@824000 { status = "okay"; };
etf@825000 { status = "okay"; };
etr@826000 { status = "okay"; };
funnel@841000 { status = "okay"; };
debug@850000 { status = "okay"; };
debug@852000 { status = "okay"; };
debug@854000 { status = "okay"; };
debug@856000 { status = "okay"; };
etm@85c000 { status = "okay"; };
etm@85d000 { status = "okay"; };
etm@85e000 { status = "okay"; };
etm@85f000 { status = "okay"; };
cti@810000 { status = "okay"; };
cti@811000 { status = "okay"; };
cti@858000 { status = "okay"; };
cti@859000 { status = "okay"; };
cti@85a000 { status = "okay"; };
cti@85b000 { status = "okay"; };
};
usb2513 {
compatible = "smsc,usb3503";
reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
initial-mode = <1>;
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7533_out>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&msm_key_volp_n_default>;
button@0 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
};
};
pinctrl-names = "default", "device";
pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>;
pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>;
};
&camss {
status = "ok";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&ov5640_ep>;
status = "okay";
};
};
};
};
&cci {
status = "ok";
};
&cci_i2c0 {
camera_rear@3b {
compatible = "ovti,ov5640";
reg = <0x3b>;
enable-gpios = <&msmgpio 34 GPIO_ACTIVE_HIGH>;
reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
clock-frequency = <23880000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v8>;
vddd-supply = <&camera_vddd_1v5>;
/* No camera mezzanine by default */
status = "disabled";
port {
ov5640_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
&spmi_bus {
pm8916_0: pm8916@0 {
pon@800 {
resin {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_VOLUMEDOWN>;
};
};
};
&usb_hs_phy {
extcon = <&usb_id>;
};
&wcd_codec {
status = "okay";
clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
clock-names = "mclk";
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
};
/* Enable CoreSight */
&cti0 { status = "okay"; };
&cti1 { status = "okay"; };
&cti12 { status = "okay"; };
&cti13 { status = "okay"; };
&cti14 { status = "okay"; };
&cti15 { status = "okay"; };
&debug0 { status = "okay"; };
&debug1 { status = "okay"; };
&debug2 { status = "okay"; };
&debug3 { status = "okay"; };
&etf { status = "okay"; };
&etm0 { status = "okay"; };
&etm1 { status = "okay"; };
&etm2 { status = "okay"; };
&etm3 { status = "okay"; };
&etr { status = "okay"; };
&funnel0 { status = "okay"; };
&funnel1 { status = "okay"; };
&replicator { status = "okay"; };
&tpiu { status = "okay"; };
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
@ -795,7 +549,155 @@ &i2c6_default {
drive-strength = <16>;
};
/*
* GPIO name legend: proper name = the GPIO line is used as GPIO
* NC = not connected (pin out but not routed from the chip to
* anything the board)
* "[PER]" = pin is muxed for [peripheral] (not GPIO)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Line names are taken from the schematic "DragonBoard410c"
* dated monday, august 31, 2015. Page 5 in particular.
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Board naming of a line and the schematic name of
* the same line are in conflict, the 96Board specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART3. This is only for the informational lines i.e. "[FOO]",
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
* ones actually used for GPIO.
*/
&msmgpio {
gpio-line-names =
"[UART0_TX]", /* GPIO_0, LSEC pin 5 */
"[UART0_RX]", /* GPIO_1, LSEC pin 7 */
"[UART0_CTS_N]", /* GPIO_2, LSEC pin 3 */
"[UART0_RTS_N]", /* GPIO_3, LSEC pin 9 */
"[UART1_TX]", /* GPIO_4, LSEC pin 11 */
"[UART1_RX]", /* GPIO_5, LSEC pin 13 */
"[I2C0_SDA]", /* GPIO_8, LSEC pin 17 */
"[I2C0_SCL]", /* GPIO_7, LSEC pin 15 */
"[SPI1_DOUT]", /* SPI1_MOSI, HSEC pin 1 */
"[SPI1_DIN]", /* SPI1_MISO, HSEC pin 11 */
"[SPI1_CS]", /* SPI1_CS_N, HSEC pin 7 */
"[SPI1_SCLK]", /* SPI1_CLK, HSEC pin 9 */
"GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */
"GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */
"[I2C3_SDA]", /* HSEC pin 38 */
"[I2C3_SCL]", /* HSEC pin 36 */
"[SPI0_MOSI]", /* LSEC pin 14 */
"[SPI0_MISO]", /* LSEC pin 10 */
"[SPI0_CS_N]", /* LSEC pin 12 */
"[SPI0_CLK]", /* LSEC pin 8 */
"HDMI_HPD_N", /* GPIO 20 */
"USR_LED_1_CTRL",
"[I2C1_SDA]", /* GPIO_22, LSEC pin 21 */
"[I2C1_SCL]", /* GPIO_23, LSEC pin 19 */
"GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */
"GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */
"[CSI0_MCLK]", /* HSEC pin 15 */
"[CSI1_MCLK]", /* HSEC pin 17 */
"GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */
"[I2C2_SDA]", /* HSEC pin 34 */
"[I2C2_SCL]", /* HSEC pin 32 */
"DSI2HDMI_INT_N",
"DSI_SW_SEL_APQ",
"GPIO-L", /* LS_EXP_GPIO_L, LSEC pin 34 */
"GPIO-J", /* LS_EXP_GPIO_J, LSEC pin 32 */
"GPIO-I", /* LS_EXP_GPIO_I, LSEC pin 31 */
"GPIO-A", /* LS_EXP_GPIO_A, LSEC pin 23 */
"FORCED_USB_BOOT",
"SD_CARD_DET_N",
"[WCSS_BT_SSBI]",
"[WCSS_WLAN_DATA_2]", /* GPIO 40 */
"[WCSS_WLAN_DATA_1]",
"[WCSS_WLAN_DATA_0]",
"[WCSS_WLAN_SET]",
"[WCSS_WLAN_CLK]",
"[WCSS_FM_SSBI]",
"[WCSS_FM_SDI]",
"[WCSS_BT_DAT_CTL]",
"[WCSS_BT_DAT_STB]",
"NC",
"NC", /* GPIO 50 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 60 */
"NC",
"NC",
"[CDC_PDM0_CLK]",
"[CDC_PDM0_SYNC]",
"[CDC_PDM0_TX0]",
"[CDC_PDM0_RX0]",
"[CDC_PDM0_RX1]",
"[CDC_PDM0_RX2]",
"GPIO-D", /* LS_EXP_GPIO_D, LSEC pin 26 */
"NC", /* GPIO 70 */
"NC",
"NC",
"NC",
"NC", /* GPIO 74 */
"NC",
"NC",
"NC",
"NC",
"NC",
"BOOT_CONFIG_0", /* GPIO 80 */
"BOOT_CONFIG_1",
"BOOT_CONFIG_2",
"BOOT_CONFIG_3",
"NC",
"NC",
"BOOT_CONFIG_5",
"NC",
"NC",
"NC",
"NC", /* GPIO 90 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 100 */
"NC",
"NC",
"NC",
"SSBI_GPS",
"NC",
"NC",
"KEY_VOLP_N",
"NC",
"NC",
"[LS_EXP_MI2S_WS]", /* GPIO 110 */
"NC",
"NC",
"[LS_EXP_MI2S_SCK]",
"[LS_EXP_MI2S_DATA0]",
"GPIO-E", /* LS_EXP_GPIO_E, LSEC pin 27 */
"NC",
"[DSI2HDMI_MI2S_WS]",
"[DSI2HDMI_MI2S_SCK]",
"[DSI2HDMI_MI2S_DATA0]",
"USR_LED_2_CTRL", /* GPIO 120 */
"SB_HS_ID";
msmgpio_leds: msmgpio-leds {
pins = "gpio21", "gpio120";
function = "gpio";
@ -855,6 +757,12 @@ msm_key_volp_n_default: msm-key-volp-n-default {
};
&pm8916_gpios {
gpio-line-names =
"USR_LED_3_CTRL",
"USR_LED_4_CTRL",
"USB_HUB_RESET_N_PM",
"USB_SW_SEL_PM";
usb_hub_reset_pm: usb-hub-reset-pm {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
@ -897,6 +805,12 @@ pm8916_gpios_leds: pm8916-gpios-leds {
};
&pm8916_mpps {
gpio-line-names =
"VDD_PX_BIAS",
"WLAN_LED_CTRL",
"BT_LED_CTRL",
"GPIO-F"; /* LS_EXP_GPIO_F, LSEC pin 28 */
pinctrl-names = "default";
pinctrl-0 = <&ls_exp_gpio_f>;

6
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
View File

@ -26,18 +26,18 @@ chosen {
&blsp1_uart3 {
pinctrl-0 = <&serial_3_pins>;
pinctrl-names = "default";
status = "ok";
status = "okay";
};
&i2c_1 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "ok";
status = "okay";
};
&spi_0 {
cs-select = <0>;
status = "ok";
status = "okay";
m25p80@0 {
#address-cells = <1>;

96
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-ipq6018.h>
#include <dt-bindings/reset/qcom,gcc-ipq6018.h>
#include <dt-bindings/clock/qcom,apss-ipq.h>
/ {
#address-cells = <2>;
@ -38,6 +39,10 @@ CPU0: cpu@0 {
reg = <0x0>;
enable-method = "psci";
next-level-cache = <&L2_0>;
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
};
CPU1: cpu@1 {
@ -46,6 +51,10 @@ CPU1: cpu@1 {
enable-method = "psci";
reg = <0x1>;
next-level-cache = <&L2_0>;
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
};
CPU2: cpu@2 {
@ -54,6 +63,10 @@ CPU2: cpu@2 {
enable-method = "psci";
reg = <0x2>;
next-level-cache = <&L2_0>;
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
};
CPU3: cpu@3 {
@ -62,6 +75,10 @@ CPU3: cpu@3 {
enable-method = "psci";
reg = <0x3>;
next-level-cache = <&L2_0>;
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq6018_s2>;
};
L2_0: l2-cache {
@ -70,6 +87,42 @@ L2_0: l2-cache {
};
};
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp-864000000 {
opp-hz = /bits/ 64 <864000000>;
opp-microvolt = <725000>;
clock-latency-ns = <200000>;
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <787500>;
clock-latency-ns = <200000>;
};
opp-1320000000 {
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt = <862500>;
clock-latency-ns = <200000>;
};
opp-1440000000 {
opp-hz = /bits/ 64 <1440000000>;
opp-microvolt = <925000>;
clock-latency-ns = <200000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <987500>;
clock-latency-ns = <200000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1062500>;
clock-latency-ns = <200000>;
};
};
firmware {
scm {
compatible = "qcom,scm";
@ -98,6 +151,11 @@ reserved-memory {
#size-cells = <2>;
ranges;
rpm_msg_ram: memory@0x60000 {
reg = <0x0 0x60000 0x0 0x6000>;
no-map;
};
tz: tz@48500000 {
reg = <0x0 0x48500000 0x0 0x00200000>;
no-map;
@ -294,12 +352,22 @@ watchdog@b017000 {
};
apcs_glb: mailbox@b111000 {
compatible = "qcom,ipq8074-apcs-apps-global";
reg = <0x0b111000 0xc>;
compatible = "qcom,ipq6018-apcs-apps-global";
reg = <0x0b111000 0x1000>;
#clock-cells = <1>;
clocks = <&a53pll>, <&xo>;
clock-names = "pll", "xo";
#mbox-cells = <1>;
};
a53pll: clock@b116000 {
compatible = "qcom,ipq6018-a53pll";
reg = <0x0b116000 0x40>;
#clock-cells = <0>;
clocks = <&xo>;
clock-names = "xo";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@ -440,4 +508,26 @@ wcss_smp2p_in: slave-kernel {
#interrupt-cells = <2>;
};
};
rpm-glink {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: glink-channel {
compatible = "qcom,rpm-ipq6018";
qcom,glink-channels = "rpm_requests";
regulators {
compatible = "qcom,rpm-mp5496-regulators";
ipq6018_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
};
};
};
};

34
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
View File

@ -27,11 +27,11 @@ memory {
};
&blsp1_i2c2 {
status = "ok";
status = "okay";
};
&blsp1_spi1 {
status = "ok";
status = "okay";
m25p80@0 {
#address-cells = <1>;
@ -43,37 +43,37 @@ m25p80@0 {
};
&blsp1_uart3 {
status = "ok";
status = "okay";
};
&blsp1_uart5 {
status = "ok";
status = "okay";
};
&pcie0 {
status = "ok";
status = "okay";
perst-gpio = <&tlmm 61 0x1>;
};
&pcie1 {
status = "ok";
status = "okay";
perst-gpio = <&tlmm 58 0x1>;
};
&pcie_phy0 {
status = "ok";
status = "okay";
};
&pcie_phy1 {
status = "ok";
status = "okay";
};
&qpic_bam {
status = "ok";
status = "okay";
};
&qpic_nand {
status = "ok";
status = "okay";
nand@0 {
reg = <0>;
@ -84,29 +84,29 @@ nand@0 {
};
&sdhc_1 {
status = "ok";
status = "okay";
};
&qusb_phy_0 {
status = "ok";
status = "okay";
};
&qusb_phy_1 {
status = "ok";
status = "okay";
};
&ssphy_0 {
status = "ok";
status = "okay";
};
&ssphy_1 {
status = "ok";
status = "okay";
};
&usb_0 {
status = "ok";
status = "okay";
};
&usb_1 {
status = "ok";
status = "okay";
};

10
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -67,7 +67,7 @@ L2_0: l2-cache {
};
pmu {
compatible = "arm,armv8-pmuv3";
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
@ -498,6 +498,14 @@ timer {
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
watchdog: watchdog@b017000 {
compatible = "qcom,kpss-wdt";
reg = <0xb017000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
clocks = <&sleep_clk>;
timeout-sec = <30>;
};
timer@b120000 {
#address-cells = <1>;
#size-cells = <1>;

106
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View File

@ -2,8 +2,7 @@
/dts-v1/;
#include "msm8916.dtsi"
#include "pm8916.dtsi"
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@ -29,61 +28,6 @@ wcnss_mem: wcnss@8b600000 {
};
};
soc {
sdhci@7824000 {
status = "okay";
vmmc-supply = <&pm8916_l8>;
vqmmc-supply = <&pm8916_l5>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
sdhci@7864000 {
status = "okay";
vmmc-supply = <&pm8916_l11>;
vqmmc-supply = <&pm8916_l12>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
non-removable;
};
serial@78b0000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp1_uart2_default>;
pinctrl-1 = <&blsp1_uart2_sleep>;
};
usb@78d9000 {
status = "okay";
dr_mode = "peripheral";
extcon = <&usb_vbus>;
hnp-disable;
srp-disable;
adp-disable;
ulpi {
phy {
extcon = <&usb_vbus>;
v1p8-supply = <&pm8916_l7>;
v3p3-supply = <&pm8916_l13>;
};
};
};
wcnss@a21b000 {
status = "okay";
};
};
// FIXME: Use extcon device provided by charger driver when available
usb_vbus: usb-vbus {
compatible = "linux,extcon-usb-gpio";
@ -108,17 +52,45 @@ volume-up {
};
};
&spmi_bus {
pm8916@0 {
pon@800 {
volume-down {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
bias-pull-up;
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
};
};
};
&pronto {
status = "okay";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
non-removable;
};
&usb {
status = "okay";
dr_mode = "peripheral";
extcon = <&usb_vbus>;
};
&usb_hs_phy {
extcon = <&usb_vbus>;
};
&smd_rpm_regulators {

16
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
View File

@ -3,8 +3,7 @@
* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
*/
#include "msm8916.dtsi"
#include "pm8916.dtsi"
#include "msm8916-pm8916.dtsi"
/ {
aliases {
@ -15,13 +14,8 @@ aliases {
chosen {
stdout-path = "serial0";
};
soc {
serial@78b0000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp1_uart2_default>;
pinctrl-1 = <&blsp1_uart2_sleep>;
};
};
};
&blsp1_uart2 {
status = "okay";
};

79
arch/arm64/boot/dts/qcom/msm8916-pm8916.dtsi Normal file
View File

@ -0,0 +1,79 @@
// SPDX-License-Identifier: GPL-2.0-only
#include "msm8916.dtsi"
#include "pm8916.dtsi"
&camss {
vdda-supply = <&pm8916_l2>;
};
&dsi0 {
vdda-supply = <&pm8916_l2>;
vddio-supply = <&pm8916_l6>;
};
&dsi_phy0 {
vddio-supply = <&pm8916_l6>;
};
&mpss {
cx-supply = <&pm8916_s1>;
mx-supply = <&pm8916_l3>;
pll-supply = <&pm8916_l7>;
};
&pronto {
vddmx-supply = <&pm8916_l3>;
vddpx-supply = <&pm8916_l7>;
iris {
vddxo-supply = <&pm8916_l7>;
vddrfa-supply = <&pm8916_s3>;
vddpa-supply = <&pm8916_l9>;
vdddig-supply = <&pm8916_l5>;
};
};
&sdhc_1 {
vmmc-supply = <&pm8916_l8>;
vqmmc-supply = <&pm8916_l5>;
};
&sdhc_2 {
vmmc-supply = <&pm8916_l11>;
vqmmc-supply = <&pm8916_l12>;
};
&usb_hs_phy {
v1p8-supply = <&pm8916_l7>;
v3p3-supply = <&pm8916_l13>;
};
&rpm_requests {
smd_rpm_regulators: pm8916-regulators {
compatible = "qcom,rpm-pm8916-regulators";
pm8916_s1: s1 {};
pm8916_s3: s3 {};
pm8916_s4: s4 {};
pm8916_l1: l1 {};
pm8916_l2: l2 {};
pm8916_l3: l3 {};
pm8916_l4: l4 {};
pm8916_l5: l5 {};
pm8916_l6: l6 {};
pm8916_l7: l7 {};
pm8916_l8: l8 {};
pm8916_l9: l9 {};
pm8916_l10: l10 {};
pm8916_l11: l11 {};
pm8916_l12: l12 {};
pm8916_l13: l13 {};
pm8916_l14: l14 {};
pm8916_l15: l15 {};
pm8916_l16: l16 {};
pm8916_l17: l17 {};
pm8916_l18: l18 {};
};
};

130
arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
#include "msm8916.dtsi"
#include "pm8916.dtsi"
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
@ -23,78 +22,6 @@ tz-apps@85500000 {
};
};
soc {
sdhci@7824000 {
status = "okay";
vmmc-supply = <&pm8916_l8>;
vqmmc-supply = <&pm8916_l5>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
sdhci@7864000 {
status = "okay";
vmmc-supply = <&pm8916_l11>;
vqmmc-supply = <&pm8916_l12>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
serial@78b0000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp1_uart2_default>;
pinctrl-1 = <&blsp1_uart2_sleep>;
};
usb@78d9000 {
status = "okay";
extcon = <&muic>, <&muic>;
hnp-disable;
srp-disable;
adp-disable;
ulpi {
phy {
extcon = <&muic>;
v1p8-supply = <&pm8916_l7>;
v3p3-supply = <&pm8916_l13>;
};
};
};
mdss@1a00000 {
dsi@1a98000 {
#address-cells = <1>;
#size-cells = <0>;
vdda-supply = <&pm8916_l2>;
vddio-supply = <&pm8916_l6>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdss_default>;
pinctrl-1 = <&mdss_sleep>;
};
dsi-phy@1a98300 {
vddio-supply = <&pm8916_l6>;
};
};
wcnss@a21b000 {
status = "okay";
};
};
gpio-keys {
compatible = "gpio-keys";
@ -154,7 +81,7 @@ i2c-muic {
#address-cells = <1>;
#size-cells = <0>;
muic: sm5502@25 {
muic: extcon@25 {
compatible = "siliconmitus,sm5502-muic";
reg = <0x25>;
@ -186,17 +113,50 @@ magnetometer@12 {
};
};
&spmi_bus {
pm8916@0 {
pon@800 {
volume-down {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
bias-pull-up;
&blsp1_uart2 {
status = "okay";
};
&dsi0 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdss_default>;
pinctrl-1 = <&mdss_sleep>;
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
};
};
};
&pronto {
status = "okay";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
&usb {
status = "okay";
extcon = <&muic>, <&muic>;
};
&usb_hs_phy {
extcon = <&muic>;
};
&smd_rpm_regulators {

10
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts
View File

@ -44,15 +44,11 @@ panel_in: endpoint {
};
};
};
};
ports {
port@1 {
dsi0_out: endpoint {
remote-endpoint = <&panel_in>;
&dsi0_out {
data-lanes = <0 1>;
};
};
};
remote-endpoint = <&panel_in>;
};
&msmgpio {

3164
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

File diff suppressed because it is too large Load Diff

2
arch/arm64/boot/dts/qcom/msm8992.dtsi
View File

@ -335,7 +335,7 @@ blsp_i2c6: i2c@f9928000 {
blsp2_uart2: serial@f995e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf995e000 0x1000>;
interrupt = <GIC_SPI 146 IRQ_TYPE_LEVEL_LOW>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_LOW>;
clock-names = "core", "iface";
clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
<&gcc GCC_BLSP2_AHB_CLK>;

3
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -1009,7 +1009,8 @@ camss: camss@a00000 {
"ispif",
"vfe0",
"vfe1";
power-domains = <&mmcc VFE0_GDSC>;
power-domains = <&mmcc VFE0_GDSC>,
<&mmcc VFE1_GDSC>;
clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
<&mmcc CAMSS_ISPIF_AHB_CLK>,
<&mmcc CAMSS_CSI0PHYTIMER_CLK>,

2
arch/arm64/boot/dts/qcom/pm660.dtsi
View File

@ -44,7 +44,7 @@ pm660_gpios: gpios@c000 {
gpio-ranges = <&pm660_gpios 0 0 13>;
#gpio-cells = <2>;
interrupt-controller;
interrupt-cells =<2>;
#interrupt-cells = <2>;
};
};
};

130
arch/arm64/boot/dts/qcom/pm8916.dtsi
View File

@ -1,24 +1,17 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pm8916_0: pm8916@0 {
pm8916_0: pmic@0 {
compatible = "qcom,pm8916", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
pon@800 {
compatible = "qcom,pm8916-pon";
reg = <0x800>;
@ -33,6 +26,14 @@ pwrkey {
linux,code = <KEY_POWER>;
};
pm8916_resin: resin {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
status = "disabled";
};
watchdog {
compatible = "qcom,pm8916-wdt";
interrupts = <0x0 0x8 6 IRQ_TYPE_EDGE_RISING>;
@ -40,15 +41,53 @@ watchdog {
};
};
pm8916_gpios: gpios@c000 {
compatible = "qcom,pm8916-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
<0 0xc1 0 IRQ_TYPE_NONE>,
<0 0xc2 0 IRQ_TYPE_NONE>,
<0 0xc3 0 IRQ_TYPE_NONE>;
pm8916_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
io-channel-names = "thermal";
#thermal-sensor-cells = <0>;
};
pm8916_vadc: adc@3100 {
compatible = "qcom,spmi-vadc";
reg = <0x3100>;
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@0 {
reg = <VADC_USBIN>;
qcom,pre-scaling = <1 10>;
};
adc-chan@7 {
reg = <VADC_VSYS>;
qcom,pre-scaling = <1 3>;
};
adc-chan@8 {
reg = <VADC_DIE_TEMP>;
};
adc-chan@9 {
reg = <VADC_REF_625MV>;
};
adc-chan@a {
reg = <VADC_REF_1250MV>;
};
adc-chan@e {
reg = <VADC_GND_REF>;
};
adc-chan@f {
reg = <VADC_VDD_VADC>;
};
};
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
pm8916_mpps: mpps@a000 {
@ -62,50 +101,19 @@ pm8916_mpps: mpps@a000 {
<0 0xa3 0 IRQ_TYPE_NONE>;
};
pm8916_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
io-channel-names = "thermal";
#thermal-sensor-cells = <0>;
};
pm8916_vadc: vadc@3100 {
compatible = "qcom,spmi-vadc";
reg = <0x3100>;
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
usb_in {
reg = <VADC_USBIN>;
qcom,pre-scaling = <1 10>;
};
vph_pwr {
reg = <VADC_VSYS>;
qcom,pre-scaling = <1 3>;
};
die_temp {
reg = <VADC_DIE_TEMP>;
};
ref_625mv {
reg = <VADC_REF_625MV>;
};
ref_1250v {
reg = <VADC_REF_1250MV>;
};
ref_gnd {
reg = <VADC_GND_REF>;
};
ref_vdd {
reg = <VADC_VDD_VADC>;
};
pm8916_gpios: gpios@c000 {
compatible = "qcom,pm8916-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
<0 0xc1 0 IRQ_TYPE_NONE>,
<0 0xc2 0 IRQ_TYPE_NONE>,
<0 0xc3 0 IRQ_TYPE_NONE>;
};
};
pm8916_1: pm8916@1 {
pm8916_1: pmic@1 {
compatible = "qcom,pm8916", "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
@ -117,9 +125,9 @@ pm8916_vib: vibrator@c000 {
status = "disabled";
};
wcd_codec: codec@f000 {
wcd_codec: audio-codec@f000 {
compatible = "qcom,pm8916-wcd-analog-codec";
reg = <0xf000 0x200>;
reg = <0xf000>;
reg-names = "pmic-codec-core";
clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
clock-names = "mclk";

2
arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts
View File

@ -13,7 +13,7 @@ / {
};
&ethernet {
status = "ok";
status = "okay";
snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
snps,reset-active-low;

12
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
View File

@ -97,7 +97,7 @@ pms405_s3: s3 {
};
&pcie {
status = "ok";
status = "okay";
perst-gpio = <&tlmm 43 GPIO_ACTIVE_LOW>;
@ -106,22 +106,22 @@ &pcie {
};
&pcie_phy {
status = "ok";
status = "okay";
vdda-vp-supply = <&vreg_l3_1p05>;
vdda-vph-supply = <&vreg_l5_1p8>;
};
&remoteproc_adsp {
status = "ok";
status = "okay";
};
&remoteproc_cdsp {
status = "ok";
status = "okay";
};
&remoteproc_wcss {
status = "ok";
status = "okay";
};
&rpm_requests {
@ -215,7 +215,7 @@ vreg_l13_3p3: l13 {
};
&sdcc1 {
status = "ok";
status = "okay";
supports-cqe;
mmc-ddr-1_8v;

686
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts Normal file
View File

@ -0,0 +1,686 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2020, Linaro Ltd.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sm8250.dtsi"
#include "pm8150.dtsi"
#include "pm8150b.dtsi"
#include "pm8150l.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Robotics RB5";
compatible = "qcom,qrb5165-rb5", "qcom,sm8250";
aliases {
serial0 = &uart12;
};
chosen {
stdout-path = "serial0:115200n8";
};
dc12v: dc12v-regulator {
compatible = "regulator-fixed";
regulator-name = "DC12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
user4 {
label = "green:user4";
gpios = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "panic-indicator";
default-state = "off";
};
wlan {
label = "yellow:wlan";
gpios = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
bt {
label = "blue:bt";
gpios = <&pm8150_gpios 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
};
vbat: vbat-regulator {
compatible = "regulator-fixed";
regulator-name = "VBAT";
vin-supply = <&vreg_l11c_3p3>;
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
};
vbat_som: vbat-som-regulator {
compatible = "regulator-fixed";
regulator-name = "VBAT_SOM";
vin-supply = <&dc12v>;
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
};
vdc_3v3: vdc-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "VDC_3V3";
vin-supply = <&dc12v>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdc_5v: vdc-5v-regulator {
compatible = "regulator-fixed";
regulator-name = "VDC_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
vin-supply = <&vreg_l11c_3p3>;
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
};
vreg_s4a_1p8: vreg-s4a-1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_s4a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
&apps_rsc {
pm8009-rpmh-regulators {
compatible = "qcom,pm8009-rpmh-regulators";
qcom,pmic-id = "f";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-l2-supply = <&vreg_s8c_1p3>;
vdd-l5-l6-supply = <&vreg_bob>;
vdd-l7-supply = <&vreg_s4a_1p8>;
vreg_l1f_1p1: ldo1 {
regulator-name = "vreg_l1f_1p1";
regulator-min-microvolt = <1104000>;
regulator-max-microvolt = <1104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2f_1p2: ldo2 {
regulator-name = "vreg_l2f_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6f_2p8: ldo6 {
regulator-name = "vreg_l6f_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7f_1p8: ldo7 {
regulator-name = "vreg_l7f_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
pm8150-rpmh-regulators {
compatible = "qcom,pm8150-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-l2-l10-supply = <&vreg_bob>;
vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p95>;
vdd-l6-l9-supply = <&vreg_s8c_1p3>;
vdd-l7-l12-l14-l15-supply = <&vreg_s5a_1p9>;
vdd-l13-l16-l17-supply = <&vreg_bob>;
vreg_l2a_3p1: ldo2 {
regulator-name = "vreg_l2a_3p1";
regulator-min-microvolt = <3072000>;
regulator-max-microvolt = <3072000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3a_0p9: ldo3 {
regulator-name = "vreg_l3a_0p9";
regulator-min-microvolt = <928000>;
regulator-max-microvolt = <932000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5a_0p88: ldo5 {
regulator-name = "vreg_l5a_0p88";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6a_1p2: ldo6 {
regulator-name = "vreg_l6a_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7a_1p7: ldo7 {
regulator-name = "vreg_l7a_1p7";
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9a_1p2: ldo9 {
regulator-name = "vreg_l9a_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10a_1p8: ldo10 {
regulator-name = "vreg_l10a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12a_1p8: ldo12 {
regulator-name = "vreg_l12a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13a_ts_3p0: ldo13 {
regulator-name = "vreg_l13a_ts_3p0";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14a_1p8: ldo14 {
regulator-name = "vreg_l14a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l15a_1p8: ldo15 {
regulator-name = "vreg_l15a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l16a_2p7: ldo16 {
regulator-name = "vreg_l16a_2p7";
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17a_3p0: ldo17 {
regulator-name = "vreg_l17a_3p0";
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l18a_0p92: ldo18 {
regulator-name = "vreg_l18a_0p92";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s5a_1p9: smps5 {
regulator-name = "vreg_s5a_1p9";
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s6a_0p95: smps6 {
regulator-name = "vreg_s6a_0p95";
regulator-min-microvolt = <920000>;
regulator-max-microvolt = <1128000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
pm8150l-rpmh-regulators {
compatible = "qcom,pm8150l-rpmh-regulators";
qcom,pmic-id = "c";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-l1-l8-supply = <&vreg_s4a_1p8>;
vdd-l2-l3-supply = <&vreg_s8c_1p3>;
vdd-l4-l5-l6-supply = <&vreg_bob>;
vdd-l7-l11-supply = <&vreg_bob>;
vdd-l9-l10-supply = <&vreg_bob>;
vdd-bob-supply = <&vph_pwr>;
vreg_bob: bob {
regulator-name = "vreg_bob";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <4000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
};
vreg_l1c_1p8: ldo1 {
regulator-name = "vreg_l1c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2c_1p2: ldo2 {
regulator-name = "vreg_l2c_1p2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3c_0p8: ldo3 {
regulator-name = "vreg_l3c_0p8";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4c_1p7: ldo4 {
regulator-name = "vreg_l4c_1p7";
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5c_1p8: ldo5 {
regulator-name = "vreg_l5c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6c_2p96: ldo6 {
regulator-name = "vreg_l6c_2p96";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_cam_vcm0_2p85: ldo7 {
regulator-name = "vreg_l7c_cam_vcm0_2p85";
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8c_1p8: ldo8 {
regulator-name = "vreg_l8c_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9c_2p96: ldo9 {
regulator-name = "vreg_l9c_2p96";
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_3p0: ldo10 {
regulator-name = "vreg_l10c_3p0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11c_3p3: ldo11 {
regulator-name = "vreg_l11c_3p3";
regulator-min-microvolt = <3296000>;
regulator-max-microvolt = <3296000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_s8c_1p3: smps8 {
regulator-name = "vreg_s8c_1p3";
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
};
/* LS-I2C0 */
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
/* LS-I2C1 */
&i2c15 {
status = "okay";
};
&pm8150_gpios {
gpio-reserved-ranges = <1 1>, <3 2>, <7 1>;
gpio-line-names =
"NC",
"OPTION2",
"PM_GPIO-F",
"PM_SLP_CLK_IN",
"OPTION1",
"VOL_UP_N",
"PM8250_GPIO7", /* Blue LED */
"SP_ARI_PWR_ALARM",
"GPIO_9_P", /* Yellow LED */
"GPIO_10_P"; /* Green LED */
};
&pm8150b_gpios {
gpio-line-names =
"NC",
"NC",
"NC",
"NC",
"HAP_BOOST_EN", /* SOM */
"SMB_STAT", /* SOM */
"NC",
"NC",
"SDM_FORCE_USB_BOOT",
"NC",
"NC",
"NC";
};
&pm8150l_gpios {
gpio-line-names =
"NC",
"PM3003A_EN",
"NC",
"NC",
"PM_GPIO5", /* HDMI RST_N */
"PM_GPIO-A", /* PWM */
"PM_GPIO7",
"NC",
"NC",
"PM_GPIO-B",
"NC",
"PM3003A_MODE";
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&qupv3_id_2 {
status = "okay";
};
/* CAN */
&spi0 {
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <40 4>;
gpio-line-names =
"GPIO-MM",
"GPIO-NN",
"GPIO-OO",
"GPIO-PP",
"GPIO-A",
"GPIO-C",
"GPIO-E",
"GPIO-D",
"I2C0-SDA",
"I2C0-SCL",
"GPIO-TT", /* GPIO_10 */
"NC",
"GPIO_12_I2C_SDA",
"GPIO_13_I2C_SCL",
"GPIO-X",
"GPIO_15_RGMII_INT",
"HST_BT_UART_CTS",
"HST_BT_UART_RFR",
"HST_BT_UART_TX",
"HST_BT_UART_RX",
"HST_WLAN_EN", /* GPIO_20 */
"HST_BT_EN",
"GPIO-AAA",
"GPIO-BBB",
"GPIO-CCC",
"GPIO-Z",
"GPIO-DDD",
"GPIO-BB",
"GPIO_28_CAN_SPI_MISO",
"GPIO_29_CAN_SPI_MOSI",
"GPIO_30_CAN_SPI_CLK", /* GPIO_30 */
"GPIO_31_CAN_SPI_CS",
"GPIO-UU",
"NC",
"UART1_TXD_SOM",
"UART1_RXD_SOM",
"UART0_CTS",
"UART0_RTS",
"UART0_TXD",
"UART0_RXD",
"SPI1_MISO", /* GPIO_40 */
"SPI1_MOSI",
"SPI1_CLK",
"SPI1_CS",
"I2C1_SDA",
"I2C1_SCL",
"GPIO-F",
"GPIO-JJ",
"Board_ID1",
"Board_ID2",
"NC", /* GPIO_50 */
"NC",
"SPI0_MISO",
"SPI0_MOSI",
"SPI0_SCLK",
"SPI0_CS",
"GPIO-QQ",
"GPIO-RR",
"USB2LAN_RESET",
"USB2LAN_EXTWAKE",
"NC", /* GPIO_60 */
"NC",
"NC",
"LT9611_INT",
"GPIO-AA",
"USB_CC_DIR",
"GPIO-G",
"GPIO-LL",
"USB_DP_HPD_1P8",
"NC",
"NC", /* GPIO_70 */
"SD_CMD",
"SD_DAT3",
"SD_SCLK",
"SD_DAT2",
"SD_DAT1",
"SD_DAT0", /* BOOT_CFG3 */
"SD_UFS_CARD_DET_N",
"GPIO-II",
"PCIE0_RST_N",
"PCIE0_CLK_REQ_N", /* GPIO_80 */
"PCIE0_WAKE_N",
"GPIO-CC",
"GPIO-DD",
"GPIO-EE",
"GPIO-FF",
"GPIO-GG",
"GPIO-HH",
"GPIO-VV",
"GPIO-WW",
"NC", /* GPIO_90 */
"NC",
"GPIO-K",
"GPIO-I",
"CSI0_MCLK",
"CSI1_MCLK",
"CSI2_MCLK",
"CSI3_MCLK",
"GPIO-AA", /* CSI4_MCLK */
"GPIO-BB", /* CSI5_MCLK */
"GPIO-KK", /* GPIO_100 */
"CCI_I2C_SDA0",
"CCI_I2C_SCL0",
"CCI_I2C_SDA1",
"CCI_I2C_SCL1",
"CCI_I2C_SDA2",
"CCI_I2C_SCL2",
"CCI_I2C_SDA3",
"CCI_I2C_SCL3",
"GPIO-L",
"NC", /* GPIO_110 */
"NC",
"ACCEL_INT",
"GYRO_INT",
"GPIO-J",
"GPIO-YY",
"GPIO-H",
"GPIO-ZZ",
"NC",
"NC",
"NC", /* GPIO_120 */
"NC",
"MAG_INT",
"MAG_DRDY_INT",
"HST_SW_CTRL",
"GPIO-M",
"GPIO-N",
"GPIO-O",
"GPIO-P",
"PS_INT",
"WSA1_EN", /* GPIO_130 */
"USB_HUB_RESET",
"SDM_FORCE_USB_BOOT",
"I2S1_CLK_HDMI",
"I2S1_DATA0_HDMI",
"I2S1_WS_HDMI",
"GPIO-B",
"GPIO_137", /* To LT9611_I2S_MCLK_3V3 */
"PCM_CLK",
"PCM_DI",
"PCM_DO", /* GPIO_140 */
"PCM_FS",
"HST_SLIM_CLK",
"HST_SLIM_DATA",
"GPIO-U",
"GPIO-Y",
"GPIO-R",
"GPIO-Q",
"GPIO-S",
"GPIO-T",
"GPIO-V", /* GPIO_150 */
"GPIO-W",
"DMIC_CLK1",
"DMIC_DATA1",
"DMIC_CLK2",
"DMIC_DATA2",
"WSA_SWR_CLK",
"WSA_SWR_DATA",
"DMIC_CLK3",
"DMIC_DATA3",
"I2C4_SDA", /* GPIO_160 */
"I2C4_SCL",
"SPI3_CS1",
"SPI3_CS2",
"SPI2_MISO_LS3",
"SPI2_MOSI_LS3",
"SPI2_CLK_LS3",
"SPI2_ACCEL_CS_LS3",
"SPI2_CS1",
"NC",
"GPIO-SS", /* GPIO_170 */
"GPIO-XX",
"SPI3_MISO",
"SPI3_MOSI",
"SPI3_CLK",
"SPI3_CS",
"HST_BLE_SNS_UART_TX",
"HST_BLE_SNS_UART_RX",
"HST_WLAN_UART_TX",
"HST_WLAN_UART_RX";
};
&uart12 {
status = "okay";
};
&ufs_mem_hc {
status = "okay";
vcc-supply = <&vreg_l17a_3p0>;
vcc-max-microamp = <800000>;
vccq-supply = <&vreg_l6a_1p2>;
vccq-max-microamp = <800000>;
vccq2-supply = <&vreg_s4a_1p8>;
vccq2-max-microamp = <800000>;
};
&ufs_mem_phy {
status = "okay";
vdda-phy-supply = <&vreg_l5a_0p88>;
vdda-max-microamp = <89900>;
vdda-pll-supply = <&vreg_l9a_1p2>;
vdda-pll-max-microamp = <18800>;
};

66
arch/arm64/boot/dts/qcom/sc7180-idp.dts
View File

@ -346,6 +346,13 @@ &sdhc_2 {
&uart3 {
status = "okay";
/delete-property/interrupts;
interrupts-extended = <&intc GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 41 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default", "sleep";
pinctrl-1 = <&qup_uart3_sleep>;
bluetooth: wcn3990-bt {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_l10a_1p8>;
@ -353,7 +360,6 @@ bluetooth: wcn3990-bt {
vddrf-supply = <&vreg_l2c_1p3>;
vddch0-supply = <&vreg_l10c_3p3>;
max-speed = <3200000>;
clocks = <&rpmhcc RPMH_RF_CLK2>;
};
};
@ -474,32 +480,30 @@ pinconf {
&qup_uart3_default {
pinconf-cts {
/*
* Configure a pull-down on 38 (CTS) to match the pull of
* Configure a pull-down on CTS to match the pull of
* the Bluetooth module.
*/
pins = "gpio38";
bias-pull-down;
output-high;
};
pinconf-rts {
/* We'll drive 39 (RTS), so no pull */
/* We'll drive RTS, so no pull */
pins = "gpio39";
drive-strength = <2>;
bias-disable;
};
pinconf-tx {
/* We'll drive 40 (TX), so no pull */
/* We'll drive TX, so no pull */
pins = "gpio40";
drive-strength = <2>;
bias-disable;
output-high;
};
pinconf-rx {
/*
* Configure a pull-up on 41 (RX). This is needed to avoid
* Configure a pull-up on RX. This is needed to avoid
* garbage data when the TX pin of the Bluetooth module is
* in tri-state (module powered off or not driving the
* signal yet).
@ -547,3 +551,51 @@ pinconf {
};
};
&tlmm {
qup_uart3_sleep: qup-uart3-sleep {
pinmux {
pins = "gpio38", "gpio39",
"gpio40", "gpio41";
function = "gpio";
};
pinconf-cts {
/*
* Configure a pull-down on CTS to match the pull of
* the Bluetooth module.
*/
pins = "gpio38";
bias-pull-down;
};
pinconf-rts {
/*
* Configure pull-down on RTS. As RTS is active low
* signal, pull it low to indicate the BT SoC that it
* can wakeup the system anytime from suspend state by
* pulling RX low (by sending wakeup bytes).
*/
pins = "gpio39";
bias-pull-down;
};
pinconf-tx {
/*
* Configure pull-up on TX when it isn't actively driven
* to prevent BT SoC from receiving garbage during sleep.
*/
pins = "gpio40";
bias-pull-up;
};
pinconf-rx {
/*
* Configure a pull-up on RX. This is needed to avoid
* garbage data when the TX pin of the Bluetooth module
* is floating which may cause spurious wakeups.
*/
pins = "gpio41";
bias-pull-up;
};
};
};

24
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r0.dts Normal file
View File

@ -0,0 +1,24 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-lazor.dtsi"
/ {
model = "Google Lazor (rev0)";
compatible = "google,lazor-rev0", "qcom,sc7180";
};
&sn65dsi86_out {
/*
* Lane 0 was incorrectly mapped on the cable, but we've now decided
* that the cable is canon and in -rev1+ we'll make a board change
* that means we no longer need the swizzle.
*/
lane-polarities = <1 0>;
};

17
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dts Normal file
View File

@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-lazor-r1.dts"
/ {
model = "Google Lazor (rev1+) with KB Backlight";
compatible = "google,lazor-sku2", "qcom,sc7180";
};
&keyboard_backlight {
status = "okay";
};

18
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dts Normal file
View File

@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-lazor-r1.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Lazor (rev1+) with LTE";
compatible = "google,lazor-sku0", "qcom,sc7180";
};
&keyboard_backlight {
status = "okay";
};

15
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1.dts Normal file
View File

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-lazor.dtsi"
/ {
model = "Google Lazor (rev1+)";
compatible = "google,lazor", "qcom,sc7180";
};

192
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi Normal file
View File

@ -0,0 +1,192 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Lazor board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180.dtsi"
ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
/ {
panel: panel {
compatible = "boe,nv133fhm-n62";
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
ports {
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
&ap_sar_sensor {
status = "okay";
};
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
post-power-on-delay-ms = <20>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
};
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
&ts_reset_l {
pinconf {
/* This pin is not connected on -rev0, pull up to park. */
/delete-property/bias-disable;
bias-pull-up;
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "ESIM_MISO",
"ESIM_MOSI",
"ESIM_CLK",
"ESIM_CS_L",
"",
"",
"AP_TP_I2C_SDA",
"AP_TP_I2C_SCL",
"TS_RESET_L",
"TS_INT_L",
"",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"AP_RAM_ID2",
"",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"HUB_RST_L",
"",
"AP_RAM_ID1",
"AP_SKU_ID2",
"",
"",
"AMP_EN",
"P_SENSOR_INT_L",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"HP_IRQ",
"AP_RAM_ID0",
"EN_PP3300_DX_EDP",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"",
"",
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"TRACKPAD_INT_1V8_ODL",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"DBG_SPI_HOLD_L",
"AP_SPI_CS0_L",
"",
"",
"",
"",
"",
"",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"EN_PP3300_CODEC",
"EN_PP3300_HUB",
"",
"",
"",
"",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"AP_SKU_ID0",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};

15
arch/arm64/boot/dts/qcom/sc7180-trogdor-lte-sku.dtsi Normal file
View File

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor dts fragment for LTE SKUs
*
* Copyright 2020 Google LLC.
*/
&ap_sar_sensor {
label = "proximity-wifi-lte";
};
&remoteproc_mpss {
firmware-name = "qcom/sc7180-trogdor/modem/mba.mbn",
"qcom/sc7180-trogdor/modem/qdsp6sw.mbn";
};

14
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1-lte.dts Normal file
View File

@ -0,0 +1,14 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-r1.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Trogdor (rev1+) with LTE";
compatible = "google,trogdor-sku0", "qcom,sc7180";
};

191
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts Normal file
View File

@ -0,0 +1,191 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180.dtsi"
ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
/ {
model = "Google Trogdor (rev1+)";
compatible = "google,trogdor", "qcom,sc7180";
panel: panel {
compatible = "auo,b116xa01";
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
ports {
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
&ap_sar_sensor_i2c {
/* Not hooked up */
status = "disabled";
};
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "elan,ekth3500";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
vcc33-supply = <&pp3300_ts>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
};
};
&sdhc_2 {
status = "okay";
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "ESIM_MISO",
"ESIM_MOSI",
"ESIM_CLK",
"ESIM_CS_L",
"FP_TO_AP_IRQ_L",
"FP_RST_L",
"AP_TP_I2C_SDA",
"AP_TP_I2C_SCL",
"TS_RESET_L",
"TS_INT_L",
"FPMCU_BOOT0",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"",
"",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"HUB_RST_L",
"PEN_RST_ODL",
"AP_RAM_ID1",
"AP_RAM_ID2",
"PEN_IRQ_L",
"FPMCU_SEL",
"AMP_EN",
"P_SENSOR_INT_L",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"HP_IRQ",
"AP_RAM_ID0",
"EN_PP3300_DX_EDP",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"",
"",
"AMP_DIN",
"PEN_PDCT_L",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"TRACKPAD_INT_1V8_ODL",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"DBG_SPI_HOLD_L",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"EN_PP3300_CODEC",
"EN_PP3300_HUB",
"",
"AP_SPI_FP_MISO",
"AP_SPI_FP_MOSI",
"AP_SPI_FP_CLK",
"AP_SPI_FP_CS_L",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"AP_SKU_ID0",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};

1402
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi Normal file
View File

File diff suppressed because it is too large Load Diff

332
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,dispcc-sc7180.h>
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
#include <dt-bindings/clock/qcom,gpucc-sc7180.h>
#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sc7180.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
@ -132,7 +133,7 @@ &LITTLE_CPU_SLEEP_1
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
@ -158,7 +159,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_100>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@ -180,7 +181,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_200>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@ -202,7 +203,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_300>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@ -224,7 +225,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_400>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@ -246,7 +247,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_500>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@ -268,7 +269,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <405>;
next-level-cache = <&L2_600>;
operating-points-v2 = <&cpu6_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>;
@ -290,7 +291,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <405>;
next-level-cache = <&L2_700>;
operating-points-v2 = <&cpu6_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>;
@ -690,6 +691,9 @@ sdhc_1: sdhci@7c4000 {
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_EMMC_CFG 0>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&sdhc1_opp_table>;
@ -710,11 +714,15 @@ sdhc1_opp_table: sdhc1-opp-table {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <100000 100000>;
opp-avg-kBps = <100000 50000>;
};
opp-384000000 {
opp-hz = /bits/ 64 <384000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
opp-peak-kBps = <600000 900000>;
opp-avg-kBps = <261438 300000>;
};
};
};
@ -748,7 +756,7 @@ qupv3_id_0: geniqup@8c0000 {
#size-cells = <2>;
ranges;
iommus = <&apps_smmu 0x43 0x0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>;
interconnect-names = "qup-core";
status = "disabled";
@ -762,9 +770,9 @@ i2c0: i2c@880000 {
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -782,8 +790,8 @@ spi0: spi@880000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -798,8 +806,8 @@ uart0: serial@880000 {
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -814,9 +822,9 @@ i2c1: i2c@884000 {
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -834,8 +842,8 @@ spi1: spi@884000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -850,8 +858,8 @@ uart1: serial@884000 {
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -866,9 +874,9 @@ i2c2: i2c@888000 {
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -884,8 +892,8 @@ uart2: serial@888000 {
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -900,9 +908,9 @@ i2c3: i2c@88c000 {
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -920,8 +928,8 @@ spi3: spi@88c000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -936,8 +944,8 @@ uart3: serial@88c000 {
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -952,9 +960,9 @@ i2c4: i2c@890000 {
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -970,8 +978,8 @@ uart4: serial@890000 {
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -986,9 +994,9 @@ i2c5: i2c@894000 {
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1006,8 +1014,8 @@ spi5: spi@894000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1022,8 +1030,8 @@ uart5: serial@894000 {
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1039,7 +1047,7 @@ qupv3_id_1: geniqup@ac0000 {
#size-cells = <2>;
ranges;
iommus = <&apps_smmu 0x4c3 0x0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>;
interconnect-names = "qup-core";
status = "disabled";
@ -1053,9 +1061,9 @@ i2c6: i2c@a80000 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1073,8 +1081,8 @@ spi6: spi@a80000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1089,8 +1097,8 @@ uart6: serial@a80000 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1105,9 +1113,9 @@ i2c7: i2c@a84000 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1123,8 +1131,8 @@ uart7: serial@a84000 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1139,9 +1147,9 @@ i2c8: i2c@a88000 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1159,8 +1167,8 @@ spi8: spi@a88000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1175,8 +1183,8 @@ uart8: serial@a88000 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1191,9 +1199,9 @@ i2c9: i2c@a8c000 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1209,8 +1217,8 @@ uart9: serial@a8c000 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1225,9 +1233,9 @@ i2c10: i2c@a90000 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1245,8 +1253,8 @@ spi10: spi@a90000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1261,8 +1269,8 @@ uart10: serial@a90000 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1277,9 +1285,9 @@ i2c11: i2c@a94000 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
status = "disabled";
@ -1297,8 +1305,8 @@ spi11: spi@a94000 {
#size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1313,8 +1321,8 @@ uart11: serial@a94000 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
@ -1323,63 +1331,63 @@ uart11: serial@a94000 {
config_noc: interconnect@1500000 {
compatible = "qcom,sc7180-config-noc";
reg = <0 0x01500000 0 0x28000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sc7180-system-noc";
reg = <0 0x01620000 0 0x17080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@1638000 {
compatible = "qcom,sc7180-mc-virt";
reg = <0 0x01638000 0 0x1000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
qup_virt: interconnect@1650000 {
compatible = "qcom,sc7180-qup-virt";
reg = <0 0x01650000 0 0x1000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sc7180-aggre1-noc";
reg = <0 0x016e0000 0 0x15080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1705000 {
compatible = "qcom,sc7180-aggre2-noc";
reg = <0 0x01705000 0 0x9000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@170e000 {
compatible = "qcom,sc7180-compute-noc";
reg = <0 0x0170e000 0 0x6000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sc7180-mmss-noc";
reg = <0 0x01740000 0 0x1c100>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
ipa_virt: interconnect@1e00000 {
compatible = "qcom,sc7180-ipa-virt";
reg = <0 0x01e00000 0 0x1000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@ -1406,9 +1414,9 @@ ipa: ipa@1e40000 {
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>,
<&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
interconnect-names = "memory",
"imem",
"config";
@ -1447,6 +1455,19 @@ tlmm: pinctrl@3500000 {
gpio-ranges = <&tlmm 0 0 120>;
wakeup-parent = <&pdc>;
dp_hot_plug_det: dp-hot-plug-det {
pinmux {
pins = "gpio117";
function = "dp_hot";
};
pinconf {
pins = "gpio117";
bias-disable;
input-enable;
};
};
qspi_clk: qspi-clk {
pinmux {
pins = "gpio63";
@ -1886,7 +1907,7 @@ gpu: gpu@5000000 {
operating-points-v2 = <&gpu_opp_table>;
qcom,gmu = <&gmu>;
interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>;
interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "gfx-mem";
gpu_opp_table: opp-table {
@ -2502,6 +2523,10 @@ sdhc_2: sdhci@8804000 {
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
<&gcc GCC_SDCC2_AHB_CLK>;
clock-names = "core", "iface";
interconnects = <&aggre1_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&sdhc2_opp_table>;
@ -2515,11 +2540,15 @@ sdhc2_opp_table: sdhc2-opp-table {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <160000 100000>;
opp-avg-kBps = <80000 50000>;
};
opp-202000000 {
opp-hz = /bits/ 64 <202000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
opp-peak-kBps = <200000 120000>;
opp-avg-kBps = <100000 60000>;
};
};
};
@ -2552,8 +2581,8 @@ qspi: spi@88dc000 {
clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<&gcc GCC_QSPI_CORE_CLK>;
clock-names = "iface", "core";
interconnects = <&gem_noc MASTER_APPSS_PROC
&config_noc SLAVE_QSPI_0>;
interconnects = <&gem_noc MASTER_APPSS_PROC 0
&config_noc SLAVE_QSPI_0 0>;
interconnect-names = "qspi-config";
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qspi_opp_table>;
@ -2612,13 +2641,13 @@ usb_1_ssphy: phy@88e9200 {
dc_noc: interconnect@9160000 {
compatible = "qcom,sc7180-dc-noc";
reg = <0 0x09160000 0 0x03200>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system-cache-controller@9200000 {
compatible = "qcom,sc7180-llcc";
reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>;
reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>;
reg-names = "llcc_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
@ -2626,14 +2655,14 @@ system-cache-controller@9200000 {
gem_noc: interconnect@9680000 {
compatible = "qcom,sc7180-gem-noc";
reg = <0 0x09680000 0 0x3e200>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
npu_noc: interconnect@9990000 {
compatible = "qcom,sc7180-npu-noc";
reg = <0 0x09990000 0 0x1600>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@ -2669,8 +2698,8 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
interconnects = <&aggre2_noc MASTER_USB3 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3>;
interconnects = <&aggre2_noc MASTER_USB3 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_1_dwc3: dwc3@a600000 {
@ -2691,8 +2720,10 @@ venus: video-codec@aa00000 {
reg = <0 0x0aa00000 0 0xff000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&videocc VENUS_GDSC>,
<&videocc VCODEC0_GDSC>;
power-domain-names = "venus", "vcodec0";
<&videocc VCODEC0_GDSC>,
<&rpmhpd SC7180_CX>;
power-domain-names = "venus", "vcodec0", "cx";
operating-points-v2 = <&venus_opp_table>;
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
@ -2702,8 +2733,8 @@ venus: video-codec@aa00000 {
"vcodec0_core", "vcodec0_bus";
iommus = <&apps_smmu 0x0c00 0x60>;
memory-region = <&venus_mem>;
interconnects = <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
interconnects = <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>;
interconnect-names = "video-mem", "cpu-cfg";
video-decoder {
@ -2713,6 +2744,35 @@ video-decoder {
video-encoder {
compatible = "venus-encoder";
};
venus_opp_table: venus-opp-table {
compatible = "operating-points-v2";
opp-150000000 {
opp-hz = /bits/ 64 <150000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-340000000 {
opp-hz = /bits/ 64 <340000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
opp-434000000 {
opp-hz = /bits/ 64 <434000000>;
required-opps = <&rpmhpd_opp_nom>;
};
opp-500000097 {
opp-hz = /bits/ 64 <500000097>;
required-opps = <&rpmhpd_opp_turbo>;
};
};
};
videocc: clock-controller@ab00000 {
@ -2728,7 +2788,7 @@ videocc: clock-controller@ab00000 {
camnoc_virt: interconnect@ac00000 {
compatible = "qcom,sc7180-camnoc-virt";
reg = <0 0x0ac00000 0 0x1000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@ -2740,10 +2800,9 @@ mdss: mdss@ae00000 {
power-domains = <&dispcc MDSS_GDSC>;
clocks = <&gcc GCC_DISP_AHB_CLK>,
<&gcc GCC_DISP_HF_AXI_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "iface", "bus", "ahb", "core";
clock-names = "iface", "ahb", "core";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
assigned-clock-rates = <300000000>;
@ -2752,6 +2811,9 @@ mdss: mdss@ae00000 {
interrupt-controller;
#interrupt-cells = <1>;
interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
interconnect-names = "mdp0-mem";
iommus = <&apps_smmu 0x800 0x2>;
#address-cells = <2>;
@ -2766,12 +2828,13 @@ mdp: mdp@ae01000 {
<0 0x0aeb0000 0 0x2008>;
reg-names = "mdp", "vbif";
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_ROT_CLK>,
<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
clock-names = "iface", "rot", "lut", "core",
clock-names = "bus", "iface", "rot", "lut", "core",
"vsync";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>,
@ -2785,7 +2848,7 @@ mdp: mdp@ae01000 {
power-domains = <&rpmhpd SC7180_CX>;
interrupt-parent = <&mdss>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <0>;
status = "disabled";
@ -2833,7 +2896,7 @@ dsi0: dsi@ae94000 {
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
@ -3312,6 +3375,29 @@ wifi: wifi@18800000 {
qcom,msa-fixed-perm;
status = "disabled";
};
lpasscc: clock-controller@62d00000 {
compatible = "qcom,sc7180-lpasscorecc";
reg = <0 0x62d00000 0 0x50000>,
<0 0x62780000 0 0x30000>;
reg-names = "lpass_core_cc", "lpass_audio_cc";
clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bi_tcxo";
power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
#clock-cells = <1>;
#power-domain-cells = <1>;
};
lpass_hm: clock-controller@63000000 {
compatible = "qcom,sc7180-lpasshm";
reg = <0 0x63000000 0 0x28>;
clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bi_tcxo";
#clock-cells = <1>;
#power-domain-cells = <1>;
};
};
thermal-zones {
@ -3320,6 +3406,7 @@ cpu0-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 1>;
sustainable-power = <768>;
trips {
cpu0_alert0: trip-point0 {
@ -3368,6 +3455,7 @@ cpu1-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 2>;
sustainable-power = <768>;
trips {
cpu1_alert0: trip-point0 {
@ -3416,6 +3504,7 @@ cpu2-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 3>;
sustainable-power = <768>;
trips {
cpu2_alert0: trip-point0 {
@ -3464,6 +3553,7 @@ cpu3-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 4>;
sustainable-power = <768>;
trips {
cpu3_alert0: trip-point0 {
@ -3512,6 +3602,7 @@ cpu4-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 5>;
sustainable-power = <768>;
trips {
cpu4_alert0: trip-point0 {
@ -3560,6 +3651,7 @@ cpu5-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 6>;
sustainable-power = <768>;
trips {
cpu5_alert0: trip-point0 {
@ -3608,6 +3700,7 @@ cpu6-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 9>;
sustainable-power = <1202>;
trips {
cpu6_alert0: trip-point0 {
@ -3648,6 +3741,7 @@ cpu7-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 10>;
sustainable-power = <1202>;
trips {
cpu7_alert0: trip-point0 {
@ -3688,6 +3782,7 @@ cpu8-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 11>;
sustainable-power = <1202>;
trips {
cpu8_alert0: trip-point0 {
@ -3728,6 +3823,7 @@ cpu9-thermal {
polling-delay = <0>;
thermal-sensors = <&tsens0 12>;
sustainable-power = <1202>;
trips {
cpu9_alert0: trip-point0 {

18
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View File

@ -451,18 +451,18 @@ ports {
port@0 {
reg = <0>;
lt9611_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
port@1 {
reg = <1>;
lt9611_a: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@2 {
reg = <2>;
lt9611_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
@ -1103,7 +1103,7 @@ &pm8998_gpio {
};
&cci {
status = "ok";
status = "okay";
};
&cci_i2c0 {

380
arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts Normal file
View File

@ -0,0 +1,380 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sdm845.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
/*
* Delete following upstream (sdm845.dtsi) reserved
* memory mappings which are different in this device.
*/
/delete-node/ &tz_mem;
/delete-node/ &adsp_mem;
/delete-node/ &wlan_msa_mem;
/delete-node/ &mpss_region;
/delete-node/ &venus_mem;
/delete-node/ &cdsp_mem;
/delete-node/ &mba_region;
/delete-node/ &slpi_mem;
/delete-node/ &spss_mem;
/delete-node/ &rmtfs_mem;
/ {
model = "Xiaomi Pocophone F1";
compatible = "xiaomi,beryllium", "qcom,sdm845";
/* required for bootloader to select correct board */
qcom,board-id = <69 0>;
qcom,msm-id = <321 0x20001>;
aliases {
hsuart0 = &uart6;
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&vol_up_pin_a>;
vol-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
};
};
/* Reserved memory changes from downstream */
reserved-memory {
tz_mem: memory@86200000 {
reg = <0 0x86200000 0 0x4900000>;
no-map;
};
adsp_mem: memory@8c500000 {
reg = <0 0x8c500000 0 0x1e00000>;
no-map;
};
wlan_msa_mem: memory@8e300000 {
reg = <0 0x8e300000 0 0x100000>;
no-map;
};
mpss_region: memory@8e400000 {
reg = <0 0x8e400000 0 0x7800000>;
no-map;
};
venus_mem: memory@95c00000 {
reg = <0 0x95c00000 0 0x500000>;
no-map;
};
cdsp_mem: memory@96100000 {
reg = <0 0x96100000 0 0x800000>;
no-map;
};
mba_region: memory@96900000 {
reg = <0 0x96900000 0 0x200000>;
no-map;
};
slpi_mem: memory@96b00000 {
reg = <0 0x96b00000 0 0x1400000>;
no-map;
};
spss_mem: memory@97f00000 {
reg = <0 0x97f00000 0 0x100000>;
no-map;
};
rmtfs_mem: memory@f6301000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0xf6301000 0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
};
};
vreg_s4a_1p8: vreg-s4a-1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_s4a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
&adsp_pas {
status = "okay";
firmware-name = "qcom/sdm845/adsp.mdt";
};
&apps_rsc {
pm8998-rpmh-regulators {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5a_0p8: ldo5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7a_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12a_1p8: ldo12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13a_2p95: ldo13 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17a_1p3: ldo17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l20a_2p95: ldo20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2968000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l21a_2p95: ldo21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2968000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l24a_3p075: ldo24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l25a_3p3: ldo25 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l26a_1p2: ldo26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
};
&cdsp_pas {
status = "okay";
firmware-name = "qcom/sdm845/cdsp.mdt";
};
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&gpu {
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
};
};
&mss_pil {
status = "okay";
firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mdt";
};
&pm8998_gpio {
vol_up_pin_a: vol-up-active {
pins = "gpio6";
function = "normal";
input-enable;
bias-pull-up;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
};
&pm8998_pon {
resin {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_VOLUMEDOWN>;
};
};
&qupv3_id_0 {
status = "okay";
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vreg_l13a_2p95>;
bus-width = <4>;
cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>;
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
sdc2_default_state: sdc2-default {
clk {
pins = "sdc2_clk";
bias-disable;
drive-strength = <16>;
};
cmd {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
data {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
};
sdc2_card_det_n: sd-card-det-n {
pins = "gpio126";
function = "gpio";
bias-pull-up;
};
};
&uart6 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
};
};
&ufs_mem_hc {
status = "okay";
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l20a_2p95>;
vcc-max-microamp = <800000>;
};
&ufs_mem_phy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l26a_1p2>;
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "peripheral";
};
&usb_1_hsphy {
status = "okay";
vdd-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
qcom,imp-res-offset-value = <8>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
};
&usb_1_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l26a_1p2>;
vdda-pll-supply = <&vreg_l1a_0p875>;
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
&qup_uart6_default {
pinmux {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
function = "qup6";
};
cts {
pins = "gpio45";
bias-disable;
};
rts-tx {
pins = "gpio46", "gpio47";
drive-strength = <2>;
bias-disable;
};
rx {
pins = "gpio48";
bias-pull-up;
};
};

92
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -200,7 +200,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
@ -225,7 +225,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_100>;
@ -247,7 +247,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_200>;
@ -269,7 +269,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_300>;
@ -291,7 +291,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_400>;
@ -313,7 +313,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_500>;
@ -335,7 +335,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_600>;
@ -357,7 +357,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_700>;
@ -2011,49 +2011,49 @@ pcie1_lane: lanes@1c06200 {
mem_noc: interconnect@1380000 {
compatible = "qcom,sdm845-mem-noc";
reg = <0 0x01380000 0 0x27200>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
dc_noc: interconnect@14e0000 {
compatible = "qcom,sdm845-dc-noc";
reg = <0 0x014e0000 0 0x400>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
config_noc: interconnect@1500000 {
compatible = "qcom,sdm845-config-noc";
reg = <0 0x01500000 0 0x5080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sdm845-system-noc";
reg = <0 0x01620000 0 0x18080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sdm845-aggre1-noc";
reg = <0 0x016e0000 0 0x15080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sdm845-aggre2-noc";
reg = <0 0x01700000 0 0x1f300>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sdm845-mmss-noc";
reg = <0 0x01740000 0 0x1c100>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@ -2156,9 +2156,9 @@ ipa: ipa@1e40000 {
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
interconnects = <&aggre2_noc MASTER_IPA &mem_noc SLAVE_EBI1>,
<&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>,
<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
interconnect-names = "memory",
"imem",
"config";
@ -3569,8 +3569,8 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
interconnects = <&aggre2_noc MASTER_USB3_0 &mem_noc SLAVE_EBI1>,
<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>;
interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_1_dwc3: dwc3@a600000 {
@ -3617,8 +3617,8 @@ usb_2: usb@a8f8800 {
resets = <&gcc GCC_USB30_SEC_BCR>;
interconnects = <&aggre2_noc MASTER_USB3_1 &mem_noc SLAVE_EBI1>,
<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_1>;
interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_2_dwc3: dwc3@a800000 {
@ -3639,8 +3639,10 @@ venus: video-codec@aa00000 {
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&videocc VENUS_GDSC>,
<&videocc VCODEC0_GDSC>,
<&videocc VCODEC1_GDSC>;
power-domain-names = "venus", "vcodec0", "vcodec1";
<&videocc VCODEC1_GDSC>,
<&rpmhpd SDM845_CX>;
power-domain-names = "venus", "vcodec0", "vcodec1", "cx";
operating-points-v2 = <&venus_opp_table>;
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
@ -3662,6 +3664,40 @@ video-core0 {
video-core1 {
compatible = "venus-encoder";
};
venus_opp_table: venus-opp-table {
compatible = "operating-points-v2";
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_min_svs>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-320000000 {
opp-hz = /bits/ 64 <320000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-380000000 {
opp-hz = /bits/ 64 <380000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
opp-444000000 {
opp-hz = /bits/ 64 <444000000>;
required-opps = <&rpmhpd_opp_nom>;
};
opp-533000097 {
opp-hz = /bits/ 64 <533000097>;
required-opps = <&rpmhpd_opp_turbo>;
};
};
};
videocc: clock-controller@ab00000 {
@ -3777,6 +3813,10 @@ mdss: mdss@ae00000 {
interrupt-controller;
#interrupt-cells = <1>;
interconnects = <&mmss_noc MASTER_MDP0 0 &mem_noc SLAVE_EBI1 0>,
<&mmss_noc MASTER_MDP1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "mdp0-mem", "mdp1-mem";
iommus = <&apps_smmu 0x880 0x8>,
<&apps_smmu 0xc80 0x8>;
@ -4007,7 +4047,7 @@ gpu: gpu@5000000 {
qcom,gmu = <&gmu>;
interconnects = <&mem_noc MASTER_GFX3D &mem_noc SLAVE_EBI1>;
interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "gfx-mem";
gpu_opp_table: opp-table {
@ -4324,7 +4364,7 @@ lpasscc: clock-controller@17014000 {
gladiator_noc: interconnect@17900000 {
compatible = "qcom,sdm845-gladiator-noc";
reg = <0 0x17900000 0 0xd080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

109
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@ -10,6 +10,8 @@
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,gcc-sm8150.h>
#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@ -439,6 +441,55 @@ uart2: serial@a90000 {
};
};
config_noc: interconnect@1500000 {
compatible = "qcom,sm8150-config-noc";
reg = <0 0x01500000 0 0x7400>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sm8150-system-noc";
reg = <0 0x01620000 0 0x19400>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@163a000 {
compatible = "qcom,sm8150-mc-virt";
reg = <0 0x0163a000 0 0x1000>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8150-aggre1-noc";
reg = <0 0x016e0000 0 0xd080>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sm8150-aggre2-noc";
reg = <0 0x01700000 0 0x20000>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@1720000 {
compatible = "qcom,sm8150-compute-noc";
reg = <0 0x01720000 0 0x7000>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sm8150-mmss-noc";
reg = <0 0x01740000 0 0x1c100>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
ufs_mem_hc: ufshc@1d84000 {
compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
"jedec,ufs-2.0";
@ -507,6 +558,13 @@ ufs_mem_phy_lanes: lanes@1d87400 {
};
};
ipa_virt: interconnect@1e00000 {
compatible = "qcom,sm8150-ipa-virt";
reg = <0 0x01e00000 0 0x1000>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
tcsr_mutex_regs: syscon@1f40000 {
compatible = "syscon";
reg = <0x0 0x01f40000 0x0 0x40000>;
@ -621,15 +679,15 @@ gmu: gmu@2c6a000 {
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hfi", "gmu";
clocks = <&gpucc 0>,
<&gpucc 3>,
<&gpucc 6>,
clocks = <&gpucc GPU_CC_AHB_CLK>,
<&gpucc GPU_CC_CX_GMU_CLK>,
<&gpucc GPU_CC_CXO_CLK>,
<&gcc GCC_DDRSS_GPU_AXI_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>;
clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
power-domains = <&gpucc 0>,
<&gpucc 1>;
power-domains = <&gpucc GPU_CX_GDSC>,
<&gpucc GPU_GX_GDSC>;
power-domain-names = "cx", "gx";
iommus = <&adreno_smmu 5 0x400>;
@ -674,12 +732,12 @@ adreno_smmu: iommu@2ca0000 {
<GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gpucc 0>,
clocks = <&gpucc GPU_CC_AHB_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
clock-names = "ahb", "bus", "iface";
power-domains = <&gpucc 0>;
power-domains = <&gpucc GPU_CX_GDSC>;
};
tlmm: pinctrl@3100000 {
@ -813,6 +871,20 @@ usb_1_ssphy: lanes@88e9200 {
};
};
dc_noc: interconnect@9160000 {
compatible = "qcom,sm8150-dc-noc";
reg = <0 0x09160000 0 0x3200>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9680000 {
compatible = "qcom,sm8150-gem-noc";
reg = <0 0x09680000 0 0x3e200>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
usb_1: usb@a6f8800 {
compatible = "qcom,sm8150-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
@ -833,7 +905,7 @@ usb_1: usb@a6f8800 {
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
assigned-clock-rates = <19200000>, <150000000>;
assigned-clock-rates = <19200000>, <200000000>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
@ -857,6 +929,13 @@ usb_1_dwc3: dwc3@a600000 {
};
};
camnoc_virt: interconnect@ac00000 {
compatible = "qcom,sm8150-camnoc-virt";
reg = <0 0x0ac00000 0 0x1000>;
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aoss_qmp: power-controller@c300000 {
compatible = "qcom,sm8150-aoss-qmp";
reg = <0x0 0x0c300000 0x0 0x100000>;
@ -1099,6 +1178,20 @@ rpmhpd_opp_turbo_l1: opp11 {
};
};
};
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
};
osm_l3: interconnect@18321000 {
compatible = "qcom,sm8150-osm-l3";
reg = <0 0x18321000 0 0x1400>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
#interconnect-cells = <1>;
};
cpufreq_hw: cpufreq@18323000 {

32
arch/arm64/boot/dts/qcom/sm8250-mtp.dts
View File

@ -17,7 +17,7 @@ / {
compatible = "qcom,sm8250-mtp";
aliases {
serial0 = &uart2;
serial0 = &uart12;
};
chosen {
@ -358,10 +358,38 @@ &cdsp {
firmware-name = "qcom/sm8250/cdsp.mbn";
};
&i2c1 {
status = "okay";
clock-frequency = <1000000>;
/* NQ NFC chip @28 */
};
&i2c13 {
status = "okay";
/* st,stmfts @ 49 */
};
&i2c15 {
status = "okay";
/* smb1390 @ 10 */
/* rtc6226 @ 64 */
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&qupv3_id_2 {
status = "okay";
};
&slpi {
status = "okay";
firmware-name = "qcom/sm8250/slpi.mbn";
@ -371,7 +399,7 @@ &tlmm {
gpio-reserved-ranges = <28 4>, <40 4>;
};
&uart2 {
&uart12 {
status = "okay";
};

1059
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

File diff suppressed because it is too large Load Diff