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icc: dt-bindings: add endpoint IDs for interconnects for ANORAK

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Add master and slave ID constants for all Qualcomm Technologies, Inc.
Anorak interconnect providers which consumers can use to set bandwidth
constraints and find paths in the NoC (Network-On-Chip) topology.

Change-Id: Ia7c1b62a848ba2b72fb27d3bfc66a69de628ae72
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
This commit is contained in:
Raviteja Laggyshetty 2022-08-24 23:05:42 +05:30 committed by Gerrit - the friendly Code Review server
parent 6c35f3f768
commit 9acdad32a6
1 changed files with 41 additions and 37 deletions
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78
include/dt-bindings/interconnect/qcom,anorak.h
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@ -29,40 +29,38 @@
#define MASTER_LPASS_ANOC 20
#define MASTER_MDP0 21
#define MASTER_MDP1 22
#define MASTER_MDP_CORE1_0 23
#define MASTER_MDP_CORE1_1 24
#define MASTER_CNOC_MNOC_CFG 25
#define MASTER_MNOC_HF_MEM_NOC 26
#define MASTER_MNOC_SF_MEM_NOC 27
#define MASTER_COMPUTE_NOC 28
#define MASTER_ANOC_PCIE_GEM_NOC 29
#define MASTER_PCIE_ANOC_CFG 30
#define MASTER_SNOC_CFG 31
#define MASTER_SNOC_GC_MEM_NOC 32
#define MASTER_SNOC_SF_MEM_NOC 33
#define MASTER_CDSP_HCP 34
#define MASTER_VIDEO 35
#define MASTER_VIDEO_CV_PROC 36
#define MASTER_VIDEO_PROC 37
#define MASTER_VIDEO_V_PROC 38
#define MASTER_QUP_CORE_0 39
#define MASTER_QUP_CORE_1 40
#define MASTER_CRYPTO 41
#define MASTER_IPA 42
#define MASTER_LPASS_PROC 43
#define MASTER_CDSP_PROC 44
#define MASTER_SP 45
#define MASTER_GIC 46
#define MASTER_PCIE_0 47
#define MASTER_PCIE_1 48
#define MASTER_PCIE_4 49
#define MASTER_QDSS_DAP 50
#define MASTER_QDSS_ETR 51
#define MASTER_QDSS_ETR_1 52
#define MASTER_SDCC_2 53
#define MASTER_UFS_MEM 54
#define MASTER_USB3_0 55
#define MASTER_DDR_RT 56
#define MASTER_CNOC_MNOC_CFG 23
#define MASTER_MNOC_HF_MEM_NOC 24
#define MASTER_MNOC_SF_MEM_NOC 25
#define MASTER_COMPUTE_NOC 26
#define MASTER_ANOC_PCIE_GEM_NOC 27
#define MASTER_PCIE_ANOC_CFG 28
#define MASTER_SNOC_CFG 29
#define MASTER_SNOC_GC_MEM_NOC 30
#define MASTER_SNOC_SF_MEM_NOC 31
#define MASTER_CDSP_HCP 32
#define MASTER_VIDEO 33
#define MASTER_VIDEO_CV_PROC 34
#define MASTER_VIDEO_PROC 35
#define MASTER_VIDEO_V_PROC 36
#define MASTER_QUP_CORE_0 37
#define MASTER_QUP_CORE_1 38
#define MASTER_CRYPTO 39
#define MASTER_IPA 40
#define MASTER_LPASS_PROC 41
#define MASTER_CDSP_PROC 42
#define MASTER_SP 43
#define MASTER_GIC 44
#define MASTER_PCIE_0 45
#define MASTER_PCIE_1 46
#define MASTER_PCIE_4 47
#define MASTER_QDSS_DAP 48
#define MASTER_QDSS_ETR 49
#define MASTER_QDSS_ETR_1 50
#define MASTER_SDCC_2 51
#define MASTER_UFS_MEM 52
#define MASTER_USB3_0 53
#define MASTER_DDR_RT 54
#define SLAVE_EBI1 512
#define SLAVE_AHB2PHY_SOUTH 513
#define SLAVE_AHB2PHY_NORTH 514
@ -137,11 +135,17 @@
#define SLAVE_DDR_RT 583
#define MASTER_LLCC_DISP 1000
#define MASTER_MDP0_DISP 1001
#define MASTER_MDP1_DISP 1002
#define MASTER_MNOC_HF_MEM_NOC_DISP 1003
#define MASTER_ANOC_PCIE_GEM_NOC_DISP 1004
#define MASTER_MNOC_HF_MEM_NOC_DISP 1002
#define MASTER_ANOC_PCIE_GEM_NOC_DISP 1003
#define SLAVE_EBI1_DISP 1512
#define SLAVE_LLCC_DISP 1513
#define SLAVE_MNOC_HF_MEM_NOC_DISP 1514
#define MASTER_LLCC_DISP2 2000
#define MASTER_MDP1_DISP2 2001
#define MASTER_MNOC_HF_MEM_NOC_DISP2 2002
#define MASTER_ANOC_PCIE_GEM_NOC_DISP2 2003
#define SLAVE_EBI1_DISP2 2512
#define SLAVE_LLCC_DISP2 2513
#define SLAVE_MNOC_HF_MEM_NOC_DISP2 2514
#endif