This is the 5.10.82 stable release

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Merge 5.10.82 into android12-5.10-lts

Changes in 5.10.82
	arm64: zynqmp: Do not duplicate flash partition label property
	arm64: zynqmp: Fix serial compatible string
	ARM: dts: sunxi: Fix OPPs node name
	arm64: dts: allwinner: h5: Fix GPU thermal zone node name
	arm64: dts: allwinner: a100: Fix thermal zone node name
	staging: wfx: ensure IRQ is ready before enabling it
	ARM: dts: NSP: Fix mpcore, mmc node names
	scsi: lpfc: Fix list_add() corruption in lpfc_drain_txq()
	arm64: dts: rockchip: Disable CDN DP on Pinebook Pro
	arm64: dts: hisilicon: fix arm,sp805 compatible string
	RDMA/bnxt_re: Check if the vlan is valid before reporting
	bus: ti-sysc: Add quirk handling for reinit on context lost
	bus: ti-sysc: Use context lost quirk for otg
	usb: musb: tusb6010: check return value after calling platform_get_resource()
	usb: typec: tipd: Remove WARN_ON in tps6598x_block_read
	ARM: dts: ux500: Skomer regulator fixes
	staging: rtl8723bs: remove possible deadlock when disconnect (v2)
	ARM: BCM53016: Specify switch ports for Meraki MR32
	arm64: dts: qcom: msm8998: Fix CPU/L2 idle state latency and residency
	arm64: dts: qcom: ipq6018: Fix qcom,controlled-remotely property
	arm64: dts: freescale: fix arm,sp805 compatible string
	ASoC: SOF: Intel: hda-dai: fix potential locking issue
	clk: imx: imx6ul: Move csi_sel mux to correct base register
	ASoC: nau8824: Add DMI quirk mechanism for active-high jack-detect
	scsi: advansys: Fix kernel pointer leak
	ALSA: intel-dsp-config: add quirk for APL/GLK/TGL devices based on ES8336 codec
	firmware_loader: fix pre-allocated buf built-in firmware use
	ARM: dts: omap: fix gpmc,mux-add-data type
	usb: host: ohci-tmio: check return value after calling platform_get_resource()
	ARM: dts: ls1021a: move thermal-zones node out of soc/
	ARM: dts: ls1021a-tsn: use generic "jedec,spi-nor" compatible for flash
	ALSA: ISA: not for M68K
	tty: tty_buffer: Fix the softlockup issue in flush_to_ldisc
	MIPS: sni: Fix the build
	scsi: scsi_debug: Fix out-of-bound read in resp_readcap16()
	scsi: scsi_debug: Fix out-of-bound read in resp_report_tgtpgs()
	scsi: target: Fix ordered tag handling
	scsi: target: Fix alua_tg_pt_gps_count tracking
	iio: imu: st_lsm6dsx: Avoid potential array overflow in st_lsm6dsx_set_odr()
	powerpc/5200: dts: fix memory node unit name
	ARM: dts: qcom: fix memory and mdio nodes naming for RB3011
	ALSA: gus: fix null pointer dereference on pointer block
	powerpc/dcr: Use cmplwi instead of 3-argument cmpli
	powerpc/8xx: Fix Oops with STRICT_KERNEL_RWX without DEBUG_RODATA_TEST
	sh: check return code of request_irq
	maple: fix wrong return value of maple_bus_init().
	f2fs: fix up f2fs_lookup tracepoints
	f2fs: fix to use WHINT_MODE
	sh: fix kconfig unmet dependency warning for FRAME_POINTER
	sh: math-emu: drop unused functions
	sh: define __BIG_ENDIAN for math-emu
	f2fs: compress: disallow disabling compress on non-empty compressed file
	f2fs: fix incorrect return value in f2fs_sanity_check_ckpt()
	clk: ingenic: Fix bugs with divided dividers
	clk/ast2600: Fix soc revision for AHB
	clk: qcom: gcc-msm8996: Drop (again) gcc_aggre1_pnoc_ahb_clk
	mips: BCM63XX: ensure that CPU_SUPPORTS_32BIT_KERNEL is set
	sched/core: Mitigate race cpus_share_cache()/update_top_cache_domain()
	perf/x86/vlbr: Add c->flags to vlbr event constraints
	blkcg: Remove extra blkcg_bio_issue_init
	tracing/histogram: Do not copy the fixed-size char array field over the field size
	perf bpf: Avoid memory leak from perf_env__insert_btf()
	perf bench futex: Fix memory leak of perf_cpu_map__new()
	perf tests: Remove bash construct from record+zstd_comp_decomp.sh
	drm/nouveau: hdmigv100.c: fix corrupted HDMI Vendor InfoFrame
	net-zerocopy: Copy straggler unaligned data for TCP Rx. zerocopy.
	net-zerocopy: Refactor skb frag fast-forward op.
	tcp: Fix uninitialized access in skb frags array for Rx 0cp.
	tracing: Add length protection to histogram string copies
	net: ipa: disable HOLB drop when updating timer
	net: bnx2x: fix variable dereferenced before check
	bnxt_en: reject indirect blk offload when hw-tc-offload is off
	tipc: only accept encrypted MSG_CRYPTO msgs
	net: reduce indentation level in sk_clone_lock()
	sock: fix /proc/net/sockstat underflow in sk_clone_lock()
	net/smc: Make sure the link_id is unique
	iavf: Fix return of set the new channel count
	iavf: check for null in iavf_fix_features
	iavf: free q_vectors before queues in iavf_disable_vf
	iavf: Fix failure to exit out from last all-multicast mode
	iavf: prevent accidental free of filter structure
	iavf: validate pointers
	iavf: Fix for the false positive ASQ/ARQ errors while issuing VF reset
	iavf: Fix for setting queues to 0
	MIPS: generic/yamon-dt: fix uninitialized variable error
	mips: bcm63xx: add support for clk_get_parent()
	mips: lantiq: add support for clk_get_parent()
	platform/x86: hp_accel: Fix an error handling path in 'lis3lv02d_probe()'
	net/mlx5e: nullify cq->dbg pointer in mlx5_debug_cq_remove()
	net/mlx5: Lag, update tracker when state change event received
	net/mlx5: E-Switch, Change mode lock from mutex to rw semaphore
	net/mlx5: E-Switch, return error if encap isn't supported
	scsi: core: sysfs: Fix hang when device state is set via sysfs
	net: sched: act_mirred: drop dst for the direction from egress to ingress
	net: dpaa2-eth: fix use-after-free in dpaa2_eth_remove
	net: virtio_net_hdr_to_skb: count transport header in UFO
	i40e: Fix correct max_pkt_size on VF RX queue
	i40e: Fix NULL ptr dereference on VSI filter sync
	i40e: Fix changing previously set num_queue_pairs for PFs
	i40e: Fix ping is lost after configuring ADq on VF
	i40e: Fix warning message and call stack during rmmod i40e driver
	i40e: Fix creation of first queue by omitting it if is not power of two
	i40e: Fix display error code in dmesg
	NFC: reorganize the functions in nci_request
	NFC: reorder the logic in nfc_{un,}register_device
	net: nfc: nci: Change the NCI close sequence
	NFC: add NCI_UNREG flag to eliminate the race
	e100: fix device suspend/resume
	KVM: PPC: Book3S HV: Use GLOBAL_TOC for kvmppc_h_set_dabr/xdabr()
	pinctrl: qcom: sdm845: Enable dual edge errata
	perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
	perf/x86/intel/uncore: Fix IIO event constraints for Skylake Server
	s390/kexec: fix return code handling
	net: stmmac: dwmac-rk: Fix ethernet on rk3399 based devices
	arm64: vdso32: suppress error message for 'make mrproper'
	tun: fix bonding active backup with arp monitoring
	hexagon: export raw I/O routines for modules
	hexagon: clean up timer-regs.h
	tipc: check for null after calling kmemdup
	ipc: WARN if trying to remove ipc object which is absent
	mm: kmemleak: slob: respect SLAB_NOLEAKTRACE flag
	x86/hyperv: Fix NULL deref in set_hv_tscchange_cb() if Hyper-V setup fails
	powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX
	scsi: qla2xxx: Fix mailbox direction flags in qla2xxx_get_adapter_id()
	s390/kexec: fix memory leak of ipl report buffer
	block: Check ADMIN before NICE for IOPRIO_CLASS_RT
	KVM: nVMX: don't use vcpu->arch.efer when checking host state on nested state load
	udf: Fix crash after seekdir
	net: stmmac: socfpga: add runtime suspend/resume callback for stratix10 platform
	btrfs: fix memory ordering between normal and ordered work functions
	parisc/sticon: fix reverse colors
	cfg80211: call cfg80211_stop_ap when switch from P2P_GO type
	drm/amd/display: Update swizzle mode enums
	drm/udl: fix control-message timeout
	drm/nouveau: Add a dedicated mutex for the clients list
	drm/nouveau: use drm_dev_unplug() during device removal
	drm/nouveau: clean up all clients on device removal
	drm/i915/dp: Ensure sink rate values are always valid
	drm/amdgpu: fix set scaling mode Full/Full aspect/Center not works on vga and dvi connectors
	scsi: ufs: core: Fix task management completion
	scsi: ufs: core: Fix task management completion timeout race
	hugetlbfs: flush TLBs correctly after huge_pmd_unshare
	RDMA/netlink: Add __maybe_unused to static inline in C file
	selinux: fix NULL-pointer dereference when hashtab allocation fails
	ASoC: DAPM: Cover regression by kctl change notification fix
	usb: max-3421: Use driver data instead of maintaining a list of bound devices
	ice: Delete always true check of PF pointer
	fs: export an inode_update_time helper
	btrfs: update device path inode time instead of bd_inode
	x86/Kconfig: Fix an unused variable error in dell-smm-hwmon
	ALSA: hda: hdac_ext_stream: fix potential locking issues
	ALSA: hda: hdac_stream: fix potential locking issue in snd_hdac_stream_assign()
	Revert "perf: Rework perf_event_exit_event()"
	Linux 5.10.82

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I56e067875dafc27c2e86fc3b8c47abb3296c6a18
This commit is contained in:
Greg Kroah-Hartman 2021-11-26 15:37:44 +01:00
commit 8d21bcc704
179 changed files with 1478 additions and 973 deletions

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
VERSION = 5 VERSION = 5
PATCHLEVEL = 10 PATCHLEVEL = 10
SUBLEVEL = 81 SUBLEVEL = 82
EXTRAVERSION = EXTRAVERSION =
NAME = Dare mighty things NAME = Dare mighty things

View File

@ -77,7 +77,7 @@ pmu {
interrupt-affinity = <&cpu0>, <&cpu1>; interrupt-affinity = <&cpu0>, <&cpu1>;
}; };
mpcore@19000000 { mpcore-bus@19000000 {
compatible = "simple-bus"; compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>; ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>; #address-cells = <1>;
@ -219,7 +219,7 @@ dma: dma@20000 {
status = "disabled"; status = "disabled";
}; };
sdio: sdhci@21000 { sdio: mmc@21000 {
compatible = "brcm,sdhci-iproc-cygnus"; compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x21000 0x100>; reg = <0x21000 0x100>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;

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@ -195,3 +195,25 @@ partition4@800000 {
}; };
}; };
}; };
&srab {
status = "okay";
ports {
port@0 {
reg = <0>;
label = "poe";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
duplex-full;
};
};
};
};

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@ -251,7 +251,7 @@ &qspi {
flash@0 { flash@0 {
/* Rev. A uses 64MB flash, Rev. B & C use 32MB flash */ /* Rev. A uses 64MB flash, Rev. B & C use 32MB flash */
compatible = "jedec,spi-nor", "s25fl256s1", "s25fl512s"; compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>; spi-max-frequency = <20000000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;

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@ -331,39 +331,6 @@ tmu: tmu@1f00000 {
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
}; };
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
dspi0: spi@2100000 { dspi0: spi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi"; compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>; #address-cells = <1>;
@ -1018,4 +985,37 @@ ftm_alarm0: timer0@29d0000 {
big-endian; big-endian;
}; };
}; };
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
}; };

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@ -29,7 +29,7 @@ ethernet@gpmc {
compatible = "smsc,lan9221","smsc,lan9115"; compatible = "smsc,lan9221","smsc,lan9115";
bank-width = <2>; bank-width = <2>;
gpmc,mux-add-data; gpmc,mux-add-data = <0>;
gpmc,cs-on-ns = <0>; gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <42>; gpmc,cs-rd-off-ns = <42>;
gpmc,cs-wr-off-ns = <36>; gpmc,cs-wr-off-ns = <36>;

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@ -22,7 +22,7 @@ smsc2: ethernet@4,0 {
compatible = "smsc,lan9221","smsc,lan9115"; compatible = "smsc,lan9221","smsc,lan9115";
bank-width = <2>; bank-width = <2>;
gpmc,mux-add-data; gpmc,mux-add-data = <0>;
gpmc,cs-on-ns = <0>; gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <42>; gpmc,cs-rd-off-ns = <42>;
gpmc,cs-wr-off-ns = <36>; gpmc,cs-wr-off-ns = <36>;

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@ -19,12 +19,12 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
memory@0 { memory@42000000 {
reg = <0x42000000 0x3e000000>; reg = <0x42000000 0x3e000000>;
device_type = "memory"; device_type = "memory";
}; };
mdio0: mdio@0 { mdio0: mdio-0 {
status = "okay"; status = "okay";
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
@ -91,7 +91,7 @@ port@5 {
}; };
}; };
mdio1: mdio@1 { mdio1: mdio-1 {
status = "okay"; status = "okay";
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
gpios = <&qcom_pinmux 11 GPIO_ACTIVE_HIGH>, gpios = <&qcom_pinmux 11 GPIO_ACTIVE_HIGH>,

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@ -262,10 +262,10 @@ ab8500_ldo_aux1 {
}; };
ab8500_ldo_aux2 { ab8500_ldo_aux2 {
/* Supplies the Cypress TMA140 touchscreen only with 3.3V */ /* Supplies the Cypress TMA140 touchscreen only with 3.0V */
regulator-name = "AUX2"; regulator-name = "AUX2";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3000000>;
}; };
ab8500_ldo_aux3 { ab8500_ldo_aux3 {
@ -284,9 +284,9 @@ ab8500_ldo_aux4 {
ab8500_ldo_aux5 { ab8500_ldo_aux5 {
regulator-name = "AUX5"; regulator-name = "AUX5";
/* Intended for 1V8 for touchscreen but actually left unused */
regulator-min-microvolt = <1050000>; regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <2790000>; regulator-max-microvolt = <2790000>;
regulator-always-on;
}; };
ab8500_ldo_aux6 { ab8500_ldo_aux6 {

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@ -46,7 +46,7 @@
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
/ { / {
cpu0_opp_table: opp_table0 { cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;
@ -164,7 +164,7 @@ iio-hwmon {
io-channels = <&ths>; io-channels = <&ths>;
}; };
mali_opp_table: gpu-opp-table { mali_opp_table: opp-table-gpu {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-144000000 { opp-144000000 {

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@ -200,7 +200,7 @@ de: display-engine {
status = "disabled"; status = "disabled";
}; };
cpu0_opp_table: opp_table0 { cpu0_opp_table: opp-table-cluster0 {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;
@ -253,7 +253,7 @@ opp-1200000000 {
}; };
}; };
cpu1_opp_table: opp_table1 { cpu1_opp_table: opp-table-cluster1 {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;

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@ -44,7 +44,7 @@
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
/ { / {
cpu0_opp_table: opp_table0 { cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;
@ -112,7 +112,7 @@ cpu3: cpu@3 {
}; };
}; };
gpu_opp_table: gpu-opp-table { gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-120000000 { opp-120000000 {

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@ -343,19 +343,19 @@ r_i2c1: i2c@7081800 {
}; };
thermal-zones { thermal-zones {
cpu-thermal-zone { cpu-thermal {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&ths 0>; thermal-sensors = <&ths 0>;
}; };
ddr-thermal-zone { ddr-thermal {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&ths 2>; thermal-sensors = <&ths 2>;
}; };
gpu-thermal-zone { gpu-thermal {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&ths 1>; thermal-sensors = <&ths 1>;

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@ -4,7 +4,7 @@
*/ */
/ { / {
cpu0_opp_table: opp_table0 { cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;

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@ -2,7 +2,7 @@
// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org> // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
/ { / {
cpu_opp_table: cpu-opp-table { cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;

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@ -204,7 +204,7 @@ cpu-hot-limit {
}; };
}; };
gpu_thermal { gpu-thermal {
polling-delay-passive = <0>; polling-delay-passive = <0>;
polling-delay = <0>; polling-delay = <0>;
thermal-sensors = <&ths 1>; thermal-sensors = <&ths 1>;

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@ -3,7 +3,7 @@
// Copyright (C) 2020 Clément Péron <peron.clem@gmail.com> // Copyright (C) 2020 Clément Péron <peron.clem@gmail.com>
/ { / {
cpu_opp_table: cpu-opp-table { cpu_opp_table: opp-table-cpu {
compatible = "allwinner,sun50i-h6-operating-points"; compatible = "allwinner,sun50i-h6-operating-points";
nvmem-cells = <&cpu_speed_grade>; nvmem-cells = <&cpu_speed_grade>;
opp-shared; opp-shared;

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@ -673,56 +673,56 @@ ptp-timer@8b95000 {
}; };
cluster1_core0_watchdog: wdt@c000000 { cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>; reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster1_core1_watchdog: wdt@c010000 { cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>; reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster1_core2_watchdog: wdt@c020000 { cluster1_core2_watchdog: wdt@c020000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc020000 0x0 0x1000>; reg = <0x0 0xc020000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster1_core3_watchdog: wdt@c030000 { cluster1_core3_watchdog: wdt@c030000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc030000 0x0 0x1000>; reg = <0x0 0xc030000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster2_core0_watchdog: wdt@c100000 { cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>; reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster2_core1_watchdog: wdt@c110000 { cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>; reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster2_core2_watchdog: wdt@c120000 { cluster2_core2_watchdog: wdt@c120000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc120000 0x0 0x1000>; reg = <0x0 0xc120000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster2_core3_watchdog: wdt@c130000 { cluster2_core3_watchdog: wdt@c130000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc130000 0x0 0x1000>; reg = <0x0 0xc130000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>; clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";

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@ -351,56 +351,56 @@ serial3: serial@21d0600 {
}; };
cluster1_core0_watchdog: wdt@c000000 { cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>; reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster1_core1_watchdog: wdt@c010000 { cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>; reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster2_core0_watchdog: wdt@c100000 { cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>; reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster2_core1_watchdog: wdt@c110000 { cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>; reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster3_core0_watchdog: wdt@c200000 { cluster3_core0_watchdog: wdt@c200000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc200000 0x0 0x1000>; reg = <0x0 0xc200000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster3_core1_watchdog: wdt@c210000 { cluster3_core1_watchdog: wdt@c210000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc210000 0x0 0x1000>; reg = <0x0 0xc210000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster4_core0_watchdog: wdt@c300000 { cluster4_core0_watchdog: wdt@c300000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc300000 0x0 0x1000>; reg = <0x0 0xc300000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";
}; };
cluster4_core1_watchdog: wdt@c310000 { cluster4_core1_watchdog: wdt@c310000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc310000 0x0 0x1000>; reg = <0x0 0xc310000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>; clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "wdog_clk", "apb_pclk"; clock-names = "wdog_clk", "apb_pclk";

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@ -1086,7 +1086,7 @@ dwmmc2: dwmmc2@ff3ff000 {
}; };
watchdog0: watchdog@e8a06000 { watchdog0: watchdog@e8a06000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a06000 0x0 0x1000>; reg = <0x0 0xe8a06000 0x0 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>, clocks = <&crg_ctrl HI3660_OSC32K>,
@ -1095,7 +1095,7 @@ watchdog0: watchdog@e8a06000 {
}; };
watchdog1: watchdog@e8a07000 { watchdog1: watchdog@e8a07000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a07000 0x0 0x1000>; reg = <0x0 0xe8a07000 0x0 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>, clocks = <&crg_ctrl HI3660_OSC32K>,

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@ -840,7 +840,7 @@ dwmmc_2: dwmmc2@f723f000 {
}; };
watchdog0: watchdog@f8005000 { watchdog0: watchdog@f8005000 {
compatible = "arm,sp805-wdt", "arm,primecell"; compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xf8005000 0x0 0x1000>; reg = <0x0 0xf8005000 0x0 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ao_ctrl HI6220_WDT0_PCLK>, clocks = <&ao_ctrl HI6220_WDT0_PCLK>,

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@ -200,7 +200,7 @@ cryptobam: dma@704000 {
clock-names = "bam_clk"; clock-names = "bam_clk";
#dma-cells = <1>; #dma-cells = <1>;
qcom,ee = <1>; qcom,ee = <1>;
qcom,controlled-remotely = <1>; qcom,controlled-remotely;
qcom,config-pipe-trust-reg = <0>; qcom,config-pipe-trust-reg = <0>;
}; };

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@ -300,38 +300,42 @@ idle-states {
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state"; compatible = "arm,idle-state";
idle-state-name = "little-retention"; idle-state-name = "little-retention";
/* CPU Retention (C2D), L2 Active */
arm,psci-suspend-param = <0x00000002>; arm,psci-suspend-param = <0x00000002>;
entry-latency-us = <81>; entry-latency-us = <81>;
exit-latency-us = <86>; exit-latency-us = <86>;
min-residency-us = <200>; min-residency-us = <504>;
}; };
LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
compatible = "arm,idle-state"; compatible = "arm,idle-state";
idle-state-name = "little-power-collapse"; idle-state-name = "little-power-collapse";
/* CPU + L2 Power Collapse (C3, D4) */
arm,psci-suspend-param = <0x40000003>; arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <273>; entry-latency-us = <814>;
exit-latency-us = <612>; exit-latency-us = <4562>;
min-residency-us = <1000>; min-residency-us = <9183>;
local-timer-stop; local-timer-stop;
}; };
BIG_CPU_SLEEP_0: cpu-sleep-1-0 { BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
compatible = "arm,idle-state"; compatible = "arm,idle-state";
idle-state-name = "big-retention"; idle-state-name = "big-retention";
/* CPU Retention (C2D), L2 Active */
arm,psci-suspend-param = <0x00000002>; arm,psci-suspend-param = <0x00000002>;
entry-latency-us = <79>; entry-latency-us = <79>;
exit-latency-us = <82>; exit-latency-us = <82>;
min-residency-us = <200>; min-residency-us = <1302>;
}; };
BIG_CPU_SLEEP_1: cpu-sleep-1-1 { BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
compatible = "arm,idle-state"; compatible = "arm,idle-state";
idle-state-name = "big-power-collapse"; idle-state-name = "big-power-collapse";
/* CPU + L2 Power Collapse (C3, D4) */
arm,psci-suspend-param = <0x40000003>; arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <336>; entry-latency-us = <724>;
exit-latency-us = <525>; exit-latency-us = <2027>;
min-residency-us = <1000>; min-residency-us = <9419>;
local-timer-stop; local-timer-stop;
}; };
}; };

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@ -379,10 +379,6 @@ mains_charger: dc-charger {
}; };
}; };
&cdn_dp {
status = "okay";
};
&cpu_b0 { &cpu_b0 {
cpu-supply = <&vdd_cpu_b>; cpu-supply = <&vdd_cpu_b>;
}; };

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@ -131,7 +131,7 @@ spi0_flash0: flash@0 {
reg = <0>; reg = <0>;
partition@0 { partition@0 {
label = "data"; label = "spi0-data";
reg = <0x0 0x100000>; reg = <0x0 0x100000>;
}; };
}; };
@ -149,7 +149,7 @@ spi1_flash0: flash@0 {
reg = <0>; reg = <0>;
partition@0 { partition@0 {
label = "data"; label = "spi1-data";
reg = <0x0 0x84000>; reg = <0x0 0x84000>;
}; };
}; };

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@ -688,7 +688,7 @@ ttc3: timer@ff140000 {
}; };
uart0: serial@ff000000 { uart0: serial@ff000000 {
compatible = "cdns,uart-r1p12", "xlnx,xuartps"; compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
status = "disabled"; status = "disabled";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 21 4>; interrupts = <0 21 4>;
@ -698,7 +698,7 @@ uart0: serial@ff000000 {
}; };
uart1: serial@ff010000 { uart1: serial@ff010000 {
compatible = "cdns,uart-r1p12", "xlnx,xuartps"; compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
status = "disabled"; status = "disabled";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 22 4>; interrupts = <0 22 4>;

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@ -40,7 +40,8 @@ cc32-as-instr = $(call try-run,\
# As a result we set our own flags here. # As a result we set our own flags here.
# KBUILD_CPPFLAGS and NOSTDINC_FLAGS from top-level Makefile # KBUILD_CPPFLAGS and NOSTDINC_FLAGS from top-level Makefile
VDSO_CPPFLAGS := -DBUILD_VDSO -D__KERNEL__ -nostdinc -isystem $(shell $(CC_COMPAT) -print-file-name=include) VDSO_CPPFLAGS := -DBUILD_VDSO -D__KERNEL__ -nostdinc
VDSO_CPPFLAGS += -isystem $(shell $(CC_COMPAT) -print-file-name=include 2>/dev/null)
VDSO_CPPFLAGS += $(LINUXINCLUDE) VDSO_CPPFLAGS += $(LINUXINCLUDE)
# Common C and assembly flags # Common C and assembly flags

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@ -1,26 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Timer support for Hexagon
*
* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
*/
#ifndef _ASM_TIMER_REGS_H
#define _ASM_TIMER_REGS_H
/* This stuff should go into a platform specific file */
#define TCX0_CLK_RATE 19200
#define TIMER_ENABLE 0
#define TIMER_CLR_ON_MATCH 1
/*
* 8x50 HDD Specs 5-8. Simulator co-sim not fixed until
* release 1.1, and then it's "adjustable" and probably not defaulted.
*/
#define RTOS_TIMER_INT 3
#ifdef CONFIG_HEXAGON_COMET
#define RTOS_TIMER_REGS_ADDR 0xAB000000UL
#endif
#define SLEEP_CLK_RATE 32000
#endif

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@ -7,11 +7,10 @@
#define _ASM_TIMEX_H #define _ASM_TIMEX_H
#include <asm-generic/timex.h> #include <asm-generic/timex.h>
#include <asm/timer-regs.h>
#include <asm/hexagon_vm.h> #include <asm/hexagon_vm.h>
/* Using TCX0 as our clock. CLOCK_TICK_RATE scheduled to be removed. */ /* Using TCX0 as our clock. CLOCK_TICK_RATE scheduled to be removed. */
#define CLOCK_TICK_RATE TCX0_CLK_RATE #define CLOCK_TICK_RATE 19200
#define ARCH_HAS_READ_CURRENT_TIMER #define ARCH_HAS_READ_CURRENT_TIMER

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@ -17,9 +17,10 @@
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/module.h> #include <linux/module.h>
#include <asm/timer-regs.h>
#include <asm/hexagon_vm.h> #include <asm/hexagon_vm.h>
#define TIMER_ENABLE BIT(0)
/* /*
* For the clocksource we need: * For the clocksource we need:
* pcycle frequency (600MHz) * pcycle frequency (600MHz)
@ -33,6 +34,13 @@ cycles_t pcycle_freq_mhz;
cycles_t thread_freq_mhz; cycles_t thread_freq_mhz;
cycles_t sleep_clk_freq; cycles_t sleep_clk_freq;
/*
* 8x50 HDD Specs 5-8. Simulator co-sim not fixed until
* release 1.1, and then it's "adjustable" and probably not defaulted.
*/
#define RTOS_TIMER_INT 3
#define RTOS_TIMER_REGS_ADDR 0xAB000000UL
static struct resource rtos_timer_resources[] = { static struct resource rtos_timer_resources[] = {
{ {
.start = RTOS_TIMER_REGS_ADDR, .start = RTOS_TIMER_REGS_ADDR,
@ -80,7 +88,7 @@ static int set_next_event(unsigned long delta, struct clock_event_device *evt)
iowrite32(0, &rtos_timer->clear); iowrite32(0, &rtos_timer->clear);
iowrite32(delta, &rtos_timer->match); iowrite32(delta, &rtos_timer->match);
iowrite32(1 << TIMER_ENABLE, &rtos_timer->enable); iowrite32(TIMER_ENABLE, &rtos_timer->enable);
return 0; return 0;
} }

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@ -27,6 +27,7 @@ void __raw_readsw(const void __iomem *addr, void *data, int len)
*dst++ = *src; *dst++ = *src;
} }
EXPORT_SYMBOL(__raw_readsw);
/* /*
* __raw_writesw - read words a short at a time * __raw_writesw - read words a short at a time
@ -47,6 +48,7 @@ void __raw_writesw(void __iomem *addr, const void *data, int len)
} }
EXPORT_SYMBOL(__raw_writesw);
/* Pretty sure len is pre-adjusted for the length of the access already */ /* Pretty sure len is pre-adjusted for the length of the access already */
void __raw_readsl(const void __iomem *addr, void *data, int len) void __raw_readsl(const void __iomem *addr, void *data, int len)
@ -62,6 +64,7 @@ void __raw_readsl(const void __iomem *addr, void *data, int len)
} }
EXPORT_SYMBOL(__raw_readsl);
void __raw_writesl(void __iomem *addr, const void *data, int len) void __raw_writesl(void __iomem *addr, const void *data, int len)
{ {
@ -76,3 +79,4 @@ void __raw_writesl(void __iomem *addr, const void *data, int len)
} }
EXPORT_SYMBOL(__raw_writesl);

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@ -320,6 +320,9 @@ config BCM63XX
select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN
select SYS_HAS_EARLY_PRINTK select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_BMIPS32_3300
select SYS_HAS_CPU_BMIPS4350
select SYS_HAS_CPU_BMIPS4380
select SWAP_IO_SPACE select SWAP_IO_SPACE
select GPIOLIB select GPIOLIB
select MIPS_L1_CACHE_SHIFT_4 select MIPS_L1_CACHE_SHIFT_4

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@ -381,6 +381,12 @@ void clk_disable(struct clk *clk)
EXPORT_SYMBOL(clk_disable); EXPORT_SYMBOL(clk_disable);
struct clk *clk_get_parent(struct clk *clk)
{
return NULL;
}
EXPORT_SYMBOL(clk_get_parent);
unsigned long clk_get_rate(struct clk *clk) unsigned long clk_get_rate(struct clk *clk)
{ {
if (!clk) if (!clk)

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@ -75,7 +75,7 @@ static unsigned int __init gen_fdt_mem_array(
__init int yamon_dt_append_memory(void *fdt, __init int yamon_dt_append_memory(void *fdt,
const struct yamon_mem_region *regions) const struct yamon_mem_region *regions)
{ {
unsigned long phys_memsize, memsize; unsigned long phys_memsize = 0, memsize;
__be32 mem_array[2 * MAX_MEM_ARRAY_ENTRIES]; __be32 mem_array[2 * MAX_MEM_ARRAY_ENTRIES];
unsigned int mem_entries; unsigned int mem_entries;
int i, err, mem_off; int i, err, mem_off;

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@ -158,6 +158,12 @@ void clk_deactivate(struct clk *clk)
} }
EXPORT_SYMBOL(clk_deactivate); EXPORT_SYMBOL(clk_deactivate);
struct clk *clk_get_parent(struct clk *clk)
{
return NULL;
}
EXPORT_SYMBOL(clk_get_parent);
static inline u32 get_counter_resolution(void) static inline u32 get_counter_resolution(void)
{ {
u32 res; u32 res;

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@ -18,14 +18,14 @@ static int a20r_set_periodic(struct clock_event_device *evt)
{ {
*(volatile u8 *)(A20R_PT_CLOCK_BASE + 12) = 0x34; *(volatile u8 *)(A20R_PT_CLOCK_BASE + 12) = 0x34;
wmb(); wmb();
*(volatile u8 *)(A20R_PT_CLOCK_BASE + 0) = SNI_COUNTER0_DIV; *(volatile u8 *)(A20R_PT_CLOCK_BASE + 0) = SNI_COUNTER0_DIV & 0xff;
wmb(); wmb();
*(volatile u8 *)(A20R_PT_CLOCK_BASE + 0) = SNI_COUNTER0_DIV >> 8; *(volatile u8 *)(A20R_PT_CLOCK_BASE + 0) = SNI_COUNTER0_DIV >> 8;
wmb(); wmb();
*(volatile u8 *)(A20R_PT_CLOCK_BASE + 12) = 0xb4; *(volatile u8 *)(A20R_PT_CLOCK_BASE + 12) = 0xb4;
wmb(); wmb();
*(volatile u8 *)(A20R_PT_CLOCK_BASE + 8) = SNI_COUNTER2_DIV; *(volatile u8 *)(A20R_PT_CLOCK_BASE + 8) = SNI_COUNTER2_DIV & 0xff;
wmb(); wmb();
*(volatile u8 *)(A20R_PT_CLOCK_BASE + 8) = SNI_COUNTER2_DIV >> 8; *(volatile u8 *)(A20R_PT_CLOCK_BASE + 8) = SNI_COUNTER2_DIV >> 8;
wmb(); wmb();

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@ -35,7 +35,7 @@ PowerPC,5200@0 {
}; };
}; };
memory { memory@0 {
device_type = "memory"; device_type = "memory";
reg = <0x00000000 0x08000000>; // 128MB reg = <0x00000000 0x08000000>; // 128MB
}; };

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@ -16,7 +16,7 @@ / {
model = "intercontrol,digsy-mtc"; model = "intercontrol,digsy-mtc";
compatible = "intercontrol,digsy-mtc"; compatible = "intercontrol,digsy-mtc";
memory { memory@0 {
reg = <0x00000000 0x02000000>; // 32MB reg = <0x00000000 0x02000000>; // 32MB
}; };

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@ -32,7 +32,7 @@ PowerPC,5200@0 {
}; };
}; };
memory { memory@0 {
device_type = "memory"; device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };

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@ -31,7 +31,7 @@ tmr3 {
led4 { gpios = <&gpio_simple 2 1>; }; led4 { gpios = <&gpio_simple 2 1>; };
}; };
memory { memory@0 {
reg = <0x00000000 0x10000000>; // 256MB reg = <0x00000000 0x10000000>; // 256MB
}; };

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@ -32,7 +32,7 @@ PowerPC,5200@0 {
}; };
}; };
memory { memory@0 {
reg = <0x00000000 0x08000000>; // 128MB RAM reg = <0x00000000 0x08000000>; // 128MB RAM
}; };

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@ -33,7 +33,7 @@ powerpc: PowerPC,5200@0 {
}; };
}; };
memory: memory { memory: memory@0 {
device_type = "memory"; device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };

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@ -12,7 +12,7 @@ / {
model = "ifm,o2d"; model = "ifm,o2d";
compatible = "ifm,o2d"; compatible = "ifm,o2d";
memory { memory@0 {
reg = <0x00000000 0x08000000>; // 128MB reg = <0x00000000 0x08000000>; // 128MB
}; };

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@ -19,7 +19,7 @@ / {
model = "ifm,o2d"; model = "ifm,o2d";
compatible = "ifm,o2d"; compatible = "ifm,o2d";
memory { memory@0 {
reg = <0x00000000 0x04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };

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@ -12,7 +12,7 @@ / {
model = "ifm,o2dnt2"; model = "ifm,o2dnt2";
compatible = "ifm,o2d"; compatible = "ifm,o2d";
memory { memory@0 {
reg = <0x00000000 0x08000000>; // 128MB reg = <0x00000000 0x08000000>; // 128MB
}; };

View File

@ -12,7 +12,7 @@ / {
model = "ifm,o3dnt"; model = "ifm,o3dnt";
compatible = "ifm,o2d"; compatible = "ifm,o2d";
memory { memory@0 {
reg = <0x00000000 0x04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };

View File

@ -20,7 +20,7 @@ / {
model = "phytec,pcm032"; model = "phytec,pcm032";
compatible = "phytec,pcm032"; compatible = "phytec,pcm032";
memory { memory@0 {
reg = <0x00000000 0x08000000>; // 128MB reg = <0x00000000 0x08000000>; // 128MB
}; };

View File

@ -32,7 +32,7 @@ PowerPC,5200@0 {
}; };
}; };
memory { memory@0 {
device_type = "memory"; device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB reg = <0x00000000 0x04000000>; // 64MB
}; };

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@ -766,6 +766,7 @@ _GLOBAL(mmu_pin_tlb)
#ifdef CONFIG_PIN_TLB_DATA #ifdef CONFIG_PIN_TLB_DATA
LOAD_REG_IMMEDIATE(r6, PAGE_OFFSET) LOAD_REG_IMMEDIATE(r6, PAGE_OFFSET)
LOAD_REG_IMMEDIATE(r7, MI_SVALID | MI_PS8MEG | _PMD_ACCESSED) LOAD_REG_IMMEDIATE(r7, MI_SVALID | MI_PS8MEG | _PMD_ACCESSED)
li r8, 0
#ifdef CONFIG_PIN_TLB_IMMR #ifdef CONFIG_PIN_TLB_IMMR
li r0, 3 li r0, 3
#else #else
@ -774,26 +775,26 @@ _GLOBAL(mmu_pin_tlb)
mtctr r0 mtctr r0
cmpwi r4, 0 cmpwi r4, 0
beq 4f beq 4f
LOAD_REG_IMMEDIATE(r8, 0xf0 | _PAGE_RO | _PAGE_SPS | _PAGE_SH | _PAGE_PRESENT)
LOAD_REG_ADDR(r9, _sinittext) LOAD_REG_ADDR(r9, _sinittext)
2: ori r0, r6, MD_EVALID 2: ori r0, r6, MD_EVALID
ori r12, r8, 0xf0 | _PAGE_RO | _PAGE_SPS | _PAGE_SH | _PAGE_PRESENT
mtspr SPRN_MD_CTR, r5 mtspr SPRN_MD_CTR, r5
mtspr SPRN_MD_EPN, r0 mtspr SPRN_MD_EPN, r0
mtspr SPRN_MD_TWC, r7 mtspr SPRN_MD_TWC, r7
mtspr SPRN_MD_RPN, r8 mtspr SPRN_MD_RPN, r12
addi r5, r5, 0x100 addi r5, r5, 0x100
addis r6, r6, SZ_8M@h addis r6, r6, SZ_8M@h
addis r8, r8, SZ_8M@h addis r8, r8, SZ_8M@h
cmplw r6, r9 cmplw r6, r9
bdnzt lt, 2b bdnzt lt, 2b
4:
4: LOAD_REG_IMMEDIATE(r8, 0xf0 | _PAGE_SPS | _PAGE_SH | _PAGE_PRESENT)
2: ori r0, r6, MD_EVALID 2: ori r0, r6, MD_EVALID
ori r12, r8, 0xf0 | _PAGE_DIRTY | _PAGE_SPS | _PAGE_SH | _PAGE_PRESENT
mtspr SPRN_MD_CTR, r5 mtspr SPRN_MD_CTR, r5
mtspr SPRN_MD_EPN, r0 mtspr SPRN_MD_EPN, r0
mtspr SPRN_MD_TWC, r7 mtspr SPRN_MD_TWC, r7
mtspr SPRN_MD_RPN, r8 mtspr SPRN_MD_RPN, r12
addi r5, r5, 0x100 addi r5, r5, 0x100
addis r6, r6, SZ_8M@h addis r6, r6, SZ_8M@h
addis r8, r8, SZ_8M@h addis r8, r8, SZ_8M@h
@ -814,7 +815,7 @@ _GLOBAL(mmu_pin_tlb)
#endif #endif
#if defined(CONFIG_PIN_TLB_IMMR) || defined(CONFIG_PIN_TLB_DATA) #if defined(CONFIG_PIN_TLB_IMMR) || defined(CONFIG_PIN_TLB_DATA)
lis r0, (MD_RSV4I | MD_TWAM)@h lis r0, (MD_RSV4I | MD_TWAM)@h
mtspr SPRN_MI_CTR, r0 mtspr SPRN_MD_CTR, r0
#endif #endif
mtspr SPRN_SRR1, r10 mtspr SPRN_SRR1, r10
mtspr SPRN_SRR0, r11 mtspr SPRN_SRR0, r11

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@ -2539,7 +2539,7 @@ hcall_real_table:
.globl hcall_real_table_end .globl hcall_real_table_end
hcall_real_table_end: hcall_real_table_end:
_GLOBAL(kvmppc_h_set_xdabr) _GLOBAL_TOC(kvmppc_h_set_xdabr)
EXPORT_SYMBOL_GPL(kvmppc_h_set_xdabr) EXPORT_SYMBOL_GPL(kvmppc_h_set_xdabr)
andi. r0, r5, DABRX_USER | DABRX_KERNEL andi. r0, r5, DABRX_USER | DABRX_KERNEL
beq 6f beq 6f
@ -2549,7 +2549,7 @@ EXPORT_SYMBOL_GPL(kvmppc_h_set_xdabr)
6: li r3, H_PARAMETER 6: li r3, H_PARAMETER
blr blr
_GLOBAL(kvmppc_h_set_dabr) _GLOBAL_TOC(kvmppc_h_set_dabr)
EXPORT_SYMBOL_GPL(kvmppc_h_set_dabr) EXPORT_SYMBOL_GPL(kvmppc_h_set_dabr)
li r5, DABRX_USER | DABRX_KERNEL li r5, DABRX_USER | DABRX_KERNEL
3: 3:

View File

@ -11,7 +11,7 @@
#include <asm/export.h> #include <asm/export.h>
#define DCR_ACCESS_PROLOG(table) \ #define DCR_ACCESS_PROLOG(table) \
cmpli cr0,r3,1024; \ cmplwi cr0,r3,1024; \
rlwinm r3,r3,4,18,27; \ rlwinm r3,r3,4,18,27; \
lis r5,table@h; \ lis r5,table@h; \
ori r5,r5,table@l; \ ori r5,r5,table@l; \

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@ -74,6 +74,12 @@ void *kexec_file_add_components(struct kimage *image,
int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val, int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val,
unsigned long addr); unsigned long addr);
#define ARCH_HAS_KIMAGE_ARCH
struct kimage_arch {
void *ipl_buf;
};
extern const struct kexec_file_ops s390_kexec_image_ops; extern const struct kexec_file_ops s390_kexec_image_ops;
extern const struct kexec_file_ops s390_kexec_elf_ops; extern const struct kexec_file_ops s390_kexec_elf_ops;

View File

@ -2156,7 +2156,7 @@ void *ipl_report_finish(struct ipl_report *report)
buf = vzalloc(report->size); buf = vzalloc(report->size);
if (!buf) if (!buf)
return ERR_PTR(-ENOMEM); goto out;
ptr = buf; ptr = buf;
memcpy(ptr, report->ipib, report->ipib->hdr.len); memcpy(ptr, report->ipib, report->ipib->hdr.len);
@ -2195,6 +2195,7 @@ void *ipl_report_finish(struct ipl_report *report)
} }
BUG_ON(ptr > buf + report->size); BUG_ON(ptr > buf + report->size);
out:
return buf; return buf;
} }

View File

@ -12,6 +12,7 @@
#include <linux/kexec.h> #include <linux/kexec.h>
#include <linux/module_signature.h> #include <linux/module_signature.h>
#include <linux/verification.h> #include <linux/verification.h>
#include <linux/vmalloc.h>
#include <asm/boot_data.h> #include <asm/boot_data.h>
#include <asm/ipl.h> #include <asm/ipl.h>
#include <asm/setup.h> #include <asm/setup.h>
@ -170,6 +171,7 @@ static int kexec_file_add_ipl_report(struct kimage *image,
struct kexec_buf buf; struct kexec_buf buf;
unsigned long addr; unsigned long addr;
void *ptr, *end; void *ptr, *end;
int ret;
buf.image = image; buf.image = image;
@ -199,9 +201,13 @@ static int kexec_file_add_ipl_report(struct kimage *image,
ptr += len; ptr += len;
} }
ret = -ENOMEM;
buf.buffer = ipl_report_finish(data->report); buf.buffer = ipl_report_finish(data->report);
if (!buf.buffer)
goto out;
buf.bufsz = data->report->size; buf.bufsz = data->report->size;
buf.memsz = buf.bufsz; buf.memsz = buf.bufsz;
image->arch.ipl_buf = buf.buffer;
data->memsz += buf.memsz; data->memsz += buf.memsz;
@ -209,7 +215,9 @@ static int kexec_file_add_ipl_report(struct kimage *image,
data->kernel_buf + offsetof(struct lowcore, ipl_parmblock_ptr); data->kernel_buf + offsetof(struct lowcore, ipl_parmblock_ptr);
*lc_ipl_parmblock_ptr = (__u32)buf.mem; *lc_ipl_parmblock_ptr = (__u32)buf.mem;
return kexec_add_buffer(&buf); ret = kexec_add_buffer(&buf);
out:
return ret;
} }
void *kexec_file_add_components(struct kimage *image, void *kexec_file_add_components(struct kimage *image,
@ -321,3 +329,11 @@ int arch_kexec_kernel_image_probe(struct kimage *image, void *buf,
return kexec_image_probe_default(image, buf, buf_len); return kexec_image_probe_default(image, buf, buf_len);
} }
int arch_kimage_file_post_load_cleanup(struct kimage *image)
{
vfree(image->arch.ipl_buf);
image->arch.ipl_buf = NULL;
return kexec_image_post_load_cleanup_default(image);
}

View File

@ -57,6 +57,7 @@ config DUMP_CODE
config DWARF_UNWINDER config DWARF_UNWINDER
bool "Enable the DWARF unwinder for stacktraces" bool "Enable the DWARF unwinder for stacktraces"
depends on DEBUG_KERNEL
select FRAME_POINTER select FRAME_POINTER
default n default n
help help

View File

@ -13,6 +13,14 @@
#ifndef _SFP_MACHINE_H #ifndef _SFP_MACHINE_H
#define _SFP_MACHINE_H #define _SFP_MACHINE_H
#ifdef __BIG_ENDIAN__
#define __BYTE_ORDER __BIG_ENDIAN
#define __LITTLE_ENDIAN 0
#else
#define __BYTE_ORDER __LITTLE_ENDIAN
#define __BIG_ENDIAN 0
#endif
#define _FP_W_TYPE_SIZE 32 #define _FP_W_TYPE_SIZE 32
#define _FP_W_TYPE unsigned long #define _FP_W_TYPE unsigned long
#define _FP_WS_TYPE signed long #define _FP_WS_TYPE signed long

View File

@ -73,8 +73,9 @@ static void shx3_prepare_cpus(unsigned int max_cpus)
BUILD_BUG_ON(SMP_MSG_NR >= 8); BUILD_BUG_ON(SMP_MSG_NR >= 8);
for (i = 0; i < SMP_MSG_NR; i++) for (i = 0; i < SMP_MSG_NR; i++)
request_irq(104 + i, ipi_interrupt_handler, if (request_irq(104 + i, ipi_interrupt_handler,
IRQF_PERCPU, "IPI", (void *)(long)i); IRQF_PERCPU, "IPI", (void *)(long)i))
pr_err("Failed to request irq %d\n", i);
for (i = 0; i < max_cpus; i++) for (i = 0; i < max_cpus; i++)
set_cpu_present(i, true); set_cpu_present(i, true);

View File

@ -467,109 +467,6 @@ static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_reg
return id_sys(fregs, regs, code); return id_sys(fregs, regs, code);
} }
/**
* denormal_to_double - Given denormalized float number,
* store double float
*
* @fpu: Pointer to sh_fpu_soft structure
* @n: Index to FP register
*/
static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n)
{
unsigned long du, dl;
unsigned long x = fpu->fpul;
int exp = 1023 - 126;
if (x != 0 && (x & 0x7f800000) == 0) {
du = (x & 0x80000000);
while ((x & 0x00800000) == 0) {
x <<= 1;
exp--;
}
x &= 0x007fffff;
du |= (exp << 20) | (x >> 3);
dl = x << 29;
fpu->fp_regs[n] = du;
fpu->fp_regs[n+1] = dl;
}
}
/**
* ieee_fpe_handler - Handle denormalized number exception
*
* @regs: Pointer to register structure
*
* Returns 1 when it's handled (should not cause exception).
*/
static int ieee_fpe_handler(struct pt_regs *regs)
{
unsigned short insn = *(unsigned short *)regs->pc;
unsigned short finsn;
unsigned long nextpc;
int nib[4] = {
(insn >> 12) & 0xf,
(insn >> 8) & 0xf,
(insn >> 4) & 0xf,
insn & 0xf};
if (nib[0] == 0xb ||
(nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
regs->pr = regs->pc + 4;
if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
finsn = *(unsigned short *) (regs->pc + 2);
} else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
if (regs->sr & 1)
nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
else
nextpc = regs->pc + 4;
finsn = *(unsigned short *) (regs->pc + 2);
} else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
if (regs->sr & 1)
nextpc = regs->pc + 4;
else
nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
finsn = *(unsigned short *) (regs->pc + 2);
} else if (nib[0] == 0x4 && nib[3] == 0xb &&
(nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
nextpc = regs->regs[nib[1]];
finsn = *(unsigned short *) (regs->pc + 2);
} else if (nib[0] == 0x0 && nib[3] == 0x3 &&
(nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
nextpc = regs->pc + 4 + regs->regs[nib[1]];
finsn = *(unsigned short *) (regs->pc + 2);
} else if (insn == 0x000b) { /* rts */
nextpc = regs->pr;
finsn = *(unsigned short *) (regs->pc + 2);
} else {
nextpc = regs->pc + 2;
finsn = insn;
}
if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
struct task_struct *tsk = current;
if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) {
/* FPU error */
denormal_to_double (&tsk->thread.xstate->softfpu,
(finsn >> 8) & 0xf);
tsk->thread.xstate->softfpu.fpscr &=
~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
task_thread_info(tsk)->status |= TS_USEDFPU;
} else {
force_sig_fault(SIGFPE, FPE_FLTINV,
(void __user *)regs->pc);
}
regs->pc = nextpc;
return 1;
}
return 0;
}
/** /**
* fpu_init - Initialize FPU registers * fpu_init - Initialize FPU registers
* @fpu: Pointer to software emulated FPU registers. * @fpu: Pointer to software emulated FPU registers.

View File

@ -1273,7 +1273,8 @@ config TOSHIBA
config I8K config I8K
tristate "Dell i8k legacy laptop support" tristate "Dell i8k legacy laptop support"
select HWMON depends on HWMON
depends on PROC_FS
select SENSORS_DELL_SMM select SENSORS_DELL_SMM
help help
This option enables legacy /proc/i8k userspace interface in hwmon This option enables legacy /proc/i8k userspace interface in hwmon

View File

@ -2879,8 +2879,10 @@ intel_vlbr_constraints(struct perf_event *event)
{ {
struct event_constraint *c = &vlbr_constraint; struct event_constraint *c = &vlbr_constraint;
if (unlikely(constraint_match(c, event->hw.config))) if (unlikely(constraint_match(c, event->hw.config))) {
event->hw.flags |= c->flags;
return c; return c;
}
return NULL; return NULL;
} }

View File

@ -3545,6 +3545,9 @@ static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev
struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
struct extra_reg *er; struct extra_reg *er;
int idx = 0; int idx = 0;
/* Any of the CHA events may be filtered by Thread/Core-ID.*/
if (event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN)
idx = SKX_CHA_MSR_PMON_BOX_FILTER_TID;
for (er = skx_uncore_cha_extra_regs; er->msr; er++) { for (er = skx_uncore_cha_extra_regs; er->msr; er++) {
if (er->event != (event->hw.config & er->config_mask)) if (er->event != (event->hw.config & er->config_mask))
@ -3612,6 +3615,7 @@ static struct event_constraint skx_uncore_iio_constraints[] = {
UNCORE_EVENT_CONSTRAINT(0xc0, 0xc), UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),
UNCORE_EVENT_CONSTRAINT(0xc5, 0xc), UNCORE_EVENT_CONSTRAINT(0xc5, 0xc),
UNCORE_EVENT_CONSTRAINT(0xd4, 0xc), UNCORE_EVENT_CONSTRAINT(0xd4, 0xc),
UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),
EVENT_CONSTRAINT_END EVENT_CONSTRAINT_END
}; };

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@ -176,6 +176,9 @@ void set_hv_tscchange_cb(void (*cb)(void))
return; return;
} }
if (!hv_vp_index)
return;
hv_reenlightenment_cb = cb; hv_reenlightenment_cb = cb;
/* Make sure callback is registered before we write to MSRs */ /* Make sure callback is registered before we write to MSRs */

View File

@ -2851,6 +2851,17 @@ static int nested_vmx_check_controls(struct kvm_vcpu *vcpu,
return 0; return 0;
} }
static int nested_vmx_check_address_space_size(struct kvm_vcpu *vcpu,
struct vmcs12 *vmcs12)
{
#ifdef CONFIG_X86_64
if (CC(!!(vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE) !=
!!(vcpu->arch.efer & EFER_LMA)))
return -EINVAL;
#endif
return 0;
}
static int nested_vmx_check_host_state(struct kvm_vcpu *vcpu, static int nested_vmx_check_host_state(struct kvm_vcpu *vcpu,
struct vmcs12 *vmcs12) struct vmcs12 *vmcs12)
{ {
@ -2875,18 +2886,16 @@ static int nested_vmx_check_host_state(struct kvm_vcpu *vcpu,
return -EINVAL; return -EINVAL;
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
ia32e = !!(vcpu->arch.efer & EFER_LMA); ia32e = !!(vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE);
#else #else
ia32e = false; ia32e = false;
#endif #endif
if (ia32e) { if (ia32e) {
if (CC(!(vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)) || if (CC(!(vmcs12->host_cr4 & X86_CR4_PAE)))
CC(!(vmcs12->host_cr4 & X86_CR4_PAE)))
return -EINVAL; return -EINVAL;
} else { } else {
if (CC(vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE) || if (CC(vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE) ||
CC(vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE) ||
CC(vmcs12->host_cr4 & X86_CR4_PCIDE) || CC(vmcs12->host_cr4 & X86_CR4_PCIDE) ||
CC((vmcs12->host_rip) >> 32)) CC((vmcs12->host_rip) >> 32))
return -EINVAL; return -EINVAL;
@ -3555,6 +3564,9 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
if (nested_vmx_check_controls(vcpu, vmcs12)) if (nested_vmx_check_controls(vcpu, vmcs12))
return nested_vmx_fail(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD); return nested_vmx_fail(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
if (nested_vmx_check_address_space_size(vcpu, vmcs12))
return nested_vmx_fail(vcpu, VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
if (nested_vmx_check_host_state(vcpu, vmcs12)) if (nested_vmx_check_host_state(vcpu, vmcs12))
return nested_vmx_fail(vcpu, VMXERR_ENTRY_INVALID_HOST_STATE_FIELD); return nested_vmx_fail(vcpu, VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);

View File

@ -903,10 +903,8 @@ static noinline_for_stack bool submit_bio_checks(struct bio *bio)
if (unlikely(!current->io_context)) if (unlikely(!current->io_context))
create_task_io_context(current, GFP_ATOMIC, q->node); create_task_io_context(current, GFP_ATOMIC, q->node);
if (blk_throtl_bio(bio)) { if (blk_throtl_bio(bio))
blkcg_bio_issue_init(bio);
return false; return false;
}
blk_cgroup_bio_start(bio); blk_cgroup_bio_start(bio);
blkcg_bio_issue_init(bio); blkcg_bio_issue_init(bio);

View File

@ -69,7 +69,14 @@ int ioprio_check_cap(int ioprio)
switch (class) { switch (class) {
case IOPRIO_CLASS_RT: case IOPRIO_CLASS_RT:
if (!capable(CAP_SYS_ADMIN)) /*
* Originally this only checked for CAP_SYS_ADMIN,
* which was implicitly allowed for pid 0 by security
* modules such as SELinux. Make sure we check
* CAP_SYS_ADMIN first to avoid a denial/avc for
* possibly missing CAP_SYS_NICE permission.
*/
if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_NICE))
return -EPERM; return -EPERM;
fallthrough; fallthrough;
/* rt has prio field too */ /* rt has prio field too */

View File

@ -99,12 +99,15 @@ static struct firmware_cache fw_cache;
extern struct builtin_fw __start_builtin_fw[]; extern struct builtin_fw __start_builtin_fw[];
extern struct builtin_fw __end_builtin_fw[]; extern struct builtin_fw __end_builtin_fw[];
static void fw_copy_to_prealloc_buf(struct firmware *fw, static bool fw_copy_to_prealloc_buf(struct firmware *fw,
void *buf, size_t size) void *buf, size_t size)
{ {
if (!buf || size < fw->size) if (!buf)
return; return true;
if (size < fw->size)
return false;
memcpy(buf, fw->data, fw->size); memcpy(buf, fw->data, fw->size);
return true;
} }
static bool fw_get_builtin_firmware(struct firmware *fw, const char *name, static bool fw_get_builtin_firmware(struct firmware *fw, const char *name,
@ -116,9 +119,7 @@ static bool fw_get_builtin_firmware(struct firmware *fw, const char *name,
if (strcmp(name, b_fw->name) == 0) { if (strcmp(name, b_fw->name) == 0) {
fw->size = b_fw->size; fw->size = b_fw->size;
fw->data = b_fw->data; fw->data = b_fw->data;
fw_copy_to_prealloc_buf(fw, buf, size); return fw_copy_to_prealloc_buf(fw, buf, size);
return true;
} }
} }

View File

@ -6,6 +6,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/clkdev.h> #include <linux/clkdev.h>
#include <linux/cpu_pm.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/list.h> #include <linux/list.h>
#include <linux/module.h> #include <linux/module.h>
@ -52,11 +53,18 @@ struct sysc_address {
struct list_head node; struct list_head node;
}; };
struct sysc_module {
struct sysc *ddata;
struct list_head node;
};
struct sysc_soc_info { struct sysc_soc_info {
unsigned long general_purpose:1; unsigned long general_purpose:1;
enum sysc_soc soc; enum sysc_soc soc;
struct mutex list_lock; /* disabled modules list lock */ struct mutex list_lock; /* disabled and restored modules list lock */
struct list_head disabled_modules; struct list_head disabled_modules;
struct list_head restored_modules;
struct notifier_block nb;
}; };
enum sysc_clocks { enum sysc_clocks {
@ -1555,7 +1563,7 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), 0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff, SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff,
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY | SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY |
SYSC_QUIRK_REINIT_ON_RESUME), SYSC_QUIRK_REINIT_ON_CTX_LOST),
SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
SYSC_MODULE_QUIRK_WDT), SYSC_MODULE_QUIRK_WDT),
/* PRUSS on am3, am4 and am5 */ /* PRUSS on am3, am4 and am5 */
@ -2429,6 +2437,79 @@ static struct dev_pm_domain sysc_child_pm_domain = {
} }
}; };
/* Caller needs to take list_lock if ever used outside of cpu_pm */
static void sysc_reinit_modules(struct sysc_soc_info *soc)
{
struct sysc_module *module;
struct list_head *pos;
struct sysc *ddata;
int error = 0;
list_for_each(pos, &sysc_soc->restored_modules) {
module = list_entry(pos, struct sysc_module, node);
ddata = module->ddata;
error = sysc_reinit_module(ddata, ddata->enabled);
}
}
/**
* sysc_context_notifier - optionally reset and restore module after idle
* @nb: notifier block
* @cmd: unused
* @v: unused
*
* Some interconnect target modules need to be restored, or reset and restored
* on CPU_PM CPU_PM_CLUSTER_EXIT notifier. This is needed at least for am335x
* OTG and GPMC target modules even if the modules are unused.
*/
static int sysc_context_notifier(struct notifier_block *nb, unsigned long cmd,
void *v)
{
struct sysc_soc_info *soc;
soc = container_of(nb, struct sysc_soc_info, nb);
switch (cmd) {
case CPU_CLUSTER_PM_ENTER:
break;
case CPU_CLUSTER_PM_ENTER_FAILED: /* No need to restore context */
break;
case CPU_CLUSTER_PM_EXIT:
sysc_reinit_modules(soc);
break;
}
return NOTIFY_OK;
}
/**
* sysc_add_restored - optionally add reset and restore quirk hanlling
* @ddata: device data
*/
static void sysc_add_restored(struct sysc *ddata)
{
struct sysc_module *restored_module;
restored_module = kzalloc(sizeof(*restored_module), GFP_KERNEL);
if (!restored_module)
return;
restored_module->ddata = ddata;
mutex_lock(&sysc_soc->list_lock);
list_add(&restored_module->node, &sysc_soc->restored_modules);
if (sysc_soc->nb.notifier_call)
goto out_unlock;
sysc_soc->nb.notifier_call = sysc_context_notifier;
cpu_pm_register_notifier(&sysc_soc->nb);
out_unlock:
mutex_unlock(&sysc_soc->list_lock);
}
/** /**
* sysc_legacy_idle_quirk - handle children in omap_device compatible way * sysc_legacy_idle_quirk - handle children in omap_device compatible way
* @ddata: device driver data * @ddata: device driver data
@ -2928,12 +3009,14 @@ static int sysc_add_disabled(unsigned long base)
} }
/* /*
* One time init to detect the booted SoC and disable unavailable features. * One time init to detect the booted SoC, disable unavailable features
* and initialize list for optional cpu_pm notifier.
*
* Note that we initialize static data shared across all ti-sysc instances * Note that we initialize static data shared across all ti-sysc instances
* so ddata is only used for SoC type. This can be called from module_init * so ddata is only used for SoC type. This can be called from module_init
* once we no longer need to rely on platform data. * once we no longer need to rely on platform data.
*/ */
static int sysc_init_soc(struct sysc *ddata) static int sysc_init_static_data(struct sysc *ddata)
{ {
const struct soc_device_attribute *match; const struct soc_device_attribute *match;
struct ti_sysc_platform_data *pdata; struct ti_sysc_platform_data *pdata;
@ -2948,6 +3031,7 @@ static int sysc_init_soc(struct sysc *ddata)
mutex_init(&sysc_soc->list_lock); mutex_init(&sysc_soc->list_lock);
INIT_LIST_HEAD(&sysc_soc->disabled_modules); INIT_LIST_HEAD(&sysc_soc->disabled_modules);
INIT_LIST_HEAD(&sysc_soc->restored_modules);
sysc_soc->general_purpose = true; sysc_soc->general_purpose = true;
pdata = dev_get_platdata(ddata->dev); pdata = dev_get_platdata(ddata->dev);
@ -2994,15 +3078,24 @@ static int sysc_init_soc(struct sysc *ddata)
return 0; return 0;
} }
static void sysc_cleanup_soc(void) static void sysc_cleanup_static_data(void)
{ {
struct sysc_module *restored_module;
struct sysc_address *disabled_module; struct sysc_address *disabled_module;
struct list_head *pos, *tmp; struct list_head *pos, *tmp;
if (!sysc_soc) if (!sysc_soc)
return; return;
if (sysc_soc->nb.notifier_call)
cpu_pm_unregister_notifier(&sysc_soc->nb);
mutex_lock(&sysc_soc->list_lock); mutex_lock(&sysc_soc->list_lock);
list_for_each_safe(pos, tmp, &sysc_soc->restored_modules) {
restored_module = list_entry(pos, struct sysc_module, node);
list_del(pos);
kfree(restored_module);
}
list_for_each_safe(pos, tmp, &sysc_soc->disabled_modules) { list_for_each_safe(pos, tmp, &sysc_soc->disabled_modules) {
disabled_module = list_entry(pos, struct sysc_address, node); disabled_module = list_entry(pos, struct sysc_address, node);
list_del(pos); list_del(pos);
@ -3067,7 +3160,7 @@ static int sysc_probe(struct platform_device *pdev)
ddata->dev = &pdev->dev; ddata->dev = &pdev->dev;
platform_set_drvdata(pdev, ddata); platform_set_drvdata(pdev, ddata);
error = sysc_init_soc(ddata); error = sysc_init_static_data(ddata);
if (error) if (error)
return error; return error;
@ -3166,6 +3259,9 @@ static int sysc_probe(struct platform_device *pdev)
pm_runtime_put(&pdev->dev); pm_runtime_put(&pdev->dev);
} }
if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_CTX_LOST)
sysc_add_restored(ddata);
return 0; return 0;
err: err:
@ -3248,7 +3344,7 @@ static void __exit sysc_exit(void)
{ {
bus_unregister_notifier(&platform_bus_type, &sysc_nb); bus_unregister_notifier(&platform_bus_type, &sysc_nb);
platform_driver_unregister(&sysc_driver); platform_driver_unregister(&sysc_driver);
sysc_cleanup_soc(); sysc_cleanup_static_data();
} }
module_exit(sysc_exit); module_exit(sysc_exit);

View File

@ -51,6 +51,8 @@ static DEFINE_SPINLOCK(aspeed_g6_clk_lock);
static struct clk_hw_onecell_data *aspeed_g6_clk_data; static struct clk_hw_onecell_data *aspeed_g6_clk_data;
static void __iomem *scu_g6_base; static void __iomem *scu_g6_base;
/* AST2600 revision: A0, A1, A2, etc */
static u8 soc_rev;
/* /*
* Clocks marked with CLK_IS_CRITICAL: * Clocks marked with CLK_IS_CRITICAL:
@ -191,9 +193,8 @@ static struct clk_hw *ast2600_calc_pll(const char *name, u32 val)
static struct clk_hw *ast2600_calc_apll(const char *name, u32 val) static struct clk_hw *ast2600_calc_apll(const char *name, u32 val)
{ {
unsigned int mult, div; unsigned int mult, div;
u32 chip_id = readl(scu_g6_base + ASPEED_G6_SILICON_REV);
if (((chip_id & CHIP_REVISION_ID) >> 16) >= 2) { if (soc_rev >= 2) {
if (val & BIT(24)) { if (val & BIT(24)) {
/* Pass through mode */ /* Pass through mode */
mult = div = 1; mult = div = 1;
@ -707,7 +708,7 @@ static const u32 ast2600_a1_axi_ahb200_tbl[] = {
static void __init aspeed_g6_cc(struct regmap *map) static void __init aspeed_g6_cc(struct regmap *map)
{ {
struct clk_hw *hw; struct clk_hw *hw;
u32 val, div, divbits, chip_id, axi_div, ahb_div; u32 val, div, divbits, axi_div, ahb_div;
clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, 25000000); clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, 25000000);
@ -738,8 +739,7 @@ static void __init aspeed_g6_cc(struct regmap *map)
axi_div = 2; axi_div = 2;
divbits = (val >> 11) & 0x3; divbits = (val >> 11) & 0x3;
regmap_read(map, ASPEED_G6_SILICON_REV, &chip_id); if (soc_rev >= 1) {
if (chip_id & BIT(16)) {
if (!divbits) { if (!divbits) {
ahb_div = ast2600_a1_axi_ahb200_tbl[(val >> 8) & 0x3]; ahb_div = ast2600_a1_axi_ahb200_tbl[(val >> 8) & 0x3];
if (val & BIT(16)) if (val & BIT(16))
@ -784,6 +784,8 @@ static void __init aspeed_g6_cc_init(struct device_node *np)
if (!scu_g6_base) if (!scu_g6_base)
return; return;
soc_rev = (readl(scu_g6_base + ASPEED_G6_SILICON_REV) & CHIP_REVISION_ID) >> 16;
aspeed_g6_clk_data = kzalloc(struct_size(aspeed_g6_clk_data, hws, aspeed_g6_clk_data = kzalloc(struct_size(aspeed_g6_clk_data, hws,
ASPEED_G6_NUM_CLKS), GFP_KERNEL); ASPEED_G6_NUM_CLKS), GFP_KERNEL);
if (!aspeed_g6_clk_data) if (!aspeed_g6_clk_data)

View File

@ -161,7 +161,6 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
hws[IMX6UL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); hws[IMX6UL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
hws[IMX6UL_PLL6_BYPASS] = imx_clk_hw_mux_flags("pll6_bypass", base + 0xe0, 16, 1, pll6_bypass_sels, ARRAY_SIZE(pll6_bypass_sels), CLK_SET_RATE_PARENT); hws[IMX6UL_PLL6_BYPASS] = imx_clk_hw_mux_flags("pll6_bypass", base + 0xe0, 16, 1, pll6_bypass_sels, ARRAY_SIZE(pll6_bypass_sels), CLK_SET_RATE_PARENT);
hws[IMX6UL_PLL7_BYPASS] = imx_clk_hw_mux_flags("pll7_bypass", base + 0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT); hws[IMX6UL_PLL7_BYPASS] = imx_clk_hw_mux_flags("pll7_bypass", base + 0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);
hws[IMX6UL_CLK_CSI_SEL] = imx_clk_hw_mux_flags("csi_sel", base + 0x3c, 9, 2, csi_sels, ARRAY_SIZE(csi_sels), CLK_SET_RATE_PARENT);
/* Do not bypass PLLs initially */ /* Do not bypass PLLs initially */
clk_set_parent(hws[IMX6UL_PLL1_BYPASS]->clk, hws[IMX6UL_CLK_PLL1]->clk); clk_set_parent(hws[IMX6UL_PLL1_BYPASS]->clk, hws[IMX6UL_CLK_PLL1]->clk);
@ -270,6 +269,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
hws[IMX6UL_CLK_ECSPI_SEL] = imx_clk_hw_mux("ecspi_sel", base + 0x38, 18, 1, ecspi_sels, ARRAY_SIZE(ecspi_sels)); hws[IMX6UL_CLK_ECSPI_SEL] = imx_clk_hw_mux("ecspi_sel", base + 0x38, 18, 1, ecspi_sels, ARRAY_SIZE(ecspi_sels));
hws[IMX6UL_CLK_LCDIF_PRE_SEL] = imx_clk_hw_mux_flags("lcdif_pre_sel", base + 0x38, 15, 3, lcdif_pre_sels, ARRAY_SIZE(lcdif_pre_sels), CLK_SET_RATE_PARENT); hws[IMX6UL_CLK_LCDIF_PRE_SEL] = imx_clk_hw_mux_flags("lcdif_pre_sel", base + 0x38, 15, 3, lcdif_pre_sels, ARRAY_SIZE(lcdif_pre_sels), CLK_SET_RATE_PARENT);
hws[IMX6UL_CLK_LCDIF_SEL] = imx_clk_hw_mux("lcdif_sel", base + 0x38, 9, 3, lcdif_sels, ARRAY_SIZE(lcdif_sels)); hws[IMX6UL_CLK_LCDIF_SEL] = imx_clk_hw_mux("lcdif_sel", base + 0x38, 9, 3, lcdif_sels, ARRAY_SIZE(lcdif_sels));
hws[IMX6UL_CLK_CSI_SEL] = imx_clk_hw_mux("csi_sel", base + 0x3c, 9, 2, csi_sels, ARRAY_SIZE(csi_sels));
hws[IMX6UL_CLK_LDB_DI0_DIV_SEL] = imx_clk_hw_mux("ldb_di0", base + 0x20, 10, 1, ldb_di0_div_sels, ARRAY_SIZE(ldb_di0_div_sels)); hws[IMX6UL_CLK_LDB_DI0_DIV_SEL] = imx_clk_hw_mux("ldb_di0", base + 0x20, 10, 1, ldb_di0_div_sels, ARRAY_SIZE(ldb_di0_div_sels));
hws[IMX6UL_CLK_LDB_DI1_DIV_SEL] = imx_clk_hw_mux("ldb_di1", base + 0x20, 11, 1, ldb_di1_div_sels, ARRAY_SIZE(ldb_di1_div_sels)); hws[IMX6UL_CLK_LDB_DI1_DIV_SEL] = imx_clk_hw_mux("ldb_di1", base + 0x20, 11, 1, ldb_di1_div_sels, ARRAY_SIZE(ldb_di1_div_sels));

View File

@ -425,15 +425,15 @@ ingenic_clk_calc_div(const struct ingenic_cgu_clk_info *clk_info,
} }
/* Impose hardware constraints */ /* Impose hardware constraints */
div = min_t(unsigned, div, 1 << clk_info->div.bits); div = clamp_t(unsigned int, div, clk_info->div.div,
div = max_t(unsigned, div, 1); clk_info->div.div << clk_info->div.bits);
/* /*
* If the divider value itself must be divided before being written to * If the divider value itself must be divided before being written to
* the divider register, we must ensure we don't have any bits set that * the divider register, we must ensure we don't have any bits set that
* would be lost as a result of doing so. * would be lost as a result of doing so.
*/ */
div /= clk_info->div.div; div = DIV_ROUND_UP(div, clk_info->div.div);
div *= clk_info->div.div; div *= clk_info->div.div;
return div; return div;

View File

@ -2937,20 +2937,6 @@ static struct clk_branch gcc_smmu_aggre0_ahb_clk = {
}, },
}; };
static struct clk_branch gcc_aggre1_pnoc_ahb_clk = {
.halt_reg = 0x82014,
.clkr = {
.enable_reg = 0x82014,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_aggre1_pnoc_ahb_clk",
.parent_names = (const char *[]){ "periph_noc_clk_src" },
.num_parents = 1,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_aggre2_ufs_axi_clk = { static struct clk_branch gcc_aggre2_ufs_axi_clk = {
.halt_reg = 0x83014, .halt_reg = 0x83014,
.clkr = { .clkr = {
@ -3474,7 +3460,6 @@ static struct clk_regmap *gcc_msm8996_clocks[] = {
[GCC_AGGRE0_CNOC_AHB_CLK] = &gcc_aggre0_cnoc_ahb_clk.clkr, [GCC_AGGRE0_CNOC_AHB_CLK] = &gcc_aggre0_cnoc_ahb_clk.clkr,
[GCC_SMMU_AGGRE0_AXI_CLK] = &gcc_smmu_aggre0_axi_clk.clkr, [GCC_SMMU_AGGRE0_AXI_CLK] = &gcc_smmu_aggre0_axi_clk.clkr,
[GCC_SMMU_AGGRE0_AHB_CLK] = &gcc_smmu_aggre0_ahb_clk.clkr, [GCC_SMMU_AGGRE0_AHB_CLK] = &gcc_smmu_aggre0_ahb_clk.clkr,
[GCC_AGGRE1_PNOC_AHB_CLK] = &gcc_aggre1_pnoc_ahb_clk.clkr,
[GCC_AGGRE2_UFS_AXI_CLK] = &gcc_aggre2_ufs_axi_clk.clkr, [GCC_AGGRE2_UFS_AXI_CLK] = &gcc_aggre2_ufs_axi_clk.clkr,
[GCC_AGGRE2_USB3_AXI_CLK] = &gcc_aggre2_usb3_axi_clk.clkr, [GCC_AGGRE2_USB3_AXI_CLK] = &gcc_aggre2_usb3_axi_clk.clkr,
[GCC_QSPI_AHB_CLK] = &gcc_qspi_ahb_clk.clkr, [GCC_QSPI_AHB_CLK] = &gcc_qspi_ahb_clk.clkr,

View File

@ -827,6 +827,7 @@ static int amdgpu_connector_vga_get_modes(struct drm_connector *connector)
amdgpu_connector_get_edid(connector); amdgpu_connector_get_edid(connector);
ret = amdgpu_connector_ddc_get_modes(connector); ret = amdgpu_connector_ddc_get_modes(connector);
amdgpu_get_native_mode(connector);
return ret; return ret;
} }

View File

@ -1852,7 +1852,9 @@ static void swizzle_to_dml_params(
case DC_SW_VAR_D_X: case DC_SW_VAR_D_X:
*sw_mode = dm_sw_var_d_x; *sw_mode = dm_sw_var_d_x;
break; break;
case DC_SW_VAR_R_X:
*sw_mode = dm_sw_var_r_x;
break;
default: default:
ASSERT(0); /* Not supported */ ASSERT(0); /* Not supported */
break; break;

View File

@ -80,11 +80,11 @@ enum dm_swizzle_mode {
dm_sw_SPARE_13 = 24, dm_sw_SPARE_13 = 24,
dm_sw_64kb_s_x = 25, dm_sw_64kb_s_x = 25,
dm_sw_64kb_d_x = 26, dm_sw_64kb_d_x = 26,
dm_sw_SPARE_14 = 27, dm_sw_64kb_r_x = 27,
dm_sw_SPARE_15 = 28, dm_sw_SPARE_15 = 28,
dm_sw_var_s_x = 29, dm_sw_var_s_x = 29,
dm_sw_var_d_x = 30, dm_sw_var_d_x = 30,
dm_sw_64kb_r_x, dm_sw_var_r_x = 31,
dm_sw_gfx7_2d_thin_l_vp, dm_sw_gfx7_2d_thin_l_vp,
dm_sw_gfx7_2d_thin_gl, dm_sw_gfx7_2d_thin_gl,
}; };

View File

@ -154,6 +154,12 @@ static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv,
enum pipe pipe); enum pipe pipe);
static void intel_dp_unset_edid(struct intel_dp *intel_dp); static void intel_dp_unset_edid(struct intel_dp *intel_dp);
static void intel_dp_set_default_sink_rates(struct intel_dp *intel_dp)
{
intel_dp->sink_rates[0] = 162000;
intel_dp->num_sink_rates = 1;
}
/* update sink rates from dpcd */ /* update sink rates from dpcd */
static void intel_dp_set_sink_rates(struct intel_dp *intel_dp) static void intel_dp_set_sink_rates(struct intel_dp *intel_dp)
{ {
@ -4678,6 +4684,9 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
*/ */
intel_psr_init_dpcd(intel_dp); intel_psr_init_dpcd(intel_dp);
/* Clear the default sink rates */
intel_dp->num_sink_rates = 0;
/* Read the eDP 1.4+ supported link rates. */ /* Read the eDP 1.4+ supported link rates. */
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) { if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
__le16 sink_rates[DP_MAX_SUPPORTED_RATES]; __le16 sink_rates[DP_MAX_SUPPORTED_RATES];
@ -7779,6 +7788,8 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
return false; return false;
intel_dp_set_source_rates(intel_dp); intel_dp_set_source_rates(intel_dp);
intel_dp_set_default_sink_rates(intel_dp);
intel_dp_set_common_rates(intel_dp);
intel_dp->reset_link_params = true; intel_dp->reset_link_params = true;
intel_dp->pps_pipe = INVALID_PIPE; intel_dp->pps_pipe = INVALID_PIPE;

View File

@ -557,6 +557,7 @@ nouveau_drm_device_init(struct drm_device *dev)
nvkm_dbgopt(nouveau_debug, "DRM"); nvkm_dbgopt(nouveau_debug, "DRM");
INIT_LIST_HEAD(&drm->clients); INIT_LIST_HEAD(&drm->clients);
mutex_init(&drm->clients_lock);
spin_lock_init(&drm->tile.lock); spin_lock_init(&drm->tile.lock);
/* workaround an odd issue on nvc1 by disabling the device's /* workaround an odd issue on nvc1 by disabling the device's
@ -627,6 +628,7 @@ nouveau_drm_device_init(struct drm_device *dev)
static void static void
nouveau_drm_device_fini(struct drm_device *dev) nouveau_drm_device_fini(struct drm_device *dev)
{ {
struct nouveau_cli *cli, *temp_cli;
struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_drm *drm = nouveau_drm(dev);
if (nouveau_pmops_runtime()) { if (nouveau_pmops_runtime()) {
@ -651,9 +653,28 @@ nouveau_drm_device_fini(struct drm_device *dev)
nouveau_ttm_fini(drm); nouveau_ttm_fini(drm);
nouveau_vga_fini(drm); nouveau_vga_fini(drm);
/*
* There may be existing clients from as-yet unclosed files. For now,
* clean them up here rather than deferring until the file is closed,
* but this likely not correct if we want to support hot-unplugging
* properly.
*/
mutex_lock(&drm->clients_lock);
list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
list_del(&cli->head);
mutex_lock(&cli->mutex);
if (cli->abi16)
nouveau_abi16_fini(cli->abi16);
mutex_unlock(&cli->mutex);
nouveau_cli_fini(cli);
kfree(cli);
}
mutex_unlock(&drm->clients_lock);
nouveau_cli_fini(&drm->client); nouveau_cli_fini(&drm->client);
nouveau_cli_fini(&drm->master); nouveau_cli_fini(&drm->master);
nvif_parent_dtor(&drm->parent); nvif_parent_dtor(&drm->parent);
mutex_destroy(&drm->clients_lock);
kfree(drm); kfree(drm);
} }
@ -792,7 +813,7 @@ nouveau_drm_device_remove(struct drm_device *dev)
struct nvkm_client *client; struct nvkm_client *client;
struct nvkm_device *device; struct nvkm_device *device;
drm_dev_unregister(dev); drm_dev_unplug(dev);
dev->irq_enabled = false; dev->irq_enabled = false;
client = nvxx_client(&drm->client.base); client = nvxx_client(&drm->client.base);
@ -1086,9 +1107,9 @@ nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
fpriv->driver_priv = cli; fpriv->driver_priv = cli;
mutex_lock(&drm->client.mutex); mutex_lock(&drm->clients_lock);
list_add(&cli->head, &drm->clients); list_add(&cli->head, &drm->clients);
mutex_unlock(&drm->client.mutex); mutex_unlock(&drm->clients_lock);
done: done:
if (ret && cli) { if (ret && cli) {
@ -1106,6 +1127,16 @@ nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
{ {
struct nouveau_cli *cli = nouveau_cli(fpriv); struct nouveau_cli *cli = nouveau_cli(fpriv);
struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_drm *drm = nouveau_drm(dev);
int dev_index;
/*
* The device is gone, and as it currently stands all clients are
* cleaned up in the removal codepath. In the future this may change
* so that we can support hot-unplugging, but for now we immediately
* return to avoid a double-free situation.
*/
if (!drm_dev_enter(dev, &dev_index))
return;
pm_runtime_get_sync(dev->dev); pm_runtime_get_sync(dev->dev);
@ -1114,14 +1145,15 @@ nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
nouveau_abi16_fini(cli->abi16); nouveau_abi16_fini(cli->abi16);
mutex_unlock(&cli->mutex); mutex_unlock(&cli->mutex);
mutex_lock(&drm->client.mutex); mutex_lock(&drm->clients_lock);
list_del(&cli->head); list_del(&cli->head);
mutex_unlock(&drm->client.mutex); mutex_unlock(&drm->clients_lock);
nouveau_cli_fini(cli); nouveau_cli_fini(cli);
kfree(cli); kfree(cli);
pm_runtime_mark_last_busy(dev->dev); pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev); pm_runtime_put_autosuspend(dev->dev);
drm_dev_exit(dev_index);
} }
static const struct drm_ioctl_desc static const struct drm_ioctl_desc

View File

@ -142,6 +142,11 @@ struct nouveau_drm {
struct list_head clients; struct list_head clients;
/**
* @clients_lock: Protects access to the @clients list of &struct nouveau_cli.
*/
struct mutex clients_lock;
u8 old_pm_cap; u8 old_pm_cap;
struct { struct {

View File

@ -62,7 +62,6 @@ gv100_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
nvkm_wr32(device, 0x6f0108 + hdmi, vendor_infoframe.header); nvkm_wr32(device, 0x6f0108 + hdmi, vendor_infoframe.header);
nvkm_wr32(device, 0x6f010c + hdmi, vendor_infoframe.subpack0_low); nvkm_wr32(device, 0x6f010c + hdmi, vendor_infoframe.subpack0_low);
nvkm_wr32(device, 0x6f0110 + hdmi, vendor_infoframe.subpack0_high); nvkm_wr32(device, 0x6f0110 + hdmi, vendor_infoframe.subpack0_high);
nvkm_wr32(device, 0x6f0110 + hdmi, 0x00000000);
nvkm_wr32(device, 0x6f0114 + hdmi, 0x00000000); nvkm_wr32(device, 0x6f0114 + hdmi, 0x00000000);
nvkm_wr32(device, 0x6f0118 + hdmi, 0x00000000); nvkm_wr32(device, 0x6f0118 + hdmi, 0x00000000);
nvkm_wr32(device, 0x6f011c + hdmi, 0x00000000); nvkm_wr32(device, 0x6f011c + hdmi, 0x00000000);

View File

@ -30,7 +30,7 @@ static int udl_get_edid_block(void *data, u8 *buf, unsigned int block,
ret = usb_control_msg(udl->udev, ret = usb_control_msg(udl->udev,
usb_rcvctrlpipe(udl->udev, 0), usb_rcvctrlpipe(udl->udev, 0),
(0x02), (0x80 | (0x02 << 5)), bval, (0x02), (0x80 | (0x02 << 5)), bval,
0xA1, read_buff, 2, HZ); 0xA1, read_buff, 2, 1000);
if (ret < 1) { if (ret < 1) {
DRM_ERROR("Read EDID byte %d failed err %x\n", i, ret); DRM_ERROR("Read EDID byte %d failed err %x\n", i, ret);
kfree(read_buff); kfree(read_buff);

View File

@ -1465,6 +1465,8 @@ st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
int err; int err;
switch (sensor->id) { switch (sensor->id) {
case ST_LSM6DSX_ID_GYRO:
break;
case ST_LSM6DSX_ID_EXT0: case ST_LSM6DSX_ID_EXT0:
case ST_LSM6DSX_ID_EXT1: case ST_LSM6DSX_ID_EXT1:
case ST_LSM6DSX_ID_EXT2: case ST_LSM6DSX_ID_EXT2:
@ -1490,8 +1492,8 @@ st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
} }
break; break;
} }
default: default: /* should never occur */
break; return -EINVAL;
} }
if (req_odr > 0) { if (req_odr > 0) {

View File

@ -3368,8 +3368,11 @@ static void bnxt_re_process_res_ud_wc(struct bnxt_re_qp *qp,
struct ib_wc *wc, struct ib_wc *wc,
struct bnxt_qplib_cqe *cqe) struct bnxt_qplib_cqe *cqe)
{ {
struct bnxt_re_dev *rdev;
u16 vlan_id = 0;
u8 nw_type; u8 nw_type;
rdev = qp->rdev;
wc->opcode = IB_WC_RECV; wc->opcode = IB_WC_RECV;
wc->status = __rc_to_ib_wc_status(cqe->status); wc->status = __rc_to_ib_wc_status(cqe->status);
@ -3381,9 +3384,12 @@ static void bnxt_re_process_res_ud_wc(struct bnxt_re_qp *qp,
memcpy(wc->smac, cqe->smac, ETH_ALEN); memcpy(wc->smac, cqe->smac, ETH_ALEN);
wc->wc_flags |= IB_WC_WITH_SMAC; wc->wc_flags |= IB_WC_WITH_SMAC;
if (cqe->flags & CQ_RES_UD_FLAGS_META_FORMAT_VLAN) { if (cqe->flags & CQ_RES_UD_FLAGS_META_FORMAT_VLAN) {
wc->vlan_id = (cqe->cfa_meta & 0xFFF); vlan_id = (cqe->cfa_meta & 0xFFF);
if (wc->vlan_id < 0x1000) }
wc->wc_flags |= IB_WC_WITH_VLAN; /* Mark only if vlan_id is non zero */
if (vlan_id && bnxt_re_check_if_vlan_valid(rdev, vlan_id)) {
wc->vlan_id = vlan_id;
wc->wc_flags |= IB_WC_WITH_VLAN;
} }
nw_type = (cqe->flags & CQ_RES_UD_FLAGS_ROCE_IP_VER_MASK) >> nw_type = (cqe->flags & CQ_RES_UD_FLAGS_ROCE_IP_VER_MASK) >>
CQ_RES_UD_FLAGS_ROCE_IP_VER_SFT; CQ_RES_UD_FLAGS_ROCE_IP_VER_SFT;

View File

@ -635,11 +635,13 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num,
{ {
int i, rc; int i, rc;
struct bnx2x_ilt *ilt = BP_ILT(bp); struct bnx2x_ilt *ilt = BP_ILT(bp);
struct ilt_client_info *ilt_cli = &ilt->clients[cli_num]; struct ilt_client_info *ilt_cli;
if (!ilt || !ilt->lines) if (!ilt || !ilt->lines)
return -1; return -1;
ilt_cli = &ilt->clients[cli_num];
if (ilt_cli->flags & (ILT_CLIENT_SKIP_INIT | ILT_CLIENT_SKIP_MEM)) if (ilt_cli->flags & (ILT_CLIENT_SKIP_INIT | ILT_CLIENT_SKIP_MEM))
return 0; return 0;

View File

@ -1854,7 +1854,7 @@ static int bnxt_tc_setup_indr_block_cb(enum tc_setup_type type,
struct flow_cls_offload *flower = type_data; struct flow_cls_offload *flower = type_data;
struct bnxt *bp = priv->bp; struct bnxt *bp = priv->bp;
if (flower->common.chain_index) if (!tc_cls_can_offload_and_chain0(bp->dev, type_data))
return -EOPNOTSUPP; return -EOPNOTSUPP;
switch (type) { switch (type) {

View File

@ -4432,10 +4432,10 @@ static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
fsl_mc_portal_free(priv->mc_io); fsl_mc_portal_free(priv->mc_io);
free_netdev(net_dev);
dev_dbg(net_dev->dev.parent, "Removed interface %s\n", net_dev->name); dev_dbg(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
free_netdev(net_dev);
return 0; return 0;
} }

View File

@ -2997,9 +2997,10 @@ static void __e100_shutdown(struct pci_dev *pdev, bool *enable_wake)
struct net_device *netdev = pci_get_drvdata(pdev); struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev); struct nic *nic = netdev_priv(netdev);
netif_device_detach(netdev);
if (netif_running(netdev)) if (netif_running(netdev))
e100_down(nic); e100_down(nic);
netif_device_detach(netdev);
if ((nic->flags & wol_magic) | e100_asf(nic)) { if ((nic->flags & wol_magic) | e100_asf(nic)) {
/* enable reverse auto-negotiation */ /* enable reverse auto-negotiation */
@ -3016,7 +3017,7 @@ static void __e100_shutdown(struct pci_dev *pdev, bool *enable_wake)
*enable_wake = false; *enable_wake = false;
} }
pci_clear_master(pdev); pci_disable_device(pdev);
} }
static int __e100_power_off(struct pci_dev *pdev, bool wake) static int __e100_power_off(struct pci_dev *pdev, bool wake)
@ -3036,8 +3037,6 @@ static int __maybe_unused e100_suspend(struct device *dev_d)
__e100_shutdown(to_pci_dev(dev_d), &wake); __e100_shutdown(to_pci_dev(dev_d), &wake);
device_wakeup_disable(dev_d);
return 0; return 0;
} }
@ -3045,6 +3044,14 @@ static int __maybe_unused e100_resume(struct device *dev_d)
{ {
struct net_device *netdev = dev_get_drvdata(dev_d); struct net_device *netdev = dev_get_drvdata(dev_d);
struct nic *nic = netdev_priv(netdev); struct nic *nic = netdev_priv(netdev);
int err;
err = pci_enable_device(to_pci_dev(dev_d));
if (err) {
netdev_err(netdev, "Resume cannot enable PCI device, aborting\n");
return err;
}
pci_set_master(to_pci_dev(dev_d));
/* disable reverse auto-negotiation */ /* disable reverse auto-negotiation */
if (nic->phy == phy_82552_v) { if (nic->phy == phy_82552_v) {
@ -3056,10 +3063,11 @@ static int __maybe_unused e100_resume(struct device *dev_d)
smartspeed & ~(E100_82552_REV_ANEG)); smartspeed & ~(E100_82552_REV_ANEG));
} }
netif_device_attach(netdev);
if (netif_running(netdev)) if (netif_running(netdev))
e100_up(nic); e100_up(nic);
netif_device_attach(netdev);
return 0; return 0;
} }

View File

@ -159,6 +159,7 @@ enum i40e_vsi_state_t {
__I40E_VSI_OVERFLOW_PROMISC, __I40E_VSI_OVERFLOW_PROMISC,
__I40E_VSI_REINIT_REQUESTED, __I40E_VSI_REINIT_REQUESTED,
__I40E_VSI_DOWN_REQUESTED, __I40E_VSI_DOWN_REQUESTED,
__I40E_VSI_RELEASING,
/* This must be last as it determines the size of the BITMAP */ /* This must be last as it determines the size of the BITMAP */
__I40E_VSI_STATE_SIZE__, __I40E_VSI_STATE_SIZE__,
}; };
@ -1144,6 +1145,7 @@ void i40e_ptp_save_hw_time(struct i40e_pf *pf);
void i40e_ptp_restore_hw_time(struct i40e_pf *pf); void i40e_ptp_restore_hw_time(struct i40e_pf *pf);
void i40e_ptp_init(struct i40e_pf *pf); void i40e_ptp_init(struct i40e_pf *pf);
void i40e_ptp_stop(struct i40e_pf *pf); void i40e_ptp_stop(struct i40e_pf *pf);
int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset);
int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi); int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf); i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf);
i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf); i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf);

View File

@ -1789,6 +1789,7 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
bool is_add) bool is_add)
{ {
struct i40e_pf *pf = vsi->back; struct i40e_pf *pf = vsi->back;
u16 num_tc_qps = 0;
u16 sections = 0; u16 sections = 0;
u8 netdev_tc = 0; u8 netdev_tc = 0;
u16 numtc = 1; u16 numtc = 1;
@ -1796,13 +1797,33 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
u8 offset; u8 offset;
u16 qmap; u16 qmap;
int i; int i;
u16 num_tc_qps = 0;
sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
offset = 0; offset = 0;
/* zero out queue mapping, it will get updated on the end of the function */
memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
if (vsi->type == I40E_VSI_MAIN) {
/* This code helps add more queue to the VSI if we have
* more cores than RSS can support, the higher cores will
* be served by ATR or other filters. Furthermore, the
* non-zero req_queue_pairs says that user requested a new
* queue count via ethtool's set_channels, so use this
* value for queues distribution across traffic classes
*/
if (vsi->req_queue_pairs > 0)
vsi->num_queue_pairs = vsi->req_queue_pairs;
else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
vsi->num_queue_pairs = pf->num_lan_msix;
}
/* Number of queues per enabled TC */ /* Number of queues per enabled TC */
num_tc_qps = vsi->alloc_queue_pairs; if (vsi->type == I40E_VSI_MAIN ||
(vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
num_tc_qps = vsi->num_queue_pairs;
else
num_tc_qps = vsi->alloc_queue_pairs;
if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
/* Find numtc from enabled TC bitmap */ /* Find numtc from enabled TC bitmap */
for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
@ -1880,15 +1901,11 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
} }
ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
} }
/* Do not change previously set num_queue_pairs for PFs and VFs*/
/* Set actual Tx/Rx queue pairs */ if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
vsi->num_queue_pairs = offset; (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) { (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
if (vsi->req_queue_pairs > 0) vsi->num_queue_pairs = offset;
vsi->num_queue_pairs = vsi->req_queue_pairs;
else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
vsi->num_queue_pairs = pf->num_lan_msix;
}
/* Scheduler section valid can only be set for ADD VSI */ /* Scheduler section valid can only be set for ADD VSI */
if (is_add) { if (is_add) {
@ -2622,7 +2639,8 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf)
for (v = 0; v < pf->num_alloc_vsi; v++) { for (v = 0; v < pf->num_alloc_vsi; v++) {
if (pf->vsi[v] && if (pf->vsi[v] &&
(pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) { (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
!test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
int ret = i40e_sync_vsi_filters(pf->vsi[v]); int ret = i40e_sync_vsi_filters(pf->vsi[v]);
if (ret) { if (ret) {
@ -5393,6 +5411,58 @@ static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
sizeof(vsi->info.tc_mapping)); sizeof(vsi->info.tc_mapping));
} }
/**
* i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
* @vsi: the VSI being reconfigured
* @vsi_offset: offset from main VF VSI
*/
int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
{
struct i40e_vsi_context ctxt = {};
struct i40e_pf *pf;
struct i40e_hw *hw;
int ret;
if (!vsi)
return I40E_ERR_PARAM;
pf = vsi->back;
hw = &pf->hw;
ctxt.seid = vsi->seid;
ctxt.pf_num = hw->pf_id;
ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
ctxt.uplink_seid = vsi->uplink_seid;
ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
ctxt.flags = I40E_AQ_VSI_TYPE_VF;
ctxt.info = vsi->info;
i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
false);
if (vsi->reconfig_rss) {
vsi->rss_size = min_t(int, pf->alloc_rss_size,
vsi->num_queue_pairs);
ret = i40e_vsi_config_rss(vsi);
if (ret) {
dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
return ret;
}
vsi->reconfig_rss = false;
}
ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
if (ret) {
dev_info(&pf->pdev->dev, "Update vsi config failed, err %s aq_err %s\n",
i40e_stat_str(hw, ret),
i40e_aq_str(hw, hw->aq.asq_last_status));
return ret;
}
/* update the local VSI info with updated queue map */
i40e_vsi_update_queue_map(vsi, &ctxt);
vsi->info.valid_sections = 0;
return ret;
}
/** /**
* i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
* @vsi: VSI to be configured * @vsi: VSI to be configured
@ -5683,24 +5753,6 @@ static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
INIT_LIST_HEAD(&vsi->ch_list); INIT_LIST_HEAD(&vsi->ch_list);
} }
/**
* i40e_is_any_channel - channel exist or not
* @vsi: ptr to VSI to which channels are associated with
*
* Returns true or false if channel(s) exist for associated VSI or not
**/
static bool i40e_is_any_channel(struct i40e_vsi *vsi)
{
struct i40e_channel *ch, *ch_tmp;
list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
if (ch->initialized)
return true;
}
return false;
}
/** /**
* i40e_get_max_queues_for_channel * i40e_get_max_queues_for_channel
* @vsi: ptr to VSI to which channels are associated with * @vsi: ptr to VSI to which channels are associated with
@ -6206,26 +6258,15 @@ int i40e_create_queue_channel(struct i40e_vsi *vsi,
/* By default we are in VEPA mode, if this is the first VF/VMDq /* By default we are in VEPA mode, if this is the first VF/VMDq
* VSI to be added switch to VEB mode. * VSI to be added switch to VEB mode.
*/ */
if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
(!i40e_is_any_channel(vsi))) {
if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
dev_dbg(&pf->pdev->dev,
"Failed to create channel. Override queues (%u) not power of 2\n",
vsi->tc_config.tc_info[0].qcount);
return -EINVAL;
}
if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) { if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
pf->flags |= I40E_FLAG_VEB_MODE_ENABLED; pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
if (vsi->type == I40E_VSI_MAIN) { if (vsi->type == I40E_VSI_MAIN) {
if (pf->flags & I40E_FLAG_TC_MQPRIO) if (pf->flags & I40E_FLAG_TC_MQPRIO)
i40e_do_reset(pf, I40E_PF_RESET_FLAG, i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
true); else
else i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
i40e_do_reset_safe(pf,
I40E_PF_RESET_FLAG);
}
} }
/* now onwards for main VSI, number of queues will be value /* now onwards for main VSI, number of queues will be value
* of TC0's queue count * of TC0's queue count
@ -7552,12 +7593,20 @@ static int i40e_setup_tc(struct net_device *netdev, void *type_data)
vsi->seid); vsi->seid);
need_reset = true; need_reset = true;
goto exit; goto exit;
} else { } else if (enabled_tc &&
dev_info(&vsi->back->pdev->dev, (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
"Setup channel (id:%u) utilizing num_queues %d\n", netdev_info(netdev,
vsi->seid, vsi->tc_config.tc_info[0].qcount); "Failed to create channel. Override queues (%u) not power of 2\n",
vsi->tc_config.tc_info[0].qcount);
ret = -EINVAL;
need_reset = true;
goto exit;
} }
dev_info(&vsi->back->pdev->dev,
"Setup channel (id:%u) utilizing num_queues %d\n",
vsi->seid, vsi->tc_config.tc_info[0].qcount);
if (pf->flags & I40E_FLAG_TC_MQPRIO) { if (pf->flags & I40E_FLAG_TC_MQPRIO) {
if (vsi->mqprio_qopt.max_rate[0]) { if (vsi->mqprio_qopt.max_rate[0]) {
u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0]; u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
@ -8122,9 +8171,8 @@ static int i40e_configure_clsflower(struct i40e_vsi *vsi,
err = i40e_add_del_cloud_filter(vsi, filter, true); err = i40e_add_del_cloud_filter(vsi, filter, true);
if (err) { if (err) {
dev_err(&pf->pdev->dev, dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
"Failed to add cloud filter, err %s\n", err);
i40e_stat_str(&pf->hw, err));
goto err; goto err;
} }
@ -13308,7 +13356,7 @@ int i40e_vsi_release(struct i40e_vsi *vsi)
dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
return -ENODEV; return -ENODEV;
} }
set_bit(__I40E_VSI_RELEASING, vsi->state);
uplink_seid = vsi->uplink_seid; uplink_seid = vsi->uplink_seid;
if (vsi->type != I40E_VSI_SRIOV) { if (vsi->type != I40E_VSI_SRIOV) {
if (vsi->netdev_registered) { if (vsi->netdev_registered) {

View File

@ -130,17 +130,18 @@ void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
/***********************misc routines*****************************/ /***********************misc routines*****************************/
/** /**
* i40e_vc_disable_vf * i40e_vc_reset_vf
* @vf: pointer to the VF info * @vf: pointer to the VF info
* * @notify_vf: notify vf about reset or not
* Disable the VF through a SW reset. * Reset VF handler.
**/ **/
static inline void i40e_vc_disable_vf(struct i40e_vf *vf) static void i40e_vc_reset_vf(struct i40e_vf *vf, bool notify_vf)
{ {
struct i40e_pf *pf = vf->pf; struct i40e_pf *pf = vf->pf;
int i; int i;
i40e_vc_notify_vf_reset(vf); if (notify_vf)
i40e_vc_notify_vf_reset(vf);
/* We want to ensure that an actual reset occurs initiated after this /* We want to ensure that an actual reset occurs initiated after this
* function was called. However, we do not want to wait forever, so * function was called. However, we do not want to wait forever, so
@ -158,9 +159,14 @@ static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
usleep_range(10000, 20000); usleep_range(10000, 20000);
} }
dev_warn(&vf->pf->pdev->dev, if (notify_vf)
"Failed to initiate reset for VF %d after 200 milliseconds\n", dev_warn(&vf->pf->pdev->dev,
vf->vf_id); "Failed to initiate reset for VF %d after 200 milliseconds\n",
vf->vf_id);
else
dev_dbg(&vf->pf->pdev->dev,
"Failed to initiate reset for VF %d after 200 milliseconds\n",
vf->vf_id);
} }
/** /**
@ -621,14 +627,13 @@ static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
u16 vsi_queue_id, u16 vsi_queue_id,
struct virtchnl_rxq_info *info) struct virtchnl_rxq_info *info)
{ {
u16 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
struct i40e_pf *pf = vf->pf; struct i40e_pf *pf = vf->pf;
struct i40e_vsi *vsi = pf->vsi[vf->lan_vsi_idx];
struct i40e_hw *hw = &pf->hw; struct i40e_hw *hw = &pf->hw;
struct i40e_hmc_obj_rxq rx_ctx; struct i40e_hmc_obj_rxq rx_ctx;
u16 pf_queue_id;
int ret = 0; int ret = 0;
pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
/* clear the context structure first */ /* clear the context structure first */
memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq)); memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
@ -666,6 +671,10 @@ static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
} }
rx_ctx.rxmax = info->max_pkt_size; rx_ctx.rxmax = info->max_pkt_size;
/* if port VLAN is configured increase the max packet size */
if (vsi->info.pvid)
rx_ctx.rxmax += VLAN_HLEN;
/* enable 32bytes desc always */ /* enable 32bytes desc always */
rx_ctx.dsize = 1; rx_ctx.dsize = 1;
@ -2051,20 +2060,6 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
return ret; return ret;
} }
/**
* i40e_vc_reset_vf_msg
* @vf: pointer to the VF info
*
* called from the VF to reset itself,
* unlike other virtchnl messages, PF driver
* doesn't send the response back to the VF
**/
static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
{
if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
i40e_reset_vf(vf, false);
}
/** /**
* i40e_vc_config_promiscuous_mode_msg * i40e_vc_config_promiscuous_mode_msg
* @vf: pointer to the VF info * @vf: pointer to the VF info
@ -2163,11 +2158,12 @@ static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)
struct virtchnl_vsi_queue_config_info *qci = struct virtchnl_vsi_queue_config_info *qci =
(struct virtchnl_vsi_queue_config_info *)msg; (struct virtchnl_vsi_queue_config_info *)msg;
struct virtchnl_queue_pair_info *qpi; struct virtchnl_queue_pair_info *qpi;
struct i40e_pf *pf = vf->pf;
u16 vsi_id, vsi_queue_id = 0; u16 vsi_id, vsi_queue_id = 0;
u16 num_qps_all = 0; struct i40e_pf *pf = vf->pf;
i40e_status aq_ret = 0; i40e_status aq_ret = 0;
int i, j = 0, idx = 0; int i, j = 0, idx = 0;
struct i40e_vsi *vsi;
u16 num_qps_all = 0;
if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) { if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
aq_ret = I40E_ERR_PARAM; aq_ret = I40E_ERR_PARAM;
@ -2256,9 +2252,15 @@ static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)
pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
qci->num_queue_pairs; qci->num_queue_pairs;
} else { } else {
for (i = 0; i < vf->num_tc; i++) for (i = 0; i < vf->num_tc; i++) {
pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs = vsi = pf->vsi[vf->ch[i].vsi_idx];
vf->ch[i].num_qps; vsi->num_queue_pairs = vf->ch[i].num_qps;
if (i40e_update_adq_vsi_queues(vsi, i)) {
aq_ret = I40E_ERR_CONFIG;
goto error_param;
}
}
} }
error_param: error_param:
@ -2553,8 +2555,7 @@ static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg)
} else { } else {
/* successful request */ /* successful request */
vf->num_req_queues = req_pairs; vf->num_req_queues = req_pairs;
i40e_vc_notify_vf_reset(vf); i40e_vc_reset_vf(vf, true);
i40e_reset_vf(vf, false);
return 0; return 0;
} }
@ -3767,8 +3768,7 @@ static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
vf->num_req_queues = 0; vf->num_req_queues = 0;
/* reset the VF in order to allocate resources */ /* reset the VF in order to allocate resources */
i40e_vc_notify_vf_reset(vf); i40e_vc_reset_vf(vf, true);
i40e_reset_vf(vf, false);
return I40E_SUCCESS; return I40E_SUCCESS;
@ -3808,8 +3808,7 @@ static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
} }
/* reset the VF in order to allocate resources */ /* reset the VF in order to allocate resources */
i40e_vc_notify_vf_reset(vf); i40e_vc_reset_vf(vf, true);
i40e_reset_vf(vf, false);
return I40E_SUCCESS; return I40E_SUCCESS;
@ -3871,7 +3870,7 @@ int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
i40e_vc_notify_vf_link_state(vf); i40e_vc_notify_vf_link_state(vf);
break; break;
case VIRTCHNL_OP_RESET_VF: case VIRTCHNL_OP_RESET_VF:
i40e_vc_reset_vf_msg(vf); i40e_vc_reset_vf(vf, false);
ret = 0; ret = 0;
break; break;
case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
@ -4125,7 +4124,7 @@ int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
/* Force the VF interface down so it has to bring up with new MAC /* Force the VF interface down so it has to bring up with new MAC
* address * address
*/ */
i40e_vc_disable_vf(vf); i40e_vc_reset_vf(vf, true);
dev_info(&pf->pdev->dev, "Bring down and up the VF interface to make this change effective.\n"); dev_info(&pf->pdev->dev, "Bring down and up the VF interface to make this change effective.\n");
error_param: error_param:
@ -4133,34 +4132,6 @@ int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
return ret; return ret;
} }
/**
* i40e_vsi_has_vlans - True if VSI has configured VLANs
* @vsi: pointer to the vsi
*
* Check if a VSI has configured any VLANs. False if we have a port VLAN or if
* we have no configured VLANs. Do not call while holding the
* mac_filter_hash_lock.
*/
static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
{
bool have_vlans;
/* If we have a port VLAN, then the VSI cannot have any VLANs
* configured, as all MAC/VLAN filters will be assigned to the PVID.
*/
if (vsi->info.pvid)
return false;
/* Since we don't have a PVID, we know that if the device is in VLAN
* mode it must be because of a VLAN filter configured on this VSI.
*/
spin_lock_bh(&vsi->mac_filter_hash_lock);
have_vlans = i40e_is_vsi_in_vlan(vsi);
spin_unlock_bh(&vsi->mac_filter_hash_lock);
return have_vlans;
}
/** /**
* i40e_ndo_set_vf_port_vlan * i40e_ndo_set_vf_port_vlan
* @netdev: network interface device structure * @netdev: network interface device structure
@ -4217,19 +4188,9 @@ int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
/* duplicate request, so just return success */ /* duplicate request, so just return success */
goto error_pvid; goto error_pvid;
if (i40e_vsi_has_vlans(vsi)) { i40e_vc_reset_vf(vf, true);
dev_err(&pf->pdev->dev, /* During reset the VF got a new VSI, so refresh a pointer. */
"VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n", vsi = pf->vsi[vf->lan_vsi_idx];
vf_id);
/* Administrator Error - knock the VF offline until he does
* the right thing by reconfiguring his network correctly
* and then reloading the VF driver.
*/
i40e_vc_disable_vf(vf);
/* During reset the VF got a new VSI, so refresh the pointer. */
vsi = pf->vsi[vf->lan_vsi_idx];
}
/* Locked once because multiple functions below iterate list */ /* Locked once because multiple functions below iterate list */
spin_lock_bh(&vsi->mac_filter_hash_lock); spin_lock_bh(&vsi->mac_filter_hash_lock);
@ -4610,7 +4571,7 @@ int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
goto out; goto out;
vf->trusted = setting; vf->trusted = setting;
i40e_vc_disable_vf(vf); i40e_vc_reset_vf(vf, true);
dev_info(&pf->pdev->dev, "VF %u is now %strusted\n", dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
vf_id, setting ? "" : "un"); vf_id, setting ? "" : "un");

View File

@ -892,6 +892,7 @@ static int iavf_set_channels(struct net_device *netdev,
{ {
struct iavf_adapter *adapter = netdev_priv(netdev); struct iavf_adapter *adapter = netdev_priv(netdev);
u32 num_req = ch->combined_count; u32 num_req = ch->combined_count;
int i;
if ((adapter->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADQ) && if ((adapter->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADQ) &&
adapter->num_tc) { adapter->num_tc) {
@ -902,7 +903,7 @@ static int iavf_set_channels(struct net_device *netdev,
/* All of these should have already been checked by ethtool before this /* All of these should have already been checked by ethtool before this
* even gets to us, but just to be sure. * even gets to us, but just to be sure.
*/ */
if (num_req > adapter->vsi_res->num_queue_pairs) if (num_req == 0 || num_req > adapter->vsi_res->num_queue_pairs)
return -EINVAL; return -EINVAL;
if (num_req == adapter->num_active_queues) if (num_req == adapter->num_active_queues)
@ -914,6 +915,20 @@ static int iavf_set_channels(struct net_device *netdev,
adapter->num_req_queues = num_req; adapter->num_req_queues = num_req;
adapter->flags |= IAVF_FLAG_REINIT_ITR_NEEDED; adapter->flags |= IAVF_FLAG_REINIT_ITR_NEEDED;
iavf_schedule_reset(adapter); iavf_schedule_reset(adapter);
/* wait for the reset is done */
for (i = 0; i < IAVF_RESET_WAIT_COMPLETE_COUNT; i++) {
msleep(IAVF_RESET_WAIT_MS);
if (adapter->flags & IAVF_FLAG_RESET_PENDING)
continue;
break;
}
if (i == IAVF_RESET_WAIT_COMPLETE_COUNT) {
adapter->flags &= ~IAVF_FLAG_REINIT_ITR_NEEDED;
adapter->num_active_queues = num_req;
return -EOPNOTSUPP;
}
return 0; return 0;
} }
@ -960,14 +975,13 @@ static int iavf_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
if (hfunc) if (hfunc)
*hfunc = ETH_RSS_HASH_TOP; *hfunc = ETH_RSS_HASH_TOP;
if (!indir) if (key)
return 0; memcpy(key, adapter->rss_key, adapter->rss_key_size);
memcpy(key, adapter->rss_key, adapter->rss_key_size); if (indir)
/* Each 32 bits pointed by 'indir' is stored with a lut entry */
/* Each 32 bits pointed by 'indir' is stored with a lut entry */ for (i = 0; i < adapter->rss_lut_size; i++)
for (i = 0; i < adapter->rss_lut_size; i++) indir[i] = (u32)adapter->rss_lut[i];
indir[i] = (u32)adapter->rss_lut[i];
return 0; return 0;
} }

View File

@ -1616,8 +1616,7 @@ static int iavf_process_aq_command(struct iavf_adapter *adapter)
iavf_set_promiscuous(adapter, FLAG_VF_MULTICAST_PROMISC); iavf_set_promiscuous(adapter, FLAG_VF_MULTICAST_PROMISC);
return 0; return 0;
} }
if ((adapter->aq_required & IAVF_FLAG_AQ_RELEASE_PROMISC) ||
if ((adapter->aq_required & IAVF_FLAG_AQ_RELEASE_PROMISC) &&
(adapter->aq_required & IAVF_FLAG_AQ_RELEASE_ALLMULTI)) { (adapter->aq_required & IAVF_FLAG_AQ_RELEASE_ALLMULTI)) {
iavf_set_promiscuous(adapter, 0); iavf_set_promiscuous(adapter, 0);
return 0; return 0;
@ -2047,8 +2046,8 @@ static void iavf_disable_vf(struct iavf_adapter *adapter)
iavf_free_misc_irq(adapter); iavf_free_misc_irq(adapter);
iavf_reset_interrupt_capability(adapter); iavf_reset_interrupt_capability(adapter);
iavf_free_queues(adapter);
iavf_free_q_vectors(adapter); iavf_free_q_vectors(adapter);
iavf_free_queues(adapter);
memset(adapter->vf_res, 0, IAVF_VIRTCHNL_VF_RESOURCE_SIZE); memset(adapter->vf_res, 0, IAVF_VIRTCHNL_VF_RESOURCE_SIZE);
iavf_shutdown_adminq(&adapter->hw); iavf_shutdown_adminq(&adapter->hw);
adapter->netdev->flags &= ~IFF_UP; adapter->netdev->flags &= ~IFF_UP;
@ -2330,7 +2329,7 @@ static void iavf_adminq_task(struct work_struct *work)
/* check for error indications */ /* check for error indications */
val = rd32(hw, hw->aq.arq.len); val = rd32(hw, hw->aq.arq.len);
if (val == 0xdeadbeef) /* indicates device in reset */ if (val == 0xdeadbeef || val == 0xffffffff) /* device in reset */
goto freedom; goto freedom;
oldval = val; oldval = val;
if (val & IAVF_VF_ARQLEN1_ARQVFE_MASK) { if (val & IAVF_VF_ARQLEN1_ARQVFE_MASK) {
@ -3028,11 +3027,11 @@ static int iavf_configure_clsflower(struct iavf_adapter *adapter,
/* start out with flow type and eth type IPv4 to begin with */ /* start out with flow type and eth type IPv4 to begin with */
filter->f.flow_type = VIRTCHNL_TCP_V4_FLOW; filter->f.flow_type = VIRTCHNL_TCP_V4_FLOW;
err = iavf_parse_cls_flower(adapter, cls_flower, filter); err = iavf_parse_cls_flower(adapter, cls_flower, filter);
if (err < 0) if (err)
goto err; goto err;
err = iavf_handle_tclass(adapter, tc, filter); err = iavf_handle_tclass(adapter, tc, filter);
if (err < 0) if (err)
goto err; goto err;
/* add filter to the list */ /* add filter to the list */
@ -3419,7 +3418,8 @@ static netdev_features_t iavf_fix_features(struct net_device *netdev,
{ {
struct iavf_adapter *adapter = netdev_priv(netdev); struct iavf_adapter *adapter = netdev_priv(netdev);
if (!(adapter->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) if (adapter->vf_res &&
!(adapter->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
features &= ~(NETIF_F_HW_VLAN_CTAG_TX | features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_RX |
NETIF_F_HW_VLAN_CTAG_FILTER); NETIF_F_HW_VLAN_CTAG_FILTER);

View File

@ -4361,9 +4361,6 @@ static void ice_remove(struct pci_dev *pdev)
struct ice_pf *pf = pci_get_drvdata(pdev); struct ice_pf *pf = pci_get_drvdata(pdev);
int i; int i;
if (!pf)
return;
for (i = 0; i < ICE_MAX_RESET_WAIT; i++) { for (i = 0; i < ICE_MAX_RESET_WAIT; i++) {
if (!ice_is_reset_in_progress(pf->state)) if (!ice_is_reset_in_progress(pf->state))
break; break;

View File

@ -163,13 +163,14 @@ int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
MLX5_SET(destroy_cq_in, in, cqn, cq->cqn); MLX5_SET(destroy_cq_in, in, cqn, cq->cqn);
MLX5_SET(destroy_cq_in, in, uid, cq->uid); MLX5_SET(destroy_cq_in, in, uid, cq->uid);
err = mlx5_cmd_exec_in(dev, destroy_cq, in); err = mlx5_cmd_exec_in(dev, destroy_cq, in);
if (err)
return err;
synchronize_irq(cq->irqn); synchronize_irq(cq->irqn);
mlx5_cq_put(cq); mlx5_cq_put(cq);
wait_for_completion(&cq->free); wait_for_completion(&cq->free);
return err; return 0;
} }
EXPORT_SYMBOL(mlx5_core_destroy_cq); EXPORT_SYMBOL(mlx5_core_destroy_cq);

View File

@ -507,6 +507,8 @@ void mlx5_debug_cq_remove(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
if (!mlx5_debugfs_root) if (!mlx5_debugfs_root)
return; return;
if (cq->dbg) if (cq->dbg) {
rem_res_tree(cq->dbg); rem_res_tree(cq->dbg);
cq->dbg = NULL;
}
} }

View File

@ -1663,7 +1663,7 @@ int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs)
if (!ESW_ALLOWED(esw)) if (!ESW_ALLOWED(esw))
return 0; return 0;
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
if (esw->mode == MLX5_ESWITCH_NONE) { if (esw->mode == MLX5_ESWITCH_NONE) {
ret = mlx5_eswitch_enable_locked(esw, MLX5_ESWITCH_LEGACY, num_vfs); ret = mlx5_eswitch_enable_locked(esw, MLX5_ESWITCH_LEGACY, num_vfs);
} else { } else {
@ -1675,7 +1675,7 @@ int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs)
if (!ret) if (!ret)
esw->esw_funcs.num_vfs = num_vfs; esw->esw_funcs.num_vfs = num_vfs;
} }
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return ret; return ret;
} }
@ -1719,10 +1719,10 @@ void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf)
if (!ESW_ALLOWED(esw)) if (!ESW_ALLOWED(esw))
return; return;
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
mlx5_eswitch_disable_locked(esw, clear_vf); mlx5_eswitch_disable_locked(esw, clear_vf);
esw->esw_funcs.num_vfs = 0; esw->esw_funcs.num_vfs = 0;
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
} }
int mlx5_eswitch_init(struct mlx5_core_dev *dev) int mlx5_eswitch_init(struct mlx5_core_dev *dev)
@ -1778,7 +1778,7 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)
atomic64_set(&esw->offloads.num_flows, 0); atomic64_set(&esw->offloads.num_flows, 0);
ida_init(&esw->offloads.vport_metadata_ida); ida_init(&esw->offloads.vport_metadata_ida);
mutex_init(&esw->state_lock); mutex_init(&esw->state_lock);
mutex_init(&esw->mode_lock); init_rwsem(&esw->mode_lock);
mlx5_esw_for_all_vports(esw, i, vport) { mlx5_esw_for_all_vports(esw, i, vport) {
vport->vport = mlx5_eswitch_index_to_vport_num(esw, i); vport->vport = mlx5_eswitch_index_to_vport_num(esw, i);
@ -1813,7 +1813,6 @@ void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
esw->dev->priv.eswitch = NULL; esw->dev->priv.eswitch = NULL;
destroy_workqueue(esw->work_queue); destroy_workqueue(esw->work_queue);
esw_offloads_cleanup_reps(esw); esw_offloads_cleanup_reps(esw);
mutex_destroy(&esw->mode_lock);
mutex_destroy(&esw->state_lock); mutex_destroy(&esw->state_lock);
ida_destroy(&esw->offloads.vport_metadata_ida); ida_destroy(&esw->offloads.vport_metadata_ida);
mlx5e_mod_hdr_tbl_destroy(&esw->offloads.mod_hdr); mlx5e_mod_hdr_tbl_destroy(&esw->offloads.mod_hdr);

View File

@ -262,7 +262,7 @@ struct mlx5_eswitch {
/* Protects eswitch mode change that occurs via one or more /* Protects eswitch mode change that occurs via one or more
* user commands, i.e. sriov state change, devlink commands. * user commands, i.e. sriov state change, devlink commands.
*/ */
struct mutex mode_lock; struct rw_semaphore mode_lock;
struct { struct {
bool enabled; bool enabled;

View File

@ -2508,7 +2508,7 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
if (esw_mode_from_devlink(mode, &mlx5_mode)) if (esw_mode_from_devlink(mode, &mlx5_mode))
return -EINVAL; return -EINVAL;
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
cur_mlx5_mode = esw->mode; cur_mlx5_mode = esw->mode;
if (cur_mlx5_mode == mlx5_mode) if (cur_mlx5_mode == mlx5_mode)
goto unlock; goto unlock;
@ -2521,7 +2521,7 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
err = -EINVAL; err = -EINVAL;
unlock: unlock:
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return err; return err;
} }
@ -2534,14 +2534,14 @@ int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
if (IS_ERR(esw)) if (IS_ERR(esw))
return PTR_ERR(esw); return PTR_ERR(esw);
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
err = eswitch_devlink_esw_mode_check(esw); err = eswitch_devlink_esw_mode_check(esw);
if (err) if (err)
goto unlock; goto unlock;
err = esw_mode_to_devlink(esw->mode, mode); err = esw_mode_to_devlink(esw->mode, mode);
unlock: unlock:
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return err; return err;
} }
@ -2557,7 +2557,7 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
if (IS_ERR(esw)) if (IS_ERR(esw))
return PTR_ERR(esw); return PTR_ERR(esw);
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
err = eswitch_devlink_esw_mode_check(esw); err = eswitch_devlink_esw_mode_check(esw);
if (err) if (err)
goto out; goto out;
@ -2599,7 +2599,7 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
} }
esw->offloads.inline_mode = mlx5_mode; esw->offloads.inline_mode = mlx5_mode;
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return 0; return 0;
revert_inline_mode: revert_inline_mode:
@ -2609,7 +2609,7 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
vport, vport,
esw->offloads.inline_mode); esw->offloads.inline_mode);
out: out:
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return err; return err;
} }
@ -2622,14 +2622,14 @@ int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)
if (IS_ERR(esw)) if (IS_ERR(esw))
return PTR_ERR(esw); return PTR_ERR(esw);
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
err = eswitch_devlink_esw_mode_check(esw); err = eswitch_devlink_esw_mode_check(esw);
if (err) if (err)
goto unlock; goto unlock;
err = esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode); err = esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode);
unlock: unlock:
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return err; return err;
} }
@ -2645,7 +2645,7 @@ int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
if (IS_ERR(esw)) if (IS_ERR(esw))
return PTR_ERR(esw); return PTR_ERR(esw);
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
err = eswitch_devlink_esw_mode_check(esw); err = eswitch_devlink_esw_mode_check(esw);
if (err) if (err)
goto unlock; goto unlock;
@ -2691,7 +2691,7 @@ int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
} }
unlock: unlock:
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return err; return err;
} }
@ -2706,15 +2706,15 @@ int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
return PTR_ERR(esw); return PTR_ERR(esw);
mutex_lock(&esw->mode_lock); down_write(&esw->mode_lock);
err = eswitch_devlink_esw_mode_check(esw); err = eswitch_devlink_esw_mode_check(esw);
if (err) if (err)
goto unlock; goto unlock;
*encap = esw->offloads.encap; *encap = esw->offloads.encap;
unlock: unlock:
mutex_unlock(&esw->mode_lock); up_write(&esw->mode_lock);
return 0; return err;
} }
static bool static bool

View File

@ -365,6 +365,7 @@ static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev,
bool is_bonded, is_in_lag, mode_supported; bool is_bonded, is_in_lag, mode_supported;
int bond_status = 0; int bond_status = 0;
int num_slaves = 0; int num_slaves = 0;
int changed = 0;
int idx; int idx;
if (!netif_is_lag_master(upper)) if (!netif_is_lag_master(upper))
@ -401,27 +402,27 @@ static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev,
*/ */
is_in_lag = num_slaves == MLX5_MAX_PORTS && bond_status == 0x3; is_in_lag = num_slaves == MLX5_MAX_PORTS && bond_status == 0x3;
if (!mlx5_lag_is_ready(ldev) && is_in_lag) {
NL_SET_ERR_MSG_MOD(info->info.extack,
"Can't activate LAG offload, PF is configured with more than 64 VFs");
return 0;
}
/* Lag mode must be activebackup or hash. */ /* Lag mode must be activebackup or hash. */
mode_supported = tracker->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP || mode_supported = tracker->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP ||
tracker->tx_type == NETDEV_LAG_TX_TYPE_HASH; tracker->tx_type == NETDEV_LAG_TX_TYPE_HASH;
if (is_in_lag && !mode_supported)
NL_SET_ERR_MSG_MOD(info->info.extack,
"Can't activate LAG offload, TX type isn't supported");
is_bonded = is_in_lag && mode_supported; is_bonded = is_in_lag && mode_supported;
if (tracker->is_bonded != is_bonded) { if (tracker->is_bonded != is_bonded) {
tracker->is_bonded = is_bonded; tracker->is_bonded = is_bonded;
return 1; changed = 1;
} }
return 0; if (!is_in_lag)
return changed;
if (!mlx5_lag_is_ready(ldev))
NL_SET_ERR_MSG_MOD(info->info.extack,
"Can't activate LAG offload, PF is configured with more than 64 VFs");
else if (!mode_supported)
NL_SET_ERR_MSG_MOD(info->info.extack,
"Can't activate LAG offload, TX type isn't supported");
return changed;
} }
static int mlx5_handle_changelowerstate_event(struct mlx5_lag *ldev, static int mlx5_handle_changelowerstate_event(struct mlx5_lag *ldev,
@ -464,9 +465,6 @@ static int mlx5_lag_netdev_event(struct notifier_block *this,
ldev = container_of(this, struct mlx5_lag, nb); ldev = container_of(this, struct mlx5_lag, nb);
if (!mlx5_lag_is_ready(ldev) && event == NETDEV_CHANGELOWERSTATE)
return NOTIFY_DONE;
tracker = ldev->tracker; tracker = ldev->tracker;
switch (event) { switch (event) {

View File

@ -21,6 +21,7 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/pm_runtime.h>
#include "stmmac_platform.h" #include "stmmac_platform.h"
@ -1335,6 +1336,8 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
return ret; return ret;
} }
pm_runtime_get_sync(dev);
if (bsp_priv->integrated_phy) if (bsp_priv->integrated_phy)
rk_gmac_integrated_phy_powerup(bsp_priv); rk_gmac_integrated_phy_powerup(bsp_priv);
@ -1346,6 +1349,8 @@ static void rk_gmac_powerdown(struct rk_priv_data *gmac)
if (gmac->integrated_phy) if (gmac->integrated_phy)
rk_gmac_integrated_phy_powerdown(gmac); rk_gmac_integrated_phy_powerdown(gmac);
pm_runtime_put_sync(&gmac->pdev->dev);
phy_power_on(gmac, false); phy_power_on(gmac, false);
gmac_clk_enable(gmac, false); gmac_clk_enable(gmac, false);
} }

View File

@ -485,8 +485,28 @@ static int socfpga_dwmac_resume(struct device *dev)
} }
#endif /* CONFIG_PM_SLEEP */ #endif /* CONFIG_PM_SLEEP */
static SIMPLE_DEV_PM_OPS(socfpga_dwmac_pm_ops, stmmac_suspend, static int __maybe_unused socfpga_dwmac_runtime_suspend(struct device *dev)
socfpga_dwmac_resume); {
struct net_device *ndev = dev_get_drvdata(dev);
struct stmmac_priv *priv = netdev_priv(ndev);
stmmac_bus_clks_config(priv, false);
return 0;
}
static int __maybe_unused socfpga_dwmac_runtime_resume(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
struct stmmac_priv *priv = netdev_priv(ndev);
return stmmac_bus_clks_config(priv, true);
}
static const struct dev_pm_ops socfpga_dwmac_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(stmmac_suspend, socfpga_dwmac_resume)
SET_RUNTIME_PM_OPS(socfpga_dwmac_runtime_suspend, socfpga_dwmac_runtime_resume, NULL)
};
static const struct socfpga_dwmac_ops socfpga_gen5_ops = { static const struct socfpga_dwmac_ops socfpga_gen5_ops = {
.set_phy_mode = socfpga_gen5_set_phy_mode, .set_phy_mode = socfpga_gen5_set_phy_mode,

View File

@ -703,6 +703,7 @@ static void ipa_endpoint_init_hol_block_timer(struct ipa_endpoint *endpoint,
u32 offset; u32 offset;
u32 val; u32 val;
/* This should only be changed when HOL_BLOCK_EN is disabled */
offset = IPA_REG_ENDP_INIT_HOL_BLOCK_TIMER_N_OFFSET(endpoint_id); offset = IPA_REG_ENDP_INIT_HOL_BLOCK_TIMER_N_OFFSET(endpoint_id);
val = ipa_reg_init_hol_block_timer_val(ipa, microseconds); val = ipa_reg_init_hol_block_timer_val(ipa, microseconds);
iowrite32(val, ipa->reg_virt + offset); iowrite32(val, ipa->reg_virt + offset);
@ -730,6 +731,7 @@ void ipa_endpoint_modem_hol_block_clear_all(struct ipa *ipa)
if (endpoint->toward_ipa || endpoint->ee_id != GSI_EE_MODEM) if (endpoint->toward_ipa || endpoint->ee_id != GSI_EE_MODEM)
continue; continue;
ipa_endpoint_init_hol_block_enable(endpoint, false);
ipa_endpoint_init_hol_block_timer(endpoint, 0); ipa_endpoint_init_hol_block_timer(endpoint, 0);
ipa_endpoint_init_hol_block_enable(endpoint, true); ipa_endpoint_init_hol_block_enable(endpoint, true);
} }

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