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drm/nouveau/fifo/gk104-: return channel instance in ctor args

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Will be used to match fault buffer entries with a channel.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2018-12-11 14:50:02 +10:00
parent 302daab1a7
commit 86b442d74c
5 changed files with 14 additions and 6 deletions
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1
drivers/gpu/drm/nouveau/include/nvif/cla06f.h
View File

@ -10,6 +10,7 @@ struct kepler_channel_gpfifo_a_v0 {
__u64 ioffset;
__u64 runlist;
__u64 vmm;
__u64 inst;
};
#define NVA06F_V0_NTFY_NON_STALL_INTERRUPT 0x00

10
drivers/gpu/drm/nouveau/nouveau_chan.c
View File

@ -273,13 +273,15 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
ret = nvif_object_init(&device->object, 0, *oclass++,
&args, size, &chan->user);
if (ret == 0) {
if (chan->user.oclass >= KEPLER_CHANNEL_GPFIFO_A)
if (chan->user.oclass >= KEPLER_CHANNEL_GPFIFO_A) {
chan->chid = args.kepler.chid;
else
if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO)
chan->inst = args.kepler.inst;
} else
if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO) {
chan->chid = args.fermi.chid;
else
} else {
chan->chid = args.nv50.chid;
}
return ret;
}
} while (*oclass);

1
drivers/gpu/drm/nouveau/nouveau_chan.h
View File

@ -10,6 +10,7 @@ struct nouveau_channel {
struct nouveau_drm *drm;
int chid;
u64 inst;
struct nvif_object vram;
struct nvif_object gart;

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c
View File

@ -240,7 +240,7 @@ gk104_fifo_gpfifo_func = {
static int
gk104_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
u64 vmm, u64 ioffset, u64 ilength,
u64 vmm, u64 ioffset, u64 ilength, u64 *inst,
const struct nvkm_oclass *oclass,
struct nvkm_object **pobject)
{
@ -279,6 +279,7 @@ gk104_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
return ret;
*chid = chan->base.chid;
*inst = chan->base.inst->addr;
/* Hack to support GPUs where even individual channels should be
* part of a channel group.
@ -346,6 +347,7 @@ gk104_fifo_gpfifo_new(struct gk104_fifo *fifo, const struct nvkm_oclass *oclass,
args->v0.vmm,
args->v0.ioffset,
args->v0.ilength,
&args->v0.inst,
oclass, pobject);
}

4
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c
View File

@ -114,7 +114,7 @@ gv100_fifo_gpfifo_func = {
static int
gv100_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
u64 vmm, u64 ioffset, u64 ilength,
u64 vmm, u64 ioffset, u64 ilength, u64 *inst,
const struct nvkm_oclass *oclass,
struct nvkm_object **pobject)
{
@ -150,6 +150,7 @@ gv100_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
return ret;
*chid = chan->base.chid;
*inst = chan->base.inst->addr;
/* Hack to support GPUs where even individual channels should be
* part of a channel group.
@ -218,6 +219,7 @@ gv100_fifo_gpfifo_new(struct gk104_fifo *fifo, const struct nvkm_oclass *oclass,
args->v0.vmm,
args->v0.ioffset,
args->v0.ilength,
&args->v0.inst,
oclass, pobject);
}