This is the 5.10.144 stable release

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Merge 5.10.144 into android12-5.10-lts

Changes in 5.10.144
	ARM: dts: imx: align SPI NOR node name with dtschema
	ARM: dts: imx6qdl-kontron-samx6i: fix spi-flash compatible
	iommu/vt-d: Correctly calculate sagaw value of IOMMU
	tracefs: Only clobber mode/uid/gid on remount if asked
	Input: goodix - add support for GT1158
	drm/msm/rd: Fix FIFO-full deadlock
	HID: ishtp-hid-clientHID: ishtp-hid-client: Fix comment typo
	hid: intel-ish-hid: ishtp: Fix ishtp client sending disordered message
	tg3: Disable tg3 device on system reboot to avoid triggering AER
	gpio: mockup: remove gpio debugfs when remove device
	ieee802154: cc2520: add rc code in cc2520_tx()
	Input: iforce - add support for Boeder Force Feedback Wheel
	nvmet-tcp: fix unhandled tcp states in nvmet_tcp_state_change()
	drm/amd/amdgpu: skip ucode loading if ucode_size == 0
	perf/arm_pmu_platform: fix tests for platform_get_irq() failure
	platform/x86: acer-wmi: Acer Aspire One AOD270/Packard Bell Dot keymap fixes
	usb: storage: Add ASUS <0x0b05:0x1932> to IGNORE_UAS
	mm: Fix TLB flush for not-first PFNMAP mappings in unmap_region()
	Revert "x86/ftrace: Use alternative RET encoding"
	x86/ibt,ftrace: Make function-graph play nice
	x86/ftrace: Use alternative RET encoding
	soc: fsl: select FSL_GUTS driver for DPIO
	Input: goodix - add compatible string for GT1158
	Linux 5.10.144

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Ie5222afc95240a8f4b6b4b42d249a8d00eaf661f
This commit is contained in:
Greg Kroah-Hartman 2022-09-22 14:50:45 +02:00
commit 7474313da8
53 changed files with 191 additions and 94 deletions

View File

@ -517,6 +517,7 @@ All I-Force devices are supported by the iforce module. This includes:
* AVB Mag Turbo Force
* AVB Top Shot Pegasus
* AVB Top Shot Force Feedback Racing Wheel
* Boeder Force Feedback Wheel
* Logitech WingMan Force
* Logitech WingMan Force Wheel
* Guillemot Race Leader Force Feedback

View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 143
SUBLEVEL = 144
EXTRAVERSION =
NAME = Dare mighty things

View File

@ -129,7 +129,7 @@ ssp2: spi@80014000 {
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf016b", "jedec,spi-nor";

View File

@ -33,7 +33,7 @@ ssp2: spi@80014000 {
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p80", "jedec,spi-nor";

View File

@ -51,7 +51,7 @@ ssp2: spi@80014000 {
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "everspin,mr25h256", "mr25h256";

View File

@ -19,7 +19,7 @@ memory@10000000 {
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -139,7 +139,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: n25q032@0 {
flash: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;

View File

@ -160,7 +160,7 @@ &ecspi5 {
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25";
spi-max-frequency = <10000000>;
size = <0x8000>;

View File

@ -260,7 +260,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
m25p80@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p", "jedec,spi-nor";

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@ -102,7 +102,7 @@ &ecspi5 {
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "m25p80", "jedec,spi-nor";
spi-max-frequency = <40000000>;
reg = <0>;

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@ -47,7 +47,7 @@ &ecspi5 {
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25256B", "atmel,at25";
spi-max-frequency = <20000000>;
size = <0x8000>;

View File

@ -137,7 +137,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,w25q256", "jedec,spi-nor";
spi-max-frequency = <30000000>;
reg = <0>;

View File

@ -100,7 +100,7 @@ &ecspi1 {
cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
status = "okay";
m25p80@0 {
flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -19,7 +19,7 @@ memory@10000000 {
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf032b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -96,7 +96,7 @@ &ecspi4 {
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";

View File

@ -131,7 +131,7 @@ &ecspi4 {
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@1 {
flash: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";

View File

@ -35,7 +35,7 @@ &ecspi3 {
pinctrl-0 = <&pinctrl_ecspi3>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf040b", "jedec,spi-nor";

View File

@ -248,8 +248,8 @@ &ecspi4 {
status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */
smarc_flash: spi-flash@0 {
compatible = "winbond,w25q16dw", "jedec,spi-nor";
smarc_flash: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
};

View File

@ -179,7 +179,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -321,7 +321,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -252,7 +252,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -237,7 +237,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -272,7 +272,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
status = "disabled"; /* pin conflict with WEIM NOR */
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

View File

@ -313,7 +313,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -194,7 +194,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

View File

@ -137,7 +137,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";

View File

@ -107,7 +107,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;

View File

@ -123,7 +123,7 @@ &qspi2 {
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: s25fl128s@0 {
flash0: flash@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
@ -133,7 +133,7 @@ flash0: s25fl128s@0 {
spi-tx-bus-width = <4>;
};
flash1: s25fl128s@2 {
flash1: flash@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <1>;

View File

@ -108,7 +108,7 @@ &qspi2 {
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
@ -118,7 +118,7 @@ flash0: n25q256a@0 {
reg = <0>;
};
flash1: n25q256a@2 {
flash1: flash@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";

View File

@ -239,7 +239,7 @@ &qspi {
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";

View File

@ -19,7 +19,7 @@ memory@80000000 {
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

View File

@ -18,7 +18,7 @@ memory@80000000 {
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

View File

@ -19,7 +19,7 @@ &ecspi2 {
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;

View File

@ -18,7 +18,7 @@ memory@80000000 {
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";

View File

@ -322,12 +322,12 @@ create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)
unsigned long offset;
unsigned long npages;
unsigned long size;
unsigned long retq;
unsigned long *ptr;
void *trampoline;
void *ip;
/* 48 8b 15 <offset> is movq <offset>(%rip), %rdx */
unsigned const char op_ref[] = { 0x48, 0x8b, 0x15 };
unsigned const char retq[] = { RET_INSN_OPCODE, INT3_INSN_OPCODE };
union ftrace_op_code_union op_ptr;
int ret;
@ -367,13 +367,10 @@ create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)
ip = trampoline + size;
/* The trampoline ends with ret(q) */
retq = (unsigned long)ftrace_stub;
if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
memcpy(ip, text_gen_insn(JMP32_INSN_OPCODE, ip, &__x86_return_thunk), JMP32_INSN_SIZE);
else
ret = copy_from_kernel_nofault(ip, (void *)retq, RET_SIZE);
if (WARN_ON(ret < 0))
goto fail;
memcpy(ip, retq, sizeof(retq));
/* No need to test direct calls on created trampolines */
if (ops->flags & FTRACE_OPS_FL_SAVE_REGS) {

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@ -170,7 +170,6 @@ SYM_INNER_LABEL(ftrace_graph_call, SYM_L_GLOBAL)
/*
* This is weak to keep gas from relaxing the jumps.
* It is also used to copy the RET for trampolines.
*/
SYM_INNER_LABEL_ALIGN(ftrace_stub, SYM_L_WEAK)
UNWIND_HINT_FUNC
@ -325,7 +324,7 @@ SYM_FUNC_END(ftrace_graph_caller)
SYM_CODE_START(return_to_handler)
UNWIND_HINT_EMPTY
subq $24, %rsp
subq $16, %rsp
/* Save the return values */
movq %rax, (%rsp)
@ -337,7 +336,19 @@ SYM_CODE_START(return_to_handler)
movq %rax, %rdi
movq 8(%rsp), %rdx
movq (%rsp), %rax
addq $24, %rsp
JMP_NOSPEC rdi
addq $16, %rsp
/*
* Jump back to the old return address. This cannot be JMP_NOSPEC rdi
* since IBT would demand that contain ENDBR, which simply isn't so for
* return addresses. Use a retpoline here to keep the RSB balanced.
*/
ANNOTATE_INTRA_FUNCTION_CALL
call .Ldo_rop
int3
.Ldo_rop:
mov %rdi, (%rsp)
UNWIND_HINT_FUNC
RET
SYM_CODE_END(return_to_handler)
#endif

View File

@ -375,6 +375,13 @@ static void gpio_mockup_debugfs_setup(struct device *dev,
}
}
static void gpio_mockup_debugfs_cleanup(void *data)
{
struct gpio_mockup_chip *chip = data;
debugfs_remove_recursive(chip->dbg_dir);
}
static void gpio_mockup_dispose_mappings(void *data)
{
struct gpio_mockup_chip *chip = data;
@ -457,7 +464,7 @@ static int gpio_mockup_probe(struct platform_device *pdev)
gpio_mockup_debugfs_setup(dev, chip);
return 0;
return devm_add_action_or_reset(dev, gpio_mockup_debugfs_cleanup, chip);
}
static struct platform_driver gpio_mockup_driver = {

View File

@ -1921,7 +1921,7 @@ static int psp_load_smu_fw(struct psp_context *psp)
static bool fw_load_skip_check(struct psp_context *psp,
struct amdgpu_firmware_info *ucode)
{
if (!ucode->fw)
if (!ucode->fw || !ucode->ucode_size)
return true;
if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&

View File

@ -191,6 +191,9 @@ static int rd_open(struct inode *inode, struct file *file)
file->private_data = rd;
rd->open = true;
/* Reset fifo to clear any previously unread data: */
rd->fifo.head = rd->fifo.tail = 0;
/* the parsing tools need to know gpu-id to know which
* register database to load.
*/

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@ -110,7 +110,7 @@ struct report_list {
* @multi_packet_cnt: Count of fragmented packet count
*
* This structure is used to store completion flags and per client data like
* like report description, number of HID devices etc.
* report description, number of HID devices etc.
*/
struct ishtp_cl_data {
/* completion flags */

View File

@ -626,13 +626,14 @@ static void ishtp_cl_read_complete(struct ishtp_cl_rb *rb)
}
/**
* ipc_tx_callback() - IPC tx callback function
* ipc_tx_send() - IPC tx send function
* @prm: Pointer to client device instance
*
* Send message over IPC either first time or on callback on previous message
* completion
* Send message over IPC. Message will be split into fragments
* if message size is bigger than IPC FIFO size, and all
* fragments will be sent one by one.
*/
static void ipc_tx_callback(void *prm)
static void ipc_tx_send(void *prm)
{
struct ishtp_cl *cl = prm;
struct ishtp_cl_tx_ring *cl_msg;
@ -677,32 +678,41 @@ static void ipc_tx_callback(void *prm)
list);
rem = cl_msg->send_buf.size - cl->tx_offs;
ishtp_hdr.host_addr = cl->host_client_id;
ishtp_hdr.fw_addr = cl->fw_client_id;
ishtp_hdr.reserved = 0;
pmsg = cl_msg->send_buf.data + cl->tx_offs;
while (rem > 0) {
ishtp_hdr.host_addr = cl->host_client_id;
ishtp_hdr.fw_addr = cl->fw_client_id;
ishtp_hdr.reserved = 0;
pmsg = cl_msg->send_buf.data + cl->tx_offs;
if (rem <= dev->mtu) {
ishtp_hdr.length = rem;
ishtp_hdr.msg_complete = 1;
cl->sending = 0;
list_del_init(&cl_msg->list); /* Must be before write */
spin_unlock_irqrestore(&cl->tx_list_spinlock, tx_flags);
/* Submit to IPC queue with no callback */
ishtp_write_message(dev, &ishtp_hdr, pmsg);
spin_lock_irqsave(&cl->tx_free_list_spinlock, tx_free_flags);
list_add_tail(&cl_msg->list, &cl->tx_free_list.list);
++cl->tx_ring_free_size;
spin_unlock_irqrestore(&cl->tx_free_list_spinlock,
tx_free_flags);
} else {
/* Send IPC fragment */
spin_unlock_irqrestore(&cl->tx_list_spinlock, tx_flags);
cl->tx_offs += dev->mtu;
ishtp_hdr.length = dev->mtu;
ishtp_hdr.msg_complete = 0;
ishtp_send_msg(dev, &ishtp_hdr, pmsg, ipc_tx_callback, cl);
if (rem <= dev->mtu) {
/* Last fragment or only one packet */
ishtp_hdr.length = rem;
ishtp_hdr.msg_complete = 1;
/* Submit to IPC queue with no callback */
ishtp_write_message(dev, &ishtp_hdr, pmsg);
cl->tx_offs = 0;
cl->sending = 0;
break;
} else {
/* Send ipc fragment */
ishtp_hdr.length = dev->mtu;
ishtp_hdr.msg_complete = 0;
/* All fregments submitted to IPC queue with no callback */
ishtp_write_message(dev, &ishtp_hdr, pmsg);
cl->tx_offs += dev->mtu;
rem = cl_msg->send_buf.size - cl->tx_offs;
}
}
list_del_init(&cl_msg->list);
spin_unlock_irqrestore(&cl->tx_list_spinlock, tx_flags);
spin_lock_irqsave(&cl->tx_free_list_spinlock, tx_free_flags);
list_add_tail(&cl_msg->list, &cl->tx_free_list.list);
++cl->tx_ring_free_size;
spin_unlock_irqrestore(&cl->tx_free_list_spinlock,
tx_free_flags);
}
/**
@ -720,7 +730,7 @@ static void ishtp_cl_send_msg_ipc(struct ishtp_device *dev,
return;
cl->tx_offs = 0;
ipc_tx_callback(cl);
ipc_tx_send(cl);
++cl->send_msg_cnt_ipc;
}

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@ -50,6 +50,7 @@ static struct iforce_device iforce_device[] = {
{ 0x046d, 0xc291, "Logitech WingMan Formula Force", btn_wheel, abs_wheel, ff_iforce },
{ 0x05ef, 0x020a, "AVB Top Shot Pegasus", btn_joystick_avb, abs_avb_pegasus, ff_iforce },
{ 0x05ef, 0x8884, "AVB Mag Turbo Force", btn_wheel, abs_wheel, ff_iforce },
{ 0x05ef, 0x8886, "Boeder Force Feedback Wheel", btn_wheel, abs_wheel, ff_iforce },
{ 0x05ef, 0x8888, "AVB Top Shot Force Feedback Racing Wheel", btn_wheel, abs_wheel, ff_iforce }, //?
{ 0x061c, 0xc0a4, "ACT LABS Force RS", btn_wheel, abs_wheel, ff_iforce }, //?
{ 0x061c, 0xc084, "ACT LABS Force RS", btn_wheel, abs_wheel, ff_iforce },

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@ -154,6 +154,7 @@ static const struct goodix_chip_data gt9x_chip_data = {
static const struct goodix_chip_id goodix_chip_ids[] = {
{ .id = "1151", .data = &gt1x_chip_data },
{ .id = "1158", .data = &gt1x_chip_data },
{ .id = "5663", .data = &gt1x_chip_data },
{ .id = "5688", .data = &gt1x_chip_data },
{ .id = "917S", .data = &gt1x_chip_data },
@ -1385,6 +1386,7 @@ MODULE_DEVICE_TABLE(acpi, goodix_acpi_match);
#ifdef CONFIG_OF
static const struct of_device_id goodix_of_match[] = {
{ .compatible = "goodix,gt1151" },
{ .compatible = "goodix,gt1158" },
{ .compatible = "goodix,gt5663" },
{ .compatible = "goodix,gt5688" },
{ .compatible = "goodix,gt911" },

View File

@ -560,14 +560,36 @@ static inline int domain_pfn_supported(struct dmar_domain *domain,
return !(addr_width < BITS_PER_LONG && pfn >> addr_width);
}
/*
* Calculate the Supported Adjusted Guest Address Widths of an IOMMU.
* Refer to 11.4.2 of the VT-d spec for the encoding of each bit of
* the returned SAGAW.
*/
static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu)
{
unsigned long fl_sagaw, sl_sagaw;
fl_sagaw = BIT(2) | (cap_fl1gp_support(iommu->cap) ? BIT(3) : 0);
sl_sagaw = cap_sagaw(iommu->cap);
/* Second level only. */
if (!sm_supported(iommu) || !ecap_flts(iommu->ecap))
return sl_sagaw;
/* First level only. */
if (!ecap_slts(iommu->ecap))
return fl_sagaw;
return fl_sagaw & sl_sagaw;
}
static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
{
unsigned long sagaw;
int agaw = -1;
sagaw = cap_sagaw(iommu->cap);
for (agaw = width_to_agaw(max_gaw);
agaw >= 0; agaw--) {
sagaw = __iommu_calculate_sagaw(iommu);
for (agaw = width_to_agaw(max_gaw); agaw >= 0; agaw--) {
if (test_bit(agaw, &sagaw))
break;
}

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@ -18146,16 +18146,20 @@ static void tg3_shutdown(struct pci_dev *pdev)
struct net_device *dev = pci_get_drvdata(pdev);
struct tg3 *tp = netdev_priv(dev);
tg3_reset_task_cancel(tp);
rtnl_lock();
netif_device_detach(dev);
if (netif_running(dev))
dev_close(dev);
if (system_state == SYSTEM_POWER_OFF)
tg3_power_down(tp);
tg3_power_down(tp);
rtnl_unlock();
pci_disable_device(pdev);
}
/**

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@ -504,6 +504,7 @@ cc2520_tx(struct ieee802154_hw *hw, struct sk_buff *skb)
goto err_tx;
if (status & CC2520_STATUS_TX_UNDERFLOW) {
rc = -EINVAL;
dev_err(&priv->spi->dev, "cc2520 tx underflow exception\n");
goto err_tx;
}

View File

@ -1471,6 +1471,9 @@ static void nvmet_tcp_state_change(struct sock *sk)
goto done;
switch (sk->sk_state) {
case TCP_FIN_WAIT2:
case TCP_LAST_ACK:
break;
case TCP_FIN_WAIT1:
case TCP_CLOSE_WAIT:
case TCP_CLOSE:

View File

@ -117,7 +117,7 @@ static int pmu_parse_irqs(struct arm_pmu *pmu)
if (num_irqs == 1) {
int irq = platform_get_irq(pdev, 0);
if (irq && irq_is_percpu_devid(irq))
if ((irq > 0) && irq_is_percpu_devid(irq))
return pmu_parse_percpu_irq(pmu, irq);
}

View File

@ -93,6 +93,7 @@ static const struct key_entry acer_wmi_keymap[] __initconst = {
{KE_KEY, 0x22, {KEY_PROG2} }, /* Arcade */
{KE_KEY, 0x23, {KEY_PROG3} }, /* P_Key */
{KE_KEY, 0x24, {KEY_PROG4} }, /* Social networking_Key */
{KE_KEY, 0x27, {KEY_HELP} },
{KE_KEY, 0x29, {KEY_PROG3} }, /* P_Key for TM8372 */
{KE_IGNORE, 0x41, {KEY_MUTE} },
{KE_IGNORE, 0x42, {KEY_PREVIOUSSONG} },
@ -106,7 +107,13 @@ static const struct key_entry acer_wmi_keymap[] __initconst = {
{KE_IGNORE, 0x48, {KEY_VOLUMEUP} },
{KE_IGNORE, 0x49, {KEY_VOLUMEDOWN} },
{KE_IGNORE, 0x4a, {KEY_VOLUMEDOWN} },
{KE_IGNORE, 0x61, {KEY_SWITCHVIDEOMODE} },
/*
* 0x61 is KEY_SWITCHVIDEOMODE. Usually this is a duplicate input event
* with the "Video Bus" input device events. But sometimes it is not
* a dup. Map it to KEY_UNKNOWN instead of using KE_IGNORE so that
* udev/hwdb can override it on systems where it is not a dup.
*/
{KE_KEY, 0x61, {KEY_UNKNOWN} },
{KE_IGNORE, 0x62, {KEY_BRIGHTNESSUP} },
{KE_IGNORE, 0x63, {KEY_BRIGHTNESSDOWN} },
{KE_KEY, 0x64, {KEY_SWITCHVIDEOMODE} }, /* Display Switch */

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@ -24,6 +24,7 @@ config FSL_MC_DPIO
tristate "QorIQ DPAA2 DPIO driver"
depends on FSL_MC_BUS
select SOC_BUS
select FSL_GUTS
help
Driver for the DPAA2 DPIO object. A DPIO provides queue and
buffer management facilities for software to interact with

View File

@ -62,6 +62,13 @@ UNUSUAL_DEV(0x0984, 0x0301, 0x0128, 0x0128,
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
US_FL_IGNORE_UAS),
/* Reported-by: Tom Hu <huxiaoying@kylinos.cn> */
UNUSUAL_DEV(0x0b05, 0x1932, 0x0000, 0x9999,
"ASUS",
"External HDD",
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
US_FL_IGNORE_UAS),
/* Reported-by: David Webb <djw@noc.ac.uk> */
UNUSUAL_DEV(0x0bc2, 0x331a, 0x0000, 0x9999,
"Seagate",

View File

@ -139,6 +139,8 @@ struct tracefs_mount_opts {
kuid_t uid;
kgid_t gid;
umode_t mode;
/* Opt_* bitfield. */
unsigned int opts;
};
enum {
@ -239,6 +241,7 @@ static int tracefs_parse_options(char *data, struct tracefs_mount_opts *opts)
kgid_t gid;
char *p;
opts->opts = 0;
opts->mode = TRACEFS_DEFAULT_MODE;
while ((p = strsep(&data, ",")) != NULL) {
@ -273,24 +276,36 @@ static int tracefs_parse_options(char *data, struct tracefs_mount_opts *opts)
* but traditionally tracefs has ignored all mount options
*/
}
opts->opts |= BIT(token);
}
return 0;
}
static int tracefs_apply_options(struct super_block *sb)
static int tracefs_apply_options(struct super_block *sb, bool remount)
{
struct tracefs_fs_info *fsi = sb->s_fs_info;
struct inode *inode = sb->s_root->d_inode;
struct tracefs_mount_opts *opts = &fsi->mount_opts;
inode->i_mode &= ~S_IALLUGO;
inode->i_mode |= opts->mode;
/*
* On remount, only reset mode/uid/gid if they were provided as mount
* options.
*/
inode->i_uid = opts->uid;
if (!remount || opts->opts & BIT(Opt_mode)) {
inode->i_mode &= ~S_IALLUGO;
inode->i_mode |= opts->mode;
}
/* Set all the group ids to the mount option */
set_gid(sb->s_root, opts->gid);
if (!remount || opts->opts & BIT(Opt_uid))
inode->i_uid = opts->uid;
if (!remount || opts->opts & BIT(Opt_gid)) {
/* Set all the group ids to the mount option */
set_gid(sb->s_root, opts->gid);
}
return 0;
}
@ -305,7 +320,7 @@ static int tracefs_remount(struct super_block *sb, int *flags, char *data)
if (err)
goto fail;
tracefs_apply_options(sb);
tracefs_apply_options(sb, true);
fail:
return err;
@ -357,7 +372,7 @@ static int trace_fill_super(struct super_block *sb, void *data, int silent)
sb->s_op = &tracefs_super_operations;
tracefs_apply_options(sb);
tracefs_apply_options(sb, false);
return 0;

View File

@ -2768,6 +2768,7 @@ static void unmap_region(struct mm_struct *mm,
{
struct vm_area_struct *next = vma_next(mm, prev);
struct mmu_gather tlb;
struct vm_area_struct *cur_vma;
lru_add_drain();
tlb_gather_mmu(&tlb, mm, start, end);
@ -2782,8 +2783,12 @@ static void unmap_region(struct mm_struct *mm,
* concurrent flush in this region has to be coming through the rmap,
* and we synchronize against that using the rmap lock.
*/
if ((vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP)) != 0)
tlb_flush_mmu(&tlb);
for (cur_vma = vma; cur_vma; cur_vma = cur_vma->vm_next) {
if ((cur_vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP)) != 0) {
tlb_flush_mmu(&tlb);
break;
}
}
free_pgtables(&tlb, vma, prev ? prev->vm_end : FIRST_USER_ADDRESS,
next ? next->vm_start : USER_PGTABLES_CEILING);