ARM: dts: imx53-ppd: Fix ACHC entry
[ Upstream commit cd7cd5b716d594e27a933c12f026d4f2426d7bf4 ] PPD has only one ACHC device, which effectively is a Kinetis microcontroller. It has one SPI interface used for normal communication. Additionally it's possible to flash the device firmware using NXP's EzPort protocol by correctly driving a second chip select pin and the device reset pin. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20210802172309.164365-3-sebastian.reichel@collabora.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -70,6 +70,12 @@ cko2_11M: sgtl-clock-cko2 {
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clock-frequency = <11289600>;
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};
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achc_24M: achc-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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sgtlsound: sound {
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compatible = "fsl,imx53-cpuvo-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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@ -313,16 +319,13 @@ &gpio4 11 GPIO_ACTIVE_LOW
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&gpio4 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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spidev0: spi@0 {
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compatible = "ge,achc";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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spidev1: spi@1 {
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compatible = "ge,achc";
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reg = <1>;
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spi-max-frequency = <1000000>;
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spidev0: spi@1 {
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compatible = "ge,achc", "nxp,kinetis-k20";
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reg = <1>, <0>;
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vdd-supply = <®_3v3>;
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vdda-supply = <®_3v3>;
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clocks = <&achc_24M>;
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reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
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};
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gpioxra0: gpio@2 {
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