android/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[media] au8522: cleanup s-video settings at setup_decoder_defaults()

Browse Source 
setup_decoder_defaults() doesn't really care about the input
port. All it needs to know is if the input port is s-video or
not.

As the caller function already knows that, just pass a boolean
instead.

Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Mauro Carvalho Chehab 2014-06-08 13:54:54 -03:00
parent d289cdf022
commit 65c8820912
1 changed files with 8 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
drivers/media/dvb-frontends/au8522_decoder.c
View File

@ -220,7 +220,7 @@ static void setup_vbi(struct au8522_state *state, int aud_input)
} }
static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) static void setup_decoder_defaults(struct au8522_state *state, bool is_svideo)
{ {
int i; int i;
int filter_coef_type; int filter_coef_type;
@ -237,13 +237,10 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode)
/* Other decoder registers */ /* Other decoder registers */
au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00); au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00);
if (input_mode == 0x23) { if (is_svideo)
/* S-Video input mapping */
au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04); au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04);
} else { else
/* All other modes (CVBS/ATVRF etc.) */
au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00); au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00);
}
au8522_writereg(state, AU8522_TVDEC_PGA_REG012H, au8522_writereg(state, AU8522_TVDEC_PGA_REG012H,
AU8522_TVDEC_PGA_REG012H_CVBS); AU8522_TVDEC_PGA_REG012H_CVBS);
@ -275,8 +272,7 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode)
AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS); AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS);
au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH, au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH,
AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS); AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS);
if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 || if (is_svideo) {
input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) {
au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH, au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO); AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO);
au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH, au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
@ -317,8 +313,7 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode)
setup_vbi(state, 0); setup_vbi(state, 0);
if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 || if (is_svideo) {
input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) {
/* Despite what the table says, for the HVR-950q we still need /* Despite what the table says, for the HVR-950q we still need
to be in CVBS mode for the S-Video input (reason unknown). */ to be in CVBS mode for the S-Video input (reason unknown). */
/* filter_coef_type = 3; */ /* filter_coef_type = 3; */
@ -360,7 +355,7 @@ static void au8522_setup_cvbs_mode(struct au8522_state *state, u8 input_mode)
au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);
setup_decoder_defaults(state, input_mode); setup_decoder_defaults(state, false);
au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,
AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS);
@ -386,7 +381,7 @@ static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state,
/* Set input mode to CVBS on channel 4 with SIF audio input enabled */ /* Set input mode to CVBS on channel 4 with SIF audio input enabled */
au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode);
setup_decoder_defaults(state, input_mode); setup_decoder_defaults(state, false);
au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,
AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS);
@ -407,7 +402,7 @@ static void au8522_setup_svideo_mode(struct au8522_state *state,
/* Enable clamping control */ /* Enable clamping control */
au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);
setup_decoder_defaults(state, input_mode); setup_decoder_defaults(state, true);
au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,
AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS);