This is the 5.10.73 stable release
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for 'phys' phandle USB: cdc-acm: fix racy tty buffer accesses USB: cdc-acm: fix break reporting usb: typec: tcpm: handle SRC_STARTUP state if cc changes drm/nouveau/kms/tu102-: delay enabling cursor until after assign_windows xen/privcmd: fix error handling in mmap-resource processing mmc: meson-gx: do not use memcpy_to/fromio for dram-access-quirk mmc: sdhci-of-at91: wait for calibration done before proceed mmc: sdhci-of-at91: replace while loop with read_poll_timeout ovl: fix missing negative dentry check in ovl_rename() ovl: fix IOCB_DIRECT if underlying fs doesn't support direct IO nfsd: fix error handling of register_pernet_subsys() in init_nfsd() nfsd4: Handle the NFSv4 READDIR 'dircount' hint being zero SUNRPC: fix sign error causing rpcsec_gss drops xen/balloon: fix cancelled balloon action ARM: dts: omap3430-sdp: Fix NAND device node ARM: dts: imx6dl-yapp4: Fix lp5562 LED driver probe ARM: dts: qcom: apq8064: use compatible which contains chipid riscv: Flush current cpu icache before other cpus bus: ti-sysc: Add break in switch statement in sysc_init_soc() soc: qcom: socinfo: Fixed argument passed to platform_set_data() ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference ARM: at91: pm: do not panic if ram controllers are not enabled soc: qcom: mdt_loader: Drop PT_LOAD check on hash segment ARM: dts: imx: Add missing pinctrl-names for panel on M53Menlo ARM: dts: imx: Fix USB host power regulator polarity on M53Menlo ARM: dts: imx6qdl-pico: Fix Ethernet support PCI: hv: Fix sleep while in non-sleep context when removing child devices from the bus ath5k: fix building with LEDS=m arm64: dts: qcom: pm8150: use qcom,pm8998-pon binding xtensa: use CONFIG_USE_OF instead of CONFIG_OF xtensa: call irqchip_init only when CONFIG_USE_OF is selected iwlwifi: pcie: add configuration of a Wi-Fi adapter on Dell XPS 15 bpf, arm: Fix register clobbering in div/mod implementation soc: ti: omap-prm: Fix external abort for am335x pruss bpf: Fix integer overflow in prealloc_elems_and_freelist() net/mlx5e: IPSEC RX, enable checksum complete net/mlx5: E-Switch, Fix double allocation of acl flow counter phy: mdio: fix memory leak net_sched: fix NULL deref in fifo_set_limit() powerpc/fsl/dts: Fix phy-connection-type for fm1mac3 ptp_pch: Load module automatically if ID matches arm64: dts: ls1028a: add missing CAN nodes dt-bindings: drm/bridge: ti-sn65dsi86: Fix reg value ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence net: bridge: use nla_total_size_64bit() in br_get_linkxstats_size() net: bridge: fix under estimation in br_get_linkxstats_size() net/sched: sch_taprio: properly cancel timer from taprio_destroy() net: sfp: Fix typo in state machine debug string netlink: annotate data races around nlk->bound perf jevents: Tidy error handling bus: ti-sysc: Use CLKDM_NOAUTO for dra7 dcan1 for errata i893 drm/sun4i: dw-hdmi: Fix HDMI PHY clock setup video: fbdev: gbefb: Only instantiate device when built for IP32 drm/nouveau: avoid a use-after-free when BO init fails drm/nouveau/kms/nv50-: fix file release memory leak drm/nouveau/debugfs: fix file release memory leak gve: Correct available tx qpl check gve: Avoid freeing NULL pointer rtnetlink: fix if_nlmsg_stats_size() under estimation gve: fix gve_get_stats() gve: report 64bit tx_bytes counter from gve_handle_report_stats() i40e: fix endless loop under rtnl i40e: Fix freeing of uninitialized misc IRQ vector net: prefer socket bound to interface when not in VRF powerpc/iommu: Report the correct most efficient DMA mask for PCI devices i2c: acpi: fix resource leak in reconfiguration device addition i2c: mediatek: Add OFFSET_EXT_CONF setting back riscv/vdso: make arch_setup_additional_pages wait for mmap_sem for write killable bpf, s390: Fix potential memory leak about jit_data RISC-V: Include clone3() on rv32 powerpc/bpf: Fix BPF_SUB when imm == 0x80000000 powerpc/64s: fix program check interrupt emergency stack path pseries/eeh: Fix the kdump kernel crash during eeh_pseries_init x86/platform/olpc: Correct ifdef symbol to intended CONFIG_OLPC_XO15_SCI x86/Kconfig: Correct reference to MWINCHIP3D x86/sev: Return an error on a returned non-zero SW_EXITINFO1[31:0] x86/entry: Correct reference to intended CONFIG_64_BIT x86/entry: Clear X86_FEATURE_SMAP when CONFIG_X86_SMAP=n x86/hpet: Use another crystalball to evaluate HPET usability Linux 5.10.73 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: Ib837d28b5ab0510121c16791823806a287c81926
This commit is contained in:
Greg Kroah-Hartman
commit
4b3fd2a81e
@ -18,7 +18,7 @@ properties:
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const: ti,sn65dsi86
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reg:
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const: 0x2d
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enum: [ 0x2c, 0x2d ]
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enable-gpios:
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maxItems: 1
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2
Makefile
2
Makefile
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 10
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SUBLEVEL = 72
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SUBLEVEL = 73
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EXTRAVERSION =
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NAME = Dare mighty things
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@ -56,6 +56,7 @@ eth {
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panel {
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compatible = "edt,etm0700g0dh6";
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pinctrl-0 = <&pinctrl_display_gpio>;
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pinctrl-names = "default";
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enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
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port {
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@ -76,8 +77,7 @@ reg_usbh1_vbus: regulator-usbh1-vbus {
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regulator-name = "vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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gpio = <&gpio1 2 0>;
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};
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};
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@ -5,6 +5,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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@ -275,6 +276,7 @@ chan@0 {
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <0>;
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color = <LED_COLOR_ID_RED>;
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};
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chan@1 {
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@ -282,6 +284,7 @@ chan@1 {
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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};
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chan@2 {
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@ -289,6 +292,7 @@ chan@2 {
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led-cur = /bits/ 8 <0x20>;
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max-cur = /bits/ 8 <0x60>;
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reg = <2>;
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color = <LED_COLOR_ID_BLUE>;
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};
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chan@3 {
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@ -296,6 +300,7 @@ chan@3 {
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led-cur = /bits/ 8 <0x0>;
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max-cur = /bits/ 8 <0x0>;
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reg = <3>;
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color = <LED_COLOR_ID_WHITE>;
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};
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};
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@ -176,7 +176,18 @@ &fec {
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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phy-handle = <&phy>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy: ethernet-phy@1 {
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reg = <1>;
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qca,clk-out-frequency = <125000000>;
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};
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};
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};
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&hdmi {
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@ -101,7 +101,7 @@ partition@280000 {
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nand@1,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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@ -198,7 +198,7 @@ cxo_board: cxo_board {
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clock-frequency = <19200000>;
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};
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pxo_board {
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pxo_board: pxo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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@ -1148,7 +1148,7 @@ tcsr: syscon@1a400000 {
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};
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gpu: adreno-3xx@4300000 {
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compatible = "qcom,adreno-3xx";
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compatible = "qcom,adreno-320.2", "qcom,adreno";
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reg = <0x04300000 0x20000>;
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reg-names = "kgsl_3d0_reg_memory";
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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@ -1163,7 +1163,6 @@ gpu: adreno-3xx@4300000 {
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<&mmcc GFX3D_AHB_CLK>,
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<&mmcc GFX3D_AXI_CLK>,
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<&mmcc MMSS_IMEM_AHB_CLK>;
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qcom,chipid = <0x03020002>;
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iommus = <&gfx3d 0
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&gfx3d 1
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@ -1306,7 +1305,7 @@ dsi0_phy: dsi-phy@4700200 {
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reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
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clock-names = "iface_clk", "ref";
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clocks = <&mmcc DSI_M_AHB_CLK>,
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<&cxo_board>;
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<&pxo_board>;
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};
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@ -517,18 +517,22 @@ static const struct of_device_id ramc_ids[] __initconst = {
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{ /*sentinel*/ }
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};
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static __init void at91_dt_ramc(void)
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static __init int at91_dt_ramc(void)
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{
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struct device_node *np;
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const struct of_device_id *of_id;
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int idx = 0;
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void *standby = NULL;
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const struct ramc_info *ramc;
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int ret;
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for_each_matching_node_and_match(np, ramc_ids, &of_id) {
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soc_pm.data.ramc[idx] = of_iomap(np, 0);
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if (!soc_pm.data.ramc[idx])
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panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
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if (!soc_pm.data.ramc[idx]) {
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pr_err("unable to map ramc[%d] cpu registers\n", idx);
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ret = -ENOMEM;
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goto unmap_ramc;
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}
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ramc = of_id->data;
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if (!standby)
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@ -538,15 +542,26 @@ static __init void at91_dt_ramc(void)
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idx++;
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}
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if (!idx)
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panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
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if (!idx) {
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pr_err("unable to find compatible ram controller node in dtb\n");
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ret = -ENODEV;
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goto unmap_ramc;
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}
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if (!standby) {
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pr_warn("ramc no standby function available\n");
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return;
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return 0;
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}
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at91_cpuidle_device.dev.platform_data = standby;
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return 0;
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unmap_ramc:
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while (idx)
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iounmap(soc_pm.data.ramc[--idx]);
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return ret;
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}
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static void at91rm9200_idle(void)
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@ -869,6 +884,8 @@ static void __init at91_pm_init(void (*pm_idle)(void))
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void __init at91rm9200_pm_init(void)
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{
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int ret;
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if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
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return;
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@ -880,7 +897,9 @@ void __init at91rm9200_pm_init(void)
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soc_pm.data.standby_mode = AT91_PM_STANDBY;
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soc_pm.data.suspend_mode = AT91_PM_ULP0;
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at91_dt_ramc();
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ret = at91_dt_ramc();
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if (ret)
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return;
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/*
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* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
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@ -895,13 +914,17 @@ void __init sam9x60_pm_init(void)
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static const int modes[] __initconst = {
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AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1,
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};
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int ret;
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if (!IS_ENABLED(CONFIG_SOC_SAM9X60))
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return;
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at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
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at91_pm_modes_init();
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at91_dt_ramc();
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ret = at91_dt_ramc();
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if (ret)
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return;
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at91_pm_init(NULL);
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soc_pm.ws_ids = sam9x60_ws_ids;
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@ -910,6 +933,8 @@ void __init sam9x60_pm_init(void)
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void __init at91sam9_pm_init(void)
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{
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int ret;
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if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
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return;
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@ -921,7 +946,10 @@ void __init at91sam9_pm_init(void)
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soc_pm.data.standby_mode = AT91_PM_STANDBY;
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soc_pm.data.suspend_mode = AT91_PM_ULP0;
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at91_dt_ramc();
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ret = at91_dt_ramc();
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if (ret)
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return;
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at91_pm_init(at91sam9_idle);
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}
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@ -930,12 +958,16 @@ void __init sama5_pm_init(void)
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static const int modes[] __initconst = {
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AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST,
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};
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int ret;
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if (!IS_ENABLED(CONFIG_SOC_SAMA5))
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return;
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at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
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at91_dt_ramc();
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ret = at91_dt_ramc();
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if (ret)
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return;
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at91_pm_init(NULL);
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}
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@ -945,13 +977,17 @@ void __init sama5d2_pm_init(void)
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AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1,
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AT91_PM_BACKUP,
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};
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int ret;
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if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
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return;
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at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
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at91_pm_modes_init();
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at91_dt_ramc();
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ret = at91_dt_ramc();
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if (ret)
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return;
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at91_pm_init(NULL);
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soc_pm.ws_ids = sama5d2_ws_ids;
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@ -9,6 +9,7 @@
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/genalloc.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/of.h>
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@ -618,6 +619,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
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static void imx6_pm_stby_poweroff(void)
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{
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gic_cpu_if_down(0);
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imx6_set_lpm(STOP_POWER_OFF);
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imx6q_suspend_finish(0);
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@ -3618,6 +3618,8 @@ int omap_hwmod_init_module(struct device *dev,
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oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
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if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
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oh->flags |= HWMOD_SWSUP_MSTANDBY;
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if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
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oh->flags |= HWMOD_CLKDM_NOAUTO;
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error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
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rev_offs, sysc_offs, syss_offs,
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@ -36,6 +36,10 @@
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* +-----+
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* |RSVD | JIT scratchpad
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* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
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* | ... | caller-saved registers
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* +-----+
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* | ... | arguments passed on stack
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* ARM_SP during call => +-----|
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* | |
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* | ... | Function call stack
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* | |
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@ -63,6 +67,12 @@
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*
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* When popping registers off the stack at the end of a BPF function, we
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* reference them via the current ARM_FP register.
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*
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* Some eBPF operations are implemented via a call to a helper function.
|
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* Such calls are "invisible" in the eBPF code, so it is up to the calling
|
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* program to preserve any caller-saved ARM registers during the call. The
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* JIT emits code to push and pop those registers onto the stack, immediately
|
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* above the callee stack frame.
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*/
|
||||
#define CALLEE_MASK (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
|
||||
1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \
|
||||
@ -70,6 +80,8 @@
|
||||
#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
|
||||
#define CALLEE_POP_MASK (CALLEE_MASK | 1 << ARM_PC)
|
||||
|
||||
#define CALLER_MASK (1 << ARM_R0 | 1 << ARM_R1 | 1 << ARM_R2 | 1 << ARM_R3)
|
||||
|
||||
enum {
|
||||
/* Stack layout - these are offsets from (top of stack - 4) */
|
||||
BPF_R2_HI,
|
||||
@ -464,6 +476,7 @@ static inline int epilogue_offset(const struct jit_ctx *ctx)
|
||||
|
||||
static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
||||
{
|
||||
const int exclude_mask = BIT(ARM_R0) | BIT(ARM_R1);
|
||||
const s8 *tmp = bpf2a32[TMP_REG_1];
|
||||
|
||||
#if __LINUX_ARM_ARCH__ == 7
|
||||
@ -495,11 +508,17 @@ static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
||||
emit(ARM_MOV_R(ARM_R0, rm), ctx);
|
||||
}
|
||||
|
||||
/* Push caller-saved registers on stack */
|
||||
emit(ARM_PUSH(CALLER_MASK & ~exclude_mask), ctx);
|
||||
|
||||
/* Call appropriate function */
|
||||
emit_mov_i(ARM_IP, op == BPF_DIV ?
|
||||
(u32)jit_udiv32 : (u32)jit_mod32, ctx);
|
||||
emit_blx_r(ARM_IP, ctx);
|
||||
|
||||
/* Restore caller-saved registers from stack */
|
||||
emit(ARM_POP(CALLER_MASK & ~exclude_mask), ctx);
|
||||
|
||||
/* Save return value */
|
||||
if (rd != ARM_R0)
|
||||
emit(ARM_MOV_R(rd, ARM_R0), ctx);
|
||||
|
||||
@ -386,6 +386,24 @@ esdhc1: mmc@2150000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can0: can@2180000 {
|
||||
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan";
|
||||
reg = <0x0 0x2180000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sysclk>, <&clockgen 4 1>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@2190000 {
|
||||
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan";
|
||||
reg = <0x0 0x2190000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sysclk>, <&clockgen 4 1>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
duart0: serial@21c0500 {
|
||||
compatible = "fsl,ns16550", "ns16550a";
|
||||
reg = <0x00 0x21c0500 0x0 0x100>;
|
||||
|
||||
@ -48,7 +48,7 @@ pm8150_0: pmic@0 {
|
||||
#size-cells = <0>;
|
||||
|
||||
pon: power-on@800 {
|
||||
compatible = "qcom,pm8916-pon";
|
||||
compatible = "qcom,pm8998-pon";
|
||||
reg = <0x0800>;
|
||||
pwrkey {
|
||||
compatible = "qcom,pm8941-pwrkey";
|
||||
|
||||
@ -154,7 +154,7 @@ fm1mac2: ethernet@e2000 {
|
||||
|
||||
fm1mac3: ethernet@e4000 {
|
||||
phy-handle = <&sgmii_aqr_phy3>;
|
||||
phy-connection-type = "sgmii-2500";
|
||||
phy-connection-type = "2500base-x";
|
||||
sleep = <&rcpm 0x20000000>;
|
||||
};
|
||||
|
||||
|
||||
@ -117,6 +117,15 @@ u64 dma_iommu_get_required_mask(struct device *dev)
|
||||
struct iommu_table *tbl = get_iommu_table_base(dev);
|
||||
u64 mask;
|
||||
|
||||
if (dev_is_pci(dev)) {
|
||||
u64 bypass_mask = dma_direct_get_required_mask(dev);
|
||||
|
||||
if (dma_iommu_dma_supported(dev, bypass_mask)) {
|
||||
dev_info(dev, "%s: returning bypass mask 0x%llx\n", __func__, bypass_mask);
|
||||
return bypass_mask;
|
||||
}
|
||||
}
|
||||
|
||||
if (!tbl)
|
||||
return 0;
|
||||
|
||||
|
||||
@ -1715,27 +1715,30 @@ EXC_COMMON_BEGIN(program_check_common)
|
||||
*/
|
||||
|
||||
andi. r10,r12,MSR_PR
|
||||
bne 2f /* If userspace, go normal path */
|
||||
bne .Lnormal_stack /* If userspace, go normal path */
|
||||
|
||||
andis. r10,r12,(SRR1_PROGTM)@h
|
||||
bne 1f /* If TM, emergency */
|
||||
bne .Lemergency_stack /* If TM, emergency */
|
||||
|
||||
cmpdi r1,-INT_FRAME_SIZE /* check if r1 is in userspace */
|
||||
blt 2f /* normal path if not */
|
||||
blt .Lnormal_stack /* normal path if not */
|
||||
|
||||
/* Use the emergency stack */
|
||||
1: andi. r10,r12,MSR_PR /* Set CR0 correctly for label */
|
||||
.Lemergency_stack:
|
||||
andi. r10,r12,MSR_PR /* Set CR0 correctly for label */
|
||||
/* 3 in EXCEPTION_PROLOG_COMMON */
|
||||
mr r10,r1 /* Save r1 */
|
||||
ld r1,PACAEMERGSP(r13) /* Use emergency stack */
|
||||
subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
|
||||
__ISTACK(program_check)=0
|
||||
__GEN_COMMON_BODY program_check
|
||||
b 3f
|
||||
2:
|
||||
b .Ldo_program_check
|
||||
|
||||
.Lnormal_stack:
|
||||
__ISTACK(program_check)=1
|
||||
__GEN_COMMON_BODY program_check
|
||||
3:
|
||||
|
||||
.Ldo_program_check:
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
bl program_check_exception
|
||||
REST_NVGPRS(r1) /* instruction emulation may change GPRs */
|
||||
|
||||
@ -347,18 +347,25 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
|
||||
EMIT(PPC_RAW_SUB(dst_reg, dst_reg, src_reg));
|
||||
goto bpf_alu32_trunc;
|
||||
case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */
|
||||
case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */
|
||||
case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */
|
||||
if (!imm) {
|
||||
goto bpf_alu32_trunc;
|
||||
} else if (imm >= -32768 && imm < 32768) {
|
||||
EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm)));
|
||||
} else {
|
||||
PPC_LI32(b2p[TMP_REG_1], imm);
|
||||
EMIT(PPC_RAW_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]));
|
||||
}
|
||||
goto bpf_alu32_trunc;
|
||||
case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */
|
||||
case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */
|
||||
if (BPF_OP(code) == BPF_SUB)
|
||||
imm = -imm;
|
||||
if (imm) {
|
||||
if (imm >= -32768 && imm < 32768)
|
||||
EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm)));
|
||||
else {
|
||||
PPC_LI32(b2p[TMP_REG_1], imm);
|
||||
EMIT(PPC_RAW_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]));
|
||||
}
|
||||
if (!imm) {
|
||||
goto bpf_alu32_trunc;
|
||||
} else if (imm > -32768 && imm <= 32768) {
|
||||
EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(-imm)));
|
||||
} else {
|
||||
PPC_LI32(b2p[TMP_REG_1], imm);
|
||||
EMIT(PPC_RAW_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]));
|
||||
}
|
||||
goto bpf_alu32_trunc;
|
||||
case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */
|
||||
|
||||
@ -868,6 +868,10 @@ static int __init eeh_pseries_init(void)
|
||||
if (is_kdump_kernel() || reset_devices) {
|
||||
pr_info("Issue PHB reset ...\n");
|
||||
list_for_each_entry(phb, &hose_list, list_node) {
|
||||
// Skip if the slot is empty
|
||||
if (list_empty(&PCI_DN(phb->dn)->child_list))
|
||||
continue;
|
||||
|
||||
pdn = list_first_entry(&PCI_DN(phb->dn)->child_list, struct pci_dn, list);
|
||||
config_addr = pseries_eeh_get_pe_config_addr(pdn);
|
||||
|
||||
|
||||
@ -18,9 +18,10 @@
|
||||
#ifdef __LP64__
|
||||
#define __ARCH_WANT_NEW_STAT
|
||||
#define __ARCH_WANT_SET_GET_RLIMIT
|
||||
#define __ARCH_WANT_SYS_CLONE3
|
||||
#endif /* __LP64__ */
|
||||
|
||||
#define __ARCH_WANT_SYS_CLONE3
|
||||
|
||||
#include <asm-generic/unistd.h>
|
||||
|
||||
/*
|
||||
|
||||
@ -65,7 +65,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
|
||||
|
||||
vdso_len = (vdso_pages + 1) << PAGE_SHIFT;
|
||||
|
||||
mmap_write_lock(mm);
|
||||
if (mmap_write_lock_killable(mm))
|
||||
return -EINTR;
|
||||
|
||||
vdso_base = get_unmapped_area(NULL, 0, vdso_len, 0, 0);
|
||||
if (IS_ERR_VALUE(vdso_base)) {
|
||||
ret = vdso_base;
|
||||
|
||||
@ -16,6 +16,8 @@ static void ipi_remote_fence_i(void *info)
|
||||
|
||||
void flush_icache_all(void)
|
||||
{
|
||||
local_flush_icache_all();
|
||||
|
||||
if (IS_ENABLED(CONFIG_RISCV_SBI))
|
||||
sbi_remote_fence_i(NULL);
|
||||
else
|
||||
|
||||
@ -1775,7 +1775,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
|
||||
jit.addrs = kvcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
|
||||
if (jit.addrs == NULL) {
|
||||
fp = orig_fp;
|
||||
goto out;
|
||||
goto free_addrs;
|
||||
}
|
||||
/*
|
||||
* Three initial passes:
|
||||
|
||||
@ -1422,7 +1422,7 @@ config HIGHMEM4G
|
||||
|
||||
config HIGHMEM64G
|
||||
bool "64GB"
|
||||
depends on !M486SX && !M486 && !M586 && !M586TSC && !M586MMX && !MGEODE_LX && !MGEODEGX1 && !MCYRIXIII && !MELAN && !MWINCHIPC6 && !WINCHIP3D && !MK6
|
||||
depends on !M486SX && !M486 && !M586 && !M586TSC && !M586MMX && !MGEODE_LX && !MGEODEGX1 && !MCYRIXIII && !MELAN && !MWINCHIPC6 && !MWINCHIP3D && !MK6
|
||||
select X86_PAE
|
||||
help
|
||||
Select this if you have a 32-bit processor and more than 4
|
||||
|
||||
@ -24,7 +24,7 @@ static __always_inline void arch_check_user_regs(struct pt_regs *regs)
|
||||
* For !SMAP hardware we patch out CLAC on entry.
|
||||
*/
|
||||
if (boot_cpu_has(X86_FEATURE_SMAP) ||
|
||||
(IS_ENABLED(CONFIG_64_BIT) && boot_cpu_has(X86_FEATURE_XENPV)))
|
||||
(IS_ENABLED(CONFIG_64BIT) && boot_cpu_has(X86_FEATURE_XENPV)))
|
||||
mask |= X86_EFLAGS_AC;
|
||||
|
||||
WARN_ON_ONCE(flags & mask);
|
||||
|
||||
@ -320,6 +320,7 @@ static __always_inline void setup_smap(struct cpuinfo_x86 *c)
|
||||
#ifdef CONFIG_X86_SMAP
|
||||
cr4_set_bits(X86_CR4_SMAP);
|
||||
#else
|
||||
clear_cpu_cap(c, X86_FEATURE_SMAP);
|
||||
cr4_clear_bits(X86_CR4_SMAP);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -711,12 +711,6 @@ static struct chipset early_qrk[] __initdata = {
|
||||
*/
|
||||
{ PCI_VENDOR_ID_INTEL, 0x0f00,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_INTEL, 0x3e20,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_INTEL, 0x3ec4,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_INTEL, 0x8a12,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_BROADCOM, 0x4331,
|
||||
PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
|
||||
{}
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
|
||||
#include <asm/hpet.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/mwait.h>
|
||||
|
||||
#undef pr_fmt
|
||||
#define pr_fmt(fmt) "hpet: " fmt
|
||||
@ -806,6 +807,83 @@ static bool __init hpet_counting(void)
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool __init mwait_pc10_supported(void)
|
||||
{
|
||||
unsigned int eax, ebx, ecx, mwait_substates;
|
||||
|
||||
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
|
||||
return false;
|
||||
|
||||
if (!cpu_feature_enabled(X86_FEATURE_MWAIT))
|
||||
return false;
|
||||
|
||||
if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
|
||||
return false;
|
||||
|
||||
cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
|
||||
|
||||
return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) &&
|
||||
(ecx & CPUID5_ECX_INTERRUPT_BREAK) &&
|
||||
(mwait_substates & (0xF << 28));
|
||||
}
|
||||
|
||||
/*
|
||||
* Check whether the system supports PC10. If so force disable HPET as that
|
||||
* stops counting in PC10. This check is overbroad as it does not take any
|
||||
* of the following into account:
|
||||
*
|
||||
* - ACPI tables
|
||||
* - Enablement of intel_idle
|
||||
* - Command line arguments which limit intel_idle C-state support
|
||||
*
|
||||
* That's perfectly fine. HPET is a piece of hardware designed by committee
|
||||
* and the only reasons why it is still in use on modern systems is the
|
||||
* fact that it is impossible to reliably query TSC and CPU frequency via
|
||||
* CPUID or firmware.
|
||||
*
|
||||
* If HPET is functional it is useful for calibrating TSC, but this can be
|
||||
* done via PMTIMER as well which seems to be the last remaining timer on
|
||||
* X86/INTEL platforms that has not been completely wreckaged by feature
|
||||
* creep.
|
||||
*
|
||||
* In theory HPET support should be removed altogether, but there are older
|
||||
* systems out there which depend on it because TSC and APIC timer are
|
||||
* dysfunctional in deeper C-states.
|
||||
*
|
||||
* It's only 20 years now that hardware people have been asked to provide
|
||||
* reliable and discoverable facilities which can be used for timekeeping
|
||||
* and per CPU timer interrupts.
|
||||
*
|
||||
* The probability that this problem is going to be solved in the
|
||||
* forseeable future is close to zero, so the kernel has to be cluttered
|
||||
* with heuristics to keep up with the ever growing amount of hardware and
|
||||
* firmware trainwrecks. Hopefully some day hardware people will understand
|
||||
* that the approach of "This can be fixed in software" is not sustainable.
|
||||
* Hope dies last...
|
||||
*/
|
||||
static bool __init hpet_is_pc10_damaged(void)
|
||||
{
|
||||
unsigned long long pcfg;
|
||||
|
||||
/* Check whether PC10 substates are supported */
|
||||
if (!mwait_pc10_supported())
|
||||
return false;
|
||||
|
||||
/* Check whether PC10 is enabled in PKG C-state limit */
|
||||
rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, pcfg);
|
||||
if ((pcfg & 0xF) < 8)
|
||||
return false;
|
||||
|
||||
if (hpet_force_user) {
|
||||
pr_warn("HPET force enabled via command line, but dysfunctional in PC10.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
pr_info("HPET dysfunctional in PC10. Force disabled.\n");
|
||||
boot_hpet_disable = true;
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* hpet_enable - Try to setup the HPET timer. Returns 1 on success.
|
||||
*/
|
||||
@ -819,6 +897,9 @@ int __init hpet_enable(void)
|
||||
if (!is_hpet_capable())
|
||||
return 0;
|
||||
|
||||
if (hpet_is_pc10_damaged())
|
||||
return 0;
|
||||
|
||||
hpet_set_mapping();
|
||||
if (!hpet_virt_address)
|
||||
return 0;
|
||||
|
||||
@ -130,6 +130,8 @@ static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
|
||||
} else {
|
||||
ret = ES_VMM_ERROR;
|
||||
}
|
||||
} else if (ghcb->save.sw_exit_info_1 & 0xffffffff) {
|
||||
ret = ES_VMM_ERROR;
|
||||
} else {
|
||||
ret = ES_OK;
|
||||
}
|
||||
|
||||
@ -274,7 +274,7 @@ static struct olpc_ec_driver ec_xo1_driver = {
|
||||
|
||||
static struct olpc_ec_driver ec_xo1_5_driver = {
|
||||
.ec_cmd = olpc_xo1_ec_cmd,
|
||||
#ifdef CONFIG_OLPC_XO1_5_SCI
|
||||
#ifdef CONFIG_OLPC_XO15_SCI
|
||||
/*
|
||||
* XO-1.5 EC wakeups are available when olpc-xo15-sci driver is
|
||||
* compiled in
|
||||
|
||||
@ -78,7 +78,7 @@
|
||||
#endif
|
||||
#define XCHAL_KIO_SIZE 0x10000000
|
||||
|
||||
#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_OF)
|
||||
#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_USE_OF)
|
||||
#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long xtensa_kio_paddr;
|
||||
|
||||
@ -145,7 +145,7 @@ unsigned xtensa_get_ext_irq_no(unsigned irq)
|
||||
|
||||
void __init init_IRQ(void)
|
||||
{
|
||||
#ifdef CONFIG_OF
|
||||
#ifdef CONFIG_USE_OF
|
||||
irqchip_init();
|
||||
#else
|
||||
#ifdef CONFIG_HAVE_SMP
|
||||
|
||||
@ -63,7 +63,7 @@ extern unsigned long initrd_end;
|
||||
extern int initrd_below_start_ok;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#ifdef CONFIG_USE_OF
|
||||
void *dtb_start = __dtb_start;
|
||||
#endif
|
||||
|
||||
@ -125,7 +125,7 @@ __tagtable(BP_TAG_INITRD, parse_tag_initrd);
|
||||
|
||||
#endif /* CONFIG_BLK_DEV_INITRD */
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#ifdef CONFIG_USE_OF
|
||||
|
||||
static int __init parse_tag_fdt(const bp_tag_t *tag)
|
||||
{
|
||||
@ -135,7 +135,7 @@ static int __init parse_tag_fdt(const bp_tag_t *tag)
|
||||
|
||||
__tagtable(BP_TAG_FDT, parse_tag_fdt);
|
||||
|
||||
#endif /* CONFIG_OF */
|
||||
#endif /* CONFIG_USE_OF */
|
||||
|
||||
static int __init parse_tag_cmdline(const bp_tag_t* tag)
|
||||
{
|
||||
@ -183,7 +183,7 @@ static int __init parse_bootparam(const bp_tag_t *tag)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#ifdef CONFIG_USE_OF
|
||||
|
||||
#if !XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY
|
||||
unsigned long xtensa_kio_paddr = XCHAL_KIO_DEFAULT_PADDR;
|
||||
@ -232,7 +232,7 @@ void __init early_init_devtree(void *params)
|
||||
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_OF */
|
||||
#endif /* CONFIG_USE_OF */
|
||||
|
||||
/*
|
||||
* Initialize architecture. (Early stage)
|
||||
@ -253,7 +253,7 @@ void __init init_arch(bp_tag_t *bp_start)
|
||||
if (bp_start)
|
||||
parse_bootparam(bp_start);
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#ifdef CONFIG_USE_OF
|
||||
early_init_devtree(dtb_start);
|
||||
#endif
|
||||
|
||||
|
||||
@ -100,7 +100,7 @@ void init_mmu(void)
|
||||
|
||||
void init_kio(void)
|
||||
{
|
||||
#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
|
||||
#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_USE_OF)
|
||||
/*
|
||||
* Update the IO area mapping in case xtensa_kio_paddr has changed
|
||||
*/
|
||||
|
||||
@ -1464,6 +1464,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
||||
/* Quirks that need to be set based on detected module */
|
||||
SYSC_QUIRK("aess", 0, 0, 0x10, -ENODEV, 0x40000000, 0xffffffff,
|
||||
SYSC_MODULE_QUIRK_AESS),
|
||||
/* Errata i893 handling for dra7 dcan1 and 2 */
|
||||
SYSC_QUIRK("dcan", 0x4ae3c000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
|
||||
SYSC_QUIRK_CLKDM_NOAUTO),
|
||||
SYSC_QUIRK("dcan", 0x48480000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
|
||||
SYSC_QUIRK_CLKDM_NOAUTO),
|
||||
SYSC_QUIRK("dss", 0x4832a000, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
|
||||
@ -2922,6 +2925,7 @@ static int sysc_init_soc(struct sysc *ddata)
|
||||
break;
|
||||
case SOC_AM3:
|
||||
sysc_add_disabled(0x48310000); /* rng */
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
};
|
||||
|
||||
@ -704,6 +704,7 @@ static const struct file_operations nv50_crc_flip_threshold_fops = {
|
||||
.open = nv50_crc_debugfs_flip_threshold_open,
|
||||
.read = seq_read,
|
||||
.write = nv50_crc_debugfs_flip_threshold_set,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
int nv50_head_crc_late_register(struct nv50_head *head)
|
||||
|
||||
@ -51,6 +51,7 @@ nv50_head_flush_clr(struct nv50_head *head,
|
||||
void
|
||||
nv50_head_flush_set_wndw(struct nv50_head *head, struct nv50_head_atom *asyh)
|
||||
{
|
||||
if (asyh->set.curs ) head->func->curs_set(head, asyh);
|
||||
if (asyh->set.olut ) {
|
||||
asyh->olut.offset = nv50_lut_load(&head->olut,
|
||||
asyh->olut.buffer,
|
||||
@ -66,7 +67,6 @@ nv50_head_flush_set(struct nv50_head *head, struct nv50_head_atom *asyh)
|
||||
if (asyh->set.view ) head->func->view (head, asyh);
|
||||
if (asyh->set.mode ) head->func->mode (head, asyh);
|
||||
if (asyh->set.core ) head->func->core_set(head, asyh);
|
||||
if (asyh->set.curs ) head->func->curs_set(head, asyh);
|
||||
if (asyh->set.base ) head->func->base (head, asyh);
|
||||
if (asyh->set.ovly ) head->func->ovly (head, asyh);
|
||||
if (asyh->set.dither ) head->func->dither (head, asyh);
|
||||
|
||||
@ -207,6 +207,7 @@ static const struct file_operations nouveau_pstate_fops = {
|
||||
.open = nouveau_debugfs_pstate_open,
|
||||
.read = seq_read,
|
||||
.write = nouveau_debugfs_pstate_set,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static struct drm_info_list nouveau_debugfs_list[] = {
|
||||
|
||||
@ -196,10 +196,8 @@ nouveau_gem_new(struct nouveau_cli *cli, u64 size, int align, uint32_t domain,
|
||||
}
|
||||
|
||||
ret = nouveau_bo_init(nvbo, size, align, domain, NULL, NULL);
|
||||
if (ret) {
|
||||
nouveau_bo_ref(NULL, &nvbo);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* we restrict allowed domains on nv50+ to only the types
|
||||
* that were requested at creation time. not possibly on
|
||||
|
||||
@ -216,11 +216,13 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
|
||||
goto err_disable_clk_tmds;
|
||||
}
|
||||
|
||||
ret = sun8i_hdmi_phy_init(hdmi->phy);
|
||||
if (ret)
|
||||
goto err_disable_clk_tmds;
|
||||
|
||||
drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
|
||||
drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
|
||||
|
||||
sun8i_hdmi_phy_init(hdmi->phy);
|
||||
|
||||
plat_data->mode_valid = hdmi->quirks->mode_valid;
|
||||
plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe;
|
||||
sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
|
||||
@ -262,6 +264,7 @@ static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master,
|
||||
struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
|
||||
|
||||
dw_hdmi_unbind(hdmi->hdmi);
|
||||
sun8i_hdmi_phy_deinit(hdmi->phy);
|
||||
clk_disable_unprepare(hdmi->clk_tmds);
|
||||
reset_control_assert(hdmi->rst_ctrl);
|
||||
gpiod_set_value(hdmi->ddc_en, 0);
|
||||
|
||||
@ -169,6 +169,7 @@ struct sun8i_hdmi_phy {
|
||||
struct clk *clk_phy;
|
||||
struct clk *clk_pll0;
|
||||
struct clk *clk_pll1;
|
||||
struct device *dev;
|
||||
unsigned int rcal;
|
||||
struct regmap *regs;
|
||||
struct reset_control *rst_phy;
|
||||
@ -205,7 +206,8 @@ encoder_to_sun8i_dw_hdmi(struct drm_encoder *encoder)
|
||||
|
||||
int sun8i_hdmi_phy_get(struct sun8i_dw_hdmi *hdmi, struct device_node *node);
|
||||
|
||||
void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy);
|
||||
int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy);
|
||||
void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy);
|
||||
void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
|
||||
struct dw_hdmi_plat_data *plat_data);
|
||||
|
||||
|
||||
@ -506,9 +506,60 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
|
||||
phy->rcal = (val & SUN8I_HDMI_PHY_ANA_STS_RCAL_MASK) >> 2;
|
||||
}
|
||||
|
||||
void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
|
||||
int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = reset_control_deassert(phy->rst_phy);
|
||||
if (ret) {
|
||||
dev_err(phy->dev, "Cannot deassert phy reset control: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(phy->clk_bus);
|
||||
if (ret) {
|
||||
dev_err(phy->dev, "Cannot enable bus clock: %d\n", ret);
|
||||
goto err_assert_rst_phy;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(phy->clk_mod);
|
||||
if (ret) {
|
||||
dev_err(phy->dev, "Cannot enable mod clock: %d\n", ret);
|
||||
goto err_disable_clk_bus;
|
||||
}
|
||||
|
||||
if (phy->variant->has_phy_clk) {
|
||||
ret = sun8i_phy_clk_create(phy, phy->dev,
|
||||
phy->variant->has_second_pll);
|
||||
if (ret) {
|
||||
dev_err(phy->dev, "Couldn't create the PHY clock\n");
|
||||
goto err_disable_clk_mod;
|
||||
}
|
||||
|
||||
clk_prepare_enable(phy->clk_phy);
|
||||
}
|
||||
|
||||
phy->variant->phy_init(phy);
|
||||
|
||||
return 0;
|
||||
|
||||
err_disable_clk_mod:
|
||||
clk_disable_unprepare(phy->clk_mod);
|
||||
err_disable_clk_bus:
|
||||
clk_disable_unprepare(phy->clk_bus);
|
||||
err_assert_rst_phy:
|
||||
reset_control_assert(phy->rst_phy);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy)
|
||||
{
|
||||
clk_disable_unprepare(phy->clk_mod);
|
||||
clk_disable_unprepare(phy->clk_bus);
|
||||
clk_disable_unprepare(phy->clk_phy);
|
||||
|
||||
reset_control_assert(phy->rst_phy);
|
||||
}
|
||||
|
||||
void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
|
||||
@ -638,6 +689,7 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev)
|
||||
return -ENOMEM;
|
||||
|
||||
phy->variant = (struct sun8i_hdmi_phy_variant *)match->data;
|
||||
phy->dev = dev;
|
||||
|
||||
ret = of_address_to_resource(node, 0, &res);
|
||||
if (ret) {
|
||||
@ -696,47 +748,10 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev)
|
||||
goto err_put_clk_pll1;
|
||||
}
|
||||
|
||||
ret = reset_control_deassert(phy->rst_phy);
|
||||
if (ret) {
|
||||
dev_err(dev, "Cannot deassert phy reset control: %d\n", ret);
|
||||
goto err_put_rst_phy;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(phy->clk_bus);
|
||||
if (ret) {
|
||||
dev_err(dev, "Cannot enable bus clock: %d\n", ret);
|
||||
goto err_deassert_rst_phy;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(phy->clk_mod);
|
||||
if (ret) {
|
||||
dev_err(dev, "Cannot enable mod clock: %d\n", ret);
|
||||
goto err_disable_clk_bus;
|
||||
}
|
||||
|
||||
if (phy->variant->has_phy_clk) {
|
||||
ret = sun8i_phy_clk_create(phy, dev,
|
||||
phy->variant->has_second_pll);
|
||||
if (ret) {
|
||||
dev_err(dev, "Couldn't create the PHY clock\n");
|
||||
goto err_disable_clk_mod;
|
||||
}
|
||||
|
||||
clk_prepare_enable(phy->clk_phy);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, phy);
|
||||
|
||||
return 0;
|
||||
|
||||
err_disable_clk_mod:
|
||||
clk_disable_unprepare(phy->clk_mod);
|
||||
err_disable_clk_bus:
|
||||
clk_disable_unprepare(phy->clk_bus);
|
||||
err_deassert_rst_phy:
|
||||
reset_control_assert(phy->rst_phy);
|
||||
err_put_rst_phy:
|
||||
reset_control_put(phy->rst_phy);
|
||||
err_put_clk_pll1:
|
||||
clk_put(phy->clk_pll1);
|
||||
err_put_clk_pll0:
|
||||
@ -753,12 +768,6 @@ static int sun8i_hdmi_phy_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sun8i_hdmi_phy *phy = platform_get_drvdata(pdev);
|
||||
|
||||
clk_disable_unprepare(phy->clk_mod);
|
||||
clk_disable_unprepare(phy->clk_bus);
|
||||
clk_disable_unprepare(phy->clk_phy);
|
||||
|
||||
reset_control_assert(phy->rst_phy);
|
||||
|
||||
reset_control_put(phy->rst_phy);
|
||||
|
||||
clk_put(phy->clk_pll0);
|
||||
|
||||
@ -41,6 +41,8 @@
|
||||
#define I2C_HANDSHAKE_RST 0x0020
|
||||
#define I2C_FIFO_ADDR_CLR 0x0001
|
||||
#define I2C_DELAY_LEN 0x0002
|
||||
#define I2C_ST_START_CON 0x8001
|
||||
#define I2C_FS_START_CON 0x1800
|
||||
#define I2C_TIME_CLR_VALUE 0x0000
|
||||
#define I2C_TIME_DEFAULT_VALUE 0x0003
|
||||
#define I2C_WRRD_TRANAC_VALUE 0x0002
|
||||
@ -479,6 +481,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
|
||||
{
|
||||
u16 control_reg;
|
||||
u16 intr_stat_reg;
|
||||
u16 ext_conf_val;
|
||||
|
||||
mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START);
|
||||
intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT);
|
||||
@ -517,8 +520,13 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
|
||||
if (i2c->dev_comp->ltiming_adjust)
|
||||
mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING);
|
||||
|
||||
if (i2c->speed_hz <= I2C_MAX_STANDARD_MODE_FREQ)
|
||||
ext_conf_val = I2C_ST_START_CON;
|
||||
else
|
||||
ext_conf_val = I2C_FS_START_CON;
|
||||
|
||||
if (i2c->dev_comp->timing_adjust) {
|
||||
mtk_i2c_writew(i2c, i2c->ac_timing.ext, OFFSET_EXT_CONF);
|
||||
ext_conf_val = i2c->ac_timing.ext;
|
||||
mtk_i2c_writew(i2c, i2c->ac_timing.inter_clk_div,
|
||||
OFFSET_CLOCK_DIV);
|
||||
mtk_i2c_writew(i2c, I2C_SCL_MIS_COMP_VALUE,
|
||||
@ -543,6 +551,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c)
|
||||
OFFSET_HS_STA_STO_AC_TIMING);
|
||||
}
|
||||
}
|
||||
mtk_i2c_writew(i2c, ext_conf_val, OFFSET_EXT_CONF);
|
||||
|
||||
/* If use i2c pin from PMIC mt6397 side, need set PATH_DIR first */
|
||||
if (i2c->have_pmic)
|
||||
|
||||
@ -426,6 +426,7 @@ static int i2c_acpi_notify(struct notifier_block *nb, unsigned long value,
|
||||
break;
|
||||
|
||||
i2c_acpi_register_device(adapter, adev, &info);
|
||||
put_device(&adapter->dev);
|
||||
break;
|
||||
case ACPI_RECONFIG_DEVICE_REMOVE:
|
||||
if (!acpi_device_enumerated(adev))
|
||||
|
||||
@ -735,7 +735,7 @@ static void meson_mmc_desc_chain_transfer(struct mmc_host *mmc, u32 cmd_cfg)
|
||||
writel(start, host->regs + SD_EMMC_START);
|
||||
}
|
||||
|
||||
/* local sg copy to buffer version with _to/fromio usage for dram_access_quirk */
|
||||
/* local sg copy for dram_access_quirk */
|
||||
static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data,
|
||||
size_t buflen, bool to_buffer)
|
||||
{
|
||||
@ -753,21 +753,27 @@ static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data
|
||||
sg_miter_start(&miter, sgl, nents, sg_flags);
|
||||
|
||||
while ((offset < buflen) && sg_miter_next(&miter)) {
|
||||
unsigned int len;
|
||||
unsigned int buf_offset = 0;
|
||||
unsigned int len, left;
|
||||
u32 *buf = miter.addr;
|
||||
|
||||
len = min(miter.length, buflen - offset);
|
||||
left = len;
|
||||
|
||||
/* When dram_access_quirk, the bounce buffer is a iomem mapping */
|
||||
if (host->dram_access_quirk) {
|
||||
if (to_buffer)
|
||||
memcpy_toio(host->bounce_iomem_buf + offset, miter.addr, len);
|
||||
else
|
||||
memcpy_fromio(miter.addr, host->bounce_iomem_buf + offset, len);
|
||||
if (to_buffer) {
|
||||
do {
|
||||
writel(*buf++, host->bounce_iomem_buf + offset + buf_offset);
|
||||
|
||||
buf_offset += 4;
|
||||
left -= 4;
|
||||
} while (left);
|
||||
} else {
|
||||
if (to_buffer)
|
||||
memcpy(host->bounce_buf + offset, miter.addr, len);
|
||||
else
|
||||
memcpy(miter.addr, host->bounce_buf + offset, len);
|
||||
do {
|
||||
*buf++ = readl(host->bounce_iomem_buf + offset + buf_offset);
|
||||
|
||||
buf_offset += 4;
|
||||
left -= 4;
|
||||
} while (left);
|
||||
}
|
||||
|
||||
offset += len;
|
||||
@ -819,7 +825,11 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
|
||||
if (data->flags & MMC_DATA_WRITE) {
|
||||
cmd_cfg |= CMD_CFG_DATA_WR;
|
||||
WARN_ON(xfer_bytes > host->bounce_buf_size);
|
||||
meson_mmc_copy_buffer(host, data, xfer_bytes, true);
|
||||
if (host->dram_access_quirk)
|
||||
meson_mmc_copy_buffer(host, data, xfer_bytes, true);
|
||||
else
|
||||
sg_copy_to_buffer(data->sg, data->sg_len,
|
||||
host->bounce_buf, xfer_bytes);
|
||||
dma_wmb();
|
||||
}
|
||||
|
||||
@ -838,12 +848,43 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
|
||||
writel(cmd->arg, host->regs + SD_EMMC_CMD_ARG);
|
||||
}
|
||||
|
||||
static int meson_mmc_validate_dram_access(struct mmc_host *mmc, struct mmc_data *data)
|
||||
{
|
||||
struct scatterlist *sg;
|
||||
int i;
|
||||
|
||||
/* Reject request if any element offset or size is not 32bit aligned */
|
||||
for_each_sg(data->sg, sg, data->sg_len, i) {
|
||||
if (!IS_ALIGNED(sg->offset, sizeof(u32)) ||
|
||||
!IS_ALIGNED(sg->length, sizeof(u32))) {
|
||||
dev_err(mmc_dev(mmc), "unaligned sg offset %u len %u\n",
|
||||
data->sg->offset, data->sg->length);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
|
||||
{
|
||||
struct meson_host *host = mmc_priv(mmc);
|
||||
bool needs_pre_post_req = mrq->data &&
|
||||
!(mrq->data->host_cookie & SD_EMMC_PRE_REQ_DONE);
|
||||
|
||||
/*
|
||||
* The memory at the end of the controller used as bounce buffer for
|
||||
* the dram_access_quirk only accepts 32bit read/write access,
|
||||
* check the aligment and length of the data before starting the request.
|
||||
*/
|
||||
if (host->dram_access_quirk && mrq->data) {
|
||||
mrq->cmd->error = meson_mmc_validate_dram_access(mmc, mrq->data);
|
||||
if (mrq->cmd->error) {
|
||||
mmc_request_done(mmc, mrq);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if (needs_pre_post_req) {
|
||||
meson_mmc_get_transfer_mode(mmc, mrq);
|
||||
if (!meson_mmc_desc_chain_mode(mrq->data))
|
||||
@ -988,7 +1029,11 @@ static irqreturn_t meson_mmc_irq_thread(int irq, void *dev_id)
|
||||
if (meson_mmc_bounce_buf_read(data)) {
|
||||
xfer_bytes = data->blksz * data->blocks;
|
||||
WARN_ON(xfer_bytes > host->bounce_buf_size);
|
||||
meson_mmc_copy_buffer(host, data, xfer_bytes, false);
|
||||
if (host->dram_access_quirk)
|
||||
meson_mmc_copy_buffer(host, data, xfer_bytes, false);
|
||||
else
|
||||
sg_copy_from_buffer(data->sg, data->sg_len,
|
||||
host->bounce_buf, xfer_bytes);
|
||||
}
|
||||
|
||||
next_cmd = meson_mmc_get_next_command(cmd);
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
#include <linux/delay.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/iopoll.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/slot-gpio.h>
|
||||
@ -61,7 +62,6 @@ static void sdhci_at91_set_force_card_detect(struct sdhci_host *host)
|
||||
static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock)
|
||||
{
|
||||
u16 clk;
|
||||
unsigned long timeout;
|
||||
|
||||
host->mmc->actual_clock = 0;
|
||||
|
||||
@ -86,16 +86,11 @@ static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock)
|
||||
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
|
||||
|
||||
/* Wait max 20 ms */
|
||||
timeout = 20;
|
||||
while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
|
||||
& SDHCI_CLOCK_INT_STABLE)) {
|
||||
if (timeout == 0) {
|
||||
pr_err("%s: Internal clock never stabilised.\n",
|
||||
mmc_hostname(host->mmc));
|
||||
return;
|
||||
}
|
||||
timeout--;
|
||||
mdelay(1);
|
||||
if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE),
|
||||
1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) {
|
||||
pr_err("%s: Internal clock never stabilised.\n",
|
||||
mmc_hostname(host->mmc));
|
||||
return;
|
||||
}
|
||||
|
||||
clk |= SDHCI_CLOCK_CARD_EN;
|
||||
@ -114,6 +109,7 @@ static void sdhci_at91_reset(struct sdhci_host *host, u8 mask)
|
||||
{
|
||||
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
|
||||
struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host);
|
||||
unsigned int tmp;
|
||||
|
||||
sdhci_reset(host, mask);
|
||||
|
||||
@ -126,6 +122,10 @@ static void sdhci_at91_reset(struct sdhci_host *host, u8 mask)
|
||||
|
||||
sdhci_writel(host, calcr | SDMMC_CALCR_ALWYSON | SDMMC_CALCR_EN,
|
||||
SDMMC_CALCR);
|
||||
|
||||
if (read_poll_timeout(sdhci_readl, tmp, !(tmp & SDMMC_CALCR_EN),
|
||||
10, 20000, false, host, SDMMC_CALCR))
|
||||
dev_err(mmc_dev(host->mmc), "Failed to calibrate\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -472,7 +472,7 @@ struct gve_queue_page_list *gve_assign_rx_qpl(struct gve_priv *priv)
|
||||
gve_num_tx_qpls(priv));
|
||||
|
||||
/* we are out of rx qpls */
|
||||
if (id == priv->qpl_cfg.qpl_map_size)
|
||||
if (id == gve_num_tx_qpls(priv) + gve_num_rx_qpls(priv))
|
||||
return NULL;
|
||||
|
||||
set_bit(id, priv->qpl_cfg.qpl_id_map);
|
||||
|
||||
@ -30,6 +30,7 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
|
||||
{
|
||||
struct gve_priv *priv = netdev_priv(dev);
|
||||
unsigned int start;
|
||||
u64 packets, bytes;
|
||||
int ring;
|
||||
|
||||
if (priv->rx) {
|
||||
@ -37,10 +38,12 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
|
||||
do {
|
||||
start =
|
||||
u64_stats_fetch_begin(&priv->rx[ring].statss);
|
||||
s->rx_packets += priv->rx[ring].rpackets;
|
||||
s->rx_bytes += priv->rx[ring].rbytes;
|
||||
packets = priv->rx[ring].rpackets;
|
||||
bytes = priv->rx[ring].rbytes;
|
||||
} while (u64_stats_fetch_retry(&priv->rx[ring].statss,
|
||||
start));
|
||||
s->rx_packets += packets;
|
||||
s->rx_bytes += bytes;
|
||||
}
|
||||
}
|
||||
if (priv->tx) {
|
||||
@ -48,10 +51,12 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
|
||||
do {
|
||||
start =
|
||||
u64_stats_fetch_begin(&priv->tx[ring].statss);
|
||||
s->tx_packets += priv->tx[ring].pkt_done;
|
||||
s->tx_bytes += priv->tx[ring].bytes_done;
|
||||
packets = priv->tx[ring].pkt_done;
|
||||
bytes = priv->tx[ring].bytes_done;
|
||||
} while (u64_stats_fetch_retry(&priv->tx[ring].statss,
|
||||
start));
|
||||
s->tx_packets += packets;
|
||||
s->tx_bytes += bytes;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -71,6 +76,9 @@ static int gve_alloc_counter_array(struct gve_priv *priv)
|
||||
|
||||
static void gve_free_counter_array(struct gve_priv *priv)
|
||||
{
|
||||
if (!priv->counter_array)
|
||||
return;
|
||||
|
||||
dma_free_coherent(&priv->pdev->dev,
|
||||
priv->num_event_counters *
|
||||
sizeof(*priv->counter_array),
|
||||
@ -131,6 +139,9 @@ static int gve_alloc_stats_report(struct gve_priv *priv)
|
||||
|
||||
static void gve_free_stats_report(struct gve_priv *priv)
|
||||
{
|
||||
if (!priv->stats_report)
|
||||
return;
|
||||
|
||||
del_timer_sync(&priv->stats_report_timer);
|
||||
dma_free_coherent(&priv->pdev->dev, priv->stats_report_len,
|
||||
priv->stats_report, priv->stats_report_bus);
|
||||
@ -301,18 +312,19 @@ static void gve_free_notify_blocks(struct gve_priv *priv)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (priv->msix_vectors) {
|
||||
/* Free the irqs */
|
||||
for (i = 0; i < priv->num_ntfy_blks; i++) {
|
||||
struct gve_notify_block *block = &priv->ntfy_blocks[i];
|
||||
int msix_idx = i;
|
||||
if (!priv->msix_vectors)
|
||||
return;
|
||||
|
||||
irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector,
|
||||
NULL);
|
||||
free_irq(priv->msix_vectors[msix_idx].vector, block);
|
||||
}
|
||||
free_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector, priv);
|
||||
/* Free the irqs */
|
||||
for (i = 0; i < priv->num_ntfy_blks; i++) {
|
||||
struct gve_notify_block *block = &priv->ntfy_blocks[i];
|
||||
int msix_idx = i;
|
||||
|
||||
irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector,
|
||||
NULL);
|
||||
free_irq(priv->msix_vectors[msix_idx].vector, block);
|
||||
}
|
||||
free_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector, priv);
|
||||
dma_free_coherent(&priv->pdev->dev,
|
||||
priv->num_ntfy_blks * sizeof(*priv->ntfy_blocks),
|
||||
priv->ntfy_blocks, priv->ntfy_block_bus);
|
||||
@ -975,9 +987,10 @@ static void gve_handle_reset(struct gve_priv *priv)
|
||||
|
||||
void gve_handle_report_stats(struct gve_priv *priv)
|
||||
{
|
||||
int idx, stats_idx = 0, tx_bytes;
|
||||
unsigned int start = 0;
|
||||
struct stats *stats = priv->stats_report->stats;
|
||||
int idx, stats_idx = 0;
|
||||
unsigned int start = 0;
|
||||
u64 tx_bytes;
|
||||
|
||||
if (!gve_get_report_stats(priv))
|
||||
return;
|
||||
|
||||
@ -4839,7 +4839,8 @@ static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
|
||||
{
|
||||
int i;
|
||||
|
||||
i40e_free_misc_vector(pf);
|
||||
if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
|
||||
i40e_free_misc_vector(pf);
|
||||
|
||||
i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
|
||||
I40E_IWARP_IRQ_PILE_ID);
|
||||
@ -9662,7 +9663,7 @@ static int i40e_get_capabilities(struct i40e_pf *pf,
|
||||
if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
|
||||
/* retry with a larger buffer */
|
||||
buf_len = data_size;
|
||||
} else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
|
||||
} else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
|
||||
dev_info(&pf->pdev->dev,
|
||||
"capability discovery failed, err %s aq_err %s\n",
|
||||
i40e_stat_str(&pf->hw, err),
|
||||
|
||||
@ -999,14 +999,9 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
|
||||
goto csum_unnecessary;
|
||||
|
||||
if (likely(is_last_ethertype_ip(skb, &network_depth, &proto))) {
|
||||
u8 ipproto = get_ip_proto(skb, network_depth, proto);
|
||||
|
||||
if (unlikely(ipproto == IPPROTO_SCTP))
|
||||
if (unlikely(get_ip_proto(skb, network_depth, proto) == IPPROTO_SCTP))
|
||||
goto csum_unnecessary;
|
||||
|
||||
if (unlikely(mlx5_ipsec_is_rx_flow(cqe)))
|
||||
goto csum_none;
|
||||
|
||||
stats->csum_complete++;
|
||||
skb->ip_summed = CHECKSUM_COMPLETE;
|
||||
skb->csum = csum_unfold((__force __sum16)cqe->check_sum);
|
||||
|
||||
@ -79,12 +79,16 @@ int esw_acl_egress_lgcy_setup(struct mlx5_eswitch *esw,
|
||||
int dest_num = 0;
|
||||
int err = 0;
|
||||
|
||||
if (MLX5_CAP_ESW_EGRESS_ACL(esw->dev, flow_counter)) {
|
||||
if (vport->egress.legacy.drop_counter) {
|
||||
drop_counter = vport->egress.legacy.drop_counter;
|
||||
} else if (MLX5_CAP_ESW_EGRESS_ACL(esw->dev, flow_counter)) {
|
||||
drop_counter = mlx5_fc_create(esw->dev, false);
|
||||
if (IS_ERR(drop_counter))
|
||||
if (IS_ERR(drop_counter)) {
|
||||
esw_warn(esw->dev,
|
||||
"vport[%d] configure egress drop rule counter err(%ld)\n",
|
||||
vport->vport, PTR_ERR(drop_counter));
|
||||
drop_counter = NULL;
|
||||
}
|
||||
vport->egress.legacy.drop_counter = drop_counter;
|
||||
}
|
||||
|
||||
@ -123,7 +127,7 @@ int esw_acl_egress_lgcy_setup(struct mlx5_eswitch *esw,
|
||||
flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
|
||||
|
||||
/* Attach egress drop flow counter */
|
||||
if (!IS_ERR_OR_NULL(drop_counter)) {
|
||||
if (drop_counter) {
|
||||
flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
|
||||
drop_ctr_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
|
||||
drop_ctr_dst.counter_id = mlx5_fc_id(drop_counter);
|
||||
@ -162,7 +166,7 @@ void esw_acl_egress_lgcy_cleanup(struct mlx5_eswitch *esw,
|
||||
esw_acl_egress_table_destroy(vport);
|
||||
|
||||
clean_drop_counter:
|
||||
if (!IS_ERR_OR_NULL(vport->egress.legacy.drop_counter)) {
|
||||
if (vport->egress.legacy.drop_counter) {
|
||||
mlx5_fc_destroy(esw->dev, vport->egress.legacy.drop_counter);
|
||||
vport->egress.legacy.drop_counter = NULL;
|
||||
}
|
||||
|
||||
@ -160,7 +160,9 @@ int esw_acl_ingress_lgcy_setup(struct mlx5_eswitch *esw,
|
||||
|
||||
esw_acl_ingress_lgcy_rules_destroy(vport);
|
||||
|
||||
if (MLX5_CAP_ESW_INGRESS_ACL(esw->dev, flow_counter)) {
|
||||
if (vport->ingress.legacy.drop_counter) {
|
||||
counter = vport->ingress.legacy.drop_counter;
|
||||
} else if (MLX5_CAP_ESW_INGRESS_ACL(esw->dev, flow_counter)) {
|
||||
counter = mlx5_fc_create(esw->dev, false);
|
||||
if (IS_ERR(counter)) {
|
||||
esw_warn(esw->dev,
|
||||
|
||||
@ -534,6 +534,13 @@ int __mdiobus_register(struct mii_bus *bus, struct module *owner)
|
||||
bus->dev.groups = NULL;
|
||||
dev_set_name(&bus->dev, "%s", bus->id);
|
||||
|
||||
/* We need to set state to MDIOBUS_UNREGISTERED to correctly release
|
||||
* the device in mdiobus_free()
|
||||
*
|
||||
* State will be updated later in this function in case of success
|
||||
*/
|
||||
bus->state = MDIOBUS_UNREGISTERED;
|
||||
|
||||
err = device_register(&bus->dev);
|
||||
if (err) {
|
||||
pr_err("mii_bus %s failed to register\n", bus->id);
|
||||
|
||||
@ -133,7 +133,7 @@ static const char * const sm_state_strings[] = {
|
||||
[SFP_S_LINK_UP] = "link_up",
|
||||
[SFP_S_TX_FAULT] = "tx_fault",
|
||||
[SFP_S_REINIT] = "reinit",
|
||||
[SFP_S_TX_DISABLE] = "rx_disable",
|
||||
[SFP_S_TX_DISABLE] = "tx_disable",
|
||||
};
|
||||
|
||||
static const char *sm_state_to_str(unsigned short sm_state)
|
||||
|
||||
@ -3,9 +3,7 @@ config ATH5K
|
||||
tristate "Atheros 5xxx wireless cards support"
|
||||
depends on (PCI || ATH25) && MAC80211
|
||||
select ATH_COMMON
|
||||
select MAC80211_LEDS
|
||||
select LEDS_CLASS
|
||||
select NEW_LEDS
|
||||
select MAC80211_LEDS if LEDS_CLASS=y || LEDS_CLASS=MAC80211
|
||||
select ATH5K_AHB if ATH25
|
||||
select ATH5K_PCI if !ATH25
|
||||
help
|
||||
|
||||
@ -89,7 +89,8 @@ static const struct pci_device_id ath5k_led_devices[] = {
|
||||
|
||||
void ath5k_led_enable(struct ath5k_hw *ah)
|
||||
{
|
||||
if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
|
||||
if (IS_ENABLED(CONFIG_MAC80211_LEDS) &&
|
||||
test_bit(ATH_STAT_LEDSOFT, ah->status)) {
|
||||
ath5k_hw_set_gpio_output(ah, ah->led_pin);
|
||||
ath5k_led_off(ah);
|
||||
}
|
||||
@ -104,7 +105,8 @@ static void ath5k_led_on(struct ath5k_hw *ah)
|
||||
|
||||
void ath5k_led_off(struct ath5k_hw *ah)
|
||||
{
|
||||
if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
|
||||
if (!IS_ENABLED(CONFIG_MAC80211_LEDS) ||
|
||||
!test_bit(ATH_STAT_LEDSOFT, ah->status))
|
||||
return;
|
||||
ath5k_hw_set_gpio(ah, ah->led_pin, !ah->led_on);
|
||||
}
|
||||
@ -146,7 +148,7 @@ ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led,
|
||||
static void
|
||||
ath5k_unregister_led(struct ath5k_led *led)
|
||||
{
|
||||
if (!led->ah)
|
||||
if (!IS_ENABLED(CONFIG_MAC80211_LEDS) || !led->ah)
|
||||
return;
|
||||
led_classdev_unregister(&led->led_dev);
|
||||
ath5k_led_off(led->ah);
|
||||
@ -169,7 +171,7 @@ int ath5k_init_leds(struct ath5k_hw *ah)
|
||||
char name[ATH5K_LED_MAX_NAME_LEN + 1];
|
||||
const struct pci_device_id *match;
|
||||
|
||||
if (!ah->pdev)
|
||||
if (!IS_ENABLED(CONFIG_MAC80211_LEDS) || !ah->pdev)
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_ATH5K_AHB
|
||||
|
||||
@ -635,6 +635,8 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
IWL_DEV_INFO(0x43F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
|
||||
IWL_DEV_INFO(0x43F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
|
||||
IWL_DEV_INFO(0x43F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
|
||||
IWL_DEV_INFO(0x43F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650s_name),
|
||||
IWL_DEV_INFO(0x43F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650i_name),
|
||||
IWL_DEV_INFO(0x43F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
|
||||
IWL_DEV_INFO(0x43F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
|
||||
IWL_DEV_INFO(0xA0F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
|
||||
|
||||
@ -3259,9 +3259,17 @@ static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs)
|
||||
return 0;
|
||||
|
||||
if (!keep_devs) {
|
||||
/* Delete any children which might still exist. */
|
||||
struct list_head removed;
|
||||
|
||||
/* Move all present children to the list on stack */
|
||||
INIT_LIST_HEAD(&removed);
|
||||
spin_lock_irqsave(&hbus->device_list_lock, flags);
|
||||
list_for_each_entry_safe(hpdev, tmp, &hbus->children, list_entry) {
|
||||
list_for_each_entry_safe(hpdev, tmp, &hbus->children, list_entry)
|
||||
list_move_tail(&hpdev->list_entry, &removed);
|
||||
spin_unlock_irqrestore(&hbus->device_list_lock, flags);
|
||||
|
||||
/* Remove all children in the list */
|
||||
list_for_each_entry_safe(hpdev, tmp, &removed, list_entry) {
|
||||
list_del(&hpdev->list_entry);
|
||||
if (hpdev->pci_slot)
|
||||
pci_destroy_slot(hpdev->pci_slot);
|
||||
@ -3269,7 +3277,6 @@ static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs)
|
||||
put_pcichild(hpdev);
|
||||
put_pcichild(hpdev);
|
||||
}
|
||||
spin_unlock_irqrestore(&hbus->device_list_lock, flags);
|
||||
}
|
||||
|
||||
ret = hv_send_resources_released(hdev);
|
||||
|
||||
@ -651,6 +651,7 @@ static const struct pci_device_id pch_ieee1588_pcidev_id[] = {
|
||||
},
|
||||
{0}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, pch_ieee1588_pcidev_id);
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(pch_pm_ops, pch_suspend, pch_resume);
|
||||
|
||||
|
||||
@ -98,7 +98,7 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len)
|
||||
if (ehdr->e_phnum < 2)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (phdrs[0].p_type == PT_LOAD || phdrs[1].p_type == PT_LOAD)
|
||||
if (phdrs[0].p_type == PT_LOAD)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if ((phdrs[1].p_flags & QCOM_MDT_TYPE_MASK) != QCOM_MDT_TYPE_HASH)
|
||||
|
||||
@ -521,7 +521,7 @@ static int qcom_socinfo_probe(struct platform_device *pdev)
|
||||
/* Feed the soc specific unique data into entropy pool */
|
||||
add_device_randomness(info, item_size);
|
||||
|
||||
platform_set_drvdata(pdev, qs->soc_dev);
|
||||
platform_set_drvdata(pdev, qs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -509,26 +509,29 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev,
|
||||
writel_relaxed(v, reset->prm->base + reset->prm->data->rstctrl);
|
||||
spin_unlock_irqrestore(&reset->lock, flags);
|
||||
|
||||
if (!has_rstst)
|
||||
goto exit;
|
||||
|
||||
/* wait for the status to be set */
|
||||
/* wait for the reset bit to clear */
|
||||
ret = readl_relaxed_poll_timeout_atomic(reset->prm->base +
|
||||
reset->prm->data->rstst,
|
||||
v, v & BIT(st_bit), 1,
|
||||
OMAP_RESET_MAX_WAIT);
|
||||
reset->prm->data->rstctrl,
|
||||
v, !(v & BIT(id)), 1,
|
||||
OMAP_RESET_MAX_WAIT);
|
||||
if (ret)
|
||||
pr_err("%s: timedout waiting for %s:%lu\n", __func__,
|
||||
reset->prm->data->name, id);
|
||||
|
||||
exit:
|
||||
if (reset->clkdm) {
|
||||
/* At least dra7 iva needs a delay before clkdm idle */
|
||||
if (has_rstst)
|
||||
udelay(1);
|
||||
pdata->clkdm_allow_idle(reset->clkdm);
|
||||
/* wait for the status to be set */
|
||||
if (has_rstst) {
|
||||
ret = readl_relaxed_poll_timeout_atomic(reset->prm->base +
|
||||
reset->prm->data->rstst,
|
||||
v, v & BIT(st_bit), 1,
|
||||
OMAP_RESET_MAX_WAIT);
|
||||
if (ret)
|
||||
pr_err("%s: timedout waiting for %s:%lu\n", __func__,
|
||||
reset->prm->data->name, id);
|
||||
}
|
||||
|
||||
if (reset->clkdm)
|
||||
pdata->clkdm_allow_idle(reset->clkdm);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@ -425,11 +425,16 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
|
||||
data->phy = devm_usb_get_phy_by_phandle(dev, "fsl,usbphy", 0);
|
||||
if (IS_ERR(data->phy)) {
|
||||
ret = PTR_ERR(data->phy);
|
||||
/* Return -EINVAL if no usbphy is available */
|
||||
if (ret == -ENODEV)
|
||||
data->phy = NULL;
|
||||
else
|
||||
goto err_clk;
|
||||
if (ret == -ENODEV) {
|
||||
data->phy = devm_usb_get_phy_by_phandle(dev, "phys", 0);
|
||||
if (IS_ERR(data->phy)) {
|
||||
ret = PTR_ERR(data->phy);
|
||||
if (ret == -ENODEV)
|
||||
data->phy = NULL;
|
||||
else
|
||||
goto err_clk;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pdata.usb_phy = data->phy;
|
||||
|
||||
@ -340,6 +340,9 @@ static void acm_process_notification(struct acm *acm, unsigned char *buf)
|
||||
acm->iocount.overrun++;
|
||||
spin_unlock_irqrestore(&acm->read_lock, flags);
|
||||
|
||||
if (newctrl & ACM_CTRL_BRK)
|
||||
tty_flip_buffer_push(&acm->port);
|
||||
|
||||
if (difference)
|
||||
wake_up_all(&acm->wioctl);
|
||||
|
||||
@ -475,11 +478,16 @@ static int acm_submit_read_urbs(struct acm *acm, gfp_t mem_flags)
|
||||
|
||||
static void acm_process_read_urb(struct acm *acm, struct urb *urb)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (!urb->actual_length)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&acm->read_lock, flags);
|
||||
tty_insert_flip_string(&acm->port, urb->transfer_buffer,
|
||||
urb->actual_length);
|
||||
spin_unlock_irqrestore(&acm->read_lock, flags);
|
||||
|
||||
tty_flip_buffer_push(&acm->port);
|
||||
}
|
||||
|
||||
|
||||
@ -6,8 +6,7 @@ config USB_COMMON
|
||||
|
||||
config USB_LED_TRIG
|
||||
bool "USB LED Triggers"
|
||||
depends on LEDS_CLASS && LEDS_TRIGGERS
|
||||
select USB_COMMON
|
||||
depends on LEDS_CLASS && USB_COMMON && LEDS_TRIGGERS
|
||||
help
|
||||
This option adds LED triggers for USB host and/or gadget activity.
|
||||
|
||||
|
||||
@ -4960,6 +4960,7 @@ static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1,
|
||||
tcpm_set_state(port, SRC_ATTACH_WAIT, 0);
|
||||
break;
|
||||
case SRC_ATTACHED:
|
||||
case SRC_STARTUP:
|
||||
case SRC_SEND_CAPABILITIES:
|
||||
case SRC_READY:
|
||||
if (tcpm_port_is_disconnected(port) ||
|
||||
|
||||
@ -1269,7 +1269,7 @@ static struct platform_device *gbefb_device;
|
||||
static int __init gbefb_init(void)
|
||||
{
|
||||
int ret = platform_driver_register(&gbefb_driver);
|
||||
if (!ret) {
|
||||
if (IS_ENABLED(CONFIG_SGI_IP32) && !ret) {
|
||||
gbefb_device = platform_device_alloc("gbefb", 0);
|
||||
if (gbefb_device) {
|
||||
ret = platform_device_add(gbefb_device);
|
||||
|
||||
@ -491,12 +491,12 @@ static enum bp_state decrease_reservation(unsigned long nr_pages, gfp_t gfp)
|
||||
}
|
||||
|
||||
/*
|
||||
* Stop waiting if either state is not BP_EAGAIN and ballooning action is
|
||||
* needed, or if the credit has changed while state is BP_EAGAIN.
|
||||
* Stop waiting if either state is BP_DONE and ballooning action is
|
||||
* needed, or if the credit has changed while state is not BP_DONE.
|
||||
*/
|
||||
static bool balloon_thread_cond(enum bp_state state, long credit)
|
||||
{
|
||||
if (state != BP_EAGAIN)
|
||||
if (state == BP_DONE)
|
||||
credit = 0;
|
||||
|
||||
return current_credit() != credit || kthread_should_stop();
|
||||
@ -516,10 +516,19 @@ static int balloon_thread(void *unused)
|
||||
|
||||
set_freezable();
|
||||
for (;;) {
|
||||
if (state == BP_EAGAIN)
|
||||
timeout = balloon_stats.schedule_delay * HZ;
|
||||
else
|
||||
switch (state) {
|
||||
case BP_DONE:
|
||||
case BP_ECANCELED:
|
||||
timeout = 3600 * HZ;
|
||||
break;
|
||||
case BP_EAGAIN:
|
||||
timeout = balloon_stats.schedule_delay * HZ;
|
||||
break;
|
||||
case BP_WAIT:
|
||||
timeout = HZ;
|
||||
break;
|
||||
}
|
||||
|
||||
credit = current_credit();
|
||||
|
||||
wait_event_freezable_timeout(balloon_thread_wq,
|
||||
|
||||
@ -803,11 +803,12 @@ static long privcmd_ioctl_mmap_resource(struct file *file,
|
||||
unsigned int domid =
|
||||
(xdata.flags & XENMEM_rsrc_acq_caller_owned) ?
|
||||
DOMID_SELF : kdata.dom;
|
||||
int num;
|
||||
int num, *errs = (int *)pfns;
|
||||
|
||||
BUILD_BUG_ON(sizeof(*errs) > sizeof(*pfns));
|
||||
num = xen_remap_domain_mfn_array(vma,
|
||||
kdata.addr & PAGE_MASK,
|
||||
pfns, kdata.num, (int *)pfns,
|
||||
pfns, kdata.num, errs,
|
||||
vma->vm_page_prot,
|
||||
domid,
|
||||
vma->vm_private_data);
|
||||
@ -817,7 +818,7 @@ static long privcmd_ioctl_mmap_resource(struct file *file,
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < num; i++) {
|
||||
rc = pfns[i];
|
||||
rc = errs[i];
|
||||
if (rc < 0)
|
||||
break;
|
||||
}
|
||||
|
||||
@ -3427,15 +3427,18 @@ nfsd4_encode_dirent(void *ccdv, const char *name, int namlen,
|
||||
goto fail;
|
||||
cd->rd_maxcount -= entry_bytes;
|
||||
/*
|
||||
* RFC 3530 14.2.24 describes rd_dircount as only a "hint", so
|
||||
* let's always let through the first entry, at least:
|
||||
* RFC 3530 14.2.24 describes rd_dircount as only a "hint", and
|
||||
* notes that it could be zero. If it is zero, then the server
|
||||
* should enforce only the rd_maxcount value.
|
||||
*/
|
||||
if (!cd->rd_dircount)
|
||||
goto fail;
|
||||
name_and_cookie = 4 + 4 * XDR_QUADLEN(namlen) + 8;
|
||||
if (name_and_cookie > cd->rd_dircount && cd->cookie_offset)
|
||||
goto fail;
|
||||
cd->rd_dircount -= min(cd->rd_dircount, name_and_cookie);
|
||||
if (cd->rd_dircount) {
|
||||
name_and_cookie = 4 + 4 * XDR_QUADLEN(namlen) + 8;
|
||||
if (name_and_cookie > cd->rd_dircount && cd->cookie_offset)
|
||||
goto fail;
|
||||
cd->rd_dircount -= min(cd->rd_dircount, name_and_cookie);
|
||||
if (!cd->rd_dircount)
|
||||
cd->rd_maxcount = 0;
|
||||
}
|
||||
|
||||
cd->cookie_offset = cookie_offset;
|
||||
skip_entry:
|
||||
|
||||
@ -1547,7 +1547,7 @@ static int __init init_nfsd(void)
|
||||
goto out_free_all;
|
||||
return 0;
|
||||
out_free_all:
|
||||
unregister_pernet_subsys(&nfsd_net_ops);
|
||||
unregister_filesystem(&nfsd_fs_type);
|
||||
out_free_exports:
|
||||
remove_proc_entry("fs/nfs/exports", NULL);
|
||||
remove_proc_entry("fs/nfs", NULL);
|
||||
|
||||
@ -1217,9 +1217,13 @@ static int ovl_rename(struct inode *olddir, struct dentry *old,
|
||||
goto out_dput;
|
||||
}
|
||||
} else {
|
||||
if (!d_is_negative(newdentry) &&
|
||||
(!new_opaque || !ovl_is_whiteout(newdentry)))
|
||||
goto out_dput;
|
||||
if (!d_is_negative(newdentry)) {
|
||||
if (!new_opaque || !ovl_is_whiteout(newdentry))
|
||||
goto out_dput;
|
||||
} else {
|
||||
if (flags & RENAME_EXCHANGE)
|
||||
goto out_dput;
|
||||
}
|
||||
}
|
||||
|
||||
if (olddentry == trap)
|
||||
|
||||
@ -287,6 +287,12 @@ static ssize_t ovl_read_iter(struct kiocb *iocb, struct iov_iter *iter)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = -EINVAL;
|
||||
if (iocb->ki_flags & IOCB_DIRECT &&
|
||||
(!real.file->f_mapping->a_ops ||
|
||||
!real.file->f_mapping->a_ops->direct_IO))
|
||||
goto out_fdput;
|
||||
|
||||
old_cred = ovl_override_creds(file_inode(file)->i_sb);
|
||||
if (is_sync_kiocb(iocb)) {
|
||||
ret = vfs_iter_read(real.file, iter, &iocb->ki_pos,
|
||||
@ -313,7 +319,7 @@ static ssize_t ovl_read_iter(struct kiocb *iocb, struct iov_iter *iter)
|
||||
ovl_revert_creds(file_inode(file)->i_sb, old_cred);
|
||||
|
||||
ovl_file_accessed(file);
|
||||
|
||||
out_fdput:
|
||||
fdput(real);
|
||||
|
||||
return ret;
|
||||
@ -342,6 +348,12 @@ static ssize_t ovl_write_iter(struct kiocb *iocb, struct iov_iter *iter)
|
||||
if (ret)
|
||||
goto out_unlock;
|
||||
|
||||
ret = -EINVAL;
|
||||
if (iocb->ki_flags & IOCB_DIRECT &&
|
||||
(!real.file->f_mapping->a_ops ||
|
||||
!real.file->f_mapping->a_ops->direct_IO))
|
||||
goto out_fdput;
|
||||
|
||||
if (!ovl_should_sync(OVL_FS(inode->i_sb)))
|
||||
ifl &= ~(IOCB_DSYNC | IOCB_SYNC);
|
||||
|
||||
@ -377,6 +389,7 @@ static ssize_t ovl_write_iter(struct kiocb *iocb, struct iov_iter *iter)
|
||||
}
|
||||
out:
|
||||
ovl_revert_creds(file_inode(file)->i_sb, old_cred);
|
||||
out_fdput:
|
||||
fdput(real);
|
||||
|
||||
out_unlock:
|
||||
|
||||
@ -64,7 +64,8 @@ static inline int stack_map_data_size(struct bpf_map *map)
|
||||
|
||||
static int prealloc_elems_and_freelist(struct bpf_stack_map *smap)
|
||||
{
|
||||
u32 elem_size = sizeof(struct stack_map_bucket) + smap->map.value_size;
|
||||
u64 elem_size = sizeof(struct stack_map_bucket) +
|
||||
(u64)smap->map.value_size;
|
||||
int err;
|
||||
|
||||
smap->elems = bpf_map_area_alloc(elem_size * smap->map.max_entries,
|
||||
|
||||
@ -1590,7 +1590,8 @@ static size_t br_get_linkxstats_size(const struct net_device *dev, int attr)
|
||||
}
|
||||
|
||||
return numvls * nla_total_size(sizeof(struct bridge_vlan_xstats)) +
|
||||
nla_total_size(sizeof(struct br_mcast_stats)) +
|
||||
nla_total_size_64bit(sizeof(struct br_mcast_stats)) +
|
||||
(p ? nla_total_size_64bit(sizeof(p->stp_xstats)) : 0) +
|
||||
nla_total_size(0);
|
||||
}
|
||||
|
||||
|
||||
@ -5257,7 +5257,7 @@ static int rtnl_fill_statsinfo(struct sk_buff *skb, struct net_device *dev,
|
||||
static size_t if_nlmsg_stats_size(const struct net_device *dev,
|
||||
u32 filter_mask)
|
||||
{
|
||||
size_t size = 0;
|
||||
size_t size = NLMSG_ALIGN(sizeof(struct if_stats_msg));
|
||||
|
||||
if (stats_attr_valid(filter_mask, IFLA_STATS_LINK_64, 0))
|
||||
size += nla_total_size_64bit(sizeof(struct rtnl_link_stats64));
|
||||
|
||||
@ -242,8 +242,10 @@ static inline int compute_score(struct sock *sk, struct net *net,
|
||||
|
||||
if (!inet_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif))
|
||||
return -1;
|
||||
score = sk->sk_bound_dev_if ? 2 : 1;
|
||||
|
||||
score = sk->sk_family == PF_INET ? 2 : 1;
|
||||
if (sk->sk_family == PF_INET)
|
||||
score++;
|
||||
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
|
||||
score++;
|
||||
}
|
||||
|
||||
@ -391,7 +391,8 @@ static int compute_score(struct sock *sk, struct net *net,
|
||||
dif, sdif);
|
||||
if (!dev_match)
|
||||
return -1;
|
||||
score += 4;
|
||||
if (sk->sk_bound_dev_if)
|
||||
score += 4;
|
||||
|
||||
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
|
||||
score++;
|
||||
|
||||
@ -106,7 +106,7 @@ static inline int compute_score(struct sock *sk, struct net *net,
|
||||
if (!inet_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif))
|
||||
return -1;
|
||||
|
||||
score = 1;
|
||||
score = sk->sk_bound_dev_if ? 2 : 1;
|
||||
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
|
||||
score++;
|
||||
}
|
||||
|
||||
@ -133,7 +133,8 @@ static int compute_score(struct sock *sk, struct net *net,
|
||||
dev_match = udp_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif);
|
||||
if (!dev_match)
|
||||
return -1;
|
||||
score++;
|
||||
if (sk->sk_bound_dev_if)
|
||||
score++;
|
||||
|
||||
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
|
||||
score++;
|
||||
|
||||
@ -586,7 +586,10 @@ static int netlink_insert(struct sock *sk, u32 portid)
|
||||
|
||||
/* We need to ensure that the socket is hashed and visible. */
|
||||
smp_wmb();
|
||||
nlk_sk(sk)->bound = portid;
|
||||
/* Paired with lockless reads from netlink_bind(),
|
||||
* netlink_connect() and netlink_sendmsg().
|
||||
*/
|
||||
WRITE_ONCE(nlk_sk(sk)->bound, portid);
|
||||
|
||||
err:
|
||||
release_sock(sk);
|
||||
@ -1004,7 +1007,8 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
|
||||
if (nlk->ngroups < BITS_PER_LONG)
|
||||
groups &= (1UL << nlk->ngroups) - 1;
|
||||
|
||||
bound = nlk->bound;
|
||||
/* Paired with WRITE_ONCE() in netlink_insert() */
|
||||
bound = READ_ONCE(nlk->bound);
|
||||
if (bound) {
|
||||
/* Ensure nlk->portid is up-to-date. */
|
||||
smp_rmb();
|
||||
@ -1090,8 +1094,9 @@ static int netlink_connect(struct socket *sock, struct sockaddr *addr,
|
||||
|
||||
/* No need for barriers here as we return to user-space without
|
||||
* using any of the bound attributes.
|
||||
* Paired with WRITE_ONCE() in netlink_insert().
|
||||
*/
|
||||
if (!nlk->bound)
|
||||
if (!READ_ONCE(nlk->bound))
|
||||
err = netlink_autobind(sock);
|
||||
|
||||
if (err == 0) {
|
||||
@ -1880,7 +1885,8 @@ static int netlink_sendmsg(struct socket *sock, struct msghdr *msg, size_t len)
|
||||
dst_group = nlk->dst_group;
|
||||
}
|
||||
|
||||
if (!nlk->bound) {
|
||||
/* Paired with WRITE_ONCE() in netlink_insert() */
|
||||
if (!READ_ONCE(nlk->bound)) {
|
||||
err = netlink_autobind(sock);
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
@ -233,6 +233,9 @@ int fifo_set_limit(struct Qdisc *q, unsigned int limit)
|
||||
if (strncmp(q->ops->id + 1, "fifo", 4) != 0)
|
||||
return 0;
|
||||
|
||||
if (!q->ops->change)
|
||||
return 0;
|
||||
|
||||
nla = kmalloc(nla_attr_size(sizeof(struct tc_fifo_qopt)), GFP_KERNEL);
|
||||
if (nla) {
|
||||
nla->nla_type = RTM_NEWQDISC;
|
||||
|
||||
@ -1630,6 +1630,10 @@ static void taprio_destroy(struct Qdisc *sch)
|
||||
list_del(&q->taprio_list);
|
||||
spin_unlock(&taprio_list_lock);
|
||||
|
||||
/* Note that taprio_reset() might not be called if an error
|
||||
* happens in qdisc_create(), after taprio_init() has been called.
|
||||
*/
|
||||
hrtimer_cancel(&q->advance_timer);
|
||||
|
||||
taprio_disable_offload(dev, q, NULL);
|
||||
|
||||
|
||||
@ -643,7 +643,7 @@ static bool gss_check_seq_num(const struct svc_rqst *rqstp, struct rsc *rsci,
|
||||
}
|
||||
__set_bit(seq_num % GSS_SEQ_WIN, sd->sd_win);
|
||||
goto ok;
|
||||
} else if (seq_num <= sd->sd_max - GSS_SEQ_WIN) {
|
||||
} else if (seq_num + GSS_SEQ_WIN <= sd->sd_max) {
|
||||
goto toolow;
|
||||
}
|
||||
if (__test_and_set_bit(seq_num % GSS_SEQ_WIN, sd->sd_win))
|
||||
|
||||
@ -1100,12 +1100,13 @@ static int process_one_file(const char *fpath, const struct stat *sb,
|
||||
*/
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int rc, ret = 0;
|
||||
int rc, ret = 0, empty_map = 0;
|
||||
int maxfds;
|
||||
char ldirname[PATH_MAX];
|
||||
const char *arch;
|
||||
const char *output_file;
|
||||
const char *start_dirname;
|
||||
char *err_string_ext = "";
|
||||
struct stat stbuf;
|
||||
|
||||
prog = basename(argv[0]);
|
||||
@ -1133,7 +1134,8 @@ int main(int argc, char *argv[])
|
||||
/* If architecture does not have any event lists, bail out */
|
||||
if (stat(ldirname, &stbuf) < 0) {
|
||||
pr_info("%s: Arch %s has no PMU event lists\n", prog, arch);
|
||||
goto empty_map;
|
||||
empty_map = 1;
|
||||
goto err_close_eventsfp;
|
||||
}
|
||||
|
||||
/* Include pmu-events.h first */
|
||||
@ -1150,75 +1152,60 @@ int main(int argc, char *argv[])
|
||||
*/
|
||||
|
||||
maxfds = get_maxfds();
|
||||
mapfile = NULL;
|
||||
rc = nftw(ldirname, preprocess_arch_std_files, maxfds, 0);
|
||||
if (rc && verbose) {
|
||||
pr_info("%s: Error preprocessing arch standard files %s\n",
|
||||
prog, ldirname);
|
||||
goto empty_map;
|
||||
} else if (rc < 0) {
|
||||
/* Make build fail */
|
||||
fclose(eventsfp);
|
||||
free_arch_std_events();
|
||||
return 1;
|
||||
} else if (rc) {
|
||||
goto empty_map;
|
||||
}
|
||||
if (rc)
|
||||
goto err_processing_std_arch_event_dir;
|
||||
|
||||
rc = nftw(ldirname, process_one_file, maxfds, 0);
|
||||
if (rc && verbose) {
|
||||
pr_info("%s: Error walking file tree %s\n", prog, ldirname);
|
||||
goto empty_map;
|
||||
} else if (rc < 0) {
|
||||
/* Make build fail */
|
||||
fclose(eventsfp);
|
||||
free_arch_std_events();
|
||||
ret = 1;
|
||||
goto out_free_mapfile;
|
||||
} else if (rc) {
|
||||
goto empty_map;
|
||||
}
|
||||
if (rc)
|
||||
goto err_processing_dir;
|
||||
|
||||
sprintf(ldirname, "%s/test", start_dirname);
|
||||
|
||||
rc = nftw(ldirname, process_one_file, maxfds, 0);
|
||||
if (rc && verbose) {
|
||||
pr_info("%s: Error walking file tree %s rc=%d for test\n",
|
||||
prog, ldirname, rc);
|
||||
goto empty_map;
|
||||
} else if (rc < 0) {
|
||||
/* Make build fail */
|
||||
free_arch_std_events();
|
||||
ret = 1;
|
||||
goto out_free_mapfile;
|
||||
} else if (rc) {
|
||||
goto empty_map;
|
||||
}
|
||||
if (rc)
|
||||
goto err_processing_dir;
|
||||
|
||||
if (close_table)
|
||||
print_events_table_suffix(eventsfp);
|
||||
|
||||
if (!mapfile) {
|
||||
pr_info("%s: No CPU->JSON mapping?\n", prog);
|
||||
goto empty_map;
|
||||
empty_map = 1;
|
||||
goto err_close_eventsfp;
|
||||
}
|
||||
|
||||
if (process_mapfile(eventsfp, mapfile)) {
|
||||
rc = process_mapfile(eventsfp, mapfile);
|
||||
fclose(eventsfp);
|
||||
if (rc) {
|
||||
pr_info("%s: Error processing mapfile %s\n", prog, mapfile);
|
||||
/* Make build fail */
|
||||
fclose(eventsfp);
|
||||
free_arch_std_events();
|
||||
ret = 1;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
|
||||
goto out_free_mapfile;
|
||||
|
||||
empty_map:
|
||||
fclose(eventsfp);
|
||||
create_empty_mapping(output_file);
|
||||
free_arch_std_events();
|
||||
out_free_mapfile:
|
||||
free(mapfile);
|
||||
return 0;
|
||||
|
||||
err_processing_std_arch_event_dir:
|
||||
err_string_ext = " for std arch event";
|
||||
err_processing_dir:
|
||||
if (verbose) {
|
||||
pr_info("%s: Error walking file tree %s%s\n", prog, ldirname,
|
||||
err_string_ext);
|
||||
empty_map = 1;
|
||||
} else if (rc < 0) {
|
||||
ret = 1;
|
||||
} else {
|
||||
empty_map = 1;
|
||||
}
|
||||
err_close_eventsfp:
|
||||
fclose(eventsfp);
|
||||
if (empty_map)
|
||||
create_empty_mapping(output_file);
|
||||
err_out:
|
||||
free_arch_std_events();
|
||||
free(mapfile);
|
||||
return ret;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user