Merge faa392181a ("Merge tag 'drm-next-2020-06-02' of git://anongit.freedesktop.org/drm/drm") into android-mainline
Tiny merge resolutions along the way to 5.8-rc1. Change-Id: I0036e22af4e398b0bb3b9855ff90d60b9c0227ee Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
commit
48ef1614d0
9
Documentation/ABI/obsolete/sysfs-cpuidle
Normal file
9
Documentation/ABI/obsolete/sysfs-cpuidle
Normal file
@ -0,0 +1,9 @@
|
||||
What: /sys/devices/system/cpu/cpuidle/current_governor_ro
|
||||
Date: April, 2020
|
||||
Contact: linux-pm@vger.kernel.org
|
||||
Description:
|
||||
current_governor_ro shows current using cpuidle governor, but read only.
|
||||
with the update that cpuidle governor can be changed at runtime in default,
|
||||
both current_governor and current_governor_ro co-exist under
|
||||
/sys/devices/system/cpu/cpuidle/ file, it's duplicate so make
|
||||
current_governor_ro obselete.
|
||||
22
Documentation/ABI/obsolete/sysfs-driver-intel_pmc_bxt
Normal file
22
Documentation/ABI/obsolete/sysfs-driver-intel_pmc_bxt
Normal file
@ -0,0 +1,22 @@
|
||||
These files allow sending arbitrary IPC commands to the PMC/SCU which
|
||||
may be dangerous. These will be removed eventually and should not be
|
||||
used in any new applications.
|
||||
|
||||
What: /sys/bus/platform/devices/INT34D2:00/simplecmd
|
||||
Date: Jun 2015
|
||||
KernelVersion: 4.1
|
||||
Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
|
||||
Description: This interface allows userspace to send an arbitrary
|
||||
IPC command to the PMC/SCU.
|
||||
|
||||
Format: %d %d where first number is command and
|
||||
second number is subcommand.
|
||||
|
||||
What: /sys/bus/platform/devices/INT34D2:00/northpeak
|
||||
Date: Jun 2015
|
||||
KernelVersion: 4.1
|
||||
Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
|
||||
Description: This interface allows userspace to enable and disable
|
||||
Northpeak through the PMC/SCU.
|
||||
|
||||
Format: %u.
|
||||
@ -106,10 +106,10 @@ Description: CPU topology files that describe a logical CPU's relationship
|
||||
See Documentation/admin-guide/cputopology.rst for more information.
|
||||
|
||||
|
||||
What: /sys/devices/system/cpu/cpuidle/current_driver
|
||||
/sys/devices/system/cpu/cpuidle/current_governer_ro
|
||||
/sys/devices/system/cpu/cpuidle/available_governors
|
||||
What: /sys/devices/system/cpu/cpuidle/available_governors
|
||||
/sys/devices/system/cpu/cpuidle/current_driver
|
||||
/sys/devices/system/cpu/cpuidle/current_governor
|
||||
/sys/devices/system/cpu/cpuidle/current_governer_ro
|
||||
Date: September 2007
|
||||
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
|
||||
Description: Discover cpuidle policy and mechanism
|
||||
@ -119,24 +119,18 @@ Description: Discover cpuidle policy and mechanism
|
||||
consumption during idle.
|
||||
|
||||
Idle policy (governor) is differentiated from idle mechanism
|
||||
(driver)
|
||||
|
||||
current_driver: (RO) displays current idle mechanism
|
||||
|
||||
current_governor_ro: (RO) displays current idle policy
|
||||
|
||||
With the cpuidle_sysfs_switch boot option enabled (meant for
|
||||
developer testing), the following three attributes are visible
|
||||
instead:
|
||||
|
||||
current_driver: same as described above
|
||||
(driver).
|
||||
|
||||
available_governors: (RO) displays a space separated list of
|
||||
available governors
|
||||
available governors.
|
||||
|
||||
current_driver: (RO) displays current idle mechanism.
|
||||
|
||||
current_governor: (RW) displays current idle policy. Users can
|
||||
switch the governor at runtime by writing to this file.
|
||||
|
||||
current_governor_ro: (RO) displays current idle policy.
|
||||
|
||||
See Documentation/admin-guide/pm/cpuidle.rst and
|
||||
Documentation/driver-api/pm/cpuidle.rst for more information.
|
||||
|
||||
|
||||
@ -27,10 +27,12 @@ KernelVersion: v4.10
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) Display the platform power source
|
||||
0x00 = DC
|
||||
0x01 = AC
|
||||
0x02 = USB
|
||||
0x03 = Wireless Charger
|
||||
bits[3:0] Current power source
|
||||
0x00 = DC
|
||||
0x01 = AC
|
||||
0x02 = USB
|
||||
0x03 = Wireless Charger
|
||||
bits[7:4] Power source sequence number
|
||||
|
||||
What: /sys/bus/platform/devices/INT3407:00/dptf_power/battery_steady_power
|
||||
Date: Jul, 2016
|
||||
@ -38,3 +40,55 @@ KernelVersion: v4.10
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) The maximum sustained power for battery in milliwatts.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3407:00/dptf_power/rest_of_platform_power_mw
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) Shows the rest (outside of SoC) of worst-case platform power.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3407:00/dptf_power/prochot_confirm
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(WO) Confirm embedded controller about a prochot notification.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3532:00/dptf_battery/max_platform_power_mw
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) The maximum platform power that can be supported by the battery in milli watts.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3532:00/dptf_battery/max_steady_state_power_mw
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) The maximum sustained power for battery in milli watts.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3532:00/dptf_battery/high_freq_impedance_mohm
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) The high frequency impedance value that can be obtained from battery
|
||||
fuel gauge in milli Ohms.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3532:00/dptf_battery/no_load_voltage_mv
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) The no-load voltage that can be obtained from battery fuel gauge in
|
||||
milli volts.
|
||||
|
||||
What: /sys/bus/platform/devices/INT3532:00/dptf_battery/current_discharge_capbility_ma
|
||||
Date: June, 2020
|
||||
KernelVersion: v5.8
|
||||
Contact: linux-acpi@vger.kernel.org
|
||||
Description:
|
||||
(RO) The battery discharge current capability obtained from battery fuel gauge in
|
||||
milli Amps.
|
||||
|
||||
@ -0,0 +1,12 @@
|
||||
What: /sys/bus/wmi/devices/44FADEB1-B204-40F2-8581-394BBDC1B651/firmware_update_request
|
||||
Date: April 2020
|
||||
KernelVersion: 5.7
|
||||
Contact: "Jithu Joseph" <jithu.joseph@intel.com>
|
||||
Description:
|
||||
Allow user space entities to trigger update of Slim
|
||||
Bootloader (SBL). This attribute normally has a value
|
||||
of 0 and userspace can signal SBL to update firmware,
|
||||
on next reboot, by writing a value of 1.
|
||||
There are two available states:
|
||||
* 0 -> Skip firmware update while rebooting
|
||||
* 1 -> Attempt firmware update on next reboot
|
||||
@ -159,17 +159,15 @@ governor uses that information depends on what algorithm is implemented by it
|
||||
and that is the primary reason for having more than one governor in the
|
||||
``CPUIdle`` subsystem.
|
||||
|
||||
There are three ``CPUIdle`` governors available, ``menu``, `TEO <teo-gov_>`_
|
||||
and ``ladder``. Which of them is used by default depends on the configuration
|
||||
of the kernel and in particular on whether or not the scheduler tick can be
|
||||
`stopped by the idle loop <idle-cpus-and-tick_>`_. It is possible to change the
|
||||
governor at run time if the ``cpuidle_sysfs_switch`` command line parameter has
|
||||
been passed to the kernel, but that is not safe in general, so it should not be
|
||||
done on production systems (that may change in the future, though). The name of
|
||||
the ``CPUIdle`` governor currently used by the kernel can be read from the
|
||||
:file:`current_governor_ro` (or :file:`current_governor` if
|
||||
``cpuidle_sysfs_switch`` is present in the kernel command line) file under
|
||||
:file:`/sys/devices/system/cpu/cpuidle/` in ``sysfs``.
|
||||
There are four ``CPUIdle`` governors available, ``menu``, `TEO <teo-gov_>`_,
|
||||
``ladder`` and ``haltpoll``. Which of them is used by default depends on the
|
||||
configuration of the kernel and in particular on whether or not the scheduler
|
||||
tick can be `stopped by the idle loop <idle-cpus-and-tick_>`_. Available
|
||||
governors can be read from the :file:`available_governors`, and the governor
|
||||
can be changed at runtime. The name of the ``CPUIdle`` governor currently
|
||||
used by the kernel can be read from the :file:`current_governor_ro` or
|
||||
:file:`current_governor` file under :file:`/sys/devices/system/cpu/cpuidle/`
|
||||
in ``sysfs``.
|
||||
|
||||
Which ``CPUIdle`` driver is used, on the other hand, usually depends on the
|
||||
platform the kernel is running on, but there are platforms with more than one
|
||||
|
||||
917
Documentation/admin-guide/pm/intel-speed-select.rst
Normal file
917
Documentation/admin-guide/pm/intel-speed-select.rst
Normal file
@ -0,0 +1,917 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
============================================================
|
||||
Intel(R) Speed Select Technology User Guide
|
||||
============================================================
|
||||
|
||||
The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
|
||||
collection of features that give more granular control over CPU performance.
|
||||
With Intel(R) SST, one server can be configured for power and performance for a
|
||||
variety of diverse workload requirements.
|
||||
|
||||
Refer to the links below for an overview of the technology:
|
||||
|
||||
- https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-article.html
|
||||
- https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enhancing-performance.pdf
|
||||
|
||||
These capabilities are further enhanced in some of the newer generations of
|
||||
server platforms where these features can be enumerated and controlled
|
||||
dynamically without pre-configuring via BIOS setup options. This dynamic
|
||||
configuration is done via mailbox commands to the hardware. One way to enumerate
|
||||
and configure these features is by using the Intel Speed Select utility.
|
||||
|
||||
This document explains how to use the Intel Speed Select tool to enumerate and
|
||||
control Intel(R) SST features. This document gives example commands and explains
|
||||
how these commands change the power and performance profile of the system under
|
||||
test. Using this tool as an example, customers can replicate the messaging
|
||||
implemented in the tool in their production software.
|
||||
|
||||
intel-speed-select configuration tool
|
||||
======================================
|
||||
|
||||
Most Linux distribution packages may include the "intel-speed-select" tool. If not,
|
||||
it can be built by downloading the Linux kernel tree from kernel.org. Once
|
||||
downloaded, the tool can be built without building the full kernel.
|
||||
|
||||
From the kernel tree, run the following commands::
|
||||
|
||||
# cd tools/power/x86/intel-speed-select/
|
||||
# make
|
||||
# make install
|
||||
|
||||
Getting Help
|
||||
------------
|
||||
|
||||
To get help with the tool, execute the command below::
|
||||
|
||||
# intel-speed-select --help
|
||||
|
||||
The top-level help describes arguments and features. Notice that there is a
|
||||
multi-level help structure in the tool. For example, to get help for the feature "perf-profile"::
|
||||
|
||||
# intel-speed-select perf-profile --help
|
||||
|
||||
To get help on a command, another level of help is provided. For example for the command info "info"::
|
||||
|
||||
# intel-speed-select perf-profile info --help
|
||||
|
||||
Summary of platform capability
|
||||
------------------------------
|
||||
To check the current platform and driver capaibilities, execute::
|
||||
|
||||
#intel-speed-select --info
|
||||
|
||||
For example on a test system::
|
||||
|
||||
# intel-speed-select --info
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
Platform: API version : 1
|
||||
Platform: Driver version : 1
|
||||
Platform: mbox supported : 1
|
||||
Platform: mmio supported : 1
|
||||
Intel(R) SST-PP (feature perf-profile) is supported
|
||||
TDP level change control is unlocked, max level: 4
|
||||
Intel(R) SST-TF (feature turbo-freq) is supported
|
||||
Intel(R) SST-BF (feature base-freq) is not supported
|
||||
Intel(R) SST-CP (feature core-power) is supported
|
||||
|
||||
Intel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP)
|
||||
------------------------------------------------------------------------
|
||||
|
||||
This feature allows configuration of a server dynamically based on workload
|
||||
performance requirements. This helps users during deployment as they do not have
|
||||
to choose a specific server configuration statically. This Intel(R) Speed Select
|
||||
Technology - Performance Profile (Intel(R) SST-PP) feature introduces a mechanism
|
||||
that allows multiple optimized performance profiles per system. Each profile
|
||||
defines a set of CPUs that need to be online and rest offline to sustain a
|
||||
guaranteed base frequency. Once the user issues a command to use a specific
|
||||
performance profile and meet CPU online/offline requirement, the user can expect
|
||||
a change in the base frequency dynamically. This feature is called
|
||||
"perf-profile" when using the Intel Speed Select tool.
|
||||
|
||||
Number or performance levels
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
There can be multiple performance profiles on a system. To get the number of
|
||||
profiles, execute the command below::
|
||||
|
||||
# intel-speed-select perf-profile get-config-levels
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
get-config-levels:4
|
||||
package-1
|
||||
die-0
|
||||
cpu-14
|
||||
get-config-levels:4
|
||||
|
||||
On this system under test, there are 4 performance profiles in addition to the
|
||||
base performance profile (which is performance level 0).
|
||||
|
||||
Lock/Unlock status
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Even if there are multiple performance profiles, it is possible that that they
|
||||
are locked. If they are locked, users cannot issue a command to change the
|
||||
performance state. It is possible that there is a BIOS setup to unlock or check
|
||||
with your system vendor.
|
||||
|
||||
To check if the system is locked, execute the following command::
|
||||
|
||||
# intel-speed-select perf-profile get-lock-status
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
get-lock-status:0
|
||||
package-1
|
||||
die-0
|
||||
cpu-14
|
||||
get-lock-status:0
|
||||
|
||||
In this case, lock status is 0, which means that the system is unlocked.
|
||||
|
||||
Properties of a performance level
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To get properties of a specific performance level (For example for the level 0, below), execute the command below::
|
||||
|
||||
# intel-speed-select perf-profile info -l 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
perf-profile-level-0
|
||||
cpu-count:28
|
||||
enable-cpu-mask:000003ff,f0003fff
|
||||
enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,28,29,30,31,32,33,34,35,36,37,38,39,40,41
|
||||
thermal-design-power-ratio:26
|
||||
base-frequency(MHz):2600
|
||||
speed-select-turbo-freq:disabled
|
||||
speed-select-base-freq:disabled
|
||||
...
|
||||
...
|
||||
|
||||
Here -l option is used to specify a performance level.
|
||||
|
||||
If the option -l is omitted, then this command will print information about all
|
||||
the performance levels. The above command is printing properties of the
|
||||
performance level 0.
|
||||
|
||||
For this performance profile, the list of CPUs displayed by the
|
||||
"enable-cpu-mask/enable-cpu-list" at the max can be "online." When that
|
||||
condition is met, then base frequency of 2600 MHz can be maintained. To
|
||||
understand more, execute "intel-speed-select perf-profile info" for performance
|
||||
level 4::
|
||||
|
||||
# intel-speed-select perf-profile info -l 4
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
perf-profile-level-4
|
||||
cpu-count:28
|
||||
enable-cpu-mask:000000fa,f0000faf
|
||||
enable-cpu-list:0,1,2,3,5,7,8,9,10,11,28,29,30,31,33,35,36,37,38,39
|
||||
thermal-design-power-ratio:28
|
||||
base-frequency(MHz):2800
|
||||
speed-select-turbo-freq:disabled
|
||||
speed-select-base-freq:unsupported
|
||||
...
|
||||
...
|
||||
|
||||
There are fewer CPUs in the "enable-cpu-mask/enable-cpu-list". Consequently, if
|
||||
the user only keeps these CPUs online and the rest "offline," then the base
|
||||
frequency is increased to 2.8 GHz compared to 2.6 GHz at performance level 0.
|
||||
|
||||
Get current performance level
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To get the current performance level, execute::
|
||||
|
||||
# intel-speed-select perf-profile get-config-current-level
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
get-config-current_level:0
|
||||
|
||||
First verify that the base_frequency displayed by the cpufreq sysfs is correct::
|
||||
|
||||
# cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
|
||||
2600000
|
||||
|
||||
This matches the base-frequency (MHz) field value displayed from the
|
||||
"perf-profile info" command for performance level 0(cpufreq frequency is in
|
||||
KHz).
|
||||
|
||||
To check if the average frequency is equal to the base frequency for a 100% busy
|
||||
workload, disable turbo::
|
||||
|
||||
# echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo
|
||||
|
||||
Then runs a busy workload on all CPUs, for example::
|
||||
|
||||
#stress -c 64
|
||||
|
||||
To verify the base frequency, run turbostat::
|
||||
|
||||
#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
|
||||
|
||||
Package Core CPU Bzy_MHz
|
||||
- - 2600
|
||||
0 0 0 2600
|
||||
0 1 1 2600
|
||||
0 2 2 2600
|
||||
0 3 3 2600
|
||||
0 4 4 2600
|
||||
. . . .
|
||||
|
||||
|
||||
Changing performance level
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To the change the performance level to 4, execute::
|
||||
|
||||
# intel-speed-select -d perf-profile set-config-level -l 4 -o
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
perf-profile
|
||||
set_tdp_level:success
|
||||
|
||||
In the command above, "-o" is optional. If it is specified, then it will also
|
||||
offline CPUs which are not present in the enable_cpu_mask for this performance
|
||||
level.
|
||||
|
||||
Now if the base_frequency is checked::
|
||||
|
||||
#cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
|
||||
2800000
|
||||
|
||||
Which shows that the base frequency now increased from 2600 MHz at performance
|
||||
level 0 to 2800 MHz at performance level 4. As a result, any workload, which can
|
||||
use fewer CPUs, can see a boost of 200 MHz compared to performance level 0.
|
||||
|
||||
Check presence of other Intel(R) SST features
|
||||
---------------------------------------------
|
||||
|
||||
Each of the performance profiles also specifies weather there is support of
|
||||
other two Intel(R) SST features (Intel(R) Speed Select Technology - Base Frequency
|
||||
(Intel(R) SST-BF) and Intel(R) Speed Select Technology - Turbo Frequency (Intel
|
||||
SST-TF)).
|
||||
|
||||
For example, from the output of "perf-profile info" above, for level 0 and level
|
||||
4:
|
||||
|
||||
For level 0::
|
||||
speed-select-turbo-freq:disabled
|
||||
speed-select-base-freq:disabled
|
||||
|
||||
For level 4::
|
||||
speed-select-turbo-freq:disabled
|
||||
speed-select-base-freq:unsupported
|
||||
|
||||
Given these results, the "speed-select-base-freq" (Intel(R) SST-BF) in level 4
|
||||
changed from "disabled" to "unsupported" compared to performance level 0.
|
||||
|
||||
This means that at performance level 4, the "speed-select-base-freq" feature is
|
||||
not supported. However, at performance level 0, this feature is "supported", but
|
||||
currently "disabled", meaning the user has not activated this feature. Whereas
|
||||
"speed-select-turbo-freq" (Intel(R) SST-TF) is supported at both performance
|
||||
levels, but currently not activated by the user.
|
||||
|
||||
The Intel(R) SST-BF and the Intel(R) SST-TF features are built on a foundation
|
||||
technology called Intel(R) Speed Select Technology - Core Power (Intel(R) SST-CP).
|
||||
The platform firmware enables this feature when Intel(R) SST-BF or Intel(R) SST-TF
|
||||
is supported on a platform.
|
||||
|
||||
Intel(R) Speed Select Technology Core Power (Intel(R) SST-CP)
|
||||
---------------------------------------------------------------
|
||||
|
||||
Intel(R) Speed Select Technology Core Power (Intel(R) SST-CP) is an interface that
|
||||
allows users to define per core priority. This defines a mechanism to distribute
|
||||
power among cores when there is a power constrained scenario. This defines a
|
||||
class of service (CLOS) configuration.
|
||||
|
||||
The user can configure up to 4 class of service configurations. Each CLOS group
|
||||
configuration allows definitions of parameters, which affects how the frequency
|
||||
can be limited and power is distributed. Each CPU core can be tied to a class of
|
||||
service and hence an associated priority. The granularity is at core level not
|
||||
at per CPU level.
|
||||
|
||||
Enable CLOS based prioritization
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To use CLOS based prioritization feature, firmware must be informed to enable
|
||||
and use a priority type. There is a default per platform priority type, which
|
||||
can be changed with optional command line parameter.
|
||||
|
||||
To enable and check the options, execute::
|
||||
|
||||
# intel-speed-select core-power enable --help
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
Enable core-power for a package/die
|
||||
Clos Enable: Specify priority type with [--priority|-p]
|
||||
0: Proportional, 1: Ordered
|
||||
|
||||
There are two types of priority types:
|
||||
|
||||
- Ordered
|
||||
|
||||
Priority for ordered throttling is defined based on the index of the assigned
|
||||
CLOS group. Where CLOS0 gets highest priority (throttled last).
|
||||
|
||||
Priority order is:
|
||||
CLOS0 > CLOS1 > CLOS2 > CLOS3.
|
||||
|
||||
- Proportional
|
||||
|
||||
When proportional priority is used, there is an additional parameter called
|
||||
frequency_weight, which can be specified per CLOS group. The goal of
|
||||
proportional priority is to provide each core with the requested min., then
|
||||
distribute all remaining (excess/deficit) budgets in proportion to a defined
|
||||
weight. This proportional priority can be configured using "core-power config"
|
||||
command.
|
||||
|
||||
To enable with the platform default priority type, execute::
|
||||
|
||||
# intel-speed-select core-power enable
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
core-power
|
||||
enable:success
|
||||
package-1
|
||||
die-0
|
||||
cpu-6
|
||||
core-power
|
||||
enable:success
|
||||
|
||||
The scope of this enable is per package or die scoped when a package contains
|
||||
multiple dies. To check if CLOS is enabled and get priority type, "core-power
|
||||
info" command can be used. For example to check the status of core-power feature
|
||||
on CPU 0, execute::
|
||||
|
||||
# intel-speed-select -c 0 core-power info
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
core-power
|
||||
support-status:supported
|
||||
enable-status:enabled
|
||||
clos-enable-status:enabled
|
||||
priority-type:proportional
|
||||
package-1
|
||||
die-0
|
||||
cpu-24
|
||||
core-power
|
||||
support-status:supported
|
||||
enable-status:enabled
|
||||
clos-enable-status:enabled
|
||||
priority-type:proportional
|
||||
|
||||
Configuring CLOS groups
|
||||
~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
Each CLOS group has its own attributes including min, max, freq_weight and
|
||||
desired. These parameters can be configured with "core-power config" command.
|
||||
Defaults will be used if user skips setting a parameter except clos id, which is
|
||||
mandatory. To check core-power config options, execute::
|
||||
|
||||
# intel-speed-select core-power config --help
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
Set core-power configuration for one of the four clos ids
|
||||
Specify targeted clos id with [--clos|-c]
|
||||
Specify clos Proportional Priority [--weight|-w]
|
||||
Specify clos min in MHz with [--min|-n]
|
||||
Specify clos max in MHz with [--max|-m]
|
||||
|
||||
For example::
|
||||
|
||||
# intel-speed-select core-power config -c 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
clos epp is not specified, default: 0
|
||||
clos frequency weight is not specified, default: 0
|
||||
clos min is not specified, default: 0 MHz
|
||||
clos max is not specified, default: 25500 MHz
|
||||
clos desired is not specified, default: 0
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
core-power
|
||||
config:success
|
||||
package-1
|
||||
die-0
|
||||
cpu-6
|
||||
core-power
|
||||
config:success
|
||||
|
||||
The user has the option to change defaults. For example, the user can change the
|
||||
"min" and set the base frequency to always get guaranteed base frequency.
|
||||
|
||||
Get the current CLOS configuration
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To check the current configuration, "core-power get-config" can be used. For
|
||||
example, to get the configuration of CLOS 0::
|
||||
|
||||
# intel-speed-select core-power get-config -c 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
core-power
|
||||
clos:0
|
||||
epp:0
|
||||
clos-proportional-priority:0
|
||||
clos-min:0 MHz
|
||||
clos-max:Max Turbo frequency
|
||||
clos-desired:0 MHz
|
||||
package-1
|
||||
die-0
|
||||
cpu-24
|
||||
core-power
|
||||
clos:0
|
||||
epp:0
|
||||
clos-proportional-priority:0
|
||||
clos-min:0 MHz
|
||||
clos-max:Max Turbo frequency
|
||||
clos-desired:0 MHz
|
||||
|
||||
Associating a CPU with a CLOS group
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To associate a CPU to a CLOS group "core-power assoc" command can be used::
|
||||
|
||||
# intel-speed-select core-power assoc --help
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
Associate a clos id to a CPU
|
||||
Specify targeted clos id with [--clos|-c]
|
||||
|
||||
|
||||
For example to associate CPU 10 to CLOS group 3, execute::
|
||||
|
||||
# intel-speed-select -c 10 core-power assoc -c 3
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-10
|
||||
core-power
|
||||
assoc:success
|
||||
|
||||
Once a CPU is associated, its sibling CPUs are also associated to a CLOS group.
|
||||
Once associated, avoid changing Linux "cpufreq" subsystem scaling frequency
|
||||
limits.
|
||||
|
||||
To check the existing association for a CPU, "core-power get-assoc" command can
|
||||
be used. For example, to get association of CPU 10, execute::
|
||||
|
||||
# intel-speed-select -c 10 core-power get-assoc
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-1
|
||||
die-0
|
||||
cpu-10
|
||||
get-assoc
|
||||
clos:3
|
||||
|
||||
This shows that CPU 10 is part of a CLOS group 3.
|
||||
|
||||
|
||||
Disable CLOS based prioritization
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To disable, execute::
|
||||
|
||||
# intel-speed-select core-power disable
|
||||
|
||||
Some features like Intel(R) SST-TF can only be enabled when CLOS based prioritization
|
||||
is enabled. For this reason, disabling while Intel(R) SST-TF is enabled can cause
|
||||
Intel(R) SST-TF to fail. This will cause the "disable" command to display an error
|
||||
if Intel(R) SST-TF is already enabled. In turn, to disable, the Intel(R) SST-TF
|
||||
feature must be disabled first.
|
||||
|
||||
Intel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF)
|
||||
-------------------------------------------------------------------
|
||||
|
||||
The Intel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF) feature lets
|
||||
the user control base frequency. If some critical workload threads demand
|
||||
constant high guaranteed performance, then this feature can be used to execute
|
||||
the thread at higher base frequency on specific sets of CPUs (high priority
|
||||
CPUs) at the cost of lower base frequency (low priority CPUs) on other CPUs.
|
||||
This feature does not require offline of the low priority CPUs.
|
||||
|
||||
The support of Intel(R) SST-BF depends on the Intel(R) Speed Select Technology -
|
||||
Performance Profile (Intel(R) SST-PP) performance level configuration. It is
|
||||
possible that only certain performance levels support Intel(R) SST-BF. It is also
|
||||
possible that only base performance level (level = 0) has support of Intel
|
||||
SST-BF. Consequently, first select the desired performance level to enable this
|
||||
feature.
|
||||
|
||||
In the system under test here, Intel(R) SST-BF is supported at the base
|
||||
performance level 0, but currently disabled. For example for the level 0::
|
||||
|
||||
# intel-speed-select -c 0 perf-profile info -l 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
perf-profile-level-0
|
||||
...
|
||||
|
||||
speed-select-base-freq:disabled
|
||||
...
|
||||
|
||||
Before enabling Intel(R) SST-BF and measuring its impact on a workload
|
||||
performance, execute some workload and measure performance and get a baseline
|
||||
performance to compare against.
|
||||
|
||||
Here the user wants more guaranteed performance. For this reason, it is likely
|
||||
that turbo is disabled. To disable turbo, execute::
|
||||
|
||||
#echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo
|
||||
|
||||
Based on the output of the "intel-speed-select perf-profile info -l 0" base
|
||||
frequency of guaranteed frequency 2600 MHz.
|
||||
|
||||
|
||||
Measure baseline performance for comparison
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To compare, pick a multi-threaded workload where each thread can be scheduled on
|
||||
separate CPUs. "Hackbench pipe" test is a good example on how to improve
|
||||
performance using Intel(R) SST-BF.
|
||||
|
||||
Below, the workload is measuring average scheduler wakeup latency, so a lower
|
||||
number means better performance::
|
||||
|
||||
# taskset -c 3,4 perf bench -r 100 sched pipe
|
||||
# Running 'sched/pipe' benchmark:
|
||||
# Executed 1000000 pipe operations between two processes
|
||||
Total time: 6.102 [sec]
|
||||
6.102445 usecs/op
|
||||
163868 ops/sec
|
||||
|
||||
While running the above test, if we take turbostat output, it will show us that
|
||||
2 of the CPUs are busy and reaching max. frequency (which would be the base
|
||||
frequency as the turbo is disabled). The turbostat output::
|
||||
|
||||
#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
|
||||
Package Core CPU Bzy_MHz
|
||||
0 0 0 1000
|
||||
0 1 1 1005
|
||||
0 2 2 1000
|
||||
0 3 3 2600
|
||||
0 4 4 2600
|
||||
0 5 5 1000
|
||||
0 6 6 1000
|
||||
0 7 7 1005
|
||||
0 8 8 1005
|
||||
0 9 9 1000
|
||||
0 10 10 1000
|
||||
0 11 11 995
|
||||
0 12 12 1000
|
||||
0 13 13 1000
|
||||
|
||||
From the above turbostat output, both CPU 3 and 4 are very busy and reaching
|
||||
full guaranteed frequency of 2600 MHz.
|
||||
|
||||
Intel(R) SST-BF Capabilities
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To get capabilities of Intel(R) SST-BF for the current performance level 0,
|
||||
execute::
|
||||
|
||||
# intel-speed-select base-freq info -l 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
speed-select-base-freq
|
||||
high-priority-base-frequency(MHz):3000
|
||||
high-priority-cpu-mask:00000216,00002160
|
||||
high-priority-cpu-list:5,6,8,13,33,34,36,41
|
||||
low-priority-base-frequency(MHz):2400
|
||||
tjunction-temperature(C):125
|
||||
thermal-design-power(W):205
|
||||
|
||||
The above capabilities show that there are some CPUs on this system that can
|
||||
offer base frequency of 3000 MHz compared to the standard base frequency at this
|
||||
performance levels. Nevertheless, these CPUs are fixed, and they are presented
|
||||
via high-priority-cpu-list/high-priority-cpu-mask. But if this Intel(R) SST-BF
|
||||
feature is selected, the low priorities CPUs (which are not in
|
||||
high-priority-cpu-list) can only offer up to 2400 MHz. As a result, if this
|
||||
clipping of low priority CPUs is acceptable, then the user can enable Intel
|
||||
SST-BF feature particularly for the above "sched pipe" workload since only two
|
||||
CPUs are used, they can be scheduled on high priority CPUs and can get boost of
|
||||
400 MHz.
|
||||
|
||||
Enable Intel(R) SST-BF
|
||||
~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To enable Intel(R) SST-BF feature, execute::
|
||||
|
||||
# intel-speed-select base-freq enable -a
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
base-freq
|
||||
enable:success
|
||||
package-1
|
||||
die-0
|
||||
cpu-14
|
||||
base-freq
|
||||
enable:success
|
||||
|
||||
In this case, -a option is optional. This not only enables Intel(R) SST-BF, but it
|
||||
also adjusts the priority of cores using Intel(R) Speed Select Technology Core
|
||||
Power (Intel(R) SST-CP) features. This option sets the minimum performance of each
|
||||
Intel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP) class to
|
||||
maximum performance so that the hardware will give maximum performance possible
|
||||
for each CPU.
|
||||
|
||||
If -a option is not used, then the following steps are required before enabling
|
||||
Intel(R) SST-BF:
|
||||
|
||||
- Discover Intel(R) SST-BF and note low and high priority base frequency
|
||||
- Note the high prioity CPU list
|
||||
- Enable CLOS using core-power feature set
|
||||
- Configure CLOS parameters. Use CLOS.min to set to minimum performance
|
||||
- Subscribe desired CPUs to CLOS groups
|
||||
|
||||
With this configuration, if the same workload is executed by pinning the
|
||||
workload to high priority CPUs (CPU 5 and 6 in this case)::
|
||||
|
||||
#taskset -c 5,6 perf bench -r 100 sched pipe
|
||||
# Running 'sched/pipe' benchmark:
|
||||
# Executed 1000000 pipe operations between two processes
|
||||
Total time: 5.627 [sec]
|
||||
5.627922 usecs/op
|
||||
177685 ops/sec
|
||||
|
||||
This way, by enabling Intel(R) SST-BF, the performance of this benchmark is
|
||||
improved (latency reduced) by 7.79%. From the turbostat output, it can be
|
||||
observed that the high priority CPUs reached 3000 MHz compared to 2600 MHz.
|
||||
The turbostat output::
|
||||
|
||||
#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
|
||||
Package Core CPU Bzy_MHz
|
||||
0 0 0 2151
|
||||
0 1 1 2166
|
||||
0 2 2 2175
|
||||
0 3 3 2175
|
||||
0 4 4 2175
|
||||
0 5 5 3000
|
||||
0 6 6 3000
|
||||
0 7 7 2180
|
||||
0 8 8 2662
|
||||
0 9 9 2176
|
||||
0 10 10 2175
|
||||
0 11 11 2176
|
||||
0 12 12 2176
|
||||
0 13 13 2661
|
||||
|
||||
Disable Intel(R) SST-BF
|
||||
~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To disable the Intel(R) SST-BF feature, execute::
|
||||
|
||||
# intel-speed-select base-freq disable -a
|
||||
|
||||
|
||||
Intel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
|
||||
--------------------------------------------------------------------
|
||||
|
||||
This feature enables the ability to set different "All core turbo ratio limits"
|
||||
to cores based on the priority. By using this feature, some cores can be
|
||||
configured to get higher turbo frequency by designating them as high priority at
|
||||
the cost of lower or no turbo frequency on the low priority cores.
|
||||
|
||||
For this reason, this feature is only useful when system is busy utilizing all
|
||||
CPUs, but the user wants some configurable option to get high performance on
|
||||
some CPUs.
|
||||
|
||||
The support of Intel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
|
||||
depends on the Intel(R) Speed Select Technology - Performance Profile (Intel
|
||||
SST-PP) performance level configuration. It is possible that only a certain
|
||||
performance level supports Intel(R) SST-TF. It is also possible that only the base
|
||||
performance level (level = 0) has the support of Intel(R) SST-TF. Hence, first
|
||||
select the desired performance level to enable this feature.
|
||||
|
||||
In the system under test here, Intel(R) SST-TF is supported at the base
|
||||
performance level 0, but currently disabled::
|
||||
|
||||
# intel-speed-select -c 0 perf-profile info -l 0
|
||||
Intel(R) Speed Select Technology
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
perf-profile-level-0
|
||||
...
|
||||
...
|
||||
speed-select-turbo-freq:disabled
|
||||
...
|
||||
...
|
||||
|
||||
|
||||
To check if performance can be improved using Intel(R) SST-TF feature, get the turbo
|
||||
frequency properties with Intel(R) SST-TF enabled and compare to the base turbo
|
||||
capability of this system.
|
||||
|
||||
Get Base turbo capability
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To get the base turbo capability of performance level 0, execute::
|
||||
|
||||
# intel-speed-select perf-profile info -l 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
perf-profile-level-0
|
||||
...
|
||||
...
|
||||
turbo-ratio-limits-sse
|
||||
bucket-0
|
||||
core-count:2
|
||||
max-turbo-frequency(MHz):3200
|
||||
bucket-1
|
||||
core-count:4
|
||||
max-turbo-frequency(MHz):3100
|
||||
bucket-2
|
||||
core-count:6
|
||||
max-turbo-frequency(MHz):3100
|
||||
bucket-3
|
||||
core-count:8
|
||||
max-turbo-frequency(MHz):3100
|
||||
bucket-4
|
||||
core-count:10
|
||||
max-turbo-frequency(MHz):3100
|
||||
bucket-5
|
||||
core-count:12
|
||||
max-turbo-frequency(MHz):3100
|
||||
bucket-6
|
||||
core-count:14
|
||||
max-turbo-frequency(MHz):3100
|
||||
bucket-7
|
||||
core-count:16
|
||||
max-turbo-frequency(MHz):3100
|
||||
|
||||
Based on the data above, when all the CPUS are busy, the max. frequency of 3100
|
||||
MHz can be achieved. If there is some busy workload on cpu 0 - 11 (e.g. stress)
|
||||
and on CPU 12 and 13, execute "hackbench pipe" workload::
|
||||
|
||||
# taskset -c 12,13 perf bench -r 100 sched pipe
|
||||
# Running 'sched/pipe' benchmark:
|
||||
# Executed 1000000 pipe operations between two processes
|
||||
Total time: 5.705 [sec]
|
||||
5.705488 usecs/op
|
||||
175269 ops/sec
|
||||
|
||||
The turbostat output::
|
||||
|
||||
#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
|
||||
Package Core CPU Bzy_MHz
|
||||
0 0 0 3000
|
||||
0 1 1 3000
|
||||
0 2 2 3000
|
||||
0 3 3 3000
|
||||
0 4 4 3000
|
||||
0 5 5 3100
|
||||
0 6 6 3100
|
||||
0 7 7 3000
|
||||
0 8 8 3100
|
||||
0 9 9 3000
|
||||
0 10 10 3000
|
||||
0 11 11 3000
|
||||
0 12 12 3100
|
||||
0 13 13 3100
|
||||
|
||||
Based on turbostat output, the performance is limited by frequency cap of 3100
|
||||
MHz. To check if the hackbench performance can be improved for CPU 12 and CPU
|
||||
13, first check the capability of the Intel(R) SST-TF feature for this performance
|
||||
level.
|
||||
|
||||
Get Intel(R) SST-TF Capability
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To get the capability, the "turbo-freq info" command can be used::
|
||||
|
||||
# intel-speed-select turbo-freq info -l 0
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-0
|
||||
speed-select-turbo-freq
|
||||
bucket-0
|
||||
high-priority-cores-count:2
|
||||
high-priority-max-frequency(MHz):3200
|
||||
high-priority-max-avx2-frequency(MHz):3200
|
||||
high-priority-max-avx512-frequency(MHz):3100
|
||||
bucket-1
|
||||
high-priority-cores-count:4
|
||||
high-priority-max-frequency(MHz):3100
|
||||
high-priority-max-avx2-frequency(MHz):3000
|
||||
high-priority-max-avx512-frequency(MHz):2900
|
||||
bucket-2
|
||||
high-priority-cores-count:6
|
||||
high-priority-max-frequency(MHz):3100
|
||||
high-priority-max-avx2-frequency(MHz):3000
|
||||
high-priority-max-avx512-frequency(MHz):2900
|
||||
speed-select-turbo-freq-clip-frequencies
|
||||
low-priority-max-frequency(MHz):2600
|
||||
low-priority-max-avx2-frequency(MHz):2400
|
||||
low-priority-max-avx512-frequency(MHz):2100
|
||||
|
||||
Based on the output above, there is an Intel(R) SST-TF bucket for which there are
|
||||
two high priority cores. If only two high priority cores are set, then max.
|
||||
turbo frequency on those cores can be increased to 3200 MHz. This is 100 MHz
|
||||
more than the base turbo capability for all cores.
|
||||
|
||||
In turn, for the hackbench workload, two CPUs can be set as high priority and
|
||||
rest as low priority. One side effect is that once enabled, the low priority
|
||||
cores will be clipped to a lower frequency of 2600 MHz.
|
||||
|
||||
Enable Intel(R) SST-TF
|
||||
~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
To enable Intel(R) SST-TF, execute::
|
||||
|
||||
# intel-speed-select -c 12,13 turbo-freq enable -a
|
||||
Intel(R) Speed Select Technology
|
||||
Executing on CPU model: X
|
||||
package-0
|
||||
die-0
|
||||
cpu-12
|
||||
turbo-freq
|
||||
enable:success
|
||||
package-0
|
||||
die-0
|
||||
cpu-13
|
||||
turbo-freq
|
||||
enable:success
|
||||
package--1
|
||||
die-0
|
||||
cpu-63
|
||||
turbo-freq --auto
|
||||
enable:success
|
||||
|
||||
In this case, the option "-a" is optional. If set, it enables Intel(R) SST-TF
|
||||
feature and also sets the CPUs to high and and low priority using Intel Speed
|
||||
Select Technology Core Power (Intel(R) SST-CP) features. The CPU numbers passed
|
||||
with "-c" arguments are marked as high priority, including its siblings.
|
||||
|
||||
If -a option is not used, then the following steps are required before enabling
|
||||
Intel(R) SST-TF:
|
||||
|
||||
- Discover Intel(R) SST-TF and note buckets of high priority cores and maximum frequency
|
||||
|
||||
- Enable CLOS using core-power feature set - Configure CLOS parameters
|
||||
|
||||
- Subscribe desired CPUs to CLOS groups making sure that high priority cores are set to the maximum frequency
|
||||
|
||||
If the same hackbench workload is executed, schedule hackbench threads on high
|
||||
priority CPUs::
|
||||
|
||||
#taskset -c 12,13 perf bench -r 100 sched pipe
|
||||
# Running 'sched/pipe' benchmark:
|
||||
# Executed 1000000 pipe operations between two processes
|
||||
Total time: 5.510 [sec]
|
||||
5.510165 usecs/op
|
||||
180826 ops/sec
|
||||
|
||||
This improved performance by around 3.3% improvement on a busy system. Here the
|
||||
turbostat output will show that the CPU 12 and CPU 13 are getting 100 MHz boost.
|
||||
The turbostat output::
|
||||
|
||||
#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
|
||||
Package Core CPU Bzy_MHz
|
||||
...
|
||||
0 12 12 3200
|
||||
0 13 13 3200
|
||||
@ -62,9 +62,10 @@ on the capabilities of the processor.
|
||||
Active Mode
|
||||
-----------
|
||||
|
||||
This is the default operation mode of ``intel_pstate``. If it works in this
|
||||
mode, the ``scaling_driver`` policy attribute in ``sysfs`` for all ``CPUFreq``
|
||||
policies contains the string "intel_pstate".
|
||||
This is the default operation mode of ``intel_pstate`` for processors with
|
||||
hardware-managed P-states (HWP) support. If it works in this mode, the
|
||||
``scaling_driver`` policy attribute in ``sysfs`` for all ``CPUFreq`` policies
|
||||
contains the string "intel_pstate".
|
||||
|
||||
In this mode the driver bypasses the scaling governors layer of ``CPUFreq`` and
|
||||
provides its own scaling algorithms for P-state selection. Those algorithms
|
||||
@ -138,12 +139,13 @@ internal P-state selection logic to be less performance-focused.
|
||||
Active Mode Without HWP
|
||||
~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
This is the default operation mode for processors that do not support the HWP
|
||||
feature. It also is used by default with the ``intel_pstate=no_hwp`` argument
|
||||
in the kernel command line. However, in this mode ``intel_pstate`` may refuse
|
||||
to work with the given processor if it does not recognize it. [Note that
|
||||
``intel_pstate`` will never refuse to work with any processor with the HWP
|
||||
feature enabled.]
|
||||
This operation mode is optional for processors that do not support the HWP
|
||||
feature or when the ``intel_pstate=no_hwp`` argument is passed to the kernel in
|
||||
the command line. The active mode is used in those cases if the
|
||||
``intel_pstate=active`` argument is passed to the kernel in the command line.
|
||||
In this mode ``intel_pstate`` may refuse to work with processors that are not
|
||||
recognized by it. [Note that ``intel_pstate`` will never refuse to work with
|
||||
any processor with the HWP feature enabled.]
|
||||
|
||||
In this mode ``intel_pstate`` registers utilization update callbacks with the
|
||||
CPU scheduler in order to run a P-state selection algorithm, either
|
||||
@ -188,10 +190,14 @@ is not set.
|
||||
Passive Mode
|
||||
------------
|
||||
|
||||
This mode is used if the ``intel_pstate=passive`` argument is passed to the
|
||||
kernel in the command line (it implies the ``intel_pstate=no_hwp`` setting too).
|
||||
Like in the active mode without HWP support, in this mode ``intel_pstate`` may
|
||||
refuse to work with the given processor if it does not recognize it.
|
||||
This is the default operation mode of ``intel_pstate`` for processors without
|
||||
hardware-managed P-states (HWP) support. It is always used if the
|
||||
``intel_pstate=passive`` argument is passed to the kernel in the command line
|
||||
regardless of whether or not the given processor supports HWP. [Note that the
|
||||
``intel_pstate=no_hwp`` setting implies ``intel_pstate=passive`` if it is used
|
||||
without ``intel_pstate=active``.] Like in the active mode without HWP support,
|
||||
in this mode ``intel_pstate`` may refuse to work with processors that are not
|
||||
recognized by it.
|
||||
|
||||
If the driver works in this mode, the ``scaling_driver`` policy attribute in
|
||||
``sysfs`` for all ``CPUFreq`` policies contains the string "intel_cpufreq".
|
||||
|
||||
@ -13,3 +13,4 @@ Working-State Power Management
|
||||
intel_pstate
|
||||
cpufreq_drivers
|
||||
intel_epb
|
||||
intel-speed-select
|
||||
|
||||
@ -119,7 +119,7 @@ examples:
|
||||
panel@0 {
|
||||
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
|
||||
reg = <0>;
|
||||
power-gpios = <&pio 1 7 0>; /* PB07 */
|
||||
power-supply = <®_display>;
|
||||
reset-gpios = <&r_pio 0 5 1>; /* PL05 */
|
||||
backlight = <&pwm_bl>;
|
||||
};
|
||||
|
||||
@ -1,50 +0,0 @@
|
||||
Analog Devices ADV7123 Video DAC
|
||||
--------------------------------
|
||||
|
||||
The ADV7123 is a digital-to-analog converter that outputs VGA signals from a
|
||||
parallel video input.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Should be "adi,adv7123"
|
||||
|
||||
Optional properties:
|
||||
|
||||
- psave-gpios: Power save control GPIO
|
||||
|
||||
Required nodes:
|
||||
|
||||
The ADV7123 has two video ports. Their connections are modeled using the OF
|
||||
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
- Video port 0 for DPI input
|
||||
- Video port 1 for VGA output
|
||||
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
adv7123: encoder@0 {
|
||||
compatible = "adi,adv7123";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
adv7123_in: endpoint@0 {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
adv7123_out: endpoint@0 {
|
||||
remote-endpoint = <&vga_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -37,6 +37,12 @@ properties:
|
||||
type: object
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
@ -51,6 +57,8 @@ properties:
|
||||
required:
|
||||
- port@0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (C) 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/chrontel,ch7033.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Chrontel CH7033 Video Encoder Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Lubomir Rintel <lkundrak@v3.sk>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: chrontel,ch7033
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: I2C address of the device
|
||||
|
||||
ports:
|
||||
type: object
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
Video port for RGB input.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
DVI port, should be connected to a node compatible with the
|
||||
dvi-connector binding.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vga-dvi-encoder@76 {
|
||||
compatible = "chrontel,ch7033";
|
||||
reg = <0x76>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
endpoint {
|
||||
remote-endpoint = <&lcd0_rgb_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
endpoint {
|
||||
remote-endpoint = <&dvi_in>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,50 +0,0 @@
|
||||
Dumb RGB to VGA DAC bridge
|
||||
---------------------------
|
||||
|
||||
This binding is aimed for dumb RGB to VGA DAC based bridges that do not require
|
||||
any configuration.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be "dumb-vga-dac"
|
||||
|
||||
Required nodes:
|
||||
|
||||
This device has two video ports. Their connections are modelled using the OF
|
||||
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
- Video port 0 for RGB input
|
||||
- Video port 1 for VGA output
|
||||
|
||||
Optional properties:
|
||||
- vdd-supply: Power supply for DAC
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
bridge {
|
||||
compatible = "dumb-vga-dac";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
vga_bridge_in: endpoint {
|
||||
remote-endpoint = <&tcon0_out_vga>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
vga_bridge_out: endpoint {
|
||||
remote-endpoint = <&vga_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,32 +0,0 @@
|
||||
Synopsys DesignWare MIPI DSI host controller
|
||||
============================================
|
||||
|
||||
This document defines device tree properties for the Synopsys DesignWare MIPI
|
||||
DSI host controller. It doesn't constitue a device tree binding specification
|
||||
by itself but is meant to be referenced by platform-specific device tree
|
||||
bindings.
|
||||
|
||||
When referenced from platform device tree bindings the properties defined in
|
||||
this document are defined as follows. The platform device tree bindings are
|
||||
responsible for defining whether each optional property is used or not.
|
||||
|
||||
- reg: Memory mapped base address and length of the DesignWare MIPI DSI
|
||||
host controller registers. (mandatory)
|
||||
|
||||
- clocks: References to all the clocks specified in the clock-names property
|
||||
as specified in [1]. (mandatory)
|
||||
|
||||
- clock-names:
|
||||
- "pclk" is the peripheral clock for either AHB and APB. (mandatory)
|
||||
- "px_clk" is the pixel clock for the DPI/RGB input. (optional)
|
||||
|
||||
- resets: References to all the resets specified in the reset-names property
|
||||
as specified in [2]. (optional)
|
||||
|
||||
- reset-names: string reset name, must be "apb" if used. (optional)
|
||||
|
||||
- panel or bridge node: see [3]. (mandatory)
|
||||
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
[2] Documentation/devicetree/bindings/reset/reset.txt
|
||||
[3] Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
|
||||
@ -0,0 +1,91 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/ite,it6505.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ITE it6505 Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Allen Chen <allen.chen@ite.com.tw>
|
||||
|
||||
description: |
|
||||
The IT6505 is a high-performance DisplayPort 1.1a transmitter,
|
||||
fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.
|
||||
The IT6505 supports color depth of up to 36 bits (12 bits/color)
|
||||
and ensures robust transmission of high-quality uncompressed video
|
||||
content, along with uncompressed and compressed digital audio content.
|
||||
|
||||
Aside from the various video output formats supported, the IT6505
|
||||
also encodes and transmits up to 8 channels of I2S digital audio,
|
||||
with sampling rate up to 192kHz and sample size up to 24 bits.
|
||||
In addition, an S/PDIF input port takes in compressed audio of up to
|
||||
192kHz frame rate.
|
||||
|
||||
Each IT6505 chip comes preprogrammed with an unique HDCP key,
|
||||
in compliance with the HDCP 1.3 standard so as to provide secure
|
||||
transmission of high-definition content. Users of the IT6505 need not
|
||||
purchase any HDCP keys or ROMs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ite,it6505
|
||||
|
||||
ovdd-supply:
|
||||
maxItems: 1
|
||||
description: I/O voltage
|
||||
|
||||
pwr18-supply:
|
||||
maxItems: 1
|
||||
description: core voltage
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: interrupt specifier of INT pin
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: gpio specifier of RESET pin
|
||||
|
||||
extcon:
|
||||
maxItems: 1
|
||||
description: extcon specifier for the Power Delivery
|
||||
|
||||
port:
|
||||
type: object
|
||||
description: A port node pointing to DPI host port node
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ovdd-supply
|
||||
- pwr18-supply
|
||||
- interrupts
|
||||
- reset-gpios
|
||||
- extcon
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dp-bridge@5c {
|
||||
compatible = "ite,it6505";
|
||||
interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>;
|
||||
reg = <0x5c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&it6505_pins>;
|
||||
ovdd-supply = <&mt6358_vsim1_reg>;
|
||||
pwr18-supply = <&it6505_pp18_reg>;
|
||||
reset-gpios = <&pio 179 1>;
|
||||
extcon = <&usbc_extcon>;
|
||||
|
||||
port {
|
||||
it6505_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -50,6 +50,12 @@ properties:
|
||||
This device has two video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
@ -66,6 +72,8 @@ properties:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
powerdown-gpios:
|
||||
description:
|
||||
The GPIO used to control the power down line of this device.
|
||||
|
||||
226
Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
Normal file
226
Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
Normal file
@ -0,0 +1,226 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Northwest Logic MIPI-DSI controller on i.MX SoCs
|
||||
|
||||
maintainers:
|
||||
- Guido Gúnther <agx@sigxcpu.org>
|
||||
- Robert Chiras <robert.chiras@nxp.com>
|
||||
|
||||
description: |
|
||||
NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
|
||||
the SOCs NWL MIPI-DSI host controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8mq-nwl-dsi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: DSI core clock
|
||||
- description: RX_ESC clock (used in escape mode)
|
||||
- description: TX_ESC clock (used in escape mode)
|
||||
- description: PHY_REF clock
|
||||
- description: LCDIF clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: rx_esc
|
||||
- const: tx_esc
|
||||
- const: phy_ref
|
||||
- const: lcdif
|
||||
|
||||
mux-controls:
|
||||
description:
|
||||
mux controller node to use for operating the input mux
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
description:
|
||||
A phandle to the phy module representing the DPHY
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
- const: dphy
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: dsi byte reset line
|
||||
- description: dsi dpi reset line
|
||||
- description: dsi esc reset line
|
||||
- description: dsi pclk reset line
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: byte
|
||||
- const: dpi
|
||||
- const: esc
|
||||
- const: pclk
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing DSI input & output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
description:
|
||||
Input port node to receive pixel data from the
|
||||
display controller. Exactly one endpoint must be
|
||||
specified.
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
endpoint@0:
|
||||
description: sub-node describing the input from LCDIF
|
||||
type: object
|
||||
|
||||
endpoint@1:
|
||||
description: sub-node describing the input from DCSS
|
||||
type: object
|
||||
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- reg
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- endpoint@0
|
||||
- required:
|
||||
- endpoint@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description:
|
||||
DSI output port node to the panel or the next bridge
|
||||
in the chain
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
"^panel@[0-9]+$":
|
||||
type: object
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
- compatible
|
||||
- interrupts
|
||||
- mux-controls
|
||||
- phy-names
|
||||
- phys
|
||||
- ports
|
||||
- reg
|
||||
- reset-names
|
||||
- resets
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
#include <dt-bindings/clock/imx8mq-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/reset/imx8mq-reset.h>
|
||||
|
||||
mipi_dsi: mipi_dsi@30a00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx8mq-nwl-dsi";
|
||||
reg = <0x30A00000 0x300>;
|
||||
clocks = <&clk IMX8MQ_CLK_DSI_CORE>,
|
||||
<&clk IMX8MQ_CLK_DSI_AHB>,
|
||||
<&clk IMX8MQ_CLK_DSI_IPG_DIV>,
|
||||
<&clk IMX8MQ_CLK_DSI_PHY_REF>,
|
||||
<&clk IMX8MQ_CLK_LCDIF_PIXEL>;
|
||||
clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
mux-controls = <&mux 0>;
|
||||
power-domains = <&pgc_mipi>;
|
||||
resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,
|
||||
<&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,
|
||||
<&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,
|
||||
<&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;
|
||||
reset-names = "byte", "dpi", "esc", "pclk";
|
||||
phys = <&dphy>;
|
||||
phy-names = "dphy";
|
||||
|
||||
panel@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "rocktech,jh057n00900";
|
||||
reg = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&mipi_dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0>;
|
||||
mipi_dsi_in: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&lcdif_mipi_dsi>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
mipi_dsi_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -50,6 +50,12 @@ properties:
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
Documentation/devicetree/bindings/graph.txt
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
@ -63,6 +69,8 @@ properties:
|
||||
required:
|
||||
- port@0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -0,0 +1,99 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Transparent non-programmable DRM bridges
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
description: |
|
||||
This binding supports transparent non-programmable bridges that don't require
|
||||
any configuration, with a single input and a single output.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- ti,ths8134a
|
||||
- ti,ths8134b
|
||||
- const: ti,ths8134
|
||||
- enum:
|
||||
- adi,adv7123
|
||||
- dumb-vga-dac
|
||||
- ti,opa362
|
||||
- ti,ths8134
|
||||
- ti,ths8135
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
This device has two video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: The bridge input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: The bridge output
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
enable-gpios:
|
||||
maxItems: 1
|
||||
description: GPIO controlling bridge enable
|
||||
|
||||
vdd-supply:
|
||||
maxItems: 1
|
||||
description: Power supply for the bridge
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bridge {
|
||||
compatible = "ti,ths8134a", "ti,ths8134";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
vga_bridge_in: endpoint {
|
||||
remote-endpoint = <&tcon0_out_vga>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
vga_bridge_out: endpoint {
|
||||
remote-endpoint = <&vga_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -0,0 +1,68 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Synopsys DesignWare MIPI DSI host controller
|
||||
|
||||
maintainers:
|
||||
- Philippe CORNU <philippe.cornu@st.com>
|
||||
|
||||
description: |
|
||||
This document defines device tree properties for the Synopsys DesignWare MIPI
|
||||
DSI host controller. It doesn't constitue a device tree binding specification
|
||||
by itself but is meant to be referenced by platform-specific device tree
|
||||
bindings.
|
||||
|
||||
When referenced from platform device tree bindings the properties defined in
|
||||
this document are defined as follows. The platform device tree bindings are
|
||||
responsible for defining whether each property is required or optional.
|
||||
|
||||
allOf:
|
||||
- $ref: ../dsi-controller.yaml#
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Module clock
|
||||
- description: DSI bus clock for either AHB and APB
|
||||
- description: Pixel clock for the DPI/RGB input
|
||||
minItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
- const: pclk
|
||||
- const: px_clk
|
||||
minItems: 2
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
const: apb
|
||||
|
||||
ports:
|
||||
type: object
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
description: Input node to receive pixel data.
|
||||
port@1:
|
||||
type: object
|
||||
description: DSI output node to panel.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
required:
|
||||
- clock-names
|
||||
- clocks
|
||||
- ports
|
||||
- reg
|
||||
@ -1,66 +0,0 @@
|
||||
Thine Electronics THC63LVD1024 LVDS decoder
|
||||
-------------------------------------------
|
||||
|
||||
The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS streams
|
||||
to parallel data outputs. The chip supports single/dual input/output modes,
|
||||
handling up to two LVDS input streams and up to two digital CMOS/TTL outputs.
|
||||
|
||||
Single or dual operation mode, output data mapping and DDR output modes are
|
||||
configured through input signals and the chip does not expose any control bus.
|
||||
|
||||
Required properties:
|
||||
- compatible: Shall be "thine,thc63lvd1024"
|
||||
- vcc-supply: Power supply for TTL output, TTL CLOCKOUT signal, LVDS input,
|
||||
PPL and digital circuitry
|
||||
|
||||
Optional properties:
|
||||
- powerdown-gpios: Power down GPIO signal, pin name "/PDWN". Active low
|
||||
- oe-gpios: Output enable GPIO signal, pin name "OE". Active high
|
||||
|
||||
The THC63LVD1024 video port connections are modeled according
|
||||
to OF graph bindings specified by Documentation/devicetree/bindings/graph.txt
|
||||
|
||||
Required video port nodes:
|
||||
- port@0: First LVDS input port
|
||||
- port@2: First digital CMOS/TTL parallel output
|
||||
|
||||
Optional video port nodes:
|
||||
- port@1: Second LVDS input port
|
||||
- port@3: Second digital CMOS/TTL parallel output
|
||||
|
||||
The device can operate in single-link mode or dual-link mode. In single-link
|
||||
mode, all pixels are received on port@0, and port@1 shall not contain any
|
||||
endpoint. In dual-link mode, even-numbered pixels are received on port@0 and
|
||||
odd-numbered pixels on port@1, and both port@0 and port@1 shall contain
|
||||
endpoints.
|
||||
|
||||
Example:
|
||||
--------
|
||||
|
||||
thc63lvd1024: lvds-decoder {
|
||||
compatible = "thine,thc63lvd1024";
|
||||
|
||||
vcc-supply = <®_lvds_vcc>;
|
||||
powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
lvds_dec_in_0: endpoint {
|
||||
remote-endpoint = <&lvds_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2{
|
||||
reg = <2>;
|
||||
|
||||
lvds_dec_out_2: endpoint {
|
||||
remote-endpoint = <&adv7511_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,121 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Thine Electronics THC63LVD1024 LVDS Decoder
|
||||
|
||||
maintainers:
|
||||
- Jacopo Mondi <jacopo+renesas@jmondi.org>
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
|
||||
description: |
|
||||
The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
|
||||
streams to parallel data outputs. The chip supports single/dual input/output
|
||||
modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
|
||||
outputs.
|
||||
|
||||
Single or dual operation mode, output data mapping and DDR output modes are
|
||||
configured through input signals and the chip does not expose any control
|
||||
bus.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: thine,thc63lvd1024
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
This device has four video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
The device can operate in single-link mode or dual-link mode. In
|
||||
single-link mode, all pixels are received on port@0, and port@1 shall not
|
||||
contain any endpoint. In dual-link mode, even-numbered pixels are
|
||||
received on port@0 and odd-numbered pixels on port@1, and both port@0 and
|
||||
port@1 shall contain endpoints.
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: First LVDS input port
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: Second LVDS input port
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
description: First digital CMOS/TTL parallel output
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
description: Second digital CMOS/TTL parallel output
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@2
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
oe-gpios:
|
||||
maxItems: 1
|
||||
description: Output enable GPIO signal, pin name "OE", active high.
|
||||
|
||||
powerdown-gpios:
|
||||
maxItems: 1
|
||||
description: Power down GPIO signal, pin name "/PDWN", active low.
|
||||
|
||||
vcc-supply:
|
||||
maxItems: 1
|
||||
description:
|
||||
Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
|
||||
digital circuitry.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ports
|
||||
- vcc-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
lvds-decoder {
|
||||
compatible = "thine,thc63lvd1024";
|
||||
|
||||
vcc-supply = <®_lvds_vcc>;
|
||||
powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
lvds_dec_in_0: endpoint {
|
||||
remote-endpoint = <&lvds_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
lvds_dec_out_2: endpoint {
|
||||
remote-endpoint = <&adv7511_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,51 +0,0 @@
|
||||
THS8134 and THS8135 Video DAC
|
||||
-----------------------------
|
||||
|
||||
This is the binding for Texas Instruments THS8134, THS8134A, THS8134B and
|
||||
THS8135 Video DAC bridges.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be one of
|
||||
"ti,ths8134"
|
||||
"ti,ths8134a," "ti,ths8134"
|
||||
"ti,ths8134b", "ti,ths8134"
|
||||
"ti,ths8135"
|
||||
|
||||
Required nodes:
|
||||
|
||||
This device has two video ports. Their connections are modelled using the OF
|
||||
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
- Video port 0 for RGB input
|
||||
- Video port 1 for VGA output
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
vga-bridge {
|
||||
compatible = "ti,ths8135";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
vga_bridge_in: endpoint {
|
||||
remote-endpoint = <&lcdc_out_vga>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
vga_bridge_out: endpoint {
|
||||
remote-endpoint = <&vga_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -28,7 +28,7 @@ description: |
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^dsi-controller(@.*)?$"
|
||||
pattern: "^dsi(@.*)?$"
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
@ -76,7 +76,7 @@ patternProperties:
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
dsi-controller@a0351000 {
|
||||
dsi@a0351000 {
|
||||
reg = <0xa0351000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -17,6 +17,9 @@ Required properties:
|
||||
Documentation/devicetree/bindings/graph.txt. This port should be connected
|
||||
to the input port of an attached HDMI or LVDS encoder chip.
|
||||
|
||||
Optional properties:
|
||||
- pinctrl-names: Contain "default" and "sleep".
|
||||
|
||||
Example:
|
||||
|
||||
dpi0: dpi@1401d000 {
|
||||
@ -27,6 +30,9 @@ dpi0: dpi@1401d000 {
|
||||
<&mmsys CLK_MM_DPI_ENGINE>,
|
||||
<&apmixedsys CLK_APMIXED_TVDPLL>;
|
||||
clock-names = "pixel", "engine", "pll";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&dpi_pin_func>;
|
||||
pinctrl-1 = <&dpi_pin_idle>;
|
||||
|
||||
port {
|
||||
dpi0_out: endpoint {
|
||||
|
||||
@ -33,6 +33,13 @@ Required properties:
|
||||
- #clock-cells: must be <0>;
|
||||
- #phy-cells: must be <0>.
|
||||
|
||||
Optional properties:
|
||||
- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
|
||||
the step is 200.
|
||||
- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
|
||||
unspecified default values shall be used.
|
||||
- nvmem-cell-names: Should be "calibration-data"
|
||||
|
||||
Example:
|
||||
|
||||
mipi_tx0: mipi-dphy@10215000 {
|
||||
@ -42,6 +49,9 @@ mipi_tx0: mipi-dphy@10215000 {
|
||||
clock-output-names = "mipi_tx0_pll";
|
||||
#clock-cells = <0>;
|
||||
#phy-cells = <0>;
|
||||
drive-strength-microamp = <4600>;
|
||||
nvmem-cells= <&mipi_tx_calibration>;
|
||||
nvmem-cell-names = "calibration-data";
|
||||
};
|
||||
|
||||
dsi0: dsi@1401b000 {
|
||||
|
||||
@ -1,31 +0,0 @@
|
||||
ARM Versatile TFT Panels
|
||||
|
||||
These panels are connected to the daughterboards found on the
|
||||
ARM Versatile reference designs.
|
||||
|
||||
This device node must appear as a child to a "syscon"-compatible
|
||||
node.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "arm,versatile-tft-panel"
|
||||
|
||||
Required subnodes:
|
||||
- port: see display/panel/panel-common.yaml, graph.txt
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
sysreg@0 {
|
||||
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
|
||||
reg = <0x00000 0x1000>;
|
||||
|
||||
panel: display@0 {
|
||||
compatible = "arm,versatile-tft-panel";
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&foo>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,54 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/arm,versatile-tft-panel.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Versatile TFT Panels
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |
|
||||
These panels are connected to the daughterboards found on the
|
||||
ARM Versatile reference designs.
|
||||
|
||||
This device node must appear as a child to a "syscon"-compatible
|
||||
node.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,versatile-tft-panel
|
||||
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sysreg {
|
||||
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
|
||||
reg = <0x00000 0x1000>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel {
|
||||
compatible = "arm,versatile-tft-panel";
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&foo>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -0,0 +1,56 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/asus,z00t-tm5p5-nt35596.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ASUS Z00T TM5P5 NT35596 5.5" 1080×1920 LCD Panel
|
||||
|
||||
maintainers:
|
||||
- Konrad Dybcio <konradybcio@gmail.com>
|
||||
|
||||
description: |+
|
||||
This panel seems to only be found in the Asus Z00T
|
||||
smartphone and we have no straightforward way of
|
||||
actually getting the correct model number,
|
||||
as no schematics are released publicly.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: asus,z00t-tm5p5-n35596
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
vdd-supply:
|
||||
description: core voltage supply
|
||||
vddio-supply:
|
||||
description: vddio supply
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-supply
|
||||
- vddio-supply
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
panel@0 {
|
||||
reg = <0>;
|
||||
|
||||
compatible = "asus,z00t-tm5p5-n35596";
|
||||
|
||||
vdd-supply = <&pm8916_l8>;
|
||||
vddio-supply = <&pm8916_l6>;
|
||||
reset-gpios = <&msmgpio 25 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -1,24 +0,0 @@
|
||||
Boe Himax8279d 1200x1920 TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "boe,himax8279d8p" and one of: "boe,himax8279d10p"
|
||||
- reg: DSI virtual channel of the peripheral
|
||||
- enable-gpios: panel enable gpio
|
||||
- pp33-gpios: a GPIO phandle for the 3.3v pin that provides the supply voltage
|
||||
- pp18-gpios: a GPIO phandle for the 1.8v pin that provides the supply voltage
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Example:
|
||||
|
||||
&mipi_dsi {
|
||||
panel {
|
||||
compatible = "boe,himax8279d8p", "boe,himax8279d10p";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
||||
pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
|
||||
pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/boe,himax8279d.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Boe Himax8279d 1200x1920 TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Jerry Han <jerry.han.hq@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: boe,himax8279d8p
|
||||
- const: boe,himax8279d10p
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
reg: true
|
||||
|
||||
pp33-gpios:
|
||||
maxItems: 1
|
||||
description: GPIO for the 3.3v pin that provides the supply voltage
|
||||
|
||||
pp18-gpios:
|
||||
maxItems: 1
|
||||
description: GPIO for the 1.8v pin that provides the supply voltage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- enable-gpios
|
||||
- pp33-gpios
|
||||
- pp18-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
panel@0 {
|
||||
compatible = "boe,himax8279d8p", "boe,himax8279d10p";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
||||
pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
|
||||
pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -24,6 +24,8 @@ properties:
|
||||
- boe,tv101wum-n53
|
||||
# AUO B101UAN08.3 10.1" WUXGA TFT LCD panel
|
||||
- auo,b101uan08.3
|
||||
# BOE TV105WUM-NW0 10.5" WUXGA TFT LCD panel
|
||||
- boe,tv105wum-nw0
|
||||
|
||||
reg:
|
||||
description: the virtual channel number of a DSI peripheral
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
$id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: display timing bindings
|
||||
title: display timings bindings
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
@ -14,7 +14,7 @@ maintainers:
|
||||
description: |
|
||||
A display panel may be able to handle several display timings,
|
||||
with different resolutions.
|
||||
The display-timings node makes it possible to specify the timing
|
||||
The display-timings node makes it possible to specify the timings
|
||||
and to specify the timing that is native for the display.
|
||||
|
||||
properties:
|
||||
@ -25,8 +25,8 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
The default display timing is the one specified as native-mode.
|
||||
If no native-mode is specified then the first node is assumed the
|
||||
native mode.
|
||||
If no native-mode is specified then the first node is assumed
|
||||
to be the native mode.
|
||||
|
||||
patternProperties:
|
||||
"^timing":
|
||||
|
||||
@ -1,20 +0,0 @@
|
||||
Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "feiyang,fy07024di26a30d"
|
||||
- reg: DSI virtual channel used by that screen
|
||||
- avdd-supply: analog regulator dc1 switch
|
||||
- dvdd-supply: 3v3 digital regulator
|
||||
- reset-gpios: a GPIO phandle for the reset pin
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle for the backlight control.
|
||||
|
||||
panel@0 {
|
||||
compatible = "feiyang,fy07024di26a30d";
|
||||
reg = <0>;
|
||||
avdd-supply = <®_dc1sw>;
|
||||
dvdd-supply = <®_dldo2>;
|
||||
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/feiyang,fy07024di26a30d.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel
|
||||
|
||||
maintainers:
|
||||
- Jagan Teki <jagan@amarulasolutions.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: feiyang,fy07024di26a30d
|
||||
|
||||
reg:
|
||||
description: DSI virtual channel used by that screen
|
||||
maxItems: 1
|
||||
|
||||
avdd-supply:
|
||||
description: analog regulator dc1 switch
|
||||
|
||||
dvdd-supply:
|
||||
description: 3v3 digital regulator
|
||||
|
||||
reset-gpios: true
|
||||
|
||||
backlight: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- dvdd-supply
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "feiyang,fy07024di26a30d";
|
||||
reg = <0>;
|
||||
avdd-supply = <®_dc1sw>;
|
||||
dvdd-supply = <®_dldo2>;
|
||||
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
};
|
||||
@ -1,49 +0,0 @@
|
||||
Ilitek ILI9322 TFT panel driver with SPI control bus
|
||||
|
||||
This is a driver for 320x240 TFT panels, accepting a variety of input
|
||||
streams that get adapted and scaled to the panel. The panel output has
|
||||
960 TFT source driver pins and 240 TFT gate driver pins, VCOM, VCOML and
|
||||
VCOMH outputs.
|
||||
|
||||
Required properties:
|
||||
- compatible: "dlink,dir-685-panel", "ilitek,ili9322"
|
||||
(full system-specific compatible is always required to look up configuration)
|
||||
- reg: address of the panel on the SPI bus
|
||||
|
||||
Optional properties:
|
||||
- vcc-supply: core voltage supply, see regulator/regulator.txt
|
||||
- iovcc-supply: voltage supply for the interface input/output signals,
|
||||
see regulator/regulator.txt
|
||||
- vci-supply: voltage supply for analog parts, see regulator/regulator.txt
|
||||
- reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt
|
||||
|
||||
The following optional properties only apply to RGB and YUV input modes and
|
||||
can be omitted for BT.656 input modes:
|
||||
|
||||
- pixelclk-active: see display/panel/display-timing.txt
|
||||
- de-active: see display/panel/display-timing.txt
|
||||
- hsync-active: see display/panel/display-timing.txt
|
||||
- vsync-active: see display/panel/display-timing.txt
|
||||
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-bus.txt
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in
|
||||
media/video-interfaces.txt. This node should describe panel's video bus.
|
||||
|
||||
Example:
|
||||
|
||||
panel: display@0 {
|
||||
compatible = "dlink,dir-685-panel", "ilitek,ili9322";
|
||||
reg = <0>;
|
||||
vcc-supply = <&vdisp>;
|
||||
iovcc-supply = <&vdisp>;
|
||||
vci-supply = <&vdisp>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&display_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,71 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/ilitek,ili9322.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Ilitek ILI9322 TFT panel driver with SPI control bus
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |
|
||||
This is a driver for 320x240 TFT panels, accepting a variety of input
|
||||
streams that get adapted and scaled to the panel. The panel output has
|
||||
960 TFT source driver pins and 240 TFT gate driver pins, VCOM, VCOML and
|
||||
VCOMH outputs.
|
||||
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- dlink,dir-685-panel
|
||||
|
||||
- const: ilitek,ili9322
|
||||
|
||||
reset-gpios: true
|
||||
port: true
|
||||
|
||||
vcc-supply:
|
||||
description: Core voltage supply
|
||||
|
||||
iovcc-supply:
|
||||
description: Voltage supply for the interface input/output signals
|
||||
|
||||
vci-supply:
|
||||
description: Voltage supply for analog parts
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel: display@0 {
|
||||
compatible = "dlink,dir-685-panel", "ilitek,ili9322";
|
||||
reg = <0>;
|
||||
vcc-supply = <&vdisp>;
|
||||
iovcc-supply = <&vdisp>;
|
||||
vci-supply = <&vdisp>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&display_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,20 +0,0 @@
|
||||
Ilitek ILI9881c based MIPI-DSI panels
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "ilitek,ili9881c" and one of:
|
||||
* "bananapi,lhr050h41"
|
||||
- reg: DSI virtual channel used by that screen
|
||||
- power-supply: phandle to the power regulator
|
||||
- reset-gpios: a GPIO phandle for the reset pin
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle to the backlight used
|
||||
|
||||
Example:
|
||||
panel@0 {
|
||||
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
|
||||
reg = <0>;
|
||||
power-supply = <®_display>;
|
||||
reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
|
||||
backlight = <&pwm_bl>;
|
||||
};
|
||||
@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/ilitek,ili9881c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Ilitek ILI9881c based MIPI-DSI panels
|
||||
|
||||
maintainers:
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- bananapi,lhr050h41
|
||||
|
||||
- const: ilitek,ili9881c
|
||||
|
||||
backlight: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
- reg
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "bananapi,lhr050h41", "ilitek,ili9881c";
|
||||
reg = <0>;
|
||||
power-supply = <®_display>;
|
||||
reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
|
||||
backlight = <&pwm_bl>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,24 +0,0 @@
|
||||
Innolux P097PFG 9.7" 1536x2048 TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "innolux,p097pfg"
|
||||
- reg: DSI virtual channel of the peripheral
|
||||
- avdd-supply: phandle of the regulator that provides positive voltage
|
||||
- avee-supply: phandle of the regulator that provides negative voltage
|
||||
- enable-gpios: panel enable gpio
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Example:
|
||||
|
||||
&mipi_dsi {
|
||||
panel@0 {
|
||||
compatible = "innolux,p079zca";
|
||||
reg = <0>;
|
||||
avdd-supply = <...>;
|
||||
avee-supply = <...>;
|
||||
backlight = <&backlight>;
|
||||
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,56 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/innolux,p097pfg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Innolux P097PFG 9.7" 1536x2048 TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Lin Huang <hl@rock-chips.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: innolux,p097pfg
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
reg: true
|
||||
|
||||
avdd-supply:
|
||||
description: The regulator that provides positive voltage
|
||||
|
||||
avee-supply:
|
||||
description: The regulator that provides negative voltage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- avee-supply
|
||||
- enable-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "innolux,p097pfg";
|
||||
reg = <0>;
|
||||
avdd-supply = <&avdd>;
|
||||
avee-supply = <&avee>;
|
||||
backlight = <&backlight>;
|
||||
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,22 +0,0 @@
|
||||
Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "innolux,p120zdg-bf1"
|
||||
- power-supply: regulator to provide the supply voltage
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- no-hpd: If HPD isn't hooked up; add this property.
|
||||
|
||||
Example:
|
||||
panel_edp: panel-edp {
|
||||
compatible = "innolux,p120zdg-bf1";
|
||||
enable-gpios = <&msmgpio 31 GPIO_ACTIVE_LOW>;
|
||||
power-supply = <&pm8916_l2>;
|
||||
backlight = <&backlight>;
|
||||
no-hpd;
|
||||
};
|
||||
@ -0,0 +1,43 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/innolux,p120zdg-bf1.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel
|
||||
|
||||
maintainers:
|
||||
- Sandeep Panda <spanda@codeaurora.org>
|
||||
- Douglas Anderson <dianders@chromium.org>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: innolux,p120zdg-bf1
|
||||
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
backlight: true
|
||||
no-hpd: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
panel_edp: panel-edp {
|
||||
compatible = "innolux,p120zdg-bf1";
|
||||
enable-gpios = <&msmgpio 31 GPIO_ACTIVE_LOW>;
|
||||
power-supply = <&pm8916_l2>;
|
||||
backlight = <&backlight>;
|
||||
no-hpd;
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,31 +0,0 @@
|
||||
JDI model LT070ME05000 1200x1920 7" DSI Panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "jdi,lt070me05000"
|
||||
- vddp-supply: phandle of the regulator that provides the supply voltage
|
||||
Power IC supply (3-5V)
|
||||
- iovcc-supply: phandle of the regulator that provides the supply voltage
|
||||
IOVCC , power supply for LCM (1.8V)
|
||||
- enable-gpios: phandle of gpio for enable line
|
||||
LED_EN, LED backlight enable, High active
|
||||
- reset-gpios: phandle of gpio for reset line
|
||||
This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
|
||||
XRES, Reset, Low active
|
||||
- dcdc-en-gpios: phandle of the gpio for power ic line
|
||||
Power IC supply enable, High active
|
||||
|
||||
Example:
|
||||
|
||||
dsi0: qcom,mdss_dsi@4700000 {
|
||||
panel@0 {
|
||||
compatible = "jdi,lt070me05000";
|
||||
reg = <0>;
|
||||
|
||||
vddp-supply = <&pm8921_l17>;
|
||||
iovcc-supply = <&pm8921_lvs7>;
|
||||
|
||||
enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>;
|
||||
dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,69 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/jdi,lt070me05000.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: JDI model LT070ME05000 1200x1920 7" DSI Panel
|
||||
|
||||
maintainers:
|
||||
- Vinay Simha BN <simhavcs@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: jdi,lt070me05000
|
||||
|
||||
enable-gpios: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
vddp-supply:
|
||||
description: |
|
||||
The regulator that provides the supply voltage Power IC supply (3-5V)
|
||||
|
||||
iovcc-supply:
|
||||
description: |
|
||||
The regulator that provides the supply voltage IOVCC,
|
||||
power supply for LCM (1.8V)
|
||||
|
||||
dcdc-en-gpios:
|
||||
description: |
|
||||
phandle of the gpio for power ic line
|
||||
Power IC supply enable, High active
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vddp-supply
|
||||
- iovcc-supply
|
||||
- enable-gpios
|
||||
- reset-gpios
|
||||
- dcdc-en-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "jdi,lt070me05000";
|
||||
reg = <0>;
|
||||
|
||||
vddp-supply = <&pm8921_l17>;
|
||||
iovcc-supply = <&pm8921_lvs7>;
|
||||
|
||||
enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>;
|
||||
dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,42 +0,0 @@
|
||||
King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "kingdisplay,kd035g6-54nt"
|
||||
- power-supply: See panel-common.txt
|
||||
- reset-gpios: See panel-common.txt
|
||||
|
||||
Optional properties:
|
||||
- backlight: see panel-common.txt
|
||||
|
||||
The generic bindings for the SPI slaves documented in [1] also apply.
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in [2]. This
|
||||
node should describe panel's video bus.
|
||||
|
||||
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
[2]: Documentation/devicetree/bindings/graph.txt
|
||||
|
||||
Example:
|
||||
|
||||
&spi {
|
||||
panel@0 {
|
||||
compatible = "kingdisplay,kd035g6-54nt";
|
||||
reg = <0>;
|
||||
|
||||
spi-max-frequency = <3125000>;
|
||||
spi-3wire;
|
||||
spi-cs-high;
|
||||
|
||||
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
|
||||
|
||||
backlight = <&backlight>;
|
||||
power-supply = <&ldo6>;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
remote-endpoint = <&panel_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,65 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/kingdisplay,kd035g6-54nt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Paul Cercueil <paul@crapouillou.net>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: kingdisplay,kd035g6-54nt
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
- reset-gpios
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "kingdisplay,kd035g6-54nt";
|
||||
reg = <0>;
|
||||
|
||||
spi-max-frequency = <3125000>;
|
||||
spi-3wire;
|
||||
spi-cs-high;
|
||||
|
||||
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
|
||||
|
||||
backlight = <&backlight>;
|
||||
power-supply = <&ldo6>;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
remote-endpoint = <&panel_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,22 +0,0 @@
|
||||
Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "kingdisplay,kd097d04"
|
||||
- reg: DSI virtual channel of the peripheral
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
- enable-gpios: panel enable gpio
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Example:
|
||||
|
||||
&mipi_dsi {
|
||||
panel@0 {
|
||||
compatible = "kingdisplay,kd097d04";
|
||||
reg = <0>;
|
||||
power-supply = <...>;
|
||||
backlight = <&backlight>;
|
||||
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,51 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/leadtek,ltk050h3146w.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Leadtek LTK050H3146W 5.0in 720x1280 DSI panel
|
||||
|
||||
maintainers:
|
||||
- Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- leadtek,ltk050h3146w
|
||||
- leadtek,ltk050h3146w-a2
|
||||
reg: true
|
||||
backlight: true
|
||||
reset-gpios: true
|
||||
iovcc-supply:
|
||||
description: regulator that supplies the iovcc voltage
|
||||
vci-supply:
|
||||
description: regulator that supplies the vci voltage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- backlight
|
||||
- iovcc-supply
|
||||
- vci-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
panel@0 {
|
||||
compatible = "leadtek,ltk050h3146w";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
iovcc-supply = <&vcc_1v8>;
|
||||
vci-supply = <&vcc3v3_lcd>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,7 +0,0 @@
|
||||
LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "lg,acx467akm-7"
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
@ -1,7 +0,0 @@
|
||||
LG Corporation 7" WXGA TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "lg,ld070wx3-sl01"
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
@ -1,19 +0,0 @@
|
||||
LG LG4573 TFT Liquid Crystal Display with SPI control bus
|
||||
|
||||
Required properties:
|
||||
- compatible: "lg,lg4573"
|
||||
- reg: address of the panel on the SPI bus
|
||||
|
||||
The panel must obey rules for SPI slave device specified in document [1].
|
||||
|
||||
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
|
||||
Example:
|
||||
|
||||
lcd_panel: display@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "lg,lg4573";
|
||||
spi-max-frequency = <10000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
@ -0,0 +1,45 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/lg,lg4573.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LG LG4573 TFT Liquid Crystal Display with SPI control bus
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Heiko Schocher <hs@denx.de>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: lg,lg4573
|
||||
|
||||
reg: true
|
||||
spi-max-frequency: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcd_panel: display@0 {
|
||||
compatible = "lg,lg4573";
|
||||
spi-max-frequency = <10000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,7 +0,0 @@
|
||||
LG Corporation 5" HD TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "lg,lh500wx1-sd03"
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
@ -1,33 +0,0 @@
|
||||
LG.Philips LB035Q02 Panel
|
||||
=========================
|
||||
|
||||
Required properties:
|
||||
- compatible: "lgphilips,lb035q02"
|
||||
- enable-gpios: panel enable gpio
|
||||
|
||||
Optional properties:
|
||||
- label: a symbolic name for the panel
|
||||
|
||||
Required nodes:
|
||||
- Video port for DPI input
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
lcd-panel: panel@0 {
|
||||
compatible = "lgphilips,lb035q02";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
label = "lcd";
|
||||
|
||||
enable-gpios = <&gpio7 7 0>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/lgphilips,lb035q02.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LG.Philips LB035Q02 Panel
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: lgphilips,lb035q02
|
||||
|
||||
label: true
|
||||
enable-gpios: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- enable-gpios
|
||||
- port
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel: panel@0 {
|
||||
compatible = "lgphilips,lb035q02";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
label = "lcd";
|
||||
|
||||
enable-gpios = <&gpio7 7 0>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,42 +0,0 @@
|
||||
Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
|
||||
|
||||
This device can be used as bridge between a host controller and LCD panels.
|
||||
Currently supported LCDs are:
|
||||
- LCD-OLinuXino-4.3TS
|
||||
- LCD-OLinuXino-5
|
||||
- LCD-OLinuXino-7
|
||||
- LCD-OLinuXino-10
|
||||
|
||||
The panel itself contains:
|
||||
- AT24C16C EEPROM holding panel identification and timing requirements
|
||||
- AR1021 resistive touch screen controller (optional)
|
||||
- FT5x6 capacitive touch screnn controller (optional)
|
||||
- GT911/GT928 capacitive touch screen controller (optional)
|
||||
|
||||
The above chips share same I2C bus. The EEPROM is factory preprogrammed with
|
||||
device information (id, serial, etc.) and timing requirements.
|
||||
|
||||
Touchscreen bingings can be found in these files:
|
||||
- input/touchscreen/goodix.txt
|
||||
- input/touchscreen/edt-ft5x06.txt
|
||||
- input/touchscreen/ar1021.txt
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "olimex,lcd-olinuxino"
|
||||
- reg: address of the configuration EEPROM, should be <0x50>
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
|
||||
Optional properties:
|
||||
- enable-gpios: GPIO pin to enable or disable the panel
|
||||
- backlight: phandle of the backlight device attacked to the panel
|
||||
|
||||
Example:
|
||||
&i2c2 {
|
||||
panel@50 {
|
||||
compatible = "olimex,lcd-olinuxino";
|
||||
reg = <0x50>;
|
||||
power-supply = <®_vcc5v0>;
|
||||
enable-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
|
||||
|
||||
maintainers:
|
||||
- Stefan Mavrodiev <stefan@olimex.com>
|
||||
|
||||
description: |
|
||||
This device can be used as bridge between a host controller and LCD panels.
|
||||
Currently supported LCDs are:
|
||||
- LCD-OLinuXino-4.3TS
|
||||
- LCD-OLinuXino-5
|
||||
- LCD-OLinuXino-7
|
||||
- LCD-OLinuXino-10
|
||||
|
||||
The panel itself contains:
|
||||
- AT24C16C EEPROM holding panel identification and timing requirements
|
||||
- AR1021 resistive touch screen controller (optional)
|
||||
- FT5x6 capacitive touch screnn controller (optional)
|
||||
- GT911/GT928 capacitive touch screen controller (optional)
|
||||
|
||||
The above chips share same I2C bus. The EEPROM is factory preprogrammed with
|
||||
device information (id, serial, etc.) and timing requirements.
|
||||
|
||||
Touchscreen bingings can be found in these files:
|
||||
- input/touchscreen/goodix.yaml
|
||||
- input/touchscreen/edt-ft5x06.txt
|
||||
- input/touchscreen/ar1021.txt
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: olimex,lcd-olinuxino
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- power-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@50 {
|
||||
compatible = "olimex,lcd-olinuxino";
|
||||
reg = <0x50>;
|
||||
power-supply = <®_vcc5v0>;
|
||||
enable-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,14 +0,0 @@
|
||||
One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
|
||||
|
||||
The panel is similar to OSD101T2045-53TS, but it needs additional
|
||||
MIPI_DSI_TURN_ON_PERIPHERAL message from the host.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "osddisplays,osd101t2587-53ts"
|
||||
- power-supply: as specified in the base binding
|
||||
|
||||
Optional properties:
|
||||
- backlight: as specified in the base binding
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
@ -63,9 +63,9 @@ properties:
|
||||
|
||||
display-timings:
|
||||
description:
|
||||
Some display panels supports several resolutions with different timing.
|
||||
Some display panels support several resolutions with different timings.
|
||||
The display-timings bindings supports specifying several timings and
|
||||
optional specify which is the native mode.
|
||||
optionally specifying which is the native mode.
|
||||
allOf:
|
||||
- $ref: display-timings.yaml#
|
||||
|
||||
@ -96,6 +96,12 @@ properties:
|
||||
(hot plug detect) signal, but the signal isn't hooked up so we should
|
||||
hardcode the max delay from the panel spec when powering up the panel.
|
||||
|
||||
hpd-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
If Hot Plug Detect (HPD) is connected to a GPIO in the system rather
|
||||
than a dedicated HPD pin the pin can be specified here.
|
||||
|
||||
# Control I/Os
|
||||
|
||||
# Many display panels can be controlled through pins driven by GPIOs. The nature
|
||||
@ -124,6 +130,13 @@ properties:
|
||||
while active. Active high reset signals can be supported by inverting the
|
||||
GPIO specifier polarity flag.
|
||||
|
||||
te-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
GPIO spec for the tearing effect synchronization signal.
|
||||
The tearing effect signal is active high. Active low signals can be
|
||||
supported by inverting the GPIO specifier polarity flag.
|
||||
|
||||
# Power
|
||||
power-supply:
|
||||
description:
|
||||
|
||||
@ -29,6 +29,20 @@ properties:
|
||||
# compatible must be listed in alphabetical order, ordered by compatible.
|
||||
# The description in the comment is mandatory for each compatible.
|
||||
|
||||
# AU Optronics Corporation 8.0" WUXGA TFT LCD panel
|
||||
- auo,b080uan01
|
||||
# Boe Corporation 8.0" WUXGA TFT LCD panel
|
||||
- boe,tv080wum-nl0
|
||||
# Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
|
||||
- kingdisplay,kd097d04
|
||||
# LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
|
||||
- lg,acx467akm-7
|
||||
# LG Corporation 7" WXGA TFT LCD panel
|
||||
- lg,ld070wx3-sl01
|
||||
# One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
|
||||
- osddisplays,osd101t2587-53ts
|
||||
# Panasonic 10" WUXGA TFT LCD panel
|
||||
- panasonic,vvx10f004b00
|
||||
# Panasonic 10" WUXGA TFT LCD panel
|
||||
- panasonic,vvx10f034n00
|
||||
|
||||
|
||||
@ -33,8 +33,6 @@ properties:
|
||||
- ampire,am-480272h3tmqw-t01h
|
||||
# Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel
|
||||
- ampire,am800480r3tmqwa1h
|
||||
# AU Optronics Corporation 8.0" WUXGA TFT LCD panel
|
||||
- auo,b080uan01
|
||||
# AU Optronics Corporation 10.1" WSVGA TFT LCD panel
|
||||
- auo,b101aw03
|
||||
# AU Optronics Corporation 10.1" WSVGA TFT LCD panel
|
||||
@ -55,10 +53,16 @@ properties:
|
||||
- auo,g101evn010
|
||||
# AU Optronics Corporation 10.4" (800x600) color TFT LCD panel
|
||||
- auo,g104sn02
|
||||
# AU Optronics Corporation 12.1" (1280x800) TFT LCD panel
|
||||
- auo,g121ean01
|
||||
# AU Optronics Corporation 13.3" FHD (1920x1080) TFT LCD panel
|
||||
- auo,g133han01
|
||||
# AU Optronics Corporation 15.6" (1366x768) TFT LCD panel
|
||||
- auo,g156xtn01
|
||||
# AU Optronics Corporation 18.5" FHD (1920x1080) TFT LCD panel
|
||||
- auo,g185han01
|
||||
# AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel
|
||||
- auo,g190ean01
|
||||
# AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
|
||||
- auo,p320hvn03
|
||||
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
|
||||
@ -69,10 +73,12 @@ properties:
|
||||
- boe,hv070wsa-100
|
||||
# BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel
|
||||
- boe,nv101wxmn51
|
||||
# BOE NV133FHM-N61 13.3" FHD (1920x1080) TFT LCD Panel
|
||||
- boe,nv133fhm-n61
|
||||
# BOE NV133FHM-N62 13.3" FHD (1920x1080) TFT LCD Panel
|
||||
- boe,nv133fhm-n62
|
||||
# BOE NV140FHM-N49 14.0" FHD a-Si FT panel
|
||||
- boe,nv140fhmn49
|
||||
# Boe Corporation 8.0" WUXGA TFT LCD panel
|
||||
- boe,tv080wum-nl0
|
||||
# CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel
|
||||
- cdtech,s043wq26h-ct7
|
||||
# CDTech(H.K.) Electronics Limited 7" 800x480 color TFT-LCD panel
|
||||
@ -82,6 +88,8 @@ properties:
|
||||
# Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel
|
||||
- chunghwa,claa101wa01a
|
||||
# Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel
|
||||
- chunghwa,claa101wb01
|
||||
# Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel
|
||||
- chunghwa,claa101wb03
|
||||
# DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.
|
||||
- dataimage,scf0700c48ggu18
|
||||
@ -127,6 +135,8 @@ properties:
|
||||
- hannstar,hsd100pxn1
|
||||
# Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel
|
||||
- hit,tx23d38vm0caa
|
||||
# InfoVision Optoelectronics M133NWF4 R0 13.3" FHD (1920x1080) TFT LCD panel
|
||||
- ivo,m133nwf4-r0
|
||||
# Innolux AT043TN24 4.3" WQVGA TFT LCD panel
|
||||
- innolux,at043tn24
|
||||
# Innolux AT070TN92 7.0" WQVGA TFT LCD panel
|
||||
@ -155,6 +165,8 @@ properties:
|
||||
- lemaker,bl035-rgb-002
|
||||
# LG 7" (800x480 pixels) TFT LCD panel
|
||||
- lg,lb070wv8
|
||||
# LG Corporation 5" HD TFT LCD panel
|
||||
- lg,lh500wx1-sd03
|
||||
# LG LP079QX1-SP0V 7.9" (1536x2048 pixels) TFT LCD panel
|
||||
- lg,lp079qx1-sp0v
|
||||
# LG 9.7" (2048x1536 pixels) TFT LCD panel
|
||||
@ -227,6 +239,8 @@ properties:
|
||||
- sharp,ls020b1dd01d
|
||||
# Shelly SCA07010-BFN-LNN 7.0" WVGA TFT LCD panel
|
||||
- shelly,sca07010-bfn-lnn
|
||||
# Starry KR070PE2T 7" WVGA TFT LCD panel
|
||||
- starry,kr070pe2t
|
||||
# Starry 12.2" (1920x1200 pixels) TFT LCD panel
|
||||
- starry,kr122ea0sra
|
||||
# Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel
|
||||
|
||||
@ -1,41 +0,0 @@
|
||||
Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
|
||||
|
||||
Required properties:
|
||||
- compatible: "raydium,rm67191"
|
||||
- reg: virtual channel for MIPI-DSI protocol
|
||||
must be <0>
|
||||
- dsi-lanes: number of DSI lanes to be used
|
||||
must be <3> or <4>
|
||||
- port: input port node with endpoint definition as
|
||||
defined in Documentation/devicetree/bindings/graph.txt;
|
||||
the input port should be connected to a MIPI-DSI device
|
||||
driver
|
||||
|
||||
Optional properties:
|
||||
- reset-gpios: a GPIO spec for the RST_B GPIO pin
|
||||
- v3p3-supply: phandle to 3.3V regulator that powers the VDD_3V3 pin
|
||||
- v1p8-supply: phandle to 1.8V regulator that powers the VDD_1V8 pin
|
||||
- width-mm: see panel-common.txt
|
||||
- height-mm: see panel-common.txt
|
||||
- video-mode: 0 - burst-mode
|
||||
1 - non-burst with sync event
|
||||
2 - non-burst with sync pulse
|
||||
|
||||
Example:
|
||||
|
||||
panel@0 {
|
||||
compatible = "raydium,rm67191";
|
||||
reg = <0>;
|
||||
pinctrl-0 = <&pinctrl_mipi_dsi_0_1_en>;
|
||||
pinctrl-names = "default";
|
||||
reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
||||
dsi-lanes = <4>;
|
||||
width-mm = <68>;
|
||||
height-mm = <121>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&mipi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,75 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/raydium,rm67191.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
|
||||
|
||||
maintainers:
|
||||
- Robert Chiras <robert.chiras@nxp.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: raydium,rm67191
|
||||
|
||||
reg: true
|
||||
port: true
|
||||
reset-gpios: true
|
||||
width-mm: true
|
||||
height-mm: true
|
||||
|
||||
dsi-lanes:
|
||||
description: Number of DSI lanes to be used must be <3> or <4>
|
||||
enum: [3, 4]
|
||||
|
||||
v3p3-supply:
|
||||
description: phandle to 3.3V regulator that powers the VDD_3V3 pin
|
||||
|
||||
v1p8-supply:
|
||||
description: phandle to 1.8V regulator that powers the VDD_1V8 pin
|
||||
|
||||
video-mode:
|
||||
description: |
|
||||
0 - burst-mode
|
||||
1 - non-burst with sync event
|
||||
2 - non-burst with sync pulse
|
||||
enum: [0, 1, 2]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- dsi-lanes
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "raydium,rm67191";
|
||||
reg = <0>;
|
||||
reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
||||
dsi-lanes = <4>;
|
||||
width-mm = <68>;
|
||||
height-mm = <121>;
|
||||
video-mode = <1>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&mipi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -0,0 +1,65 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/samsung,amoled-mipi-dsi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung AMOLED MIPI-DSI panels
|
||||
|
||||
maintainers:
|
||||
- Hoegeun Kwon <hoegeun.kwon@samsung.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
# Samsung S6E63J0X03 1.63" 320x320 AMOLED panel
|
||||
- samsung,s6e63j0x03
|
||||
# Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel
|
||||
- samsung,s6e3ha2
|
||||
# Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel
|
||||
- samsung,s6e3hf2
|
||||
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
enable-gpios: true
|
||||
te-gpios: true
|
||||
|
||||
vdd3-supply:
|
||||
description: I/O voltage supply
|
||||
|
||||
vci-supply:
|
||||
description: voltage supply for analog circuits
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd3-supply
|
||||
- vci-supply
|
||||
- reset-gpios
|
||||
- enable-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "samsung,s6e3ha2";
|
||||
reg = <0>;
|
||||
vdd3-supply = <&ldo27_reg>;
|
||||
vci-supply = <&ldo28_reg>;
|
||||
reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
|
||||
enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
|
||||
te-gpios = <&gpf1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,66 +0,0 @@
|
||||
Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus
|
||||
|
||||
Required properties:
|
||||
- compatible: "samsung,ld9040"
|
||||
- reg: address of the panel on SPI bus
|
||||
- vdd3-supply: core voltage supply
|
||||
- vci-supply: voltage supply for analog circuits
|
||||
- reset-gpios: a GPIO spec for the reset pin
|
||||
- display-timings: timings for the connected panel according to [1]
|
||||
|
||||
The panel must obey rules for SPI slave device specified in document [2].
|
||||
|
||||
Optional properties:
|
||||
- power-on-delay: delay after turning regulators on [ms]
|
||||
- reset-delay: delay after reset sequence [ms]
|
||||
- panel-width-mm: physical panel width [mm]
|
||||
- panel-height-mm: physical panel height [mm]
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in [3]. This
|
||||
node should describe panel's video bus.
|
||||
|
||||
[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt
|
||||
[2]: Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
[3]: Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
|
||||
Example:
|
||||
|
||||
lcd@0 {
|
||||
compatible = "samsung,ld9040";
|
||||
reg = <0>;
|
||||
vdd3-supply = <&ldo7_reg>;
|
||||
vci-supply = <&ldo17_reg>;
|
||||
reset-gpios = <&gpy4 5 0>;
|
||||
spi-max-frequency = <1200000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
power-on-delay = <10>;
|
||||
reset-delay = <10>;
|
||||
panel-width-mm = <90>;
|
||||
panel-height-mm = <154>;
|
||||
|
||||
display-timings {
|
||||
timing {
|
||||
clock-frequency = <23492370>;
|
||||
hactive = <480>;
|
||||
vactive = <800>;
|
||||
hback-porch = <16>;
|
||||
hfront-porch = <16>;
|
||||
vback-porch = <2>;
|
||||
vfront-porch = <28>;
|
||||
hsync-len = <2>;
|
||||
vsync-len = <1>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
lcd_ep: endpoint {
|
||||
remote-endpoint = <&fimd_dpi_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,107 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/samsung,ld9040.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Andrzej Hajda <a.hajda@samsung.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,ld9040
|
||||
|
||||
display-timings: true
|
||||
port: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
vdd3-supply:
|
||||
description: core voltage supply
|
||||
|
||||
vci-supply:
|
||||
description: voltage supply for analog circuits
|
||||
|
||||
power-on-delay:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: delay after turning regulators on [ms]
|
||||
|
||||
reset-delay:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: delay after reset sequence [ms]
|
||||
|
||||
panel-width-mm:
|
||||
description: physical panel width [mm]
|
||||
|
||||
panel-height-mm:
|
||||
description: physical panel height [mm]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd3-supply
|
||||
- vci-supply
|
||||
- reset-gpios
|
||||
- display-timings
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcd@0 {
|
||||
compatible = "samsung,ld9040";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg = <0>;
|
||||
vdd3-supply = <&ldo7_reg>;
|
||||
vci-supply = <&ldo17_reg>;
|
||||
reset-gpios = <&gpy4 5 0>;
|
||||
spi-max-frequency = <1200000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
power-on-delay = <10>;
|
||||
reset-delay = <10>;
|
||||
panel-width-mm = <90>;
|
||||
panel-height-mm = <154>;
|
||||
|
||||
display-timings {
|
||||
timing {
|
||||
clock-frequency = <23492370>;
|
||||
hactive = <480>;
|
||||
vactive = <800>;
|
||||
hback-porch = <16>;
|
||||
hfront-porch = <16>;
|
||||
vback-porch = <2>;
|
||||
vfront-porch = <28>;
|
||||
hsync-len = <2>;
|
||||
vsync-len = <1>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
lcd_ep: endpoint {
|
||||
remote-endpoint = <&fimd_dpi_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,30 +0,0 @@
|
||||
Samsung S6D16D0 4" 864x480 AMOLED panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be:
|
||||
"samsung,s6d16d0",
|
||||
- reg: the virtual channel number of a DSI peripheral
|
||||
- vdd1-supply: I/O voltage supply
|
||||
- reset-gpios: a GPIO spec for the reset pin (active low)
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in
|
||||
media/video-interfaces.txt. This node should describe panel's video bus.
|
||||
|
||||
Example:
|
||||
&dsi {
|
||||
...
|
||||
|
||||
panel@0 {
|
||||
compatible = "samsung,s6d16d0";
|
||||
reg = <0>;
|
||||
vdd1-supply = <&foo>;
|
||||
reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,56 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/samsung,s6d16d0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S6D16D0 4" 864x480 AMOLED panel
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,s6d16d0
|
||||
|
||||
port: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
vdd1-supply:
|
||||
description: I/O voltage supply
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd1-supply
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "samsung,s6d16d0";
|
||||
reg = <0>;
|
||||
vdd1-supply = <&foo>;
|
||||
reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,31 +0,0 @@
|
||||
Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel
|
||||
Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of:
|
||||
"samsung,s6e3ha2",
|
||||
"samsung,s6e3hf2".
|
||||
- reg: the virtual channel number of a DSI peripheral
|
||||
- vdd3-supply: I/O voltage supply
|
||||
- vci-supply: voltage supply for analog circuits
|
||||
- reset-gpios: a GPIO spec for the reset pin (active low)
|
||||
- enable-gpios: a GPIO spec for the panel enable pin (active high)
|
||||
|
||||
Optional properties:
|
||||
- te-gpios: a GPIO spec for the tearing effect synchronization signal
|
||||
gpio pin (active high)
|
||||
|
||||
Example:
|
||||
&dsi {
|
||||
...
|
||||
|
||||
panel@0 {
|
||||
compatible = "samsung,s6e3ha2";
|
||||
reg = <0>;
|
||||
vdd3-supply = <&ldo27_reg>;
|
||||
vci-supply = <&ldo28_reg>;
|
||||
reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
|
||||
enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
|
||||
te-gpios = <&gpf1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -1,24 +0,0 @@
|
||||
Samsung S6E63J0X03 1.63" 320x320 AMOLED panel (interface: MIPI-DSI command mode)
|
||||
|
||||
Required properties:
|
||||
- compatible: "samsung,s6e63j0x03"
|
||||
- reg: the virtual channel number of a DSI peripheral
|
||||
- vdd3-supply: I/O voltage supply
|
||||
- vci-supply: voltage supply for analog circuits
|
||||
- reset-gpios: a GPIO spec for the reset pin (active low)
|
||||
- te-gpios: a GPIO spec for the tearing effect synchronization signal
|
||||
gpio pin (active high)
|
||||
|
||||
Example:
|
||||
&dsi {
|
||||
...
|
||||
|
||||
panel@0 {
|
||||
compatible = "samsung,s6e63j0x03";
|
||||
reg = <0>;
|
||||
vdd3-supply = <&ldo16_reg>;
|
||||
vci-supply = <&ldo20_reg>;
|
||||
reset-gpios = <&gpe0 1 GPIO_ACTIVE_LOW>;
|
||||
te-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -1,33 +0,0 @@
|
||||
Samsung s6e63m0 AMOLED LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: "samsung,s6e63m0"
|
||||
- reset-gpios: GPIO spec for reset pin
|
||||
- vdd3-supply: VDD regulator
|
||||
- vci-supply: VCI regulator
|
||||
|
||||
The panel must obey rules for SPI slave device specified in document [1].
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in [2]. This
|
||||
node should describe panel's video bus.
|
||||
|
||||
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
|
||||
Example:
|
||||
|
||||
s6e63m0: display@0 {
|
||||
compatible = "samsung,s6e63m0";
|
||||
reg = <0>;
|
||||
reset-gpio = <&mp05 5 1>;
|
||||
vdd3-supply = <&ldo12_reg>;
|
||||
vci-supply = <&ldo11_reg>;
|
||||
spi-max-frequency = <1200000>;
|
||||
|
||||
port {
|
||||
lcd_ep: endpoint {
|
||||
remote-endpoint = <&fimd_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,60 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/samsung,s6e63m0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung s6e63m0 AMOLED LCD panel
|
||||
|
||||
maintainers:
|
||||
- Jonathan Bakker <xc-racer2@live.ca>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: samsung,s6e63m0
|
||||
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
port: true
|
||||
|
||||
vdd3-supply:
|
||||
description: VDD regulator
|
||||
|
||||
vci-supply:
|
||||
description: VCI regulator
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reset-gpios
|
||||
- vdd3-supply
|
||||
- vci-supply
|
||||
- port
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
display@0 {
|
||||
compatible = "samsung,s6e63m0";
|
||||
reg = <0>;
|
||||
reset-gpios = <&mp05 5 1>;
|
||||
vdd3-supply = <&ldo12_reg>;
|
||||
vci-supply = <&ldo11_reg>;
|
||||
spi-max-frequency = <1200000>;
|
||||
|
||||
port {
|
||||
lcd_ep: endpoint {
|
||||
remote-endpoint = <&fimd_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,23 +0,0 @@
|
||||
Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) TFT with Touch-Panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sii,43wvf1g".
|
||||
- "dvdd-supply": 3v3 digital regulator.
|
||||
- "avdd-supply": 5v analog regulator.
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle for the backlight control.
|
||||
|
||||
Example:
|
||||
|
||||
panel {
|
||||
compatible = "sii,43wvf1g";
|
||||
backlight = <&backlight_display>;
|
||||
dvdd-supply = <®_lcd_3v3>;
|
||||
avdd-supply = <®_lcd_5v>;
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&display_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/seiko,43wvf1g.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) TFT with Touch-Panel
|
||||
|
||||
maintainers:
|
||||
- Marco Franchi <marco.franchi@nxp.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sii,43wvf1g
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
dvdd-supply:
|
||||
description: 3v3 digital regulator
|
||||
|
||||
avdd-supply:
|
||||
description: 5v analog regulator
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- dvdd-supply
|
||||
- avdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
panel {
|
||||
compatible = "sii,43wvf1g";
|
||||
|
||||
backlight = <&backlight_display>;
|
||||
dvdd-supply = <®_lcd_3v3>;
|
||||
avdd-supply = <®_lcd_5v>;
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&display_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,36 +0,0 @@
|
||||
Sharp 15" LQ150X1LG11 XGA TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sharp,lq150x1lg11"
|
||||
- power-supply: regulator to provide the VCC supply voltage (3.3 volts)
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device
|
||||
- rlud-gpios: a single GPIO for the RL/UD (rotate 180 degrees) pin.
|
||||
- sellvds-gpios: a single GPIO for the SELLVDS pin.
|
||||
|
||||
If rlud-gpios and/or sellvds-gpios are not specified, the RL/UD and/or SELLVDS
|
||||
pins are assumed to be handled appropriately by the hardware.
|
||||
|
||||
Example:
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm 0 100000>; /* VBR */
|
||||
|
||||
brightness-levels = <0 20 40 60 80 100>;
|
||||
default-brightness-level = <2>;
|
||||
|
||||
power-supply = <&vdd_12v_reg>; /* VDD */
|
||||
enable-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; /* XSTABY */
|
||||
};
|
||||
|
||||
panel {
|
||||
compatible = "sharp,lq150x1lg11";
|
||||
|
||||
power-supply = <&vcc_3v3_reg>; /* VCC */
|
||||
|
||||
backlight = <&backlight>;
|
||||
rlud-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* RL/UD */
|
||||
sellvds-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; /* SELLVDS */
|
||||
};
|
||||
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sharp,lq150x1lg11.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sharp 15" LQ150X1LG11 XGA TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Peter Rosin <peda@axentia.se>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sharp,lq150x1lg11
|
||||
|
||||
power-supply: true
|
||||
backlight: true
|
||||
|
||||
rlud-gpios:
|
||||
maxItems: 1
|
||||
description: |
|
||||
GPIO for the RL/UD (rotate 180 degrees) pin.
|
||||
If rlud-gpios and/or sellvds-gpios are not specified,
|
||||
the RL/UD and/or SELLVDS pins are assumed to be handled
|
||||
appropriately by the hardware.
|
||||
|
||||
sellvds-gpios:
|
||||
maxItems: 1
|
||||
description: |
|
||||
GPIO for the SELLVDS pin.
|
||||
If rlud-gpios and/or sellvds-gpios are not specified,
|
||||
the RL/UD and/or SELLVDS pins are assumed to be handled
|
||||
appropriately by the hardware.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- power-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
panel {
|
||||
compatible = "sharp,lq150x1lg11";
|
||||
|
||||
power-supply = <&vcc_3v3_reg>; /* VCC */
|
||||
|
||||
backlight = <&backlight>;
|
||||
rlud-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; /* RL/UD */
|
||||
sellvds-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; /* SELLVDS */
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,43 +0,0 @@
|
||||
SHARP LS037V7DW01 TFT-LCD panel
|
||||
===================================
|
||||
|
||||
Required properties:
|
||||
- compatible: "sharp,ls037v7dw01"
|
||||
|
||||
Optional properties:
|
||||
- label: a symbolic name for the panel
|
||||
- enable-gpios: a GPIO spec for the optional enable pin.
|
||||
This pin is the INI pin as specified in the LS037V7DW01.pdf file.
|
||||
- reset-gpios: a GPIO spec for the optional reset pin.
|
||||
This pin is the RESB pin as specified in the LS037V7DW01.pdf file.
|
||||
- mode-gpios: a GPIO
|
||||
ordered MO, LR, and UD as specified in the LS037V7DW01.pdf file.
|
||||
|
||||
Required nodes:
|
||||
- Video port for DPI input
|
||||
|
||||
This panel can have zero to five GPIOs to configure to change configuration
|
||||
between QVGA and VGA mode and the scan direction. As these pins can be also
|
||||
configured with external pulls, all the GPIOs are considered optional with holes
|
||||
in the array.
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
Example when connected to a omap2+ based device:
|
||||
|
||||
lcd0: display {
|
||||
compatible = "sharp,ls037v7dw01";
|
||||
power-supply = <&lcd_3v3>;
|
||||
enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; /* gpio152, lcd INI */
|
||||
reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
|
||||
mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */
|
||||
&gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
|
||||
&gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,68 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sharp,ls037v7dw01.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SHARP LS037V7DW01 TFT-LCD panel
|
||||
|
||||
description: |
|
||||
This panel can have zero to five GPIOs to configure to change configuration
|
||||
between QVGA and VGA mode and the scan direction. As these pins can be also
|
||||
configured with external pulls, all the GPIOs are considered optional with holes
|
||||
in the array.
|
||||
|
||||
maintainers:
|
||||
- Tony Lindgren <tony@atomide.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sharp,ls037v7dw01
|
||||
|
||||
label: true
|
||||
enable-gpios: true
|
||||
reset-gpios: true
|
||||
port: true
|
||||
power-supply: true
|
||||
|
||||
mode-gpios:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
description: |
|
||||
GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf
|
||||
This panel can have zero to three GPIOs to configure to
|
||||
change configuration between QVGA and VGA mode and the
|
||||
scan direction. As these pins can be also configured
|
||||
with external pulls, all the GPIOs are considered
|
||||
optional with holes in the array.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
lcd0: display {
|
||||
compatible = "sharp,ls037v7dw01";
|
||||
power-supply = <&lcd_3v3>;
|
||||
enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; /* gpio152, lcd INI */
|
||||
reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
|
||||
mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */
|
||||
&gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
|
||||
&gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,22 +0,0 @@
|
||||
Sharp Microelectronics 4.3" qHD TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sharp,ls043t1le01-qhd"
|
||||
- reg: DSI virtual channel of the peripheral
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
- reset-gpios: a GPIO spec for the reset pin
|
||||
|
||||
Example:
|
||||
|
||||
mdss_dsi@fd922800 {
|
||||
panel@0 {
|
||||
compatible = "sharp,ls043t1le01-qhd";
|
||||
reg = <0>;
|
||||
avdd-supply = <&pm8941_l22>;
|
||||
backlight = <&pm8941_wled>;
|
||||
reset-gpios = <&pm8941_gpios 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,51 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sharp,ls043t1le01.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sharp Microelectronics 4.3" qHD TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Werner Johansson <werner.johansson@sonymobile.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sharp,ls043t1le01-qhd
|
||||
|
||||
reg: true
|
||||
backlight: true
|
||||
reset-gpios: true
|
||||
port: true
|
||||
|
||||
avdd-supply:
|
||||
description: handle of the regulator that provides the supply voltage
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "sharp,ls043t1le01-qhd";
|
||||
reg = <0>;
|
||||
avdd-supply = <&pm8941_l22>;
|
||||
backlight = <&pm8941_wled>;
|
||||
reset-gpios = <&pm8941_gpios 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1 +0,0 @@
|
||||
See panel-common.yaml in this directory.
|
||||
@ -1,30 +0,0 @@
|
||||
Sitronix ST7701 based LCD panels
|
||||
|
||||
ST7701 designed for small and medium sizes of TFT LCD display, is
|
||||
capable of supporting up to 480RGBX864 in resolution. It provides
|
||||
several system interfaces like MIPI/RGB/SPI.
|
||||
|
||||
Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
|
||||
inbuilt ST7701 chip.
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "sitronix,st7701" and one of
|
||||
* "techstar,ts8550b"
|
||||
- reset-gpios: a GPIO phandle for the reset pin
|
||||
|
||||
Required properties for techstar,ts8550b:
|
||||
- reg: DSI virtual channel used by that screen
|
||||
- VCC-supply: analog regulator for MIPI circuit
|
||||
- IOVCC-supply: I/O system regulator
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle for the backlight control.
|
||||
|
||||
panel@0 {
|
||||
compatible = "techstar,ts8550b", "sitronix,st7701";
|
||||
reg = <0>;
|
||||
VCC-supply = <®_dldo2>;
|
||||
IOVCC-supply = <®_dldo2>;
|
||||
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
@ -0,0 +1,69 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sitronix,st7701.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sitronix ST7701 based LCD panels
|
||||
|
||||
maintainers:
|
||||
- Jagan Teki <jagan@amarulasolutions.com>
|
||||
|
||||
description: |
|
||||
ST7701 designed for small and medium sizes of TFT LCD display, is
|
||||
capable of supporting up to 480RGBX864 in resolution. It provides
|
||||
several system interfaces like MIPI/RGB/SPI.
|
||||
|
||||
Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
|
||||
inbuilt ST7701 chip.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- techstar,ts8550b
|
||||
- const: sitronix,st7701
|
||||
|
||||
reg:
|
||||
description: DSI virtual channel used by that screen
|
||||
maxItems: 1
|
||||
|
||||
VCC-supply:
|
||||
description: analog regulator for MIPI circuit
|
||||
|
||||
IOVCC-supply:
|
||||
description: I/O system regulator
|
||||
|
||||
reset-gpios: true
|
||||
|
||||
backlight: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- VCC-supply
|
||||
- IOVCC-supply
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "techstar,ts8550b", "sitronix,st7701";
|
||||
reg = <0>;
|
||||
VCC-supply = <®_dldo2>;
|
||||
IOVCC-supply = <®_dldo2>;
|
||||
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
|
||||
backlight = <&backlight>;
|
||||
};
|
||||
};
|
||||
@ -1,37 +0,0 @@
|
||||
Sitronix ST7789V RGB panel with SPI control bus
|
||||
|
||||
Required properties:
|
||||
- compatible: "sitronix,st7789v"
|
||||
- reg: Chip select of the panel on the SPI bus
|
||||
- reset-gpios: a GPIO phandle for the reset pin
|
||||
- power-supply: phandle of the regulator that provides the supply voltage
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle to the backlight used
|
||||
|
||||
The generic bindings for the SPI slaves documented in [1] also applies
|
||||
|
||||
The device node can contain one 'port' child node with one child
|
||||
'endpoint' node, according to the bindings defined in [2]. This
|
||||
node should describe panel's video bus.
|
||||
|
||||
[1]: Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
[2]: Documentation/devicetree/bindings/graph.txt
|
||||
|
||||
Example:
|
||||
|
||||
panel@0 {
|
||||
compatible = "sitronix,st7789v";
|
||||
reg = <0>;
|
||||
reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>;
|
||||
backlight = <&pwm_bl>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
remote-endpoint = <&tcon0_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,63 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sitronix,st7789v.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sitronix ST7789V RGB panel with SPI control bus
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sitronix,st7789v
|
||||
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
power-supply: true
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reset-gpios
|
||||
- power-supply
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "sitronix,st7789v";
|
||||
reg = <0>;
|
||||
reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>;
|
||||
backlight = <&pwm_bl>;
|
||||
power-supply = <&power>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
remote-endpoint = <&tcon0_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,30 +0,0 @@
|
||||
Sony ACX565AKM SDI Panel
|
||||
========================
|
||||
|
||||
Required properties:
|
||||
- compatible: "sony,acx565akm"
|
||||
|
||||
Optional properties:
|
||||
- label: a symbolic name for the panel
|
||||
- reset-gpios: panel reset gpio
|
||||
|
||||
Required nodes:
|
||||
- Video port for SDI input
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
acx565akm@2 {
|
||||
compatible = "sony,acx565akm";
|
||||
spi-max-frequency = <6000000>;
|
||||
reg = <2>;
|
||||
|
||||
label = "lcd";
|
||||
reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&sdi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,57 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/sony,acx565akm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sony ACX565AKM SDI Panel
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sony,acx565akm
|
||||
|
||||
label: true
|
||||
reset-gpios: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- port
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@2 {
|
||||
compatible = "sony,acx565akm";
|
||||
spi-max-frequency = <6000000>;
|
||||
reg = <2>;
|
||||
|
||||
label = "lcd";
|
||||
reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&sdi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,4 +0,0 @@
|
||||
Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "startek,startek-kd050c"
|
||||
@ -0,0 +1,33 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/startek,startek-kd050c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel
|
||||
|
||||
maintainers:
|
||||
- Nikita Kiryanov <nikita@compulab.co.il>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-dpi.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: startek,startek-kd050c
|
||||
- {} # panel-dpi, but not listed here to avoid false select
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
height-mm: true
|
||||
label: true
|
||||
panel-timing: true
|
||||
port: true
|
||||
power-supply: true
|
||||
reset-gpios: true
|
||||
width-mm: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
...
|
||||
65
Documentation/devicetree/bindings/display/panel/tpo,td.yaml
Normal file
65
Documentation/devicetree/bindings/display/panel/tpo,td.yaml
Normal file
@ -0,0 +1,65 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/tpo,td.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Toppoly TD Panels
|
||||
|
||||
description: |
|
||||
The panel must obey the rules for a SPI slave device as specified in
|
||||
spi/spi-controller.yaml
|
||||
|
||||
maintainers:
|
||||
- Marek Belisko <marek@goldelico.com>
|
||||
- H. Nikolaus Schaller <hns@goldelico.com>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
# Toppoly TD028TTEC1 Panel
|
||||
- tpo,td028ttec1
|
||||
# Toppoly TD043MTEA1 Panel
|
||||
- tpo,td043mtea1
|
||||
|
||||
reg: true
|
||||
label: true
|
||||
reset-gpios: true
|
||||
backlight: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- port
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel: panel@0 {
|
||||
compatible = "tpo,td043mtea1";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
label = "lcd";
|
||||
|
||||
reset-gpios = <&gpio7 7 0>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,32 +0,0 @@
|
||||
Toppoly TD028TTEC1 Panel
|
||||
========================
|
||||
|
||||
Required properties:
|
||||
- compatible: "tpo,td028ttec1"
|
||||
|
||||
Optional properties:
|
||||
- label: a symbolic name for the panel
|
||||
- backlight: phandle of the backlight device
|
||||
|
||||
Required nodes:
|
||||
- Video port for DPI input
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
lcd-panel: td028ttec1@0 {
|
||||
compatible = "tpo,td028ttec1";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
label = "lcd";
|
||||
backlight = <&backlight>;
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -1,33 +0,0 @@
|
||||
TPO TD043MTEA1 Panel
|
||||
====================
|
||||
|
||||
Required properties:
|
||||
- compatible: "tpo,td043mtea1"
|
||||
- reset-gpios: panel reset gpio
|
||||
|
||||
Optional properties:
|
||||
- label: a symbolic name for the panel
|
||||
|
||||
Required nodes:
|
||||
- Video port for DPI input
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
lcd-panel: panel@0 {
|
||||
compatible = "tpo,td043mtea1";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
label = "lcd";
|
||||
|
||||
reset-gpios = <&gpio7 7 0>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,57 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/visionox,rm69299.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Visionox model RM69299 Panels Device Tree Bindings.
|
||||
|
||||
maintainers:
|
||||
- Harigovindan P <harigovi@codeaurora.org>
|
||||
|
||||
description: |
|
||||
This binding is for display panels using a Visionox RM692999 panel.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: visionox,rm69299-1080p-display
|
||||
|
||||
vdda-supply:
|
||||
description: |
|
||||
Phandle of the regulator that provides the vdda supply voltage.
|
||||
|
||||
vdd3p3-supply:
|
||||
description: |
|
||||
Phandle of the regulator that provides the vdd3p3 supply voltage.
|
||||
|
||||
port: true
|
||||
reset-gpios: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- vdda-supply
|
||||
- vdd3p3-supply
|
||||
- reset-gpios
|
||||
- port
|
||||
|
||||
examples:
|
||||
- |
|
||||
panel {
|
||||
compatible = "visionox,rm69299-1080p-display";
|
||||
|
||||
vdda-supply = <&src_pp1800_l8c>;
|
||||
vdd3p3-supply = <&src_pp2800_l18a>;
|
||||
|
||||
reset-gpios = <&pm6150l_gpio 3 0>;
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -50,6 +50,14 @@ Required Properties:
|
||||
VSP instance that serves the DU channel, and the channel index identifies
|
||||
the LIF instance in that VSP.
|
||||
|
||||
Optional properties:
|
||||
- resets: A list of phandle + reset-specifier pairs, one for each entry in
|
||||
the reset-names property.
|
||||
- reset-names: Names of the resets. This property is model-dependent.
|
||||
- All but R8A7779 use one reset for a group of one or more successive
|
||||
channels. The resets must be named "du.x" with "x" being the numerical
|
||||
index of the lowest channel in the group.
|
||||
|
||||
Required nodes:
|
||||
|
||||
The connections to the DU output video ports are modeled using the OF graph
|
||||
@ -96,6 +104,8 @@ Example: R8A7795 (R-Car H3) ES2.0 DU
|
||||
<&cpg CPG_MOD 722>,
|
||||
<&cpg CPG_MOD 721>;
|
||||
clock-names = "du.0", "du.1", "du.2", "du.3";
|
||||
resets = <&cpg 724>, <&cpg 722>;
|
||||
reset-names = "du.0", "du.2";
|
||||
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
|
||||
renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
|
||||
|
||||
|
||||
@ -1,72 +0,0 @@
|
||||
Rockchip specific extensions for rk3066 HDMI
|
||||
============================================
|
||||
|
||||
Required properties:
|
||||
- compatible:
|
||||
"rockchip,rk3066-hdmi";
|
||||
- reg:
|
||||
Physical base address and length of the controller's registers.
|
||||
- clocks, clock-names:
|
||||
Phandle to HDMI controller clock, name should be "hclk".
|
||||
- interrupts:
|
||||
HDMI interrupt number.
|
||||
- power-domains:
|
||||
Phandle to the RK3066_PD_VIO power domain.
|
||||
- rockchip,grf:
|
||||
This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
|
||||
- ports:
|
||||
Contains one port node with two endpoints, numbered 0 and 1,
|
||||
connected respectively to vop0 and vop1.
|
||||
Contains one port node with one endpoint
|
||||
connected to a hdmi-connector node.
|
||||
- pinctrl-0, pinctrl-name:
|
||||
Switch the iomux for the HPD/I2C pins to HDMI function.
|
||||
|
||||
Example:
|
||||
hdmi: hdmi@10116000 {
|
||||
compatible = "rockchip,rk3066-hdmi";
|
||||
reg = <0x10116000 0x2000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HDMI>;
|
||||
clock-names = "hclk";
|
||||
power-domains = <&power RK3066_PD_VIO>;
|
||||
rockchip,grf = <&grf>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in: port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in_vop0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vop0_out_hdmi>;
|
||||
};
|
||||
hdmi_in_vop1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&vop1_out_hdmi>;
|
||||
};
|
||||
};
|
||||
hdmi_out: port@1 {
|
||||
reg = <1>;
|
||||
hdmi_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
hdmi {
|
||||
hdmi_hpd: hdmi-hpd {
|
||||
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
|
||||
};
|
||||
hdmii2c_xfer: hdmii2c-xfer {
|
||||
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
|
||||
<0 RK_PA2 1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,140 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Rockchip rk3066 HDMI controller
|
||||
|
||||
maintainers:
|
||||
- Sandy Huang <hjc@rock-chips.com>
|
||||
- Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rockchip,rk3066-hdmi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: hclk
|
||||
|
||||
pinctrl-0:
|
||||
maxItems: 2
|
||||
|
||||
pinctrl-names:
|
||||
const: default
|
||||
description:
|
||||
Switch the iomux for the HPD/I2C pins to HDMI function.
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
rockchip,grf:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description:
|
||||
Port node with two endpoints, numbered 0 and 1,
|
||||
connected respectively to vop0 and vop1.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description:
|
||||
Port node with one endpoint connected to a hdmi-connector node.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- pinctrl-0
|
||||
- pinctrl-names
|
||||
- power-domains
|
||||
- rockchip,grf
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rk3066a-cru.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/power/rk3066-power.h>
|
||||
hdmi: hdmi@10116000 {
|
||||
compatible = "rockchip,rk3066-hdmi";
|
||||
reg = <0x10116000 0x2000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HDMI>;
|
||||
clock-names = "hclk";
|
||||
pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
|
||||
pinctrl-names = "default";
|
||||
power-domains = <&power RK3066_PD_VIO>;
|
||||
rockchip,grf = <&grf>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in: port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in_vop0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vop0_out_hdmi>;
|
||||
};
|
||||
hdmi_in_vop1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&vop1_out_hdmi>;
|
||||
};
|
||||
};
|
||||
hdmi_out: port@1 {
|
||||
reg = <1>;
|
||||
hdmi_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi_con_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
hdmi {
|
||||
hdmi_hpd: hdmi-hpd {
|
||||
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
|
||||
};
|
||||
hdmii2c_xfer: hdmii2c-xfer {
|
||||
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
|
||||
<0 RK_PA2 1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,74 +0,0 @@
|
||||
device-tree bindings for rockchip soc display controller (vop)
|
||||
|
||||
VOP (Visual Output Processor) is the Display Controller for the Rockchip
|
||||
series of SoCs which transfers the image data from a video memory
|
||||
buffer to an external LCD interface.
|
||||
|
||||
Required properties:
|
||||
- compatible: value should be one of the following
|
||||
"rockchip,rk3036-vop";
|
||||
"rockchip,rk3126-vop";
|
||||
"rockchip,px30-vop-lit";
|
||||
"rockchip,px30-vop-big";
|
||||
"rockchip,rk3066-vop";
|
||||
"rockchip,rk3188-vop";
|
||||
"rockchip,rk3288-vop";
|
||||
"rockchip,rk3368-vop";
|
||||
"rockchip,rk3366-vop";
|
||||
"rockchip,rk3399-vop-big";
|
||||
"rockchip,rk3399-vop-lit";
|
||||
"rockchip,rk3228-vop";
|
||||
"rockchip,rk3328-vop";
|
||||
|
||||
- reg: Must contain one entry corresponding to the base address and length
|
||||
of the register space. Can optionally contain a second entry
|
||||
corresponding to the CRTC gamma LUT address.
|
||||
|
||||
- interrupts: should contain a list of all VOP IP block interrupts in the
|
||||
order: VSYNC, LCD_SYSTEM. The interrupt specifier
|
||||
format depends on the interrupt controller used.
|
||||
|
||||
- clocks: must include clock specifiers corresponding to entries in the
|
||||
clock-names property.
|
||||
|
||||
- clock-names: Must contain
|
||||
aclk_vop: for ddr buffer transfer.
|
||||
hclk_vop: for ahb bus to R/W the phy regs.
|
||||
dclk_vop: pixel clock.
|
||||
|
||||
- resets: Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names: Must include the following entries:
|
||||
- axi
|
||||
- ahb
|
||||
- dclk
|
||||
|
||||
- iommus: required a iommu node
|
||||
|
||||
- port: A port node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
|
||||
Example:
|
||||
SoC specific DT entry:
|
||||
vopb: vopb@ff930000 {
|
||||
compatible = "rockchip,rk3288-vop";
|
||||
reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
|
||||
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
|
||||
resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
|
||||
reset-names = "axi", "ahb", "dclk";
|
||||
iommus = <&vopb_mmu>;
|
||||
vopb_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
vopb_out_edp: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint=<&edp_in_vopb>;
|
||||
};
|
||||
vopb_out_hdmi: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint=<&hdmi_in_vopb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,134 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Rockchip SoC display controller (VOP)
|
||||
|
||||
description:
|
||||
VOP (Video Output Processor) is the display controller for the Rockchip
|
||||
series of SoCs which transfers the image data from a video memory
|
||||
buffer to an external LCD interface.
|
||||
|
||||
maintainers:
|
||||
- Sandy Huang <hjc@rock-chips.com>
|
||||
- Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- rockchip,px30-vop-big
|
||||
- rockchip,px30-vop-lit
|
||||
- rockchip,rk3036-vop
|
||||
- rockchip,rk3066-vop
|
||||
- rockchip,rk3126-vop
|
||||
- rockchip,rk3188-vop
|
||||
- rockchip,rk3228-vop
|
||||
- rockchip,rk3288-vop
|
||||
- rockchip,rk3328-vop
|
||||
- rockchip,rk3366-vop
|
||||
- rockchip,rk3368-vop
|
||||
- rockchip,rk3399-vop-big
|
||||
- rockchip,rk3399-vop-lit
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
items:
|
||||
- description:
|
||||
Must contain one entry corresponding to the base address and length
|
||||
of the register space.
|
||||
- description:
|
||||
Can optionally contain a second entry corresponding to
|
||||
the CRTC gamma LUT address.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description:
|
||||
The VOP interrupt is shared by several interrupt sources, such as
|
||||
frame start (VSYNC), line flag and other status interrupts.
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Clock for ddr buffer transfer.
|
||||
- description: Pixel clock.
|
||||
- description: Clock for the ahb bus to R/W the phy regs.
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: aclk_vop
|
||||
- const: dclk_vop
|
||||
- const: hclk_vop
|
||||
|
||||
resets:
|
||||
maxItems: 3
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: axi
|
||||
- const: ahb
|
||||
- const: dclk
|
||||
|
||||
port:
|
||||
type: object
|
||||
description:
|
||||
A port node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 2
|
||||
|
||||
assigned-clock-rates:
|
||||
maxItems: 2
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rk3288-cru.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/power/rk3288-power.h>
|
||||
vopb: vopb@ff930000 {
|
||||
compatible = "rockchip,rk3288-vop";
|
||||
reg = <0x0 0xff930000 0x0 0x19c>,
|
||||
<0x0 0xff931000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru ACLK_VOP0>,
|
||||
<&cru DCLK_VOP0>,
|
||||
<&cru HCLK_VOP0>;
|
||||
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
|
||||
power-domains = <&power RK3288_PD_VIO>;
|
||||
resets = <&cru SRST_LCDC1_AXI>,
|
||||
<&cru SRST_LCDC1_AHB>,
|
||||
<&cru SRST_LCDC1_DCLK>;
|
||||
reset-names = "axi", "ahb", "dclk";
|
||||
iommus = <&vopb_mmu>;
|
||||
vopb_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
vopb_out_edp: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint=<&edp_in_vopb>;
|
||||
};
|
||||
vopb_out_hdmi: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint=<&hdmi_in_vopb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user