ARM: dts: turris-omnia: Fix mpp26 pin name and comment
[ Upstream commit 49e93898f0dc177e645c22d0664813567fd9ec00 ]
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.
Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.
Fixes: 26ca8b52d6
("ARM: dts: add support for Turris Omnia")
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -307,7 +307,7 @@ spi0cs0_pins: spi0cs0-pins {
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marvell,function = "spi0";
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};
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spi0cs1_pins: spi0cs1-pins {
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spi0cs2_pins: spi0cs2-pins {
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marvell,pins = "mpp26";
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marvell,function = "spi0";
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};
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@ -342,7 +342,7 @@ partition@100000 {
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};
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};
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/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
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/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
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};
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&uart0 {
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