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Merge "drivers: dcvs: pmu_lib: Pass physical CPUs to CPUCP"

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qctecmdr 2023-09-11 22:56:29 -07:00 committed by Gerrit - the friendly Code Review server
commit 2e4b813973
1 changed files with 16 additions and 1 deletions
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17
drivers/soc/qcom/dcvs/pmu_lib.c
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@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define pr_fmt(fmt) "qcom-pmu: " fmt
@ -34,6 +35,7 @@
#define MAX_PMU_EVS QCOM_PMU_MAX_EVS
#define INVALID_ID 0xFF
static void __iomem *pmu_base;
static uint32_t phys_cpu[NR_CPUS];
struct evctrs_64 {
u64 evctrs[MAX_CPUCP_EVT];
@ -479,7 +481,7 @@ static int configure_cpucp_map(cpumask_t mask)
is_amu_valid(event->amu_id) || !event->pevent ||
!cpumask_test_cpu(cpu, to_cpumask(&cpucp_map[cid].cpus)))
continue;
pmu_map[cpu][cid] = event->pevent->hw.idx;
pmu_map[phys_cpu[cpu]][cid] = event->pevent->hw.idx;
}
}
@ -904,9 +906,17 @@ static void load_pmu_counters(void)
pr_info("Enabled all perf counters\n");
}
static void get_mpidr_cpu(void *cpu)
{
u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
*((uint32_t *)cpu) = MPIDR_AFFINITY_LEVEL(mpidr, 1);
}
int rimps_pmu_init(struct scmi_device *sdev)
{
int ret = 0;
uint32_t cpu, pcpu;
if (!sdev || !sdev->handle)
return -EINVAL;
@ -918,6 +928,11 @@ int rimps_pmu_init(struct scmi_device *sdev)
return ret;
}
for_each_possible_cpu(cpu) {
smp_call_function_single(cpu, get_mpidr_cpu,
&pcpu, true);
phys_cpu[cpu] = pcpu;
}
/*
* If communication with cpucp doesn't succeed here the device memory
* will be de-allocated. Make ops NULL to avoid further scmi calls.