arm64: KVM: Dynamically patch the kernel/hyp VA mask
So far, we're using a complicated sequence of alternatives to patch the kernel/hyp VA mask on non-VHE, and NOP out the masking altogether when on VHE. The newly introduced dynamic patching gives us the opportunity to simplify that code by patching a single instruction with the correct mask (instead of the mind bending cumulative masking we have at the moment) or even a single NOP on VHE. This also adds some initial code that will allow the patching callback to switch to a more complex patching. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
@ -69,9 +69,6 @@
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* mappings, and none of this applies in that case.
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* mappings, and none of this applies in that case.
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*/
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*/
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#define HYP_PAGE_OFFSET_HIGH_MASK ((UL(1) << VA_BITS) - 1)
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#define HYP_PAGE_OFFSET_LOW_MASK ((UL(1) << (VA_BITS - 1)) - 1)
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#ifdef __ASSEMBLY__
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#ifdef __ASSEMBLY__
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#include <asm/alternative.h>
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#include <asm/alternative.h>
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@ -81,28 +78,15 @@
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* Convert a kernel VA into a HYP VA.
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* Convert a kernel VA into a HYP VA.
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* reg: VA to be converted.
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* reg: VA to be converted.
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*
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*
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* This generates the following sequences:
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* The actual code generation takes place in kvm_update_va_mask, and
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* - High mask:
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* the instructions below are only there to reserve the space and
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* and x0, x0, #HYP_PAGE_OFFSET_HIGH_MASK
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* perform the register allocation (kvm_update_va_mask uses the
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* nop
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* specific registers encoded in the instructions).
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* - Low mask:
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* and x0, x0, #HYP_PAGE_OFFSET_HIGH_MASK
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* and x0, x0, #HYP_PAGE_OFFSET_LOW_MASK
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* - VHE:
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* nop
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* nop
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*
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* The "low mask" version works because the mask is a strict subset of
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* the "high mask", hence performing the first mask for nothing.
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* Should be completely invisible on any viable CPU.
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*/
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*/
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.macro kern_hyp_va reg
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.macro kern_hyp_va reg
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alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
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alternative_cb kvm_update_va_mask
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and \reg, \reg, #HYP_PAGE_OFFSET_HIGH_MASK
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and \reg, \reg, #1
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alternative_else_nop_endif
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alternative_cb_end
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alternative_if ARM64_HYP_OFFSET_LOW
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and \reg, \reg, #HYP_PAGE_OFFSET_LOW_MASK
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alternative_else_nop_endif
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.endm
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.endm
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#else
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#else
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@ -113,18 +97,14 @@ alternative_else_nop_endif
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#include <asm/mmu_context.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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void kvm_update_va_mask(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst);
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static inline unsigned long __kern_hyp_va(unsigned long v)
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static inline unsigned long __kern_hyp_va(unsigned long v)
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{
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{
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asm volatile(ALTERNATIVE("and %0, %0, %1",
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asm volatile(ALTERNATIVE_CB("and %0, %0, #1\n",
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"nop",
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kvm_update_va_mask)
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ARM64_HAS_VIRT_HOST_EXTN)
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: "+r" (v));
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: "+r" (v)
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: "i" (HYP_PAGE_OFFSET_HIGH_MASK));
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asm volatile(ALTERNATIVE("nop",
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"and %0, %0, %1",
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ARM64_HYP_OFFSET_LOW)
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: "+r" (v)
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: "i" (HYP_PAGE_OFFSET_LOW_MASK));
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return v;
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return v;
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}
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}
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@ -16,7 +16,7 @@ kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/e
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kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/arm.o $(KVM)/arm/mmu.o $(KVM)/arm/mmio.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/arm.o $(KVM)/arm/mmu.o $(KVM)/arm/mmio.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/psci.o $(KVM)/arm/perf.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/psci.o $(KVM)/arm/perf.o
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kvm-$(CONFIG_KVM_ARM_HOST) += inject_fault.o regmap.o
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kvm-$(CONFIG_KVM_ARM_HOST) += inject_fault.o regmap.o va_layout.o
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kvm-$(CONFIG_KVM_ARM_HOST) += hyp.o hyp-init.o handle_exit.o
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kvm-$(CONFIG_KVM_ARM_HOST) += hyp.o hyp-init.o handle_exit.o
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kvm-$(CONFIG_KVM_ARM_HOST) += guest.o debug.o reset.o sys_regs.o sys_regs_generic_v8.o
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kvm-$(CONFIG_KVM_ARM_HOST) += guest.o debug.o reset.o sys_regs.o sys_regs_generic_v8.o
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kvm-$(CONFIG_KVM_ARM_HOST) += vgic-sys-reg-v3.o
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kvm-$(CONFIG_KVM_ARM_HOST) += vgic-sys-reg-v3.o
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91
arch/arm64/kvm/va_layout.c
Normal file
91
arch/arm64/kvm/va_layout.c
Normal file
@ -0,0 +1,91 @@
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/*
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* Copyright (C) 2017 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm_host.h>
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#include <asm/alternative.h>
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#include <asm/debug-monitors.h>
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#include <asm/insn.h>
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#include <asm/kvm_mmu.h>
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#define HYP_PAGE_OFFSET_HIGH_MASK ((UL(1) << VA_BITS) - 1)
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#define HYP_PAGE_OFFSET_LOW_MASK ((UL(1) << (VA_BITS - 1)) - 1)
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static u64 va_mask;
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static void compute_layout(void)
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{
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phys_addr_t idmap_addr = __pa_symbol(__hyp_idmap_text_start);
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unsigned long mask = HYP_PAGE_OFFSET_HIGH_MASK;
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/*
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* Activate the lower HYP offset only if the idmap doesn't
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* clash with it,
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*/
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if (idmap_addr > HYP_PAGE_OFFSET_LOW_MASK)
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mask = HYP_PAGE_OFFSET_LOW_MASK;
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va_mask = mask;
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}
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static u32 compute_instruction(int n, u32 rd, u32 rn)
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{
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u32 insn = AARCH64_BREAK_FAULT;
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switch (n) {
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case 0:
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insn = aarch64_insn_gen_logical_immediate(AARCH64_INSN_LOGIC_AND,
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AARCH64_INSN_VARIANT_64BIT,
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rn, rd, va_mask);
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break;
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}
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return insn;
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}
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void __init kvm_update_va_mask(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst)
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{
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int i;
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/* We only expect a single instruction in the alternative sequence */
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BUG_ON(nr_inst != 1);
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if (!has_vhe() && !va_mask)
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compute_layout();
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for (i = 0; i < nr_inst; i++) {
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u32 rd, rn, insn, oinsn;
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/*
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* VHE doesn't need any address translation, let's NOP
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* everything.
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*/
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if (has_vhe()) {
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updptr[i] = cpu_to_le32(aarch64_insn_gen_nop());
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continue;
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}
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oinsn = le32_to_cpu(origptr[i]);
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rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, oinsn);
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rn = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RN, oinsn);
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insn = compute_instruction(i, rd, rn);
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BUG_ON(insn == AARCH64_BREAK_FAULT);
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updptr[i] = cpu_to_le32(insn);
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}
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}
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