spi: dw: Add Elkhart Lake PSE DMA support
Elkhart Lake PSE SPI is capable to utilize PSE DMA engine which is described in ACPI. With help of acpi-dma module the support becomes a generic one. Thus, add Elkhart Lake PSE DMA support and generic DMA hooks in SPI DesignWare driver. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200506153025.21441-8-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -75,6 +75,24 @@ static int mid_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
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return -EBUSY;
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return -EBUSY;
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}
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}
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static int mid_spi_dma_init_generic(struct device *dev, struct dw_spi *dws)
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{
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dws->rxchan = dma_request_slave_channel(dev, "rx");
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if (!dws->rxchan)
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return -ENODEV;
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dws->master->dma_rx = dws->rxchan;
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dws->txchan = dma_request_slave_channel(dev, "tx");
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if (!dws->txchan) {
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dma_release_channel(dws->rxchan);
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return -ENODEV;
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}
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dws->master->dma_tx = dws->txchan;
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dws->dma_inited = 1;
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return 0;
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}
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static void mid_spi_dma_exit(struct dw_spi *dws)
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static void mid_spi_dma_exit(struct dw_spi *dws)
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{
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{
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if (!dws->dma_inited)
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if (!dws->dma_inited)
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@ -291,8 +309,25 @@ static void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws)
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dws->dma_rx = &mid_dma_rx;
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dws->dma_rx = &mid_dma_rx;
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dws->dma_ops = &mfld_dma_ops;
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dws->dma_ops = &mfld_dma_ops;
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}
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}
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static const struct dw_spi_dma_ops generic_dma_ops = {
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.dma_init = mid_spi_dma_init_generic,
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.dma_exit = mid_spi_dma_exit,
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.dma_setup = mid_spi_dma_setup,
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.can_dma = mid_spi_can_dma,
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.dma_transfer = mid_spi_dma_transfer,
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.dma_stop = mid_spi_dma_stop,
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};
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static void dw_spi_mid_setup_dma_generic(struct dw_spi *dws)
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{
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dws->dma_tx = &mid_dma_tx;
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dws->dma_rx = &mid_dma_rx;
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dws->dma_ops = &generic_dma_ops;
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}
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#else /* CONFIG_SPI_DW_MID_DMA */
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#else /* CONFIG_SPI_DW_MID_DMA */
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static inline void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws) {}
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static inline void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws) {}
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static inline void dw_spi_mid_setup_dma_generic(struct dw_spi *dws) {}
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#endif
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#endif
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/* Some specific info for SPI0 controller on Intel MID */
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/* Some specific info for SPI0 controller on Intel MID */
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@ -329,3 +364,12 @@ int dw_spi_mid_init_mfld(struct dw_spi *dws)
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dw_spi_mid_setup_dma_mfld(dws);
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dw_spi_mid_setup_dma_mfld(dws);
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return 0;
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return 0;
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}
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}
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int dw_spi_mid_init_generic(struct dw_spi *dws)
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{
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/* Register hook to configure CTRLR0 */
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dws->update_cr0 = dw_spi_update_cr0;
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dw_spi_mid_setup_dma_generic(dws);
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return 0;
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}
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@ -35,6 +35,7 @@ static struct spi_pci_desc spi_pci_mid_desc_2 = {
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};
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};
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static struct spi_pci_desc spi_pci_ehl_desc = {
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static struct spi_pci_desc spi_pci_ehl_desc = {
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.setup = dw_spi_mid_init_generic,
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.num_cs = 2,
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.num_cs = 2,
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.bus_num = -1,
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.bus_num = -1,
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.max_freq = 100000000,
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.max_freq = 100000000,
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@ -261,5 +261,6 @@ extern u32 dw_spi_update_cr0_v1_01a(struct spi_controller *master,
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/* platform related setup */
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/* platform related setup */
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extern int dw_spi_mid_init_mfld(struct dw_spi *dws);
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extern int dw_spi_mid_init_mfld(struct dw_spi *dws);
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extern int dw_spi_mid_init_generic(struct dw_spi *dws);
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#endif /* DW_SPI_HEADER_H */
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#endif /* DW_SPI_HEADER_H */
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