From 0cedecdfb79095a8ae859ee9bf34e5ab24e39d28 Mon Sep 17 00:00:00 2001 From: Mehul Raninga Date: Tue, 28 Feb 2023 11:53:27 +0530 Subject: [PATCH] spi: spi-msm-geni: Use DMA mode for SPI responder requester SPI Transfer mode selection is based on length but in SPI responder case we get some latency for FIFO mode transfer that will cause some delay in SPI responder transfer and we get "TX_FIFO_RD_ERR" interrupt. Moving SPI responder to DMA mode for all transfer will not have this latency issue and SPI requester/responder will be in sync and we won't get any error related to SPI requester/responder sync. Change-Id: I6b9676aad2a4875a9ff6c4d998a45d2cd8a14cfa Signed-off-by: Ashish Kori Signed-off-by: Mehul Raninga --- drivers/spi/spi-msm-geni.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-msm-geni.c b/drivers/spi/spi-msm-geni.c index cb0a55f0d213..b45f5f41e71c 100644 --- a/drivers/spi/spi-msm-geni.c +++ b/drivers/spi/spi-msm-geni.c @@ -1527,7 +1527,9 @@ static int setup_fifo_xfer(struct spi_transfer *xfer, * mode for transfers or select the mode dynamically based on * size of data. */ - mas->cur_xfer_mode = SE_DMA; + if (spi->slave) + mas->cur_xfer_mode = SE_DMA; + if (mas->disable_dma || trans_len <= fifo_size) mas->cur_xfer_mode = FIFO_MODE; geni_se_select_mode(mas->base, mas->cur_xfer_mode);