net: phy: bcm7xxx: add workaround for PHY revision E0 and F0
PHY revisions E0 and F0 share the same shorter workaround initialization sequence. Dedicate a special function for these two PHY revisions to perform the needed workaround sequence. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -162,6 +162,31 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev)
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return 0;
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return 0;
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}
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}
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static int bcm7xxx_28nm_e0_plus_afe_config_init(struct phy_device *phydev)
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{
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/* AFE_RXCONFIG_1, provide more margin for INL/DNL measurement */
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phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f);
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/* AFE_VDCA_ICTRL_0, set Iq=1101 instead of 0111 for AB symmetry */
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phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da);
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/* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal
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* offset for HT=0 code
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*/
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phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
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/* CORE_BASE1E, force trim to overwrite and set I_ext trim to 0000 */
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phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
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/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
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phy_write_misc(phydev, DSP_TAP10, 0x011b);
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/* Reset R_CAL/RC_CAL engine */
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r_rc_cal_reset(phydev);
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return 0;
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}
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static int bcm7xxx_apd_enable(struct phy_device *phydev)
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static int bcm7xxx_apd_enable(struct phy_device *phydev)
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{
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{
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int val;
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int val;
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@ -225,6 +250,10 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
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case 0xd0:
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case 0xd0:
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ret = bcm7xxx_28nm_d0_afe_config_init(phydev);
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ret = bcm7xxx_28nm_d0_afe_config_init(phydev);
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break;
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break;
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case 0xe0:
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case 0xf0:
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ret = bcm7xxx_28nm_e0_plus_afe_config_init(phydev);
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break;
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default:
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default:
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break;
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break;
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}
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}
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