This is the 5.10.150 stable release
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmNZGa8ACgkQONu9yGCS aT48lBAA04ORlv/P+tkaLh7gkJjuvnbsemni3KXdpq0hcOfUIpdquUvU06tD7T/P cnM20NPgBR+IZ1sIcGWdPhTpIOEId9yxu84HQT5ctOjAZPuGg98s2JOQaXWD3Jh2 g88kbWgMeThfrJebPYZMofy5vRSZ5eMatAixhtjaM/2b/MXDSu2rIL4AoHZ99CKr wovy1r1bN2niJADu8DwC+jANrPTfStMsjJ9dcOpAqVt83EKz0j3ktCDfzcUftFIw z4y5leEx1qftUOWtY1DKPZEAhMZSpjZYLC1nldopwEl2JvZ7z9aGx3fFJyr/7zOt 4/mNWT2Ra4S9Tqn2RuFnCdWfqGBOmrE0AJf37IdEdpnlcXol6NaGu4LsQsQq4ffk DxPc6tN6BGY1XXh+pNSlSW7jsXx6jbJ+OnL8JpSXV49ZOofz3XPTHQ/8tJEttfO4 rURa3iMk4GFeORw+mrHKOVJuWcfpnjVoxStGv6XiKqPpHjwbtB8ZGBlr9pMDYDQP i2RBwkr/cz5JJzlaA4Q/n96nbZFAKpsiy0Vh1MWboxxlojIqLe3yIlZT6b2M3CFf jsoqlLfaBjBa7RGQP1rW/im2SqxG2ftTiRdGZXPvjEZKnfIpUZEFszD9TmSuIk8f uuJY2Tj6rSJ2nJPS0iui/KVQ78IWLz9PG3Xwm5E2A9QcPz1JAfk= =pfwB -----END PGP SIGNATURE----- Merge 5.10.150 into android12-5.10-lts Changes in 5.10.150 ALSA: oss: Fix potential deadlock at unregistration ALSA: rawmidi: Drop register_mutex in snd_rawmidi_free() ALSA: usb-audio: Fix potential memory leaks ALSA: usb-audio: Fix NULL dererence at error path ALSA: hda/realtek: remove ALC289_FIXUP_DUAL_SPK for Dell 5530 ALSA: hda/realtek: Correct pin configs for ASUS G533Z ALSA: hda/realtek: Add quirk for ASUS GV601R laptop ALSA: hda/realtek: Add Intel Reference SSID to support headset keys mtd: rawnand: atmel: Unmap streaming DMA mappings cifs: destage dirty pages before re-reading them for cache=none cifs: Fix the error length of VALIDATE_NEGOTIATE_INFO message iio: dac: ad5593r: Fix i2c read protocol requirements iio: ltc2497: Fix reading conversion results iio: adc: ad7923: fix channel readings for some variants iio: pressure: dps310: Refactor startup procedure iio: pressure: dps310: Reset chip after timeout usb: add quirks for Lenovo OneLink+ Dock can: kvaser_usb: Fix use of uninitialized completion can: kvaser_usb_leaf: Fix overread with an invalid command can: kvaser_usb_leaf: Fix TX queue out of sync after restart can: kvaser_usb_leaf: Fix CAN state after restart mmc: sdhci-sprd: Fix minimum clock limit fs: dlm: fix race between test_bit() and queue_work() fs: dlm: handle -EBUSY first in lock arg validation HID: multitouch: Add memory barriers quota: Check next/prev free block number after reading from quota file platform/chrome: cros_ec_proto: Update version on GET_NEXT_EVENT failure ASoC: wcd9335: fix order of Slimbus unprepare/disable ASoC: wcd934x: fix order of Slimbus unprepare/disable hwmon: (gsc-hwmon) Call of_node_get() before of_find_xxx API regulator: qcom_rpm: Fix circular deferral regression RISC-V: Make port I/O string accessors actually work parisc: fbdev/stifb: Align graphics memory size to 4MB riscv: Allow PROT_WRITE-only mmap() riscv: Make VM_WRITE imply VM_READ riscv: Pass -mno-relax only on lld < 15.0.0 UM: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK nvme-pci: set min_align_mask before calculating max_hw_sectors drm/virtio: Check whether transferred 2D BO is shmem drm/udl: Restore display mode on resume block: fix inflight statistics of part0 mm/mmap: undo ->mmap() when arch_validate_flags() fails PCI: Sanitise firmware BAR assignments behind a PCI-PCI bridge powercap: intel_rapl: Use standard Energy Unit for SPR Dram RAPL domain powerpc/boot: Explicitly disable usage of SPE instructions scsi: qedf: Populate sysfs attributes for vport fbdev: smscufx: Fix use-after-free in ufx_ops_open() btrfs: fix race between quota enable and quota rescan ioctl f2fs: increase the limit for reserve_root f2fs: fix to do sanity check on destination blkaddr during recovery f2fs: fix to do sanity check on summary info hardening: Clarify Kconfig text for auto-var-init hardening: Avoid harmless Clang option under CONFIG_INIT_STACK_ALL_ZERO hardening: Remove Clang's enable flag for -ftrivial-auto-var-init=zero jbd2: wake up journal waiters in FIFO order, not LIFO jbd2: fix potential buffer head reference count leak jbd2: fix potential use-after-free in jbd2_fc_wait_bufs jbd2: add miss release buffer head in fc_do_one_pass() ext4: avoid crash when inline data creation follows DIO write ext4: fix null-ptr-deref in ext4_write_info ext4: make ext4_lazyinit_thread freezable ext4: fix check for block being out of directory size ext4: don't increase iversion counter for ea_inodes ext4: ext4_read_bh_lock() should submit IO if the buffer isn't uptodate ext4: place buffer head allocation before handle start ext4: fix miss release buffer head in ext4_fc_write_inode ext4: fix potential memory leak in ext4_fc_record_modified_inode() ext4: fix potential memory leak in ext4_fc_record_regions() ext4: update 'state->fc_regions_size' after successful memory allocation livepatch: fix race between fork and KLP transition ftrace: Properly unset FTRACE_HASH_FL_MOD ring-buffer: Allow splice to read previous partially read pages ring-buffer: Have the shortest_full queue be the shortest not longest ring-buffer: Check pending waiters when doing wake ups as well ring-buffer: Add ring_buffer_wake_waiters() ring-buffer: Fix race between reset page and reading page tracing: Disable interrupt or preemption before acquiring arch_spinlock_t thunderbolt: Explicitly enable lane adapter hotplug events at startup efi: libstub: drop pointless get_memory_map() call media: cedrus: Set the platform driver data earlier KVM: x86/emulator: Fix handing of POP SS to correctly set interruptibility KVM: nVMX: Unconditionally purge queued/injected events on nested "exit" KVM: VMX: Drop bits 31:16 when shoving exception error code into VMCS staging: greybus: audio_helper: remove unused and wrong debugfs usage drm/nouveau/kms/nv140-: Disable interlacing drm/nouveau: fix a use-after-free in nouveau_gem_prime_import_sg_table() drm/i915: Fix watermark calculations for gen12+ RC CCS modifier drm/i915: Fix watermark calculations for gen12+ MC CCS modifier smb3: must initialize two ACL struct fields to zero selinux: use "grep -E" instead of "egrep" userfaultfd: open userfaultfds with O_RDONLY sh: machvec: Use char[] for section boundaries MIPS: SGI-IP27: Free some unused memory MIPS: SGI-IP27: Fix platform-device leak in bridge_platform_create() ARM: 9244/1: dump: Fix wrong pg_level in walk_pmd() ARM: 9247/1: mm: set readonly for MT_MEMORY_RO with ARM_LPAE objtool: Preserve special st_shndx indexes in elf_update_symbol nfsd: Fix a memory leak in an error handling path wifi: ath10k: add peer map clean up for peer delete in ath10k_sta_state() leds: lm3601x: Don't use mutex after it was destroyed wifi: mac80211: allow bw change during channel switch in mesh bpftool: Fix a wrong type cast in btf_dumper_int spi: mt7621: Fix an error message in mt7621_spi_probe() x86/resctrl: Fix to restore to original value when re-enabling hardware prefetch register Bluetooth: btusb: Fine-tune mt7663 mechanism. Bluetooth: btusb: fix excessive stack usage Bluetooth: btusb: mediatek: fix WMT failure during runtime suspend wifi: rtl8xxxu: tighten bounds checking in rtl8xxxu_read_efuse() selftests/xsk: Avoid use-after-free on ctx spi: qup: add missing clk_disable_unprepare on error in spi_qup_resume() spi: qup: add missing clk_disable_unprepare on error in spi_qup_pm_resume_runtime() wifi: rtl8xxxu: Fix skb misuse in TX queue selection spi: meson-spicc: do not rely on busy flag in pow2 clk ops bpf: btf: fix truncated last_member_type_id in btf_struct_resolve wifi: rtl8xxxu: gen2: Fix mistake in path B IQ calibration wifi: rtl8xxxu: Remove copy-paste leftover in gen2_update_rate_mask net: fs_enet: Fix wrong check in do_pd_setup bpf: Ensure correct locking around vulnerable function find_vpid() Bluetooth: hci_{ldisc,serdev}: check percpu_init_rwsem() failure wifi: ath11k: fix number of VHT beamformee spatial streams x86/microcode/AMD: Track patch allocation size explicitly x86/cpu: Include the header of init_ia32_feat_ctl()'s prototype spi: dw: Fix PM disable depth imbalance in dw_spi_bt1_probe spi/omap100k:Fix PM disable depth imbalance in omap1_spi100k_probe i2c: mlxbf: support lock mechanism Bluetooth: hci_core: Fix not handling link timeouts propertly netfilter: nft_fib: Fix for rpath check with VRF devices spi: s3c64xx: Fix large transfers with DMA wifi: rtl8xxxu: Fix AIFS written to REG_EDCA_*_PARAM vhost/vsock: Use kvmalloc/kvfree for larger packets. mISDN: fix use-after-free bugs in l1oip timer handlers sctp: handle the error returned from sctp_auth_asoc_init_active_key tcp: fix tcp_cwnd_validate() to not forget is_cwnd_limited spi: Ensure that sg_table won't be used after being freed net: rds: don't hold sock lock when cancelling work from rds_tcp_reset_callbacks() bnx2x: fix potential memory leak in bnx2x_tpa_stop() net/ieee802154: reject zero-sized raw_sendmsg() once: add DO_ONCE_SLOW() for sleepable contexts net: mvpp2: fix mvpp2 debugfs leak drm: bridge: adv7511: fix CEC power down control register offset drm/bridge: Avoid uninitialized variable warning drm/mipi-dsi: Detach devices when removing the host drm/bridge: parade-ps8640: Fix regulator supply order drm/dp_mst: fix drm_dp_dpcd_read return value checks drm:pl111: Add of_node_put() when breaking out of for_each_available_child_of_node() platform/chrome: fix double-free in chromeos_laptop_prepare() platform/chrome: fix memory corruption in ioctl ASoC: tas2764: Allow mono streams ASoC: tas2764: Drop conflicting set_bias_level power setting ASoC: tas2764: Fix mute/unmute platform/x86: msi-laptop: Fix old-ec check for backlight registering platform/x86: msi-laptop: Fix resource cleanup drm: fix drm_mipi_dbi build errors drm/bridge: megachips: Fix a null pointer dereference bug ASoC: rsnd: Add check for rsnd_mod_power_on ALSA: hda: beep: Simplify keep-power-at-enable behavior drm/omap: dss: Fix refcount leak bugs mmc: au1xmmc: Fix an error handling path in au1xmmc_probe() ASoC: eureka-tlv320: Hold reference returned from of_find_xxx API drm/msm/dpu: index dpu_kms->hw_vbif using vbif_idx drm/msm/dp: correct 1.62G link rate at dp_catalog_ctrl_config_msa() ASoC: da7219: Fix an error handling path in da7219_register_dai_clks() ALSA: dmaengine: increment buffer pointer atomically mmc: wmt-sdmmc: Fix an error handling path in wmt_mci_probe() ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe ASoC: mt6660: Fix PM disable depth imbalance in mt6660_i2c_probe ALSA: hda/hdmi: Don't skip notification handling during PM operation memory: pl353-smc: Fix refcount leak bug in pl353_smc_probe() memory: of: Fix refcount leak bug in of_get_ddr_timings() memory: of: Fix refcount leak bug in of_lpddr3_get_ddr_timings() soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe() soc: qcom: smem_state: Add refcounting for the 'state->of_node' ARM: dts: turris-omnia: Fix mpp26 pin name and comment ARM: dts: kirkwood: lsxl: fix serial line ARM: dts: kirkwood: lsxl: remove first ethernet port ia64: export memory_add_physaddr_to_nid to fix cxl build error soc/tegra: fuse: Drop Kconfig dependency on TEGRA20_APB_DMA ARM: dts: exynos: correct s5k6a3 reset polarity on Midas family ARM: Drop CMDLINE_* dependency on ATAGS arm64: ftrace: fix module PLTs with mcount ARM: dts: exynos: fix polarity of VBUS GPIO of Origen iio: adc: at91-sama5d2_adc: fix AT91_SAMA5D2_MR_TRACKTIM_MAX iio: adc: at91-sama5d2_adc: check return status for pressure and touch iio: adc: at91-sama5d2_adc: lock around oversampling and sample freq iio: adc: at91-sama5d2_adc: disable/prepare buffer on suspend/resume iio: inkern: only release the device node when done with it iio: ABI: Fix wrong format of differential capacitance channel ABI. usb: ch9: Add USB 3.2 SSP attributes usb: common: Parse for USB SSP genXxY usb: common: add function to get interval expressed in us unit usb: common: move function's kerneldoc next to its definition usb: common: debug: Check non-standard control requests clk: meson: Hold reference returned by of_get_parent() clk: oxnas: Hold reference returned by of_get_parent() clk: qoriq: Hold reference returned by of_get_parent() clk: berlin: Add of_node_put() for of_get_parent() clk: sprd: Hold reference returned by of_get_parent() clk: tegra: Fix refcount leak in tegra210_clock_init clk: tegra: Fix refcount leak in tegra114_clock_init clk: tegra20: Fix refcount leak in tegra20_clock_init HSI: omap_ssi: Fix refcount leak in ssi_probe HSI: omap_ssi_port: Fix dma_map_sg error check media: exynos4-is: fimc-is: Add of_node_put() when breaking out of loop tty: xilinx_uartps: Fix the ignore_status media: meson: vdec: add missing clk_disable_unprepare on error in vdec_hevc_start() media: xilinx: vipp: Fix refcount leak in xvip_graph_dma_init RDMA/rxe: Fix "kernel NULL pointer dereference" error RDMA/rxe: Fix the error caused by qp->sk misc: ocxl: fix possible refcount leak in afu_ioctl() fpga: prevent integer overflow in dfl_feature_ioctl_set_irq() dmaengine: hisilicon: Disable channels when unregister hisi_dma dmaengine: hisilicon: Fix CQ head update dmaengine: hisilicon: Add multi-thread support for a DMA channel dyndbg: fix static_branch manipulation dyndbg: fix module.dyndbg handling dyndbg: let query-modname override actual module name dyndbg: drop EXPORTed dynamic_debug_exec_queries mtd: devices: docg3: check the return value of devm_ioremap() in the probe mtd: rawnand: fsl_elbc: Fix none ECC mode RDMA/siw: Always consume all skbuf data in sk_data_ready() upcall. ata: fix ata_id_sense_reporting_enabled() and ata_id_has_sense_reporting() ata: fix ata_id_has_devslp() ata: fix ata_id_has_ncq_autosense() ata: fix ata_id_has_dipm() mtd: rawnand: meson: fix bit map use in meson_nfc_ecc_correct() md: Replace snprintf with scnprintf md/raid5: Ensure stripe_fill happens on non-read IO with journal RDMA/cm: Use SLID in the work completion as the DLID in responder side IB: Set IOVA/LENGTH on IB_MR in core/uverbs layers xhci: Don't show warning for reinit on known broken suspend usb: gadget: function: fix dangling pnp_string in f_printer.c drivers: serial: jsm: fix some leaks in probe serial: 8250: Add an empty line and remove some useless {} serial: 8250: Toggle IER bits on only after irq has been set up tty: serial: fsl_lpuart: disable dma rx/tx use flags in lpuart_dma_shutdown phy: qualcomm: call clk_disable_unprepare in the error handling staging: vt6655: fix some erroneous memory clean-up loops firmware: google: Test spinlock on panic path to avoid lockups serial: 8250: Fix restoring termios speed after suspend scsi: libsas: Fix use-after-free bug in smp_execute_task_sg() scsi: iscsi: iscsi_tcp: Fix null-ptr-deref while calling getpeername() clk: qcom: apss-ipq6018: mark apcs_alias0_core_clk as critical fsi: core: Check error number after calling ida_simple_get mfd: intel_soc_pmic: Fix an error handling path in intel_soc_pmic_i2c_probe() mfd: fsl-imx25: Fix an error handling path in mx25_tsadc_setup_irq() mfd: lp8788: Fix an error handling path in lp8788_probe() mfd: lp8788: Fix an error handling path in lp8788_irq_init() and lp8788_irq_init() mfd: fsl-imx25: Fix check for platform_get_irq() errors mfd: sm501: Add check for platform_driver_register() clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent dmaengine: ioat: stop mod_timer from resurrecting deleted timer in __cleanup() spmi: pmic-arb: correct duplicate APID to PPID mapping logic clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD clk: baikal-t1: Fix invalid xGMAC PTP clock divider clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent clk: baikal-t1: Add SATA internal ref clock buffer clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe clk: ast2600: BCLK comes from EPLL mailbox: bcm-ferxrm-mailbox: Fix error check for dma_map_sg powerpc/math_emu/efp: Include module.h powerpc/sysdev/fsl_msi: Add missing of_node_put() powerpc/pci_dn: Add missing of_node_put() powerpc/powernv: add missing of_node_put() in opal_export_attrs() x86/hyperv: Fix 'struct hv_enlightened_vmcs' definition powerpc/64s: Fix GENERIC_CPU build flags for PPC970 / G5 powerpc: Fix SPE Power ISA properties for e500v1 platforms crypto: sahara - don't sleep when in softirq crypto: hisilicon/zip - fix mismatch in get/set sgl_sge_nr hwrng: imx-rngc - Moving IRQ handler registering after imx_rngc_irq_mask_clear() cgroup/cpuset: Enable update_tasks_cpumask() on top_cpuset iommu/omap: Fix buffer overflow in debugfs crypto: akcipher - default implementation for setting a private key crypto: ccp - Release dma channels before dmaengine unrgister crypto: inside-secure - Change swab to swab32 crypto: qat - fix use of 'dma_map_single' crypto: qat - use pre-allocated buffers in datapath crypto: qat - fix DMA transfer direction iommu/iova: Fix module config properly tracing: kprobe: Fix kprobe event gen test module on exit tracing: kprobe: Make gen test module work in arm and riscv kbuild: remove the target in signal traps when interrupted kbuild: rpm-pkg: fix breakage when V=1 is used crypto: marvell/octeontx - prevent integer overflows crypto: cavium - prevent integer overflow loading firmware thermal/drivers/qcom/tsens-v0_1: Fix MSM8939 fourth sensor hw_id ACPI: APEI: do not add task_work to kernel thread to avoid memory leak f2fs: fix race condition on setting FI_NO_EXTENT flag f2fs: fix to avoid REQ_TIME and CP_TIME collision f2fs: fix to account FS_CP_DATA_IO correctly selftest: tpm2: Add Client.__del__() to close /dev/tpm* handle rcu: Back off upon fill_page_cache_func() allocation failure rcu-tasks: Convert RCU_LOCKDEP_WARN() to WARN_ONCE() ACPI: video: Add Toshiba Satellite/Portege Z830 quirk MIPS: BCM47XX: Cast memcmp() of function to (void *) powercap: intel_rapl: fix UBSAN shift-out-of-bounds issue thermal: intel_powerclamp: Use get_cpu() instead of smp_processor_id() to avoid crash x86/entry: Work around Clang __bdos() bug NFSD: Return nfserr_serverfault if splice_ok but buf->pages have data NFSD: fix use-after-free on source server when doing inter-server copy wifi: brcmfmac: fix invalid address access when enabling SCAN log level bpftool: Clear errno after libcap's checks openvswitch: Fix double reporting of drops in dropwatch openvswitch: Fix overreporting of drops in dropwatch tcp: annotate data-race around tcp_md5sig_pool_populated wifi: ath9k: avoid uninit memory read in ath9k_htc_rx_msg() xfrm: Update ipcomp_scratches with NULL when freed wifi: brcmfmac: fix use-after-free bug in brcmf_netdev_start_xmit() regulator: core: Prevent integer underflow Bluetooth: L2CAP: initialize delayed works at l2cap_chan_create() Bluetooth: hci_sysfs: Fix attempting to call device_add multiple times can: bcm: check the result of can_send() in bcm_can_tx() wifi: rt2x00: don't run Rt5592 IQ calibration on MT7620 wifi: rt2x00: set correct TX_SW_CFG1 MAC register for MT7620 wifi: rt2x00: set VGC gain for both chains of MT7620 wifi: rt2x00: set SoC wmac clock register wifi: rt2x00: correctly set BBP register 86 for MT7620 net: If sock is dead don't access sock's sk_wq in sk_stream_wait_memory Bluetooth: L2CAP: Fix user-after-free r8152: Rate limit overflow messages drm/nouveau/nouveau_bo: fix potential memory leak in nouveau_bo_alloc() drm: Use size_t type for len variable in drm_copy_field() drm: Prevent drm_copy_field() to attempt copying a NULL pointer gpu: lontium-lt9611: Fix NULL pointer dereference in lt9611_connector_init() drm/amd/display: fix overflow on MIN_I64 definition udmabuf: Set ubuf->sg = NULL if the creation of sg table fails drm: bridge: dw_hdmi: only trigger hotplug event on link change drm/vc4: vec: Fix timings for VEC modes drm: panel-orientation-quirks: Add quirk for Anbernic Win600 platform/chrome: cros_ec: Notify the PM of wake events during resume platform/x86: msi-laptop: Change DMI match / alias strings to fix module autoloading ASoC: SOF: pci: Change DMI match info to support all Chrome platforms drm/amdgpu: fix initial connector audio value drm/meson: explicitly remove aggregate driver at module unload time mmc: sdhci-msm: add compatible string check for sdm670 drm/dp: Don't rewrite link config when setting phy test pattern drm/amd/display: Remove interface for periodic interrupt 1 ARM: dts: imx7d-sdb: config the max pressure for tsc2046 ARM: dts: imx6q: add missing properties for sram ARM: dts: imx6dl: add missing properties for sram ARM: dts: imx6qp: add missing properties for sram ARM: dts: imx6sl: add missing properties for sram ARM: dts: imx6sll: add missing properties for sram ARM: dts: imx6sx: add missing properties for sram kselftest/arm64: Fix validatation termination record after EXTRA_CONTEXT arm64: dts: imx8mq-librem5: Add bq25895 as max17055's power supply btrfs: scrub: try to fix super block errors clk: zynqmp: Fix stack-out-of-bounds in strncpy` media: cx88: Fix a null-ptr-deref bug in buffer_prepare() clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate usb: host: xhci-plat: suspend and resume clocks usb: host: xhci-plat: suspend/resume clks for brcm scsi: 3w-9xxx: Avoid disabling device if failing to enable it nbd: Fix hung when signal interrupts nbd_start_device_ioctl() power: supply: adp5061: fix out-of-bounds read in adp5061_get_chg_type() staging: vt6655: fix potential memory leak blk-throttle: prevent overflow while calculating wait time ata: libahci_platform: Sanity check the DT child nodes number bcache: fix set_at_max_writeback_rate() for multiple attached devices soundwire: cadence: Don't overwrite msg->buf during write commands soundwire: intel: fix error handling on dai registration issues HID: roccat: Fix use-after-free in roccat_read() md/raid5: Wait for MD_SB_CHANGE_PENDING in raid5d usb: host: xhci: Fix potential memory leak in xhci_alloc_stream_info() usb: musb: Fix musb_gadget.c rxstate overflow bug Revert "usb: storage: Add quirk for Samsung Fit flash" staging: rtl8723bs: fix a potential memory leak in rtw_init_cmd_priv() nvme: copy firmware_rev on each init nvmet-tcp: add bounds check on Transfer Tag usb: idmouse: fix an uninit-value in idmouse_open clk: bcm2835: Make peripheral PLLC critical perf intel-pt: Fix segfault in intel_pt_print_info() with uClibc arm64: topology: fix possible overflow in amu_fie_setup() io_uring: correct pinned_vm accounting io_uring/af_unix: defer registered files gc to io_uring release mm: hugetlb: fix UAF in hugetlb_handle_userfault net: ieee802154: return -EINVAL for unknown addr type Revert "net/ieee802154: reject zero-sized raw_sendmsg()" net/ieee802154: don't warn zero-sized raw_sendmsg() Revert "drm/amdgpu: move nbio sdma_doorbell_range() into sdma code for vega" Revert "drm/amdgpu: use dirty framebuffer helper" ext4: continue to expand file system when the target size doesn't reach inet: fully convert sk->sk_rx_dst to RCU rules thermal: intel_powerclamp: Use first online CPU as control_cpu f2fs: fix wrong condition to trigger background checkpoint correctly gcov: support GCC 12.1 and newer compilers Revert "drm/amdgpu: make sure to init common IP before gmc" Linux 5.10.150 Change-Id: I54f32f1f0149ec614c8bc7944e15adb5d80cd51a Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
commit
0b500f5b16
@ -142,7 +142,7 @@ Description:
|
||||
Raw capacitance measurement from channel Y. Units after
|
||||
application of scale and offset are nanofarads.
|
||||
|
||||
What: /sys/.../iio:deviceX/in_capacitanceY-in_capacitanceZ_raw
|
||||
What: /sys/.../iio:deviceX/in_capacitanceY-capacitanceZ_raw
|
||||
KernelVersion: 3.2
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
|
8
Makefile
8
Makefile
@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 10
|
||||
SUBLEVEL = 149
|
||||
SUBLEVEL = 150
|
||||
EXTRAVERSION =
|
||||
NAME = Dare mighty things
|
||||
|
||||
@ -834,12 +834,12 @@ endif
|
||||
|
||||
# Initialize all stack variables with a zero value.
|
||||
ifdef CONFIG_INIT_STACK_ALL_ZERO
|
||||
# Future support for zero initialization is still being debated, see
|
||||
# https://bugs.llvm.org/show_bug.cgi?id=45497. These flags are subject to being
|
||||
# renamed or dropped.
|
||||
KBUILD_CFLAGS += -ftrivial-auto-var-init=zero
|
||||
ifdef CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_ENABLER
|
||||
# https://github.com/llvm/llvm-project/issues/44842
|
||||
KBUILD_CFLAGS += -enable-trivial-auto-var-init-zero-knowing-it-will-be-removed-from-clang
|
||||
endif
|
||||
endif
|
||||
|
||||
DEBUG_CFLAGS :=
|
||||
|
||||
|
@ -1792,7 +1792,6 @@ config CMDLINE
|
||||
choice
|
||||
prompt "Kernel command line type" if CMDLINE != ""
|
||||
default CMDLINE_FROM_BOOTLOADER
|
||||
depends on ATAGS
|
||||
|
||||
config CMDLINE_FROM_BOOTLOADER
|
||||
bool "Use bootloader kernel arguments if available"
|
||||
|
@ -307,7 +307,7 @@ spi0cs0_pins: spi0cs0-pins {
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
spi0cs1_pins: spi0cs1-pins {
|
||||
spi0cs2_pins: spi0cs2-pins {
|
||||
marvell,pins = "mpp26";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
@ -342,7 +342,7 @@ partition@100000 {
|
||||
};
|
||||
};
|
||||
|
||||
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
|
||||
/* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
|
@ -588,7 +588,7 @@ s5k6a3@10 {
|
||||
clocks = <&camera 1>;
|
||||
clock-names = "extclk";
|
||||
samsung,camclk-out = <1>;
|
||||
gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
|
||||
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
is_s5k6a3_ep: endpoint {
|
||||
|
@ -95,7 +95,7 @@ &exynos_usbphy {
|
||||
};
|
||||
|
||||
&ehci {
|
||||
samsung,vbus-gpio = <&gpx3 5 1>;
|
||||
samsung,vbus-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
|
||||
phy-names = "hsic0", "hsic1";
|
||||
|
@ -84,6 +84,9 @@ soc {
|
||||
ocram: sram@900000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00900000 0x20000>;
|
||||
ranges = <0 0x00900000 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6QDL_CLK_OCRAM>;
|
||||
};
|
||||
|
||||
|
@ -163,6 +163,9 @@ soc {
|
||||
ocram: sram@900000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00900000 0x40000>;
|
||||
ranges = <0 0x00900000 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6QDL_CLK_OCRAM>;
|
||||
};
|
||||
|
||||
|
@ -9,12 +9,18 @@ soc {
|
||||
ocram2: sram@940000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00940000 0x20000>;
|
||||
ranges = <0 0x00940000 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6QDL_CLK_OCRAM>;
|
||||
};
|
||||
|
||||
ocram3: sram@960000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00960000 0x20000>;
|
||||
ranges = <0 0x00960000 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6QDL_CLK_OCRAM>;
|
||||
};
|
||||
|
||||
|
@ -114,6 +114,9 @@ soc {
|
||||
ocram: sram@900000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00900000 0x20000>;
|
||||
ranges = <0 0x00900000 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6SL_CLK_OCRAM>;
|
||||
};
|
||||
|
||||
|
@ -115,6 +115,9 @@ soc {
|
||||
ocram: sram@900000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00900000 0x20000>;
|
||||
ranges = <0 0x00900000 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller@a01000 {
|
||||
|
@ -161,12 +161,18 @@ soc {
|
||||
ocram_s: sram@8f8000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x008f8000 0x4000>;
|
||||
ranges = <0 0x008f8000 0x4000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6SX_CLK_OCRAM_S>;
|
||||
};
|
||||
|
||||
ocram: sram@900000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00900000 0x20000>;
|
||||
ranges = <0 0x00900000 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clocks = <&clks IMX6SX_CLK_OCRAM>;
|
||||
};
|
||||
|
||||
|
@ -199,12 +199,7 @@ tsc2046@0 {
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <29 0>;
|
||||
pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
||||
ti,x-min = /bits/ 16 <0>;
|
||||
ti,x-max = /bits/ 16 <0>;
|
||||
ti,y-min = /bits/ 16 <0>;
|
||||
ti,y-max = /bits/ 16 <0>;
|
||||
ti,pressure-max = /bits/ 16 <0>;
|
||||
ti,x-plate-ohms = /bits/ 16 <400>;
|
||||
touchscreen-max-pressure = <255>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
@ -10,6 +10,11 @@ chosen {
|
||||
|
||||
ocp@f1000000 {
|
||||
pinctrl: pin-controller@10000 {
|
||||
/* Non-default UART pins */
|
||||
pmx_uart0: pmx-uart0 {
|
||||
marvell,pins = "mpp4", "mpp5";
|
||||
};
|
||||
|
||||
pmx_power_hdd: pmx-power-hdd {
|
||||
marvell,pins = "mpp10";
|
||||
marvell,function = "gpo";
|
||||
@ -213,22 +218,11 @@ hdd_power: regulator@2 {
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@8 {
|
||||
reg = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
ethernet0-port@0 {
|
||||
phy-handle = <ðphy0>;
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
status = "okay";
|
||||
ethernet1-port@0 {
|
||||
|
@ -342,7 +342,7 @@ static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start)
|
||||
addr = start + i * PMD_SIZE;
|
||||
domain = get_domain_name(pmd);
|
||||
if (pmd_none(*pmd) || pmd_large(*pmd) || !pmd_present(*pmd))
|
||||
note_page(st, addr, 3, pmd_val(*pmd), domain);
|
||||
note_page(st, addr, 4, pmd_val(*pmd), domain);
|
||||
else
|
||||
walk_pte(st, pmd, addr, domain);
|
||||
|
||||
|
@ -300,7 +300,11 @@ static struct mem_type mem_types[] __ro_after_init = {
|
||||
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
|
||||
L_PTE_XN | L_PTE_RDONLY,
|
||||
.prot_l1 = PMD_TYPE_TABLE,
|
||||
#ifdef CONFIG_ARM_LPAE
|
||||
.prot_sect = PMD_TYPE_SECT | L_PMD_SECT_RDONLY | PMD_SECT_AP2,
|
||||
#else
|
||||
.prot_sect = PMD_TYPE_SECT,
|
||||
#endif
|
||||
.domain = DOMAIN_KERNEL,
|
||||
},
|
||||
[MT_ROM] = {
|
||||
|
@ -899,6 +899,7 @@ bat: fuel-gauge@36 {
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gauge>;
|
||||
power-supplies = <&bq25895>;
|
||||
maxim,over-heat-temp = <700>;
|
||||
maxim,over-volt = <4500>;
|
||||
maxim,rsns-microohm = <5000>;
|
||||
|
@ -216,11 +216,26 @@ int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec,
|
||||
unsigned long pc = rec->ip;
|
||||
u32 old = 0, new;
|
||||
|
||||
new = aarch64_insn_gen_nop();
|
||||
|
||||
/*
|
||||
* When using mcount, callsites in modules may have been initalized to
|
||||
* call an arbitrary module PLT (which redirects to the _mcount stub)
|
||||
* rather than the ftrace PLT we'll use at runtime (which redirects to
|
||||
* the ftrace trampoline). We can ignore the old PLT when initializing
|
||||
* the callsite.
|
||||
*
|
||||
* Note: 'mod' is only set at module load time.
|
||||
*/
|
||||
if (!IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS) &&
|
||||
IS_ENABLED(CONFIG_ARM64_MODULE_PLTS) && mod) {
|
||||
return aarch64_insn_patch_text_nosync((void *)pc, new);
|
||||
}
|
||||
|
||||
if (!ftrace_find_callable_addr(rec, mod, &addr))
|
||||
return -EINVAL;
|
||||
|
||||
old = aarch64_insn_gen_branch_imm(pc, addr, AARCH64_INSN_BRANCH_LINK);
|
||||
new = aarch64_insn_gen_nop();
|
||||
|
||||
return ftrace_modify_code(pc, old, new, true);
|
||||
}
|
||||
|
@ -158,7 +158,7 @@ static int validate_cpu_freq_invariance_counters(int cpu)
|
||||
}
|
||||
|
||||
/* Convert maximum frequency from KHz to Hz and validate */
|
||||
max_freq_hz = cpufreq_get_hw_max_freq(cpu) * 1000;
|
||||
max_freq_hz = cpufreq_get_hw_max_freq(cpu) * 1000ULL;
|
||||
if (unlikely(!max_freq_hz)) {
|
||||
pr_debug("CPU%d: invalid maximum frequency.\n", cpu);
|
||||
return -EINVAL;
|
||||
|
@ -106,5 +106,6 @@ int memory_add_physaddr_to_nid(u64 addr)
|
||||
return 0;
|
||||
return nid;
|
||||
}
|
||||
EXPORT_SYMBOL(memory_add_physaddr_to_nid);
|
||||
#endif
|
||||
#endif
|
||||
|
@ -86,7 +86,7 @@ static __init void prom_init_mem(void)
|
||||
pr_debug("Assume 128MB RAM\n");
|
||||
break;
|
||||
}
|
||||
if (!memcmp(prom_init, prom_init + mem, 32))
|
||||
if (!memcmp((void *)prom_init, (void *)prom_init + mem, 32))
|
||||
break;
|
||||
}
|
||||
lowmem = mem;
|
||||
@ -163,7 +163,7 @@ void __init bcm47xx_prom_highmem_init(void)
|
||||
|
||||
off = EXTVBASE + __pa(off);
|
||||
for (extmem = 128 << 20; extmem < 512 << 20; extmem <<= 1) {
|
||||
if (!memcmp(prom_init, (void *)(off + extmem), 16))
|
||||
if (!memcmp((void *)prom_init, (void *)(off + extmem), 16))
|
||||
break;
|
||||
}
|
||||
extmem -= lowmem;
|
||||
|
@ -27,15 +27,18 @@ static void bridge_platform_create(nasid_t nasid, int widget, int masterwid)
|
||||
{
|
||||
struct xtalk_bridge_platform_data *bd;
|
||||
struct sgi_w1_platform_data *wd;
|
||||
struct platform_device *pdev;
|
||||
struct platform_device *pdev_wd;
|
||||
struct platform_device *pdev_bd;
|
||||
struct resource w1_res;
|
||||
unsigned long offset;
|
||||
|
||||
offset = NODE_OFFSET(nasid);
|
||||
|
||||
wd = kzalloc(sizeof(*wd), GFP_KERNEL);
|
||||
if (!wd)
|
||||
goto no_mem;
|
||||
if (!wd) {
|
||||
pr_warn("xtalk:n%d/%x bridge create out of memory\n", nasid, widget);
|
||||
return;
|
||||
}
|
||||
|
||||
snprintf(wd->dev_id, sizeof(wd->dev_id), "bridge-%012lx",
|
||||
offset + (widget << SWIN_SIZE_BITS));
|
||||
@ -46,22 +49,35 @@ static void bridge_platform_create(nasid_t nasid, int widget, int masterwid)
|
||||
w1_res.end = w1_res.start + 3;
|
||||
w1_res.flags = IORESOURCE_MEM;
|
||||
|
||||
pdev = platform_device_alloc("sgi_w1", PLATFORM_DEVID_AUTO);
|
||||
if (!pdev) {
|
||||
kfree(wd);
|
||||
goto no_mem;
|
||||
pdev_wd = platform_device_alloc("sgi_w1", PLATFORM_DEVID_AUTO);
|
||||
if (!pdev_wd) {
|
||||
pr_warn("xtalk:n%d/%x bridge create out of memory\n", nasid, widget);
|
||||
goto err_kfree_wd;
|
||||
}
|
||||
platform_device_add_resources(pdev, &w1_res, 1);
|
||||
platform_device_add_data(pdev, wd, sizeof(*wd));
|
||||
platform_device_add(pdev);
|
||||
if (platform_device_add_resources(pdev_wd, &w1_res, 1)) {
|
||||
pr_warn("xtalk:n%d/%x bridge failed to add platform resources.\n", nasid, widget);
|
||||
goto err_put_pdev_wd;
|
||||
}
|
||||
if (platform_device_add_data(pdev_wd, wd, sizeof(*wd))) {
|
||||
pr_warn("xtalk:n%d/%x bridge failed to add platform data.\n", nasid, widget);
|
||||
goto err_put_pdev_wd;
|
||||
}
|
||||
if (platform_device_add(pdev_wd)) {
|
||||
pr_warn("xtalk:n%d/%x bridge failed to add platform device.\n", nasid, widget);
|
||||
goto err_put_pdev_wd;
|
||||
}
|
||||
/* platform_device_add_data() duplicates the data */
|
||||
kfree(wd);
|
||||
|
||||
bd = kzalloc(sizeof(*bd), GFP_KERNEL);
|
||||
if (!bd)
|
||||
goto no_mem;
|
||||
pdev = platform_device_alloc("xtalk-bridge", PLATFORM_DEVID_AUTO);
|
||||
if (!pdev) {
|
||||
kfree(bd);
|
||||
goto no_mem;
|
||||
if (!bd) {
|
||||
pr_warn("xtalk:n%d/%x bridge create out of memory\n", nasid, widget);
|
||||
goto err_unregister_pdev_wd;
|
||||
}
|
||||
pdev_bd = platform_device_alloc("xtalk-bridge", PLATFORM_DEVID_AUTO);
|
||||
if (!pdev_bd) {
|
||||
pr_warn("xtalk:n%d/%x bridge create out of memory\n", nasid, widget);
|
||||
goto err_kfree_bd;
|
||||
}
|
||||
|
||||
|
||||
@ -82,13 +98,31 @@ static void bridge_platform_create(nasid_t nasid, int widget, int masterwid)
|
||||
bd->io.flags = IORESOURCE_IO;
|
||||
bd->io_offset = offset;
|
||||
|
||||
platform_device_add_data(pdev, bd, sizeof(*bd));
|
||||
platform_device_add(pdev);
|
||||
if (platform_device_add_data(pdev_bd, bd, sizeof(*bd))) {
|
||||
pr_warn("xtalk:n%d/%x bridge failed to add platform data.\n", nasid, widget);
|
||||
goto err_put_pdev_bd;
|
||||
}
|
||||
if (platform_device_add(pdev_bd)) {
|
||||
pr_warn("xtalk:n%d/%x bridge failed to add platform device.\n", nasid, widget);
|
||||
goto err_put_pdev_bd;
|
||||
}
|
||||
/* platform_device_add_data() duplicates the data */
|
||||
kfree(bd);
|
||||
pr_info("xtalk:n%d/%x bridge widget\n", nasid, widget);
|
||||
return;
|
||||
|
||||
no_mem:
|
||||
pr_warn("xtalk:n%d/%x bridge create out of memory\n", nasid, widget);
|
||||
err_put_pdev_bd:
|
||||
platform_device_put(pdev_bd);
|
||||
err_kfree_bd:
|
||||
kfree(bd);
|
||||
err_unregister_pdev_wd:
|
||||
platform_device_unregister(pdev_wd);
|
||||
return;
|
||||
err_put_pdev_wd:
|
||||
platform_device_put(pdev_wd);
|
||||
err_kfree_wd:
|
||||
kfree(wd);
|
||||
return;
|
||||
}
|
||||
|
||||
static int probe_one_port(nasid_t nasid, int widget, int masterwid)
|
||||
|
@ -153,7 +153,7 @@ CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power9,-mtune=power8)
|
||||
else
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power4
|
||||
endif
|
||||
else ifdef CONFIG_PPC_BOOK3E_64
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
|
||||
|
@ -30,6 +30,7 @@ endif
|
||||
|
||||
BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
|
||||
-fno-strict-aliasing -O2 -msoft-float -mno-altivec -mno-vsx \
|
||||
$(call cc-option,-mno-spe) $(call cc-option,-mspe=no) \
|
||||
-pipe -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \
|
||||
$(LINUXINCLUDE)
|
||||
|
||||
|
51
arch/powerpc/boot/dts/fsl/e500v1_power_isa.dtsi
Normal file
51
arch/powerpc/boot/dts/fsl/e500v1_power_isa.dtsi
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* e500v1 Power ISA Device Tree Source (include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
power-isa-version = "2.03";
|
||||
power-isa-b; // Base
|
||||
power-isa-e; // Embedded
|
||||
power-isa-atb; // Alternate Time Base
|
||||
power-isa-cs; // Cache Specification
|
||||
power-isa-e.le; // Embedded.Little-Endian
|
||||
power-isa-e.pm; // Embedded.Performance Monitor
|
||||
power-isa-ecl; // Embedded Cache Locking
|
||||
power-isa-mmc; // Memory Coherence
|
||||
power-isa-sp; // Signal Processing Engine
|
||||
power-isa-sp.fs; // SPE.Embedded Float Scalar Single
|
||||
power-isa-sp.fv; // SPE.Embedded Float Vector
|
||||
mmu-type = "power-embedded";
|
||||
};
|
||||
};
|
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8540ADS";
|
||||
|
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8541CDS";
|
||||
|
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8555CDS";
|
||||
|
@ -7,7 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "e500v2_power_isa.dtsi"
|
||||
/include/ "e500v1_power_isa.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MPC8560ADS";
|
||||
|
@ -330,6 +330,7 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose,
|
||||
INIT_LIST_HEAD(&pdn->list);
|
||||
parent = of_get_parent(dn);
|
||||
pdn->parent = parent ? PCI_DN(parent) : NULL;
|
||||
of_node_put(parent);
|
||||
if (pdn->parent)
|
||||
list_add_tail(&pdn->list, &pdn->parent->child_list);
|
||||
|
||||
|
@ -17,6 +17,7 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/prctl.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/reg.h>
|
||||
|
@ -892,6 +892,7 @@ static void opal_export_attrs(void)
|
||||
kobj = kobject_create_and_add("exports", opal_kobj);
|
||||
if (!kobj) {
|
||||
pr_warn("kobject_create_and_add() of exports failed\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -211,8 +211,10 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
|
||||
dev_err(&pdev->dev,
|
||||
"node %pOF has an invalid fsl,msi phandle %u\n",
|
||||
hose->dn, np->phandle);
|
||||
of_node_put(np);
|
||||
return -EINVAL;
|
||||
}
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
for_each_pci_msi_entry(entry, pdev) {
|
||||
|
@ -37,6 +37,7 @@ else
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LD_IS_LLD),y)
|
||||
ifeq ($(shell test $(CONFIG_LLD_VERSION) -lt 150000; echo $$?),0)
|
||||
KBUILD_CFLAGS += -mno-relax
|
||||
KBUILD_AFLAGS += -mno-relax
|
||||
ifneq ($(LLVM_IAS),1)
|
||||
@ -44,6 +45,7 @@ ifneq ($(LLVM_IAS),1)
|
||||
KBUILD_AFLAGS += -Wa,-mno-relax
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
# ISA string setting
|
||||
riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
|
||||
|
@ -114,9 +114,9 @@ __io_reads_ins(reads, u32, l, __io_br(), __io_ar(addr))
|
||||
__io_reads_ins(ins, u8, b, __io_pbr(), __io_par(addr))
|
||||
__io_reads_ins(ins, u16, w, __io_pbr(), __io_par(addr))
|
||||
__io_reads_ins(ins, u32, l, __io_pbr(), __io_par(addr))
|
||||
#define insb(addr, buffer, count) __insb((void __iomem *)(long)addr, buffer, count)
|
||||
#define insw(addr, buffer, count) __insw((void __iomem *)(long)addr, buffer, count)
|
||||
#define insl(addr, buffer, count) __insl((void __iomem *)(long)addr, buffer, count)
|
||||
#define insb(addr, buffer, count) __insb(PCI_IOBASE + (addr), buffer, count)
|
||||
#define insw(addr, buffer, count) __insw(PCI_IOBASE + (addr), buffer, count)
|
||||
#define insl(addr, buffer, count) __insl(PCI_IOBASE + (addr), buffer, count)
|
||||
|
||||
__io_writes_outs(writes, u8, b, __io_bw(), __io_aw())
|
||||
__io_writes_outs(writes, u16, w, __io_bw(), __io_aw())
|
||||
@ -128,22 +128,22 @@ __io_writes_outs(writes, u32, l, __io_bw(), __io_aw())
|
||||
__io_writes_outs(outs, u8, b, __io_pbw(), __io_paw())
|
||||
__io_writes_outs(outs, u16, w, __io_pbw(), __io_paw())
|
||||
__io_writes_outs(outs, u32, l, __io_pbw(), __io_paw())
|
||||
#define outsb(addr, buffer, count) __outsb((void __iomem *)(long)addr, buffer, count)
|
||||
#define outsw(addr, buffer, count) __outsw((void __iomem *)(long)addr, buffer, count)
|
||||
#define outsl(addr, buffer, count) __outsl((void __iomem *)(long)addr, buffer, count)
|
||||
#define outsb(addr, buffer, count) __outsb(PCI_IOBASE + (addr), buffer, count)
|
||||
#define outsw(addr, buffer, count) __outsw(PCI_IOBASE + (addr), buffer, count)
|
||||
#define outsl(addr, buffer, count) __outsl(PCI_IOBASE + (addr), buffer, count)
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
__io_reads_ins(reads, u64, q, __io_br(), __io_ar(addr))
|
||||
#define readsq(addr, buffer, count) __readsq(addr, buffer, count)
|
||||
|
||||
__io_reads_ins(ins, u64, q, __io_pbr(), __io_par(addr))
|
||||
#define insq(addr, buffer, count) __insq((void __iomem *)addr, buffer, count)
|
||||
#define insq(addr, buffer, count) __insq(PCI_IOBASE + (addr), buffer, count)
|
||||
|
||||
__io_writes_outs(writes, u64, q, __io_bw(), __io_aw())
|
||||
#define writesq(addr, buffer, count) __writesq(addr, buffer, count)
|
||||
|
||||
__io_writes_outs(outs, u64, q, __io_pbr(), __io_paw())
|
||||
#define outsq(addr, buffer, count) __outsq((void __iomem *)addr, buffer, count)
|
||||
#define outsq(addr, buffer, count) __outsq(PCI_IOBASE + (addr), buffer, count)
|
||||
#endif
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
@ -18,9 +18,6 @@ static long riscv_sys_mmap(unsigned long addr, unsigned long len,
|
||||
if (unlikely(offset & (~PAGE_MASK >> page_shift_offset)))
|
||||
return -EINVAL;
|
||||
|
||||
if (unlikely((prot & PROT_WRITE) && !(prot & PROT_READ)))
|
||||
return -EINVAL;
|
||||
|
||||
return ksys_mmap_pgoff(addr, len, prot, flags, fd,
|
||||
offset >> (PAGE_SHIFT - page_shift_offset));
|
||||
}
|
||||
|
@ -167,7 +167,8 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)
|
||||
}
|
||||
break;
|
||||
case EXC_LOAD_PAGE_FAULT:
|
||||
if (!(vma->vm_flags & VM_READ)) {
|
||||
/* Write implies read */
|
||||
if (!(vma->vm_flags & (VM_READ | VM_WRITE))) {
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
|
@ -4,7 +4,7 @@
|
||||
|
||||
#include <asm-generic/sections.h>
|
||||
|
||||
extern long __machvec_start, __machvec_end;
|
||||
extern char __machvec_start[], __machvec_end[];
|
||||
extern char __uncached_start, __uncached_end;
|
||||
extern char __start_eh_frame[], __stop_eh_frame[];
|
||||
|
||||
|
@ -20,8 +20,8 @@
|
||||
#define MV_NAME_SIZE 32
|
||||
|
||||
#define for_each_mv(mv) \
|
||||
for ((mv) = (struct sh_machine_vector *)&__machvec_start; \
|
||||
(mv) && (unsigned long)(mv) < (unsigned long)&__machvec_end; \
|
||||
for ((mv) = (struct sh_machine_vector *)__machvec_start; \
|
||||
(mv) && (unsigned long)(mv) < (unsigned long)__machvec_end; \
|
||||
(mv)++)
|
||||
|
||||
static struct sh_machine_vector * __init get_mv_byname(const char *name)
|
||||
@ -87,8 +87,8 @@ void __init sh_mv_setup(void)
|
||||
if (!machvec_selected) {
|
||||
unsigned long machvec_size;
|
||||
|
||||
machvec_size = ((unsigned long)&__machvec_end -
|
||||
(unsigned long)&__machvec_start);
|
||||
machvec_size = ((unsigned long)__machvec_end -
|
||||
(unsigned long)__machvec_start);
|
||||
|
||||
/*
|
||||
* Sanity check for machvec section alignment. Ensure
|
||||
@ -102,7 +102,7 @@ void __init sh_mv_setup(void)
|
||||
* vector (usually the only one) from .machvec.init.
|
||||
*/
|
||||
if (machvec_size >= sizeof(struct sh_machine_vector))
|
||||
sh_mv = *(struct sh_machine_vector *)&__machvec_start;
|
||||
sh_mv = *(struct sh_machine_vector *)__machvec_start;
|
||||
}
|
||||
|
||||
pr_notice("Booting machvec: %s\n", get_system_type());
|
||||
|
@ -77,7 +77,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||
|
||||
static void *c_start(struct seq_file *m, loff_t *pos)
|
||||
{
|
||||
return *pos < NR_CPUS ? cpu_data + *pos : NULL;
|
||||
return *pos < nr_cpu_ids ? cpu_data + *pos : NULL;
|
||||
}
|
||||
|
||||
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
||||
|
@ -474,7 +474,7 @@ struct hv_enlightened_vmcs {
|
||||
u64 guest_rip;
|
||||
|
||||
u32 hv_clean_fields;
|
||||
u32 hv_padding_32;
|
||||
u32 padding32_1;
|
||||
u32 hv_synthetic_controls;
|
||||
struct {
|
||||
u32 nested_flush_hypercall:1;
|
||||
@ -482,7 +482,7 @@ struct hv_enlightened_vmcs {
|
||||
u32 reserved:30;
|
||||
} __packed hv_enlightenments_control;
|
||||
u32 hv_vp_id;
|
||||
|
||||
u32 padding32_2;
|
||||
u64 hv_vm_id;
|
||||
u64 partition_assist_page;
|
||||
u64 padding64_4[4];
|
||||
|
@ -9,6 +9,7 @@
|
||||
struct ucode_patch {
|
||||
struct list_head plist;
|
||||
void *data; /* Intel uses only this one */
|
||||
unsigned int size;
|
||||
u32 patch_id;
|
||||
u16 equiv_cpu;
|
||||
};
|
||||
|
@ -1,11 +1,11 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/tboot.h>
|
||||
|
||||
#include <asm/cpu.h>
|
||||
#include <asm/cpufeature.h>
|
||||
#include <asm/msr-index.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/vmx.h>
|
||||
#include "cpu.h"
|
||||
|
||||
#undef pr_fmt
|
||||
#define pr_fmt(fmt) "x86/cpu: " fmt
|
||||
|
@ -783,6 +783,7 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
|
||||
kfree(patch);
|
||||
return -EINVAL;
|
||||
}
|
||||
patch->size = *patch_size;
|
||||
|
||||
mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
|
||||
proc_id = mc_hdr->processor_rev_id;
|
||||
@ -864,7 +865,7 @@ load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
|
||||
return ret;
|
||||
|
||||
memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
|
||||
memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), PATCH_MAX_SIZE));
|
||||
memcpy(amd_ucode_patch, p->data, min_t(u32, p->size, PATCH_MAX_SIZE));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -416,6 +416,7 @@ static int pseudo_lock_fn(void *_rdtgrp)
|
||||
struct pseudo_lock_region *plr = rdtgrp->plr;
|
||||
u32 rmid_p, closid_p;
|
||||
unsigned long i;
|
||||
u64 saved_msr;
|
||||
#ifdef CONFIG_KASAN
|
||||
/*
|
||||
* The registers used for local register variables are also used
|
||||
@ -459,6 +460,7 @@ static int pseudo_lock_fn(void *_rdtgrp)
|
||||
* the buffer and evict pseudo-locked memory read earlier from the
|
||||
* cache.
|
||||
*/
|
||||
saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
|
||||
__wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
|
||||
closid_p = this_cpu_read(pqr_state.cur_closid);
|
||||
rmid_p = this_cpu_read(pqr_state.cur_rmid);
|
||||
@ -510,7 +512,7 @@ static int pseudo_lock_fn(void *_rdtgrp)
|
||||
__wrmsr(IA32_PQR_ASSOC, rmid_p, closid_p);
|
||||
|
||||
/* Re-enable the hardware prefetcher(s) */
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0);
|
||||
wrmsrl(MSR_MISC_FEATURE_CONTROL, saved_msr);
|
||||
local_irq_enable();
|
||||
|
||||
plr->thread_done = 1;
|
||||
@ -867,6 +869,7 @@ bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_domain *d)
|
||||
static int measure_cycles_lat_fn(void *_plr)
|
||||
{
|
||||
struct pseudo_lock_region *plr = _plr;
|
||||
u32 saved_low, saved_high;
|
||||
unsigned long i;
|
||||
u64 start, end;
|
||||
void *mem_r;
|
||||
@ -875,6 +878,7 @@ static int measure_cycles_lat_fn(void *_plr)
|
||||
/*
|
||||
* Disable hardware prefetchers.
|
||||
*/
|
||||
rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
|
||||
mem_r = READ_ONCE(plr->kmem);
|
||||
/*
|
||||
@ -891,7 +895,7 @@ static int measure_cycles_lat_fn(void *_plr)
|
||||
end = rdtsc_ordered();
|
||||
trace_pseudo_lock_mem_latency((u32)(end - start));
|
||||
}
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
local_irq_enable();
|
||||
plr->thread_done = 1;
|
||||
wake_up_interruptible(&plr->lock_thread_wq);
|
||||
@ -936,6 +940,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
|
||||
u64 hits_before = 0, hits_after = 0, miss_before = 0, miss_after = 0;
|
||||
struct perf_event *miss_event, *hit_event;
|
||||
int hit_pmcnum, miss_pmcnum;
|
||||
u32 saved_low, saved_high;
|
||||
unsigned int line_size;
|
||||
unsigned int size;
|
||||
unsigned long i;
|
||||
@ -969,6 +974,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
|
||||
/*
|
||||
* Disable hardware prefetchers.
|
||||
*/
|
||||
rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
|
||||
|
||||
/* Initialize rest of local variables */
|
||||
@ -1027,7 +1033,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
|
||||
*/
|
||||
rmb();
|
||||
/* Re-enable hardware prefetchers */
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0);
|
||||
wrmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
|
||||
local_irq_enable();
|
||||
out_hit:
|
||||
perf_event_release_kernel(hit_event);
|
||||
|
@ -2039,7 +2039,7 @@ static int em_pop_sreg(struct x86_emulate_ctxt *ctxt)
|
||||
if (rc != X86EMUL_CONTINUE)
|
||||
return rc;
|
||||
|
||||
if (ctxt->modrm_reg == VCPU_SREG_SS)
|
||||
if (seg == VCPU_SREG_SS)
|
||||
ctxt->interruptibility = KVM_X86_SHADOW_INT_MOV_SS;
|
||||
if (ctxt->op_bytes > 2)
|
||||
rsp_increment(ctxt, ctxt->op_bytes - 2);
|
||||
|
@ -3776,7 +3776,16 @@ static void nested_vmx_inject_exception_vmexit(struct kvm_vcpu *vcpu,
|
||||
u32 intr_info = nr | INTR_INFO_VALID_MASK;
|
||||
|
||||
if (vcpu->arch.exception.has_error_code) {
|
||||
vmcs12->vm_exit_intr_error_code = vcpu->arch.exception.error_code;
|
||||
/*
|
||||
* Intel CPUs do not generate error codes with bits 31:16 set,
|
||||
* and more importantly VMX disallows setting bits 31:16 in the
|
||||
* injected error code for VM-Entry. Drop the bits to mimic
|
||||
* hardware and avoid inducing failure on nested VM-Entry if L1
|
||||
* chooses to inject the exception back to L2. AMD CPUs _do_
|
||||
* generate "full" 32-bit error codes, so KVM allows userspace
|
||||
* to inject exception error codes with bits 31:16 set.
|
||||
*/
|
||||
vmcs12->vm_exit_intr_error_code = (u16)vcpu->arch.exception.error_code;
|
||||
intr_info |= INTR_INFO_DELIVER_CODE_MASK;
|
||||
}
|
||||
|
||||
@ -4183,14 +4192,6 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
|
||||
nested_vmx_abort(vcpu,
|
||||
VMX_ABORT_SAVE_GUEST_MSR_FAIL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Drop what we picked up for L2 via vmx_complete_interrupts. It is
|
||||
* preserved above and would only end up incorrectly in L1.
|
||||
*/
|
||||
vcpu->arch.nmi_injected = false;
|
||||
kvm_clear_exception_queue(vcpu);
|
||||
kvm_clear_interrupt_queue(vcpu);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -4530,6 +4531,17 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason,
|
||||
WARN_ON_ONCE(nested_early_check);
|
||||
}
|
||||
|
||||
/*
|
||||
* Drop events/exceptions that were queued for re-injection to L2
|
||||
* (picked up via vmx_complete_interrupts()), as well as exceptions
|
||||
* that were pending for L2. Note, this must NOT be hoisted above
|
||||
* prepare_vmcs12(), events/exceptions queued for re-injection need to
|
||||
* be captured in vmcs12 (see vmcs12_save_pending_event()).
|
||||
*/
|
||||
vcpu->arch.nmi_injected = false;
|
||||
kvm_clear_exception_queue(vcpu);
|
||||
kvm_clear_interrupt_queue(vcpu);
|
||||
|
||||
vmx_switch_vmcs(vcpu, &vmx->vmcs01);
|
||||
|
||||
/* Update any VMCS fields that might have changed while L2 ran */
|
||||
|
@ -1737,7 +1737,17 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu)
|
||||
kvm_deliver_exception_payload(vcpu);
|
||||
|
||||
if (has_error_code) {
|
||||
vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
|
||||
/*
|
||||
* Despite the error code being architecturally defined as 32
|
||||
* bits, and the VMCS field being 32 bits, Intel CPUs and thus
|
||||
* VMX don't actually supporting setting bits 31:16. Hardware
|
||||
* will (should) never provide a bogus error code, but AMD CPUs
|
||||
* do generate error codes with bits 31:16 set, and so KVM's
|
||||
* ABI lets userspace shove in arbitrary 32-bit values. Drop
|
||||
* the upper bits to avoid VM-Fail, losing information that
|
||||
* does't really exist is preferable to killing the VM.
|
||||
*/
|
||||
vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)error_code);
|
||||
intr_info |= INTR_INFO_DELIVER_CODE_MASK;
|
||||
}
|
||||
|
||||
|
@ -768,6 +768,7 @@ static void xen_load_idt(const struct desc_ptr *desc)
|
||||
{
|
||||
static DEFINE_SPINLOCK(lock);
|
||||
static struct trap_info traps[257];
|
||||
static const struct trap_info zero = { };
|
||||
unsigned out;
|
||||
|
||||
trace_xen_cpu_load_idt(desc);
|
||||
@ -777,7 +778,7 @@ static void xen_load_idt(const struct desc_ptr *desc)
|
||||
memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
|
||||
|
||||
out = xen_convert_trap_info(desc, traps, false);
|
||||
memset(&traps[out], 0, sizeof(traps[0]));
|
||||
traps[out] = zero;
|
||||
|
||||
xen_mc_flush();
|
||||
if (HYPERVISOR_set_trap_table(traps))
|
||||
|
@ -944,7 +944,7 @@ static bool tg_with_in_bps_limit(struct throtl_grp *tg, struct bio *bio,
|
||||
u64 bps_limit, unsigned long *wait)
|
||||
{
|
||||
bool rw = bio_data_dir(bio);
|
||||
u64 bytes_allowed, extra_bytes, tmp;
|
||||
u64 bytes_allowed, extra_bytes;
|
||||
unsigned long jiffy_elapsed, jiffy_wait, jiffy_elapsed_rnd;
|
||||
unsigned int bio_size = throtl_bio_data_size(bio);
|
||||
|
||||
@ -961,10 +961,8 @@ static bool tg_with_in_bps_limit(struct throtl_grp *tg, struct bio *bio,
|
||||
jiffy_elapsed_rnd = tg->td->throtl_slice;
|
||||
|
||||
jiffy_elapsed_rnd = roundup(jiffy_elapsed_rnd, tg->td->throtl_slice);
|
||||
|
||||
tmp = bps_limit * jiffy_elapsed_rnd;
|
||||
do_div(tmp, HZ);
|
||||
bytes_allowed = tmp;
|
||||
bytes_allowed = mul_u64_u64_div_u64(bps_limit, (u64)jiffy_elapsed_rnd,
|
||||
(u64)HZ);
|
||||
|
||||
if (tg->bytes_disp[rw] + bio_size <= bytes_allowed) {
|
||||
if (wait)
|
||||
|
@ -120,6 +120,12 @@ static int akcipher_default_op(struct akcipher_request *req)
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static int akcipher_default_set_key(struct crypto_akcipher *tfm,
|
||||
const void *key, unsigned int keylen)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
int crypto_register_akcipher(struct akcipher_alg *alg)
|
||||
{
|
||||
struct crypto_alg *base = &alg->base;
|
||||
@ -132,6 +138,8 @@ int crypto_register_akcipher(struct akcipher_alg *alg)
|
||||
alg->encrypt = akcipher_default_op;
|
||||
if (!alg->decrypt)
|
||||
alg->decrypt = akcipher_default_op;
|
||||
if (!alg->set_priv_key)
|
||||
alg->set_priv_key = akcipher_default_set_key;
|
||||
|
||||
akcipher_prepare_alg(alg);
|
||||
return crypto_register_alg(base);
|
||||
|
@ -498,6 +498,22 @@ static const struct dmi_system_id video_dmi_table[] = {
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE R830"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = video_disable_backlight_sysfs_if,
|
||||
.ident = "Toshiba Satellite Z830",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE Z830"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = video_disable_backlight_sysfs_if,
|
||||
.ident = "Toshiba Portege Z830",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE Z830"),
|
||||
},
|
||||
},
|
||||
/*
|
||||
* Some machine's _DOD IDs don't have bit 31(Device ID Scheme) set
|
||||
* but the IDs actually follow the Device ID Scheme.
|
||||
|
@ -985,7 +985,7 @@ static void ghes_proc_in_irq(struct irq_work *irq_work)
|
||||
ghes_estatus_cache_add(generic, estatus);
|
||||
}
|
||||
|
||||
if (task_work_pending && current->mm != &init_mm) {
|
||||
if (task_work_pending && current->mm) {
|
||||
estatus_node->task_work.func = ghes_kick_task_work;
|
||||
estatus_node->task_work_cpu = smp_processor_id();
|
||||
ret = task_work_add(current, &estatus_node->task_work,
|
||||
|
@ -451,14 +451,24 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
|
||||
}
|
||||
}
|
||||
|
||||
hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
|
||||
/*
|
||||
* Too many sub-nodes most likely means having something wrong with
|
||||
* the firmware.
|
||||
*/
|
||||
child_nodes = of_get_child_count(dev->of_node);
|
||||
if (child_nodes > AHCI_MAX_PORTS) {
|
||||
rc = -EINVAL;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
/*
|
||||
* If no sub-node was found, we still need to set nports to
|
||||
* one in order to be able to use the
|
||||
* ahci_platform_[en|dis]able_[phys|regulators] functions.
|
||||
*/
|
||||
if (!child_nodes)
|
||||
if (child_nodes)
|
||||
hpriv->nports = child_nodes;
|
||||
else
|
||||
hpriv->nports = 1;
|
||||
|
||||
hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
|
||||
|
@ -1342,10 +1342,12 @@ static int nbd_start_device_ioctl(struct nbd_device *nbd, struct block_device *b
|
||||
mutex_unlock(&nbd->config_lock);
|
||||
ret = wait_event_interruptible(config->recv_wq,
|
||||
atomic_read(&config->recv_threads) == 0);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
sock_shutdown(nbd);
|
||||
flush_workqueue(nbd->recv_workq);
|
||||
nbd_clear_que(nbd);
|
||||
}
|
||||
|
||||
flush_workqueue(nbd->recv_workq);
|
||||
mutex_lock(&nbd->config_lock);
|
||||
nbd_bdev_reset(bdev);
|
||||
/* user requested, ignore socket errors */
|
||||
|
@ -2816,6 +2816,7 @@ enum {
|
||||
enum {
|
||||
BTMTK_WMT_INVALID,
|
||||
BTMTK_WMT_PATCH_UNDONE,
|
||||
BTMTK_WMT_PATCH_PROGRESS,
|
||||
BTMTK_WMT_PATCH_DONE,
|
||||
BTMTK_WMT_ON_UNDONE,
|
||||
BTMTK_WMT_ON_DONE,
|
||||
@ -2831,7 +2832,7 @@ struct btmtk_wmt_hdr {
|
||||
|
||||
struct btmtk_hci_wmt_cmd {
|
||||
struct btmtk_wmt_hdr hdr;
|
||||
u8 data[256];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
struct btmtk_hci_wmt_evt {
|
||||
@ -2934,7 +2935,7 @@ static void btusb_mtk_wmt_recv(struct urb *urb)
|
||||
* to generate the event. Otherwise, the WMT event cannot return from
|
||||
* the device successfully.
|
||||
*/
|
||||
udelay(100);
|
||||
udelay(500);
|
||||
|
||||
usb_anchor_urb(urb, &data->ctrl_anchor);
|
||||
err = usb_submit_urb(urb, GFP_ATOMIC);
|
||||
@ -3010,7 +3011,7 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev,
|
||||
struct btmtk_hci_wmt_evt_funcc *wmt_evt_funcc;
|
||||
u32 hlen, status = BTMTK_WMT_INVALID;
|
||||
struct btmtk_hci_wmt_evt *wmt_evt;
|
||||
struct btmtk_hci_wmt_cmd wc;
|
||||
struct btmtk_hci_wmt_cmd *wc;
|
||||
struct btmtk_wmt_hdr *hdr;
|
||||
int err;
|
||||
|
||||
@ -3019,24 +3020,42 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev,
|
||||
if (hlen > 255)
|
||||
return -EINVAL;
|
||||
|
||||
hdr = (struct btmtk_wmt_hdr *)&wc;
|
||||
wc = kzalloc(hlen, GFP_KERNEL);
|
||||
if (!wc)
|
||||
return -ENOMEM;
|
||||
|
||||
hdr = &wc->hdr;
|
||||
hdr->dir = 1;
|
||||
hdr->op = wmt_params->op;
|
||||
hdr->dlen = cpu_to_le16(wmt_params->dlen + 1);
|
||||
hdr->flag = wmt_params->flag;
|
||||
memcpy(wc.data, wmt_params->data, wmt_params->dlen);
|
||||
memcpy(wc->data, wmt_params->data, wmt_params->dlen);
|
||||
|
||||
set_bit(BTUSB_TX_WAIT_VND_EVT, &data->flags);
|
||||
|
||||
err = __hci_cmd_send(hdev, 0xfc6f, hlen, &wc);
|
||||
/* WMT cmd/event doesn't follow up the generic HCI cmd/event handling,
|
||||
* it needs constantly polling control pipe until the host received the
|
||||
* WMT event, thus, we should require to specifically acquire PM counter
|
||||
* on the USB to prevent the interface from entering auto suspended
|
||||
* while WMT cmd/event in progress.
|
||||
*/
|
||||
err = usb_autopm_get_interface(data->intf);
|
||||
if (err < 0)
|
||||
goto err_free_wc;
|
||||
|
||||
err = __hci_cmd_send(hdev, 0xfc6f, hlen, wc);
|
||||
|
||||
if (err < 0) {
|
||||
clear_bit(BTUSB_TX_WAIT_VND_EVT, &data->flags);
|
||||
return err;
|
||||
usb_autopm_put_interface(data->intf);
|
||||
goto err_free_wc;
|
||||
}
|
||||
|
||||
/* Submit control IN URB on demand to process the WMT event */
|
||||
err = btusb_mtk_submit_wmt_recv_urb(hdev);
|
||||
|
||||
usb_autopm_put_interface(data->intf);
|
||||
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
@ -3054,13 +3073,14 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev,
|
||||
if (err == -EINTR) {
|
||||
bt_dev_err(hdev, "Execution of wmt command interrupted");
|
||||
clear_bit(BTUSB_TX_WAIT_VND_EVT, &data->flags);
|
||||
return err;
|
||||
goto err_free_wc;
|
||||
}
|
||||
|
||||
if (err) {
|
||||
bt_dev_err(hdev, "Execution of wmt command timed out");
|
||||
clear_bit(BTUSB_TX_WAIT_VND_EVT, &data->flags);
|
||||
return -ETIMEDOUT;
|
||||
err = -ETIMEDOUT;
|
||||
goto err_free_wc;
|
||||
}
|
||||
|
||||
/* Parse and handle the return WMT event */
|
||||
@ -3096,7 +3116,8 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev,
|
||||
err_free_skb:
|
||||
kfree_skb(data->evt_skb);
|
||||
data->evt_skb = NULL;
|
||||
|
||||
err_free_wc:
|
||||
kfree(wc);
|
||||
return err;
|
||||
}
|
||||
|
||||
@ -3238,9 +3259,9 @@ static int btusb_mtk_reg_read(struct btusb_data *data, u32 reg, u32 *val)
|
||||
return err;
|
||||
}
|
||||
|
||||
static int btusb_mtk_id_get(struct btusb_data *data, u32 *id)
|
||||
static int btusb_mtk_id_get(struct btusb_data *data, u32 reg, u32 *id)
|
||||
{
|
||||
return btusb_mtk_reg_read(data, 0x80000008, id);
|
||||
return btusb_mtk_reg_read(data, reg, id);
|
||||
}
|
||||
|
||||
static int btusb_mtk_setup(struct hci_dev *hdev)
|
||||
@ -3258,7 +3279,7 @@ static int btusb_mtk_setup(struct hci_dev *hdev)
|
||||
|
||||
calltime = ktime_get();
|
||||
|
||||
err = btusb_mtk_id_get(data, &dev_id);
|
||||
err = btusb_mtk_id_get(data, 0x80000008, &dev_id);
|
||||
if (err < 0) {
|
||||
bt_dev_err(hdev, "Failed to get device id (%d)", err);
|
||||
return err;
|
||||
|
@ -490,6 +490,11 @@ static int hci_uart_tty_open(struct tty_struct *tty)
|
||||
BT_ERR("Can't allocate control structure");
|
||||
return -ENFILE;
|
||||
}
|
||||
if (percpu_init_rwsem(&hu->proto_lock)) {
|
||||
BT_ERR("Can't allocate semaphore structure");
|
||||
kfree(hu);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
tty->disc_data = hu;
|
||||
hu->tty = tty;
|
||||
@ -502,8 +507,6 @@ static int hci_uart_tty_open(struct tty_struct *tty)
|
||||
INIT_WORK(&hu->init_ready, hci_uart_init_work);
|
||||
INIT_WORK(&hu->write_work, hci_uart_write_work);
|
||||
|
||||
percpu_init_rwsem(&hu->proto_lock);
|
||||
|
||||
/* Flush any pending characters in the driver */
|
||||
tty_driver_flush_buffer(tty);
|
||||
|
||||
|
@ -301,11 +301,12 @@ int hci_uart_register_device(struct hci_uart *hu,
|
||||
|
||||
serdev_device_set_client_ops(hu->serdev, &hci_serdev_client_ops);
|
||||
|
||||
if (percpu_init_rwsem(&hu->proto_lock))
|
||||
return -ENOMEM;
|
||||
|
||||
err = serdev_device_open(hu->serdev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
percpu_init_rwsem(&hu->proto_lock);
|
||||
goto err_rwsem;
|
||||
|
||||
err = p->open(hu);
|
||||
if (err)
|
||||
@ -375,6 +376,8 @@ int hci_uart_register_device(struct hci_uart *hu,
|
||||
p->close(hu);
|
||||
err_open:
|
||||
serdev_device_close(hu->serdev);
|
||||
err_rwsem:
|
||||
percpu_free_rwsem(&hu->proto_lock);
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hci_uart_register_device);
|
||||
@ -396,5 +399,6 @@ void hci_uart_unregister_device(struct hci_uart *hu)
|
||||
clear_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||
serdev_device_close(hu->serdev);
|
||||
}
|
||||
percpu_free_rwsem(&hu->proto_lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hci_uart_unregister_device);
|
||||
|
@ -272,13 +272,6 @@ static int imx_rngc_probe(struct platform_device *pdev)
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = devm_request_irq(&pdev->dev,
|
||||
irq, imx_rngc_irq, 0, pdev->name, (void *)rngc);
|
||||
if (ret) {
|
||||
dev_err(rngc->dev, "Can't get interrupt working.\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
init_completion(&rngc->rng_op_done);
|
||||
|
||||
rngc->rng.name = pdev->name;
|
||||
@ -292,6 +285,13 @@ static int imx_rngc_probe(struct platform_device *pdev)
|
||||
|
||||
imx_rngc_irq_mask_clear(rngc);
|
||||
|
||||
ret = devm_request_irq(&pdev->dev,
|
||||
irq, imx_rngc_irq, 0, pdev->name, (void *)rngc);
|
||||
if (ret) {
|
||||
dev_err(rngc->dev, "Can't get interrupt working.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (self_test) {
|
||||
ret = imx_rngc_self_test(rngc);
|
||||
if (ret) {
|
||||
|
@ -34,6 +34,7 @@
|
||||
#define CCU_DIV_CTL_CLKDIV_MASK(_width) \
|
||||
GENMASK((_width) + CCU_DIV_CTL_CLKDIV_FLD - 1, CCU_DIV_CTL_CLKDIV_FLD)
|
||||
#define CCU_DIV_CTL_LOCK_SHIFTED BIT(27)
|
||||
#define CCU_DIV_CTL_GATE_REF_BUF BIT(28)
|
||||
#define CCU_DIV_CTL_LOCK_NORMAL BIT(31)
|
||||
|
||||
#define CCU_DIV_RST_DELAY_US 1
|
||||
@ -170,6 +171,40 @@ static int ccu_div_gate_is_enabled(struct clk_hw *hw)
|
||||
return !!(val & CCU_DIV_CTL_EN);
|
||||
}
|
||||
|
||||
static int ccu_div_buf_enable(struct clk_hw *hw)
|
||||
{
|
||||
struct ccu_div *div = to_ccu_div(hw);
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&div->lock, flags);
|
||||
regmap_update_bits(div->sys_regs, div->reg_ctl,
|
||||
CCU_DIV_CTL_GATE_REF_BUF, 0);
|
||||
spin_unlock_irqrestore(&div->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ccu_div_buf_disable(struct clk_hw *hw)
|
||||
{
|
||||
struct ccu_div *div = to_ccu_div(hw);
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&div->lock, flags);
|
||||
regmap_update_bits(div->sys_regs, div->reg_ctl,
|
||||
CCU_DIV_CTL_GATE_REF_BUF, CCU_DIV_CTL_GATE_REF_BUF);
|
||||
spin_unlock_irqrestore(&div->lock, flags);
|
||||
}
|
||||
|
||||
static int ccu_div_buf_is_enabled(struct clk_hw *hw)
|
||||
{
|
||||
struct ccu_div *div = to_ccu_div(hw);
|
||||
u32 val = 0;
|
||||
|
||||
regmap_read(div->sys_regs, div->reg_ctl, &val);
|
||||
|
||||
return !(val & CCU_DIV_CTL_GATE_REF_BUF);
|
||||
}
|
||||
|
||||
static unsigned long ccu_div_var_recalc_rate(struct clk_hw *hw,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
@ -323,6 +358,7 @@ static const struct ccu_div_dbgfs_bit ccu_div_bits[] = {
|
||||
CCU_DIV_DBGFS_BIT_ATTR("div_en", CCU_DIV_CTL_EN),
|
||||
CCU_DIV_DBGFS_BIT_ATTR("div_rst", CCU_DIV_CTL_RST),
|
||||
CCU_DIV_DBGFS_BIT_ATTR("div_bypass", CCU_DIV_CTL_SET_CLKDIV),
|
||||
CCU_DIV_DBGFS_BIT_ATTR("div_buf", CCU_DIV_CTL_GATE_REF_BUF),
|
||||
CCU_DIV_DBGFS_BIT_ATTR("div_lock", CCU_DIV_CTL_LOCK_NORMAL)
|
||||
};
|
||||
|
||||
@ -441,6 +477,9 @@ static void ccu_div_var_debug_init(struct clk_hw *hw, struct dentry *dentry)
|
||||
continue;
|
||||
}
|
||||
|
||||
if (!strcmp("div_buf", name))
|
||||
continue;
|
||||
|
||||
bits[didx] = ccu_div_bits[bidx];
|
||||
bits[didx].div = div;
|
||||
|
||||
@ -477,6 +516,21 @@ static void ccu_div_gate_debug_init(struct clk_hw *hw, struct dentry *dentry)
|
||||
&ccu_div_dbgfs_fixed_clkdiv_fops);
|
||||
}
|
||||
|
||||
static void ccu_div_buf_debug_init(struct clk_hw *hw, struct dentry *dentry)
|
||||
{
|
||||
struct ccu_div *div = to_ccu_div(hw);
|
||||
struct ccu_div_dbgfs_bit *bit;
|
||||
|
||||
bit = kmalloc(sizeof(*bit), GFP_KERNEL);
|
||||
if (!bit)
|
||||
return;
|
||||
|
||||
*bit = ccu_div_bits[3];
|
||||
bit->div = div;
|
||||
debugfs_create_file_unsafe(bit->name, ccu_div_dbgfs_mode, dentry, bit,
|
||||
&ccu_div_dbgfs_bit_fops);
|
||||
}
|
||||
|
||||
static void ccu_div_fixed_debug_init(struct clk_hw *hw, struct dentry *dentry)
|
||||
{
|
||||
struct ccu_div *div = to_ccu_div(hw);
|
||||
@ -489,6 +543,7 @@ static void ccu_div_fixed_debug_init(struct clk_hw *hw, struct dentry *dentry)
|
||||
|
||||
#define ccu_div_var_debug_init NULL
|
||||
#define ccu_div_gate_debug_init NULL
|
||||
#define ccu_div_buf_debug_init NULL
|
||||
#define ccu_div_fixed_debug_init NULL
|
||||
|
||||
#endif /* !CONFIG_DEBUG_FS */
|
||||
@ -520,6 +575,13 @@ static const struct clk_ops ccu_div_gate_ops = {
|
||||
.debug_init = ccu_div_gate_debug_init
|
||||
};
|
||||
|
||||
static const struct clk_ops ccu_div_buf_ops = {
|
||||
.enable = ccu_div_buf_enable,
|
||||
.disable = ccu_div_buf_disable,
|
||||
.is_enabled = ccu_div_buf_is_enabled,
|
||||
.debug_init = ccu_div_buf_debug_init
|
||||
};
|
||||
|
||||
static const struct clk_ops ccu_div_fixed_ops = {
|
||||
.recalc_rate = ccu_div_fixed_recalc_rate,
|
||||
.round_rate = ccu_div_fixed_round_rate,
|
||||
@ -566,6 +628,8 @@ struct ccu_div *ccu_div_hw_register(const struct ccu_div_init_data *div_init)
|
||||
} else if (div_init->type == CCU_DIV_GATE) {
|
||||
hw_init.ops = &ccu_div_gate_ops;
|
||||
div->divider = div_init->divider;
|
||||
} else if (div_init->type == CCU_DIV_BUF) {
|
||||
hw_init.ops = &ccu_div_buf_ops;
|
||||
} else if (div_init->type == CCU_DIV_FIXED) {
|
||||
hw_init.ops = &ccu_div_fixed_ops;
|
||||
div->divider = div_init->divider;
|
||||
@ -579,6 +643,7 @@ struct ccu_div *ccu_div_hw_register(const struct ccu_div_init_data *div_init)
|
||||
goto err_free_div;
|
||||
}
|
||||
parent_data.fw_name = div_init->parent_name;
|
||||
parent_data.name = div_init->parent_name;
|
||||
hw_init.parent_data = &parent_data;
|
||||
hw_init.num_parents = 1;
|
||||
|
||||
|
@ -13,6 +13,14 @@
|
||||
#include <linux/bits.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
/*
|
||||
* CCU Divider private clock IDs
|
||||
* @CCU_SYS_SATA_CLK: CCU SATA internal clock
|
||||
* @CCU_SYS_XGMAC_CLK: CCU XGMAC internal clock
|
||||
*/
|
||||
#define CCU_SYS_SATA_CLK -1
|
||||
#define CCU_SYS_XGMAC_CLK -2
|
||||
|
||||
/*
|
||||
* CCU Divider private flags
|
||||
* @CCU_DIV_SKIP_ONE: Due to some reason divider can't be set to 1.
|
||||
@ -31,11 +39,13 @@
|
||||
* enum ccu_div_type - CCU Divider types
|
||||
* @CCU_DIV_VAR: Clocks gate with variable divider.
|
||||
* @CCU_DIV_GATE: Clocks gate with fixed divider.
|
||||
* @CCU_DIV_BUF: Clock gate with no divider.
|
||||
* @CCU_DIV_FIXED: Ungateable clock with fixed divider.
|
||||
*/
|
||||
enum ccu_div_type {
|
||||
CCU_DIV_VAR,
|
||||
CCU_DIV_GATE,
|
||||
CCU_DIV_BUF,
|
||||
CCU_DIV_FIXED
|
||||
};
|
||||
|
||||
|
@ -76,6 +76,16 @@
|
||||
.divider = _divider \
|
||||
}
|
||||
|
||||
#define CCU_DIV_BUF_INFO(_id, _name, _pname, _base, _flags) \
|
||||
{ \
|
||||
.id = _id, \
|
||||
.name = _name, \
|
||||
.parent_name = _pname, \
|
||||
.base = _base, \
|
||||
.type = CCU_DIV_BUF, \
|
||||
.flags = _flags \
|
||||
}
|
||||
|
||||
#define CCU_DIV_FIXED_INFO(_id, _name, _pname, _divider) \
|
||||
{ \
|
||||
.id = _id, \
|
||||
@ -188,11 +198,14 @@ static const struct ccu_div_rst_map axi_rst_map[] = {
|
||||
* for the SoC devices registers IO-operations.
|
||||
*/
|
||||
static const struct ccu_div_info sys_info[] = {
|
||||
CCU_DIV_VAR_INFO(CCU_SYS_SATA_REF_CLK, "sys_sata_ref_clk",
|
||||
CCU_DIV_VAR_INFO(CCU_SYS_SATA_CLK, "sys_sata_clk",
|
||||
"sata_clk", CCU_SYS_SATA_REF_BASE, 4,
|
||||
CLK_SET_RATE_GATE,
|
||||
CCU_DIV_SKIP_ONE | CCU_DIV_LOCK_SHIFTED |
|
||||
CCU_DIV_RESET_DOMAIN),
|
||||
CCU_DIV_BUF_INFO(CCU_SYS_SATA_REF_CLK, "sys_sata_ref_clk",
|
||||
"sys_sata_clk", CCU_SYS_SATA_REF_BASE,
|
||||
CLK_SET_RATE_PARENT),
|
||||
CCU_DIV_VAR_INFO(CCU_SYS_APB_CLK, "sys_apb_clk",
|
||||
"pcie_clk", CCU_SYS_APB_BASE, 5,
|
||||
CLK_IS_CRITICAL, CCU_DIV_RESET_DOMAIN),
|
||||
@ -204,10 +217,12 @@ static const struct ccu_div_info sys_info[] = {
|
||||
"eth_clk", CCU_SYS_GMAC1_BASE, 5),
|
||||
CCU_DIV_FIXED_INFO(CCU_SYS_GMAC1_PTP_CLK, "sys_gmac1_ptp_clk",
|
||||
"eth_clk", 10),
|
||||
CCU_DIV_GATE_INFO(CCU_SYS_XGMAC_REF_CLK, "sys_xgmac_ref_clk",
|
||||
"eth_clk", CCU_SYS_XGMAC_BASE, 8),
|
||||
CCU_DIV_GATE_INFO(CCU_SYS_XGMAC_CLK, "sys_xgmac_clk",
|
||||
"eth_clk", CCU_SYS_XGMAC_BASE, 1),
|
||||
CCU_DIV_FIXED_INFO(CCU_SYS_XGMAC_REF_CLK, "sys_xgmac_ref_clk",
|
||||
"sys_xgmac_clk", 8),
|
||||
CCU_DIV_FIXED_INFO(CCU_SYS_XGMAC_PTP_CLK, "sys_xgmac_ptp_clk",
|
||||
"eth_clk", 10),
|
||||
"sys_xgmac_clk", 8),
|
||||
CCU_DIV_GATE_INFO(CCU_SYS_USB_CLK, "sys_usb_clk",
|
||||
"eth_clk", CCU_SYS_USB_BASE, 10),
|
||||
CCU_DIV_VAR_INFO(CCU_SYS_PVT_CLK, "sys_pvt_clk",
|
||||
@ -396,6 +411,9 @@ static int ccu_div_clk_register(struct ccu_div_data *data)
|
||||
init.base = info->base;
|
||||
init.sys_regs = data->sys_regs;
|
||||
init.divider = info->divider;
|
||||
} else if (init.type == CCU_DIV_BUF) {
|
||||
init.base = info->base;
|
||||
init.sys_regs = data->sys_regs;
|
||||
} else {
|
||||
init.divider = info->divider;
|
||||
}
|
||||
|
@ -968,9 +968,9 @@ static u32 bcm2835_clock_choose_div(struct clk_hw *hw,
|
||||
return div;
|
||||
}
|
||||
|
||||
static long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock,
|
||||
unsigned long parent_rate,
|
||||
u32 div)
|
||||
static unsigned long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock,
|
||||
unsigned long parent_rate,
|
||||
u32 div)
|
||||
{
|
||||
const struct bcm2835_clock_data *data = clock->data;
|
||||
u64 temp;
|
||||
@ -1786,7 +1786,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
|
||||
.load_mask = CM_PLLC_LOADPER,
|
||||
.hold_mask = CM_PLLC_HOLDPER,
|
||||
.fixed_divider = 1,
|
||||
.flags = CLK_SET_RATE_PARENT),
|
||||
.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
|
||||
|
||||
/*
|
||||
* PLLD is the display PLL, used to drive DSI display panels.
|
||||
|
@ -500,12 +500,15 @@ static void __init berlin2_clock_setup(struct device_node *np)
|
||||
int n, ret;
|
||||
|
||||
clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL);
|
||||
if (!clk_data)
|
||||
if (!clk_data) {
|
||||
of_node_put(parent_np);
|
||||
return;
|
||||
}
|
||||
clk_data->num = MAX_CLKS;
|
||||
hws = clk_data->hws;
|
||||
|
||||
gbase = of_iomap(parent_np, 0);
|
||||
of_node_put(parent_np);
|
||||
if (!gbase)
|
||||
return;
|
||||
|
||||
|
@ -286,19 +286,23 @@ static void __init berlin2q_clock_setup(struct device_node *np)
|
||||
int n, ret;
|
||||
|
||||
clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL);
|
||||
if (!clk_data)
|
||||
if (!clk_data) {
|
||||
of_node_put(parent_np);
|
||||
return;
|
||||
}
|
||||
clk_data->num = MAX_CLKS;
|
||||
hws = clk_data->hws;
|
||||
|
||||
gbase = of_iomap(parent_np, 0);
|
||||
if (!gbase) {
|
||||
of_node_put(parent_np);
|
||||
pr_err("%pOF: Unable to map global base\n", np);
|
||||
return;
|
||||
}
|
||||
|
||||
/* BG2Q CPU PLL is not part of global registers */
|
||||
cpupll_base = of_iomap(parent_np, 1);
|
||||
of_node_put(parent_np);
|
||||
if (!cpupll_base) {
|
||||
pr_err("%pOF: Unable to map cpupll base\n", np);
|
||||
iounmap(gbase);
|
||||
|
@ -622,7 +622,7 @@ static int aspeed_g6_clk_probe(struct platform_device *pdev)
|
||||
regmap_write(map, 0x308, 0x12000); /* 3x3 = 9 */
|
||||
|
||||
/* P-Bus (BCLK) clock divider */
|
||||
hw = clk_hw_register_divider_table(dev, "bclk", "hpll", 0,
|
||||
hw = clk_hw_register_divider_table(dev, "bclk", "epll", 0,
|
||||
scu_g6_base + ASPEED_G6_CLK_SELECTION1, 20, 3, 0,
|
||||
ast2600_div_table,
|
||||
&aspeed_g6_clk_lock);
|
||||
|
@ -207,7 +207,7 @@ static const struct of_device_id oxnas_stdclk_dt_ids[] = {
|
||||
|
||||
static int oxnas_stdclk_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct device_node *np = pdev->dev.of_node, *parent_np;
|
||||
const struct oxnas_stdclk_data *data;
|
||||
const struct of_device_id *id;
|
||||
struct regmap *regmap;
|
||||
@ -219,7 +219,9 @@ static int oxnas_stdclk_probe(struct platform_device *pdev)
|
||||
return -ENODEV;
|
||||
data = id->data;
|
||||
|
||||
regmap = syscon_node_to_regmap(of_get_parent(np));
|
||||
parent_np = of_get_parent(np);
|
||||
regmap = syscon_node_to_regmap(parent_np);
|
||||
of_node_put(parent_np);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(&pdev->dev, "failed to have parent regmap\n");
|
||||
return PTR_ERR(regmap);
|
||||
|
@ -1038,8 +1038,13 @@ static void __init _clockgen_init(struct device_node *np, bool legacy);
|
||||
*/
|
||||
static void __init legacy_init_clockgen(struct device_node *np)
|
||||
{
|
||||
if (!clockgen.node)
|
||||
_clockgen_init(of_get_parent(np), true);
|
||||
if (!clockgen.node) {
|
||||
struct device_node *parent_np;
|
||||
|
||||
parent_np = of_get_parent(np);
|
||||
_clockgen_init(parent_np, true);
|
||||
of_node_put(parent_np);
|
||||
}
|
||||
}
|
||||
|
||||
/* Legacy node */
|
||||
@ -1134,6 +1139,7 @@ static struct clk * __init create_sysclk(const char *name)
|
||||
sysclk = of_get_child_by_name(clockgen.node, "sysclk");
|
||||
if (sysclk) {
|
||||
clk = sysclk_from_fixed(sysclk, name);
|
||||
of_node_put(sysclk);
|
||||
if (!IS_ERR(clk))
|
||||
return clk;
|
||||
}
|
||||
|
@ -1116,7 +1116,7 @@ static const struct vc5_chip_info idt_5p49v6901_info = {
|
||||
.model = IDT_VC6_5P49V6901,
|
||||
.clk_fod_cnt = 4,
|
||||
.clk_out_cnt = 5,
|
||||
.flags = VC5_HAS_PFD_FREQ_DBL,
|
||||
.flags = VC5_HAS_PFD_FREQ_DBL | VC5_HAS_BYPASS_SYNC_BIT,
|
||||
};
|
||||
|
||||
static const struct vc5_chip_info idt_5p49v6965_info = {
|
||||
|
@ -18,9 +18,9 @@ static const struct mtk_gate_regs mfg_cg_regs = {
|
||||
.sta_ofs = 0x0,
|
||||
};
|
||||
|
||||
#define GATE_MFG(_id, _name, _parent, _shift) \
|
||||
GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \
|
||||
&mtk_clk_gate_ops_setclr)
|
||||
#define GATE_MFG(_id, _name, _parent, _shift) \
|
||||
GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift, \
|
||||
&mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT)
|
||||
|
||||
static const struct mtk_gate mfg_clks[] = {
|
||||
GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0)
|
||||
|
@ -38,6 +38,7 @@ int meson_aoclkc_probe(struct platform_device *pdev)
|
||||
struct meson_aoclk_reset_controller *rstc;
|
||||
struct meson_aoclk_data *data;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np;
|
||||
struct regmap *regmap;
|
||||
int ret, clkid;
|
||||
|
||||
@ -49,7 +50,9 @@ int meson_aoclkc_probe(struct platform_device *pdev)
|
||||
if (!rstc)
|
||||
return -ENOMEM;
|
||||
|
||||
regmap = syscon_node_to_regmap(of_get_parent(dev->of_node));
|
||||
np = of_get_parent(dev->of_node);
|
||||
regmap = syscon_node_to_regmap(np);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(dev, "failed to get regmap\n");
|
||||
return PTR_ERR(regmap);
|
||||
|
@ -18,6 +18,7 @@ int meson_eeclkc_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct meson_eeclkc_data *data;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np;
|
||||
struct regmap *map;
|
||||
int ret, i;
|
||||
|
||||
@ -26,7 +27,9 @@ int meson_eeclkc_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
|
||||
/* Get the hhi system controller node */
|
||||
map = syscon_node_to_regmap(of_get_parent(dev->of_node));
|
||||
np = of_get_parent(dev->of_node);
|
||||
map = syscon_node_to_regmap(np);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(map)) {
|
||||
dev_err(dev,
|
||||
"failed to get HHI regmap\n");
|
||||
|
@ -3735,13 +3735,16 @@ static void __init meson8b_clkc_init_common(struct device_node *np,
|
||||
struct clk_hw_onecell_data *clk_hw_onecell_data)
|
||||
{
|
||||
struct meson8b_clk_reset *rstc;
|
||||
struct device_node *parent_np;
|
||||
const char *notifier_clk_name;
|
||||
struct clk *notifier_clk;
|
||||
void __iomem *clk_base;
|
||||
struct regmap *map;
|
||||
int i, ret;
|
||||
|
||||
map = syscon_node_to_regmap(of_get_parent(np));
|
||||
parent_np = of_get_parent(np);
|
||||
map = syscon_node_to_regmap(parent_np);
|
||||
of_node_put(parent_np);
|
||||
if (IS_ERR(map)) {
|
||||
pr_info("failed to get HHI regmap - Trying obsolete regs\n");
|
||||
|
||||
|
@ -57,7 +57,7 @@ static struct clk_branch apcs_alias0_core_clk = {
|
||||
.parent_hws = (const struct clk_hw *[]){
|
||||
&apcs_alias0_clk_src.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
|
||||
.ops = &clk_branch2_ops,
|
||||
},
|
||||
},
|
||||
|
@ -41,7 +41,7 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
|
||||
{
|
||||
void __iomem *base;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *node = dev->of_node;
|
||||
struct device_node *node = dev->of_node, *np;
|
||||
struct regmap *regmap;
|
||||
|
||||
if (of_find_property(node, "sprd,syscon", NULL)) {
|
||||
@ -50,9 +50,10 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
|
||||
pr_err("%s: failed to get syscon regmap\n", __func__);
|
||||
return PTR_ERR(regmap);
|
||||
}
|
||||
} else if (of_device_is_compatible(of_get_parent(dev->of_node),
|
||||
"syscon")) {
|
||||
regmap = device_node_to_regmap(of_get_parent(dev->of_node));
|
||||
} else if (of_device_is_compatible(np = of_get_parent(node), "syscon") ||
|
||||
(of_node_put(np), 0)) {
|
||||
regmap = device_node_to_regmap(np);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(dev, "failed to get regmap from its parent.\n");
|
||||
return PTR_ERR(regmap);
|
||||
|
@ -1317,6 +1317,7 @@ static void __init tegra114_clock_init(struct device_node *np)
|
||||
}
|
||||
|
||||
pmc_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!pmc_base) {
|
||||
pr_err("Can't map pmc registers\n");
|
||||
WARN_ON(1);
|
||||
|
@ -1128,6 +1128,7 @@ static void __init tegra20_clock_init(struct device_node *np)
|
||||
}
|
||||
|
||||
pmc_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!pmc_base) {
|
||||
pr_err("Can't map pmc registers\n");
|
||||
BUG();
|
||||
|
@ -3697,6 +3697,7 @@ static void __init tegra210_clock_init(struct device_node *np)
|
||||
}
|
||||
|
||||
pmc_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!pmc_base) {
|
||||
pr_err("Can't map pmc registers\n");
|
||||
WARN_ON(1);
|
||||
|
@ -251,14 +251,16 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
|
||||
if (rc) {
|
||||
pr_err("%s: failed to lookup atl clock %d\n", __func__,
|
||||
i);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto pm_put;
|
||||
}
|
||||
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
if (IS_ERR(clk)) {
|
||||
pr_err("%s: failed to get atl clock %d from provider\n",
|
||||
__func__, i);
|
||||
return PTR_ERR(clk);
|
||||
ret = PTR_ERR(clk);
|
||||
goto pm_put;
|
||||
}
|
||||
|
||||
cdesc = to_atl_desc(__clk_get_hw(clk));
|
||||
@ -291,8 +293,9 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
|
||||
if (cdesc->enabled)
|
||||
atl_clk_enable(__clk_get_hw(clk));
|
||||
}
|
||||
pm_runtime_put_sync(cinfo->dev);
|
||||
|
||||
pm_put:
|
||||
pm_runtime_put_sync(cinfo->dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -687,6 +687,13 @@ static void zynqmp_get_clock_info(void)
|
||||
FIELD_PREP(CLK_ATTR_NODE_INDEX, i);
|
||||
|
||||
zynqmp_pm_clock_get_name(clock[i].clk_id, &name);
|
||||
|
||||
/*
|
||||
* Terminate with NULL character in case name provided by firmware
|
||||
* is longer and truncated due to size limit.
|
||||
*/
|
||||
name.name[sizeof(name.name) - 1] = '\0';
|
||||
|
||||
if (!strcmp(name.name, RESERVED_CLK_NAME))
|
||||
continue;
|
||||
strncpy(clock[i].clk_name, name.name, MAX_NAME_LEN);
|
||||
|
@ -99,26 +99,25 @@ static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long *prate)
|
||||
{
|
||||
u32 fbdiv;
|
||||
long rate_div, f;
|
||||
u32 mult, div;
|
||||
|
||||
/* Enable the fractional mode if needed */
|
||||
rate_div = (rate * FRAC_DIV) / *prate;
|
||||
f = rate_div % FRAC_DIV;
|
||||
if (f) {
|
||||
if (rate > PS_PLL_VCO_MAX) {
|
||||
fbdiv = rate / PS_PLL_VCO_MAX;
|
||||
rate = rate / (fbdiv + 1);
|
||||
}
|
||||
if (rate < PS_PLL_VCO_MIN) {
|
||||
fbdiv = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate);
|
||||
rate = rate * fbdiv;
|
||||
}
|
||||
return rate;
|
||||
/* Let rate fall inside the range PS_PLL_VCO_MIN ~ PS_PLL_VCO_MAX */
|
||||
if (rate > PS_PLL_VCO_MAX) {
|
||||
div = DIV_ROUND_UP(rate, PS_PLL_VCO_MAX);
|
||||
rate = rate / div;
|
||||
}
|
||||
if (rate < PS_PLL_VCO_MIN) {
|
||||
mult = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate);
|
||||
rate = rate * mult;
|
||||
}
|
||||
|
||||
fbdiv = DIV_ROUND_CLOSEST(rate, *prate);
|
||||
fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX);
|
||||
return *prate * fbdiv;
|
||||
if (fbdiv < PLL_FBDIV_MIN || fbdiv > PLL_FBDIV_MAX) {
|
||||
fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX);
|
||||
rate = *prate * fbdiv;
|
||||
}
|
||||
|
||||
return rate;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -254,6 +254,7 @@ static int cpt_ucode_load_fw(struct cpt_device *cpt, const u8 *fw, bool is_ae)
|
||||
const struct firmware *fw_entry;
|
||||
struct device *dev = &cpt->pdev->dev;
|
||||
struct ucode_header *ucode;
|
||||
unsigned int code_length;
|
||||
struct microcode *mcode;
|
||||
int j, ret = 0;
|
||||
|
||||
@ -264,11 +265,12 @@ static int cpt_ucode_load_fw(struct cpt_device *cpt, const u8 *fw, bool is_ae)
|
||||
ucode = (struct ucode_header *)fw_entry->data;
|
||||
mcode = &cpt->mcode[cpt->next_mc_idx];
|
||||
memcpy(mcode->version, (u8 *)fw_entry->data, CPT_UCODE_VERSION_SZ);
|
||||
mcode->code_size = ntohl(ucode->code_length) * 2;
|
||||
if (!mcode->code_size) {
|
||||
code_length = ntohl(ucode->code_length);
|
||||
if (code_length == 0 || code_length >= INT_MAX / 2) {
|
||||
ret = -EINVAL;
|
||||
goto fw_release;
|
||||
}
|
||||
mcode->code_size = code_length * 2;
|
||||
|
||||
mcode->is_ae = is_ae;
|
||||
mcode->core_mask = 0ULL;
|
||||
|
@ -642,6 +642,10 @@ static void ccp_dma_release(struct ccp_device *ccp)
|
||||
for (i = 0; i < ccp->cmd_q_count; i++) {
|
||||
chan = ccp->ccp_dma_chan + i;
|
||||
dma_chan = &chan->dma_chan;
|
||||
|
||||
if (dma_chan->client_count)
|
||||
dma_release_channel(dma_chan);
|
||||
|
||||
tasklet_kill(&chan->cleanup_tasklet);
|
||||
list_del_rcu(&dma_chan->device_node);
|
||||
}
|
||||
@ -767,8 +771,8 @@ void ccp_dmaengine_unregister(struct ccp_device *ccp)
|
||||
if (!dmaengine)
|
||||
return;
|
||||
|
||||
dma_async_device_unregister(dma_dev);
|
||||
ccp_dma_release(ccp);
|
||||
dma_async_device_unregister(dma_dev);
|
||||
|
||||
kmem_cache_destroy(ccp->dma_desc_cache);
|
||||
kmem_cache_destroy(ccp->dma_cmd_cache);
|
||||
|
@ -107,12 +107,12 @@ static int sgl_sge_nr_set(const char *val, const struct kernel_param *kp)
|
||||
if (ret || n == 0 || n > HISI_ACC_SGL_SGE_NR_MAX)
|
||||
return -EINVAL;
|
||||
|
||||
return param_set_int(val, kp);
|
||||
return param_set_ushort(val, kp);
|
||||
}
|
||||
|
||||
static const struct kernel_param_ops sgl_sge_nr_ops = {
|
||||
.set = sgl_sge_nr_set,
|
||||
.get = param_get_int,
|
||||
.get = param_get_ushort,
|
||||
};
|
||||
|
||||
static u16 sgl_sge_nr = HZIP_SGL_SGE_NR;
|
||||
|
@ -382,7 +382,7 @@ static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
|
||||
u32 x;
|
||||
|
||||
x = ipad[i] ^ ipad[i + 4];
|
||||
cache[i] ^= swab(x);
|
||||
cache[i] ^= swab32(x);
|
||||
}
|
||||
}
|
||||
cache_len = AES_BLOCK_SIZE;
|
||||
@ -820,7 +820,7 @@ static int safexcel_ahash_final(struct ahash_request *areq)
|
||||
u32 *result = (void *)areq->result;
|
||||
|
||||
/* K3 */
|
||||
result[i] = swab(ctx->base.ipad.word[i + 4]);
|
||||
result[i] = swab32(ctx->base.ipad.word[i + 4]);
|
||||
}
|
||||
areq->result[0] ^= 0x80; // 10- padding
|
||||
crypto_cipher_encrypt_one(ctx->kaes, areq->result, areq->result);
|
||||
@ -2105,7 +2105,7 @@ static int safexcel_xcbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
|
||||
crypto_cipher_encrypt_one(ctx->kaes, (u8 *)key_tmp + AES_BLOCK_SIZE,
|
||||
"\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3");
|
||||
for (i = 0; i < 3 * AES_BLOCK_SIZE / sizeof(u32); i++)
|
||||
ctx->base.ipad.word[i] = swab(key_tmp[i]);
|
||||
ctx->base.ipad.word[i] = swab32(key_tmp[i]);
|
||||
|
||||
crypto_cipher_clear_flags(ctx->kaes, CRYPTO_TFM_REQ_MASK);
|
||||
crypto_cipher_set_flags(ctx->kaes, crypto_ahash_get_flags(tfm) &
|
||||
@ -2188,7 +2188,7 @@ static int safexcel_cmac_setkey(struct crypto_ahash *tfm, const u8 *key,
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < len / sizeof(u32); i++)
|
||||
ctx->base.ipad.word[i + 8] = swab(aes.key_enc[i]);
|
||||
ctx->base.ipad.word[i + 8] = swab32(aes.key_enc[i]);
|
||||
|
||||
/* precompute the CMAC key material */
|
||||
crypto_cipher_clear_flags(ctx->kaes, CRYPTO_TFM_REQ_MASK);
|
||||
|
@ -286,6 +286,7 @@ static int process_tar_file(struct device *dev,
|
||||
struct tar_ucode_info_t *tar_info;
|
||||
struct otx_cpt_ucode_hdr *ucode_hdr;
|
||||
int ucode_type, ucode_size;
|
||||
unsigned int code_length;
|
||||
|
||||
/*
|
||||
* If size is less than microcode header size then don't report
|
||||
@ -303,7 +304,13 @@ static int process_tar_file(struct device *dev,
|
||||
if (get_ucode_type(ucode_hdr, &ucode_type))
|
||||
return 0;
|
||||
|
||||
ucode_size = ntohl(ucode_hdr->code_length) * 2;
|
||||
code_length = ntohl(ucode_hdr->code_length);
|
||||
if (code_length >= INT_MAX / 2) {
|
||||
dev_err(dev, "Invalid code_length %u\n", code_length);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ucode_size = code_length * 2;
|
||||
if (!ucode_size || (size < round_up(ucode_size, 16) +
|
||||
sizeof(struct otx_cpt_ucode_hdr) + OTX_CPT_UCODE_SIGN_LEN)) {
|
||||
dev_err(dev, "Ucode %s invalid size\n", filename);
|
||||
@ -886,6 +893,7 @@ static int ucode_load(struct device *dev, struct otx_cpt_ucode *ucode,
|
||||
{
|
||||
struct otx_cpt_ucode_hdr *ucode_hdr;
|
||||
const struct firmware *fw;
|
||||
unsigned int code_length;
|
||||
int ret;
|
||||
|
||||
set_ucode_filename(ucode, ucode_filename);
|
||||
@ -896,7 +904,13 @@ static int ucode_load(struct device *dev, struct otx_cpt_ucode *ucode,
|
||||
ucode_hdr = (struct otx_cpt_ucode_hdr *) fw->data;
|
||||
memcpy(ucode->ver_str, ucode_hdr->ver_str, OTX_CPT_UCODE_VER_STR_SZ);
|
||||
ucode->ver_num = ucode_hdr->ver_num;
|
||||
ucode->size = ntohl(ucode_hdr->code_length) * 2;
|
||||
code_length = ntohl(ucode_hdr->code_length);
|
||||
if (code_length >= INT_MAX / 2) {
|
||||
dev_err(dev, "Ucode invalid code_length %u\n", code_length);
|
||||
ret = -EINVAL;
|
||||
goto release_fw;
|
||||
}
|
||||
ucode->size = code_length * 2;
|
||||
if (!ucode->size || (fw->size < round_up(ucode->size, 16)
|
||||
+ sizeof(struct otx_cpt_ucode_hdr) + OTX_CPT_UCODE_SIGN_LEN)) {
|
||||
dev_err(dev, "Ucode %s invalid size\n", ucode_filename);
|
||||
|
@ -35,19 +35,6 @@
|
||||
static DEFINE_MUTEX(algs_lock);
|
||||
static unsigned int active_devs;
|
||||
|
||||
struct qat_alg_buf {
|
||||
u32 len;
|
||||
u32 resrvd;
|
||||
u64 addr;
|
||||
} __packed;
|
||||
|
||||
struct qat_alg_buf_list {
|
||||
u64 resrvd;
|
||||
u32 num_bufs;
|
||||
u32 num_mapped_bufs;
|
||||
struct qat_alg_buf bufers[];
|
||||
} __packed __aligned(64);
|
||||
|
||||
/* Common content descriptor */
|
||||
struct qat_alg_cd {
|
||||
union {
|
||||
@ -638,14 +625,20 @@ static void qat_alg_free_bufl(struct qat_crypto_instance *inst,
|
||||
dma_addr_t blpout = qat_req->buf.bloutp;
|
||||
size_t sz = qat_req->buf.sz;
|
||||
size_t sz_out = qat_req->buf.sz_out;
|
||||
int bl_dma_dir;
|
||||
int i;
|
||||
|
||||
bl_dma_dir = blp != blpout ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL;
|
||||
|
||||
for (i = 0; i < bl->num_bufs; i++)
|
||||
dma_unmap_single(dev, bl->bufers[i].addr,
|
||||
bl->bufers[i].len, DMA_BIDIRECTIONAL);
|
||||
bl->bufers[i].len, bl_dma_dir);
|
||||
|
||||
dma_unmap_single(dev, blp, sz, DMA_TO_DEVICE);
|
||||
kfree(bl);
|
||||
|
||||
if (!qat_req->buf.sgl_src_valid)
|
||||
kfree(bl);
|
||||
|
||||
if (blp != blpout) {
|
||||
/* If out of place operation dma unmap only data */
|
||||
int bufless = blout->num_bufs - blout->num_mapped_bufs;
|
||||
@ -653,10 +646,12 @@ static void qat_alg_free_bufl(struct qat_crypto_instance *inst,
|
||||
for (i = bufless; i < blout->num_bufs; i++) {
|
||||
dma_unmap_single(dev, blout->bufers[i].addr,
|
||||
blout->bufers[i].len,
|
||||
DMA_BIDIRECTIONAL);
|
||||
DMA_FROM_DEVICE);
|
||||
}
|
||||
dma_unmap_single(dev, blpout, sz_out, DMA_TO_DEVICE);
|
||||
kfree(blout);
|
||||
|
||||
if (!qat_req->buf.sgl_dst_valid)
|
||||
kfree(blout);
|
||||
}
|
||||
}
|
||||
|
||||
@ -670,26 +665,34 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
|
||||
int n = sg_nents(sgl);
|
||||
struct qat_alg_buf_list *bufl;
|
||||
struct qat_alg_buf_list *buflout = NULL;
|
||||
dma_addr_t blp;
|
||||
dma_addr_t bloutp;
|
||||
dma_addr_t blp = DMA_MAPPING_ERROR;
|
||||
dma_addr_t bloutp = DMA_MAPPING_ERROR;
|
||||
struct scatterlist *sg;
|
||||
size_t sz_out, sz = struct_size(bufl, bufers, n + 1);
|
||||
size_t sz_out, sz = struct_size(bufl, bufers, n);
|
||||
int node = dev_to_node(&GET_DEV(inst->accel_dev));
|
||||
int bufl_dma_dir;
|
||||
|
||||
if (unlikely(!n))
|
||||
return -EINVAL;
|
||||
|
||||
bufl = kzalloc_node(sz, GFP_ATOMIC,
|
||||
dev_to_node(&GET_DEV(inst->accel_dev)));
|
||||
if (unlikely(!bufl))
|
||||
return -ENOMEM;
|
||||
qat_req->buf.sgl_src_valid = false;
|
||||
qat_req->buf.sgl_dst_valid = false;
|
||||
|
||||
if (n > QAT_MAX_BUFF_DESC) {
|
||||
bufl = kzalloc_node(sz, GFP_ATOMIC, node);
|
||||
if (unlikely(!bufl))
|
||||
return -ENOMEM;
|
||||
} else {
|
||||
bufl = &qat_req->buf.sgl_src.sgl_hdr;
|
||||
memset(bufl, 0, sizeof(struct qat_alg_buf_list));
|
||||
qat_req->buf.sgl_src_valid = true;
|
||||
}
|
||||
|
||||
bufl_dma_dir = sgl != sglout ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL;
|
||||
|
||||
for_each_sg(sgl, sg, n, i)
|
||||
bufl->bufers[i].addr = DMA_MAPPING_ERROR;
|
||||
|
||||
blp = dma_map_single(dev, bufl, sz, DMA_TO_DEVICE);
|
||||
if (unlikely(dma_mapping_error(dev, blp)))
|
||||
goto err_in;
|
||||
|
||||
for_each_sg(sgl, sg, n, i) {
|
||||
int y = sg_nctr;
|
||||
|
||||
@ -698,13 +701,16 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
|
||||
|
||||
bufl->bufers[y].addr = dma_map_single(dev, sg_virt(sg),
|
||||
sg->length,
|
||||
DMA_BIDIRECTIONAL);
|
||||
bufl_dma_dir);
|
||||
bufl->bufers[y].len = sg->length;
|
||||
if (unlikely(dma_mapping_error(dev, bufl->bufers[y].addr)))
|
||||
goto err_in;
|
||||
sg_nctr++;
|
||||
}
|
||||
bufl->num_bufs = sg_nctr;
|
||||
blp = dma_map_single(dev, bufl, sz, DMA_TO_DEVICE);
|
||||
if (unlikely(dma_mapping_error(dev, blp)))
|
||||
goto err_in;
|
||||
qat_req->buf.bl = bufl;
|
||||
qat_req->buf.blp = blp;
|
||||
qat_req->buf.sz = sz;
|
||||
@ -713,20 +719,23 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
|
||||
struct qat_alg_buf *bufers;
|
||||
|
||||
n = sg_nents(sglout);
|
||||
sz_out = struct_size(buflout, bufers, n + 1);
|
||||
sz_out = struct_size(buflout, bufers, n);
|
||||
sg_nctr = 0;
|
||||
buflout = kzalloc_node(sz_out, GFP_ATOMIC,
|
||||
dev_to_node(&GET_DEV(inst->accel_dev)));
|
||||
if (unlikely(!buflout))
|
||||
goto err_in;
|
||||
|
||||
if (n > QAT_MAX_BUFF_DESC) {
|
||||
buflout = kzalloc_node(sz_out, GFP_ATOMIC, node);
|
||||
if (unlikely(!buflout))
|
||||
goto err_in;
|
||||
} else {
|
||||
buflout = &qat_req->buf.sgl_dst.sgl_hdr;
|
||||
memset(buflout, 0, sizeof(struct qat_alg_buf_list));
|
||||
qat_req->buf.sgl_dst_valid = true;
|
||||
}
|
||||
|
||||
bufers = buflout->bufers;
|
||||
for_each_sg(sglout, sg, n, i)
|
||||
bufers[i].addr = DMA_MAPPING_ERROR;
|
||||
|
||||
bloutp = dma_map_single(dev, buflout, sz_out, DMA_TO_DEVICE);
|
||||
if (unlikely(dma_mapping_error(dev, bloutp)))
|
||||
goto err_out;
|
||||
for_each_sg(sglout, sg, n, i) {
|
||||
int y = sg_nctr;
|
||||
|
||||
@ -735,7 +744,7 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
|
||||
|
||||
bufers[y].addr = dma_map_single(dev, sg_virt(sg),
|
||||
sg->length,
|
||||
DMA_BIDIRECTIONAL);
|
||||
DMA_FROM_DEVICE);
|
||||
if (unlikely(dma_mapping_error(dev, bufers[y].addr)))
|
||||
goto err_out;
|
||||
bufers[y].len = sg->length;
|
||||
@ -743,6 +752,9 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
|
||||
}
|
||||
buflout->num_bufs = sg_nctr;
|
||||
buflout->num_mapped_bufs = sg_nctr;
|
||||
bloutp = dma_map_single(dev, buflout, sz_out, DMA_TO_DEVICE);
|
||||
if (unlikely(dma_mapping_error(dev, bloutp)))
|
||||
goto err_out;
|
||||
qat_req->buf.blout = buflout;
|
||||
qat_req->buf.bloutp = bloutp;
|
||||
qat_req->buf.sz_out = sz_out;
|
||||
@ -754,27 +766,32 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst,
|
||||
return 0;
|
||||
|
||||
err_out:
|
||||
if (!dma_mapping_error(dev, bloutp))
|
||||
dma_unmap_single(dev, bloutp, sz_out, DMA_TO_DEVICE);
|
||||
|
||||
n = sg_nents(sglout);
|
||||
for (i = 0; i < n; i++)
|
||||
if (!dma_mapping_error(dev, buflout->bufers[i].addr))
|
||||
dma_unmap_single(dev, buflout->bufers[i].addr,
|
||||
buflout->bufers[i].len,
|
||||
DMA_BIDIRECTIONAL);
|
||||
if (!dma_mapping_error(dev, bloutp))
|
||||
dma_unmap_single(dev, bloutp, sz_out, DMA_TO_DEVICE);
|
||||
kfree(buflout);
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
if (!qat_req->buf.sgl_dst_valid)
|
||||
kfree(buflout);
|
||||
|
||||
err_in:
|
||||
if (!dma_mapping_error(dev, blp))
|
||||
dma_unmap_single(dev, blp, sz, DMA_TO_DEVICE);
|
||||
|
||||
n = sg_nents(sgl);
|
||||
for (i = 0; i < n; i++)
|
||||
if (!dma_mapping_error(dev, bufl->bufers[i].addr))
|
||||
dma_unmap_single(dev, bufl->bufers[i].addr,
|
||||
bufl->bufers[i].len,
|
||||
DMA_BIDIRECTIONAL);
|
||||
bufl_dma_dir);
|
||||
|
||||
if (!dma_mapping_error(dev, blp))
|
||||
dma_unmap_single(dev, blp, sz, DMA_TO_DEVICE);
|
||||
kfree(bufl);
|
||||
if (!qat_req->buf.sgl_src_valid)
|
||||
kfree(bufl);
|
||||
|
||||
dev_err(dev, "Failed to map buf for dma\n");
|
||||
return -ENOMEM;
|
||||
|
@ -20,6 +20,26 @@ struct qat_crypto_instance {
|
||||
atomic_t refctr;
|
||||
};
|
||||
|
||||
#define QAT_MAX_BUFF_DESC 4
|
||||
|
||||
struct qat_alg_buf {
|
||||
u32 len;
|
||||
u32 resrvd;
|
||||
u64 addr;
|
||||
} __packed;
|
||||
|
||||
struct qat_alg_buf_list {
|
||||
u64 resrvd;
|
||||
u32 num_bufs;
|
||||
u32 num_mapped_bufs;
|
||||
struct qat_alg_buf bufers[];
|
||||
} __packed;
|
||||
|
||||
struct qat_alg_fixed_buf_list {
|
||||
struct qat_alg_buf_list sgl_hdr;
|
||||
struct qat_alg_buf descriptors[QAT_MAX_BUFF_DESC];
|
||||
} __packed __aligned(64);
|
||||
|
||||
struct qat_crypto_request_buffs {
|
||||
struct qat_alg_buf_list *bl;
|
||||
dma_addr_t blp;
|
||||
@ -27,6 +47,10 @@ struct qat_crypto_request_buffs {
|
||||
dma_addr_t bloutp;
|
||||
size_t sz;
|
||||
size_t sz_out;
|
||||
bool sgl_src_valid;
|
||||
bool sgl_dst_valid;
|
||||
struct qat_alg_fixed_buf_list sgl_src;
|
||||
struct qat_alg_fixed_buf_list sgl_dst;
|
||||
};
|
||||
|
||||
struct qat_crypto_request;
|
||||
|
@ -25,10 +25,10 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#define SHA_BUFFER_LEN PAGE_SIZE
|
||||
#define SAHARA_MAX_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
|
||||
@ -195,7 +195,7 @@ struct sahara_dev {
|
||||
void __iomem *regs_base;
|
||||
struct clk *clk_ipg;
|
||||
struct clk *clk_ahb;
|
||||
struct mutex queue_mutex;
|
||||
spinlock_t queue_spinlock;
|
||||
struct task_struct *kthread;
|
||||
struct completion dma_completion;
|
||||
|
||||
@ -641,9 +641,9 @@ static int sahara_aes_crypt(struct skcipher_request *req, unsigned long mode)
|
||||
|
||||
rctx->mode = mode;
|
||||
|
||||
mutex_lock(&dev->queue_mutex);
|
||||
spin_lock_bh(&dev->queue_spinlock);
|
||||
err = crypto_enqueue_request(&dev->queue, &req->base);
|
||||
mutex_unlock(&dev->queue_mutex);
|
||||
spin_unlock_bh(&dev->queue_spinlock);
|
||||
|
||||
wake_up_process(dev->kthread);
|
||||
|
||||
@ -1042,10 +1042,10 @@ static int sahara_queue_manage(void *data)
|
||||
do {
|
||||
__set_current_state(TASK_INTERRUPTIBLE);
|
||||
|
||||
mutex_lock(&dev->queue_mutex);
|
||||
spin_lock_bh(&dev->queue_spinlock);
|
||||
backlog = crypto_get_backlog(&dev->queue);
|
||||
async_req = crypto_dequeue_request(&dev->queue);
|
||||
mutex_unlock(&dev->queue_mutex);
|
||||
spin_unlock_bh(&dev->queue_spinlock);
|
||||
|
||||
if (backlog)
|
||||
backlog->complete(backlog, -EINPROGRESS);
|
||||
@ -1091,9 +1091,9 @@ static int sahara_sha_enqueue(struct ahash_request *req, int last)
|
||||
rctx->first = 1;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->queue_mutex);
|
||||
spin_lock_bh(&dev->queue_spinlock);
|
||||
ret = crypto_enqueue_request(&dev->queue, &req->base);
|
||||
mutex_unlock(&dev->queue_mutex);
|
||||
spin_unlock_bh(&dev->queue_spinlock);
|
||||
|
||||
wake_up_process(dev->kthread);
|
||||
|
||||
@ -1454,7 +1454,7 @@ static int sahara_probe(struct platform_device *pdev)
|
||||
|
||||
crypto_init_queue(&dev->queue, SAHARA_QUEUE_LENGTH);
|
||||
|
||||
mutex_init(&dev->queue_mutex);
|
||||
spin_lock_init(&dev->queue_spinlock);
|
||||
|
||||
dev_ptr = dev;
|
||||
|
||||
|
@ -118,17 +118,20 @@ static int begin_cpu_udmabuf(struct dma_buf *buf,
|
||||
{
|
||||
struct udmabuf *ubuf = buf->priv;
|
||||
struct device *dev = ubuf->device->this_device;
|
||||
int ret = 0;
|
||||
|
||||
if (!ubuf->sg) {
|
||||
ubuf->sg = get_sg_table(dev, buf, direction);
|
||||
if (IS_ERR(ubuf->sg))
|
||||
return PTR_ERR(ubuf->sg);
|
||||
if (IS_ERR(ubuf->sg)) {
|
||||
ret = PTR_ERR(ubuf->sg);
|
||||
ubuf->sg = NULL;
|
||||
}
|
||||
} else {
|
||||
dma_sync_sg_for_cpu(dev, ubuf->sg->sgl, ubuf->sg->nents,
|
||||
direction);
|
||||
}
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int end_cpu_udmabuf(struct dma_buf *buf,
|
||||
|
@ -185,7 +185,8 @@ static void hisi_dma_reset_qp_point(struct hisi_dma_dev *hdma_dev, u32 index)
|
||||
hisi_dma_chan_write(hdma_dev->base, HISI_DMA_CQ_HEAD_PTR, index, 0);
|
||||
}
|
||||
|
||||
static void hisi_dma_reset_hw_chan(struct hisi_dma_chan *chan)
|
||||
static void hisi_dma_reset_or_disable_hw_chan(struct hisi_dma_chan *chan,
|
||||
bool disable)
|
||||
{
|
||||
struct hisi_dma_dev *hdma_dev = chan->hdma_dev;
|
||||
u32 index = chan->qp_num, tmp;
|
||||
@ -206,8 +207,11 @@ static void hisi_dma_reset_hw_chan(struct hisi_dma_chan *chan)
|
||||
hisi_dma_do_reset(hdma_dev, index);
|
||||
hisi_dma_reset_qp_point(hdma_dev, index);
|
||||
hisi_dma_pause_dma(hdma_dev, index, false);
|
||||
hisi_dma_enable_dma(hdma_dev, index, true);
|
||||
hisi_dma_unmask_irq(hdma_dev, index);
|
||||
|
||||
if (!disable) {
|
||||
hisi_dma_enable_dma(hdma_dev, index, true);
|
||||
hisi_dma_unmask_irq(hdma_dev, index);
|
||||
}
|
||||
|
||||
ret = readl_relaxed_poll_timeout(hdma_dev->base +
|
||||
HISI_DMA_Q_FSM_STS + index * HISI_DMA_OFFSET, tmp,
|
||||
@ -223,7 +227,7 @@ static void hisi_dma_free_chan_resources(struct dma_chan *c)
|
||||
struct hisi_dma_chan *chan = to_hisi_dma_chan(c);
|
||||
struct hisi_dma_dev *hdma_dev = chan->hdma_dev;
|
||||
|
||||
hisi_dma_reset_hw_chan(chan);
|
||||
hisi_dma_reset_or_disable_hw_chan(chan, false);
|
||||
vchan_free_chan_resources(&chan->vc);
|
||||
|
||||
memset(chan->sq, 0, sizeof(struct hisi_dma_sqe) * hdma_dev->chan_depth);
|
||||
@ -272,7 +276,6 @@ static void hisi_dma_start_transfer(struct hisi_dma_chan *chan)
|
||||
|
||||
vd = vchan_next_desc(&chan->vc);
|
||||
if (!vd) {
|
||||
dev_err(&hdma_dev->pdev->dev, "no issued task!\n");
|
||||
chan->desc = NULL;
|
||||
return;
|
||||
}
|
||||
@ -304,7 +307,7 @@ static void hisi_dma_issue_pending(struct dma_chan *c)
|
||||
|
||||
spin_lock_irqsave(&chan->vc.lock, flags);
|
||||
|
||||
if (vchan_issue_pending(&chan->vc))
|
||||
if (vchan_issue_pending(&chan->vc) && !chan->desc)
|
||||
hisi_dma_start_transfer(chan);
|
||||
|
||||
spin_unlock_irqrestore(&chan->vc.lock, flags);
|
||||
@ -399,7 +402,7 @@ static void hisi_dma_enable_qp(struct hisi_dma_dev *hdma_dev, u32 qp_index)
|
||||
|
||||
static void hisi_dma_disable_qp(struct hisi_dma_dev *hdma_dev, u32 qp_index)
|
||||
{
|
||||
hisi_dma_reset_hw_chan(&hdma_dev->chan[qp_index]);
|
||||
hisi_dma_reset_or_disable_hw_chan(&hdma_dev->chan[qp_index], true);
|
||||
}
|
||||
|
||||
static void hisi_dma_enable_qps(struct hisi_dma_dev *hdma_dev)
|
||||
@ -438,18 +441,15 @@ static irqreturn_t hisi_dma_irq(int irq, void *data)
|
||||
desc = chan->desc;
|
||||
cqe = chan->cq + chan->cq_head;
|
||||
if (desc) {
|
||||
chan->cq_head = (chan->cq_head + 1) % hdma_dev->chan_depth;
|
||||
hisi_dma_chan_write(hdma_dev->base, HISI_DMA_CQ_HEAD_PTR,
|
||||
chan->qp_num, chan->cq_head);
|
||||
if (FIELD_GET(STATUS_MASK, cqe->w0) == STATUS_SUCC) {
|
||||
chan->cq_head = (chan->cq_head + 1) %
|
||||
hdma_dev->chan_depth;
|
||||
hisi_dma_chan_write(hdma_dev->base,
|
||||
HISI_DMA_CQ_HEAD_PTR, chan->qp_num,
|
||||
chan->cq_head);
|
||||
vchan_cookie_complete(&desc->vd);
|
||||
hisi_dma_start_transfer(chan);
|
||||
} else {
|
||||
dev_err(&hdma_dev->pdev->dev, "task error!\n");
|
||||
}
|
||||
|
||||
chan->desc = NULL;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&chan->vc.lock, flags);
|
||||
|
@ -656,7 +656,7 @@ static void __cleanup(struct ioatdma_chan *ioat_chan, dma_addr_t phys_complete)
|
||||
if (active - i == 0) {
|
||||
dev_dbg(to_dev(ioat_chan), "%s: cancel completion timeout\n",
|
||||
__func__);
|
||||
mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
mod_timer_pending(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
}
|
||||
|
||||
/* microsecond delay by sysfs variable per pending descriptor */
|
||||
@ -682,7 +682,7 @@ static void ioat_cleanup(struct ioatdma_chan *ioat_chan)
|
||||
|
||||
if (chanerr &
|
||||
(IOAT_CHANERR_HANDLE_MASK | IOAT_CHANERR_RECOVER_MASK)) {
|
||||
mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
mod_timer_pending(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
ioat_eh(ioat_chan);
|
||||
}
|
||||
}
|
||||
@ -879,7 +879,7 @@ static void check_active(struct ioatdma_chan *ioat_chan)
|
||||
}
|
||||
|
||||
if (test_and_clear_bit(IOAT_CHAN_ACTIVE, &ioat_chan->state))
|
||||
mod_timer(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
mod_timer_pending(&ioat_chan->timer, jiffies + IDLE_TIMEOUT);
|
||||
}
|
||||
|
||||
static void ioat_reboot_chan(struct ioatdma_chan *ioat_chan)
|
||||
|
@ -281,14 +281,6 @@ efi_status_t allocate_new_fdt_and_exit_boot(void *handle,
|
||||
goto fail;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now that we have done our final memory allocation (and free)
|
||||
* we can get the memory map key needed for exit_boot_services().
|
||||
*/
|
||||
status = efi_get_memory_map(&map);
|
||||
if (status != EFI_SUCCESS)
|
||||
goto fail_free_new_fdt;
|
||||
|
||||
status = update_fdt((void *)fdt_addr, fdt_size,
|
||||
(void *)*new_fdt_addr, MAX_FDT_SIZE, cmdline_ptr,
|
||||
initrd_addr, initrd_size);
|
||||
|
@ -680,6 +680,15 @@ static struct notifier_block gsmi_die_notifier = {
|
||||
static int gsmi_panic_callback(struct notifier_block *nb,
|
||||
unsigned long reason, void *arg)
|
||||
{
|
||||
|
||||
/*
|
||||
* Panic callbacks are executed with all other CPUs stopped,
|
||||
* so we must not attempt to spin waiting for gsmi_dev.lock
|
||||
* to be released.
|
||||
*/
|
||||
if (spin_is_locked(&gsmi_dev.lock))
|
||||
return NOTIFY_DONE;
|
||||
|
||||
gsmi_shutdown_reason(GSMI_SHUTDOWN_PANIC);
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
@ -1857,7 +1857,7 @@ long dfl_feature_ioctl_set_irq(struct platform_device *pdev,
|
||||
return -EINVAL;
|
||||
|
||||
fds = memdup_user((void __user *)(arg + sizeof(hdr)),
|
||||
hdr.count * sizeof(s32));
|
||||
array_size(hdr.count, sizeof(s32)));
|
||||
if (IS_ERR(fds))
|
||||
return PTR_ERR(fds);
|
||||
|
||||
|
@ -1309,6 +1309,9 @@ int fsi_master_register(struct fsi_master *master)
|
||||
|
||||
mutex_init(&master->scan_lock);
|
||||
master->idx = ida_simple_get(&master_ida, 0, INT_MAX, GFP_KERNEL);
|
||||
if (master->idx < 0)
|
||||
return master->idx;
|
||||
|
||||
dev_set_name(&master->dev, "fsi%d", master->idx);
|
||||
master->dev.class = &fsi_master_class;
|
||||
|
||||
|
@ -30,6 +30,7 @@ menuconfig DRM
|
||||
config DRM_MIPI_DBI
|
||||
tristate
|
||||
depends on DRM
|
||||
select DRM_KMS_HELPER
|
||||
|
||||
config DRM_MIPI_DSI
|
||||
bool
|
||||
|
@ -1671,10 +1671,12 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
adev->mode_info.dither_property,
|
||||
AMDGPU_FMT_DITHER_DISABLE);
|
||||
|
||||
if (amdgpu_audio != 0)
|
||||
if (amdgpu_audio != 0) {
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
|
||||
subpixel_order = SubPixelHorizontalRGB;
|
||||
connector->interlace_allowed = true;
|
||||
@ -1796,6 +1798,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.dither_property,
|
||||
@ -1849,6 +1852,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.dither_property,
|
||||
@ -1899,6 +1903,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.audio_property,
|
||||
AMDGPU_AUDIO_AUTO);
|
||||
amdgpu_connector->audio = AMDGPU_AUDIO_AUTO;
|
||||
}
|
||||
drm_object_attach_property(&amdgpu_connector->base.base,
|
||||
adev->mode_info.dither_property,
|
||||
|
@ -2179,16 +2179,8 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
|
||||
}
|
||||
adev->ip_blocks[i].status.sw = true;
|
||||
|
||||
if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) {
|
||||
/* need to do common hw init early so everything is set up for gmc */
|
||||
r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev);
|
||||
if (r) {
|
||||
DRM_ERROR("hw_init %d failed %d\n", i, r);
|
||||
goto init_failed;
|
||||
}
|
||||
adev->ip_blocks[i].status.hw = true;
|
||||
} else if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
|
||||
/* need to do gmc hw init early so we can allocate gpu mem */
|
||||
/* need to do gmc hw init early so we can allocate gpu mem */
|
||||
if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
|
||||
/* Try to reserve bad pages early */
|
||||
if (amdgpu_sriov_vf(adev))
|
||||
amdgpu_virt_exchange_data(adev);
|
||||
@ -2770,8 +2762,8 @@ static int amdgpu_device_ip_reinit_early_sriov(struct amdgpu_device *adev)
|
||||
int i, r;
|
||||
|
||||
static enum amd_ip_block_type ip_order[] = {
|
||||
AMD_IP_BLOCK_TYPE_COMMON,
|
||||
AMD_IP_BLOCK_TYPE_GMC,
|
||||
AMD_IP_BLOCK_TYPE_COMMON,
|
||||
AMD_IP_BLOCK_TYPE_PSP,
|
||||
AMD_IP_BLOCK_TYPE_IH,
|
||||
};
|
||||
|
@ -35,7 +35,6 @@
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
#include <drm/drm_damage_helper.h>
|
||||
#include <drm/drm_edid.h>
|
||||
#include <drm/drm_gem_framebuffer_helper.h>
|
||||
#include <drm/drm_fb_helper.h>
|
||||
@ -499,7 +498,6 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
|
||||
static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
|
||||
.destroy = drm_gem_fb_destroy,
|
||||
.create_handle = drm_gem_fb_create_handle,
|
||||
.dirty = drm_atomic_helper_dirtyfb,
|
||||
};
|
||||
|
||||
uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user