eea08813f0
This branch is based on V_01-00-59 ## TC956X_Linux_Host_Driver_20230810_V_01-01-59 1. A part of Automotive AVB/TSN support 2. Default Port 0 interface is XFI and Port1 interface is SGMII 3. IPA (macro TC956X_DMA_OFFLOAD_ENABLE) enabled by default 4. Kernel timers are used to process transmitted TX descriptor. Systick timers are not used. 5. Dynamic change of MTU not supported. Max MTU supported is 9000. 6. Port 1 supports USXGMII, XFI and 25000Base-X interface also. ## TC956X_Linux_Host_Driver_20231110_V_01-02-59 1. Kernel 6.1.18 Porting changes 2. TC956x switch to switch connection support (upto 1 level) over DSP ports ## TC956X_Linux_Host_Driver_20231226_V_01-03-59 1. Kernel 6.6.1 Porting changes 2. Added the support for TC commands taprio and flower
551 lines
16 KiB
C
551 lines
16 KiB
C
/*
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* TC956X ethernet driver.
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*
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* tc956x_vf_mbx.c
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*
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* Copyright (C) 2021 Toshiba Electronic Devices & Storage Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/*! History:
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* 06 Nov 2020 : Initial Version
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* VERSION : 00-01
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*
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* 30 Nov 2021 : Base lined for SRIOV
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* VERSION : 01-02
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*/
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#include "tc956x_vf_mbx.h"
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#include "tc956xmac.h"
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#include "tc956x_vf_rsc_mng.h"
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#ifdef TC956X_SRIOV_VF
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/**
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* This table maintains the SRAM mapping for PF0->VF0s, VF0s->PF0, PF1->VF1s,
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* VF1s->PF1, PF0->PF1, PF1->PF0, MCU->PF0, PF0->MCU, PF1->MCU, MCU->PF1
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* Each communication SRAM size is of 64 bytes. In total 30 such SRAMs are
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* required for above mentioned communication path.
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* In general, in Design of HW semaphore: PF uses one SRAM location for
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* any request and ACK message to a particular VF and VF uses other
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* SRAM location for requestand ACK. In Design of No semaphore: PF use one
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* SRAM location to send request, VF to use same location (overwrite) to send
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* the ACK, similarly VF uses other SRAM to send request, PF to use same location
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* (overwrite) to send the ACK.
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*/
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static u8 PF_VF_mbx_idx[PFS_MAX][VFNS_MAX][2] = {
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{
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{19, 20}, /* MCU <--> VF00 [MCU RQST Msg/MCU ACK Msg,
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* VF00 ACK Msg/VF00 RQST Msg]
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*/
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{21, 22}, /* MCU <--> VF01 [MCU RQST Msg/MCU ACK Msg,
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* VF01 ACK Msg/VF01 RQST Msg]
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*/
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{23, 24}, /* MCU <--> VF02 [MCU RQST Msg/MCU ACK Msg,
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* VF02 ACK Msg/VF02 RQST Msg]
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*/
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},
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{
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{5, 6}, /* PF0 <--> VF00 [PF0 RQST Msg/PF0 ACK Msg,
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* VF0 ACK Msg/VF0 RQST Msg]
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*/
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{7, 8}, /* PF0 <--> VF01 [PF0 RQST Msg/PF0 ACK Msg,
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* VF1 ACK Msg/VF1 RQST Msg]
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*/
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{9, 10} /* PF0 <--> VF02 [PF0 RQST Msg/PF0 ACK Msg,
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* VF2 ACK Msg/VF2 RQST Msg]
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*/
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},
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{
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{25, 26}, /* MCU <--> VF10 [MCU RQST Msg/MCU ACK Msg,
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* VF10 ACK Msg/VF10 RQST Msg]
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*/
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{27, 28}, /* MCU <--> VF11 [MCU RQST Msg/MCU ACK Msg,
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* VF11 ACK Msg/VF11 RQST Msg]
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*/
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{29, 30} /* MCU <--> VF12 [MCU RQST Msg/MCU ACK Msg,
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* MCU VF12 Msg/VF12 RQST Msg]
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*/
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},
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{
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{13, 14}, /* PF1 <--> VF10 [PF1 RQST Msg/PF1 ACK Msg,
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* VF0 ACK Msg/VF0 RQST Msg]
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*/
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{15, 16}, /* PF2 <--> VF11 [PF1 RQST Msg/PF1 ACK Msg,
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* VF1 ACK Msg/VF1 RQST Msg]
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*/
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{17, 18} /* PF3 <--> VF12 [PF1 RQST Msg/PF1 ACK Msg,
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* VF2 ACK Msg/VF2 RQST Msg]
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*/
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},
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};
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/**
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* vf_get_mbx_mem_idx
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*
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* \brief API to return pointer pointing to SRAM index
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*
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* \details This function to return the pointer to the 1D array of
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* PF_VF_mbx_idx where it points to SRAM location of specific PF->Fn
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*
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* \param[in] msg_src - Function to/from where PF needs to write/read
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* \param[in] fn_id_info - Pointer to this function id information
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*
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* \return pointer to the SRAM index
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*/
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static u8 *vf_get_mbx_mem_idx(enum mbx_msg_fns msg_src,
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struct fn_id *fn_id_info)
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{
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/* for MCU interrupt for VFs associated with pf1, below handling
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* is required as it is not possible to get correct offset from
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* the array with the other approach
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*/
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if ((msg_src == mcu) && (fn_id_info->pf_no == 1))
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return *(*(PF_VF_mbx_idx + 2) + (fn_id_info->vf_no - 1));
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else
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return *(*(PF_VF_mbx_idx + (msg_src + fn_id_info->pf_no)) +
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(fn_id_info->vf_no - 1));
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}
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/**
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* tc956x_vf_get_fn_idx_from_int_sts
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*
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* \brief Helper function to get function that raised the mailbox interrupt
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*
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* \details This function is called to get the function which raised the
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* mailbox interrupt. Interrupt source can be MCU or associated PF
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*
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* \param[in] msg_dst - Function to which interrupt should be set
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* \param[in] fn_id_info - Pointer to Function info structure
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*
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* \return function type or error
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*/
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int tc956x_vf_get_fn_idx_from_int_sts(struct tc956xmac_priv *priv,
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struct fn_id *fn_id_info)
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{
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void __iomem *ioaddr = priv->tc956x_BRIDGE_CFG_pci_base_addr;
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u32 rsc_mng_int_sts = readl(ioaddr + RSCMNG_INT_ST_REG);
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if ((rsc_mng_int_sts & RSC_MNG_INT_MCU_MASK) == RSC_MNG_INT_MCU_MASK) {
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writel(RSC_MNG_INT_MCU_MASK, ioaddr + RSCMNG_INT_ST_REG);
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return mcu;
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} else if ((rsc_mng_int_sts & RSC_MNG_INT_OTHR_PF_MASK) ==
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RSC_MNG_INT_OTHR_PF_MASK) {
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if (fn_id_info->pf_no == 0) {
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writel(RSC_MNG_INT_OTHR_PF_MASK, ioaddr + RSCMNG_INT_ST_REG);
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return pf0;
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} else if (fn_id_info->pf_no == 1) {
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writel(RSC_MNG_INT_OTHR_PF_MASK, ioaddr + RSCMNG_INT_ST_REG);
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return pf1;
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} else
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return -1;
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} else /* Other interrupts are not supported */
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return -1;
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}
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static int trylock_semaphore(void __iomem *ioaddr, u8 idx)
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{
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u32 rd_val = 0;
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/* Read 0 for lock. Else already semaphore is locked
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* curr value : action : next value
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* 0 : read 0 : 1
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* 1 : read 1 : 1
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*/
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rd_val = readl(ioaddr + NSEM(idx));
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if (rd_val == 0)
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return 0;
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else
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return -EBUSY;
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}
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static int unlock_semaphore(void __iomem *ioaddr, u8 idx)
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{
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u32 wr_val = 1;
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/* Write 1 to unlock
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* curr value : action : next value
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* 0 : write 0 : 0
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* 0 : write 1 : 0
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* 1 : write 0 : 1
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* 1 : write 1 : 0
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*/
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writel(wr_val, ioaddr + NSEM(idx));
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return 0;
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}
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/**
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* tc956x_vf_parse_mbx
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*
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* \brief API to read and process the VF mailbox
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*
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* \details This function should be called from ISR to parse the mailbox for
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* the mail received from particular function. Message will be processed and
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* ACK/NACK will be sent in this function
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*
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* \param[in] priv - Pointer to device private structure
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* \param[in] msg_src - Function to which ACK should be posted
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*
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* \return None
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*/
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void tc956x_vf_parse_mbx(struct tc956xmac_priv *priv,
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enum mbx_msg_fns msg_src)
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{
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u8 msg_buff[MBX_TOT_SIZE];
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/* Get the function id information and read the mailbox.
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* Function id can be get earlier too
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*/
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if (!tc956xmac_rsc_mng_get_fn_id(priv,
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priv->tc956x_BRIDGE_CFG_pci_base_addr, &priv->fn_id_info)) {
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/* Read and acknowledge the mailbox */
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tc956xmac_mbx_read(priv, msg_buff, msg_src,
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&priv->fn_id_info);
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}
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}
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/**
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* tc956x_vf_check_for_ack
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*
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* \brief Helper function to check for ACK
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*
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* \details This function is called from polling function to check if
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* any ACK or NACK is received after writing in the mailbox
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*
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* \param[in] dev - Pointer to device structure
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* \param[in] msg_dst - Function from which ACK/NACK should be read
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* \param[in] fn_id_info - Pointer to Function info structure
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*
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* \return ACK/NACK or error
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*/
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static int tc956x_vf_check_for_ack(struct tc956xmac_priv *priv,
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enum mbx_msg_fns msg_dst,
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struct fn_id *fn_id_info)
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{
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u8 *ptr_mail_box_idx;
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u8 ack_buff[MBX_ACK_SIZE];
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/* Read the correct mailbox access index as per
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* the destination function
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*/
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ptr_mail_box_idx = vf_get_mbx_mem_idx(msg_dst, fn_id_info);
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/* Copy the ACK inidication data (first 4 bytes) from PF->VF mailbox */
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memcpy_fromio(ack_buff,
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(priv->tc956x_SRAM_mailbox_base_addr +
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((*ptr_mail_box_idx + VF_READ_ACK_OFST) * MBX_TOT_SIZE)),
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MBX_ACK_SIZE);
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if ((ack_buff[0] & RSC_MNG_ACK_MASK) == RSC_MNG_ACK_MASK)
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return ACK;
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else if ((ack_buff[0] & RSC_MNG_NACK_MASK) == RSC_MNG_NACK_MASK)
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return NACK;
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else
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return -1;
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}
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/**
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* tc956x_vf_mbx_init
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*
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* \brief API to initialise mailbox memory and parameters
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*
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* \details This function initialise mailbox memory used by this function.
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* Also to initialise parameters used for mailbox control.
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*
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* \param[in] ndev - Pointer to device structure
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*
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* \return None
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*/
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static void tc956x_vf_mbx_init(struct tc956xmac_priv *priv, void *data)
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{
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priv->tc956x_SRAM_mailbox_base_addr = priv->tc956x_SRAM_pci_base_addr + VF_MBX_SRAM_ADDR;
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}
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/**
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* tc956x_vf_mbx_poll_for_ack
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*
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* \brief API to poll for acknowledgement
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*
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* \details This function will poll for acknowledgement after writing to the
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* mailbox memory. Polling is done by means of reading a
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* resource manager register
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*
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* \param[in] priv - Pointer to device private structure
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* \param[in] msg_dst - Function from which ACK should be polled
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*
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* \return None
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*/
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static int tc956x_vf_mbx_poll_for_ack(struct tc956xmac_priv *priv,
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enum mbx_msg_fns msg_dst)
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{
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int countdown = MBX_TIMEOUT;
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int ack_status;
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ack_status =
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tc956x_vf_check_for_ack(priv, msg_dst, &priv->fn_id_info);
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while (countdown && (ack_status < 0)) {
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countdown--;
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udelay(1000);
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ack_status = tc956x_vf_check_for_ack(priv, msg_dst,
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&priv->fn_id_info);
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}
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return ack_status;
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}
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/**
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* tc956x_vf_mbx_send_ack
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*
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* \brief API to send acknowledgement
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*
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* \details This function will post the acknowledgement message
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* to the mailbox memory.
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* Basically this should be called after every read
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*
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* \param[in] priv - Pointer to device private structure
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* \param[in] msg_buff - Pointer to buffer having the acknowledgement message
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* \param[in] msg_dst - Function to which ACK should be posted
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* \param[in] fn_id_info - Pointer to function id information
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*
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* \return None
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*/
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static void tc956x_vf_mbx_send_ack(struct tc956xmac_priv *priv, u8 *msg_buff,
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enum mbx_msg_fns msg_dst,
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struct fn_id *fn_id_info)
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{
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u8 *ptr_mail_box_idx;
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/* Read the correct mailbox access index as per
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* the destination function
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*/
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ptr_mail_box_idx = vf_get_mbx_mem_idx(msg_dst, fn_id_info);
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/* Copy the ACK message data to PF->VF SRAM area.
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* Also first 4 bytes of ACK indications also copied here
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*/
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memcpy_toio((priv->tc956x_SRAM_mailbox_base_addr +
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((*ptr_mail_box_idx + VF_SEND_ACK_OFST) * MBX_TOT_SIZE)),
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msg_buff, MBX_TOT_SIZE);
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priv->xstats.mbx_vf_sent_pf++;
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}
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/**
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* tc956x_vf_trigger_interrupt
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*
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* \brief Helper function to set mailbox interrupt bit
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*
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* \details This function is called to set the mailbox interrupt bits while
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* writing the mailbox. Interrupt targets can be MCU, VFs or other PF
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*
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* \param[in] msg_dst - Function to which interrupt should be set
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*
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* \return None
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*/
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static void tc956x_vf_trigger_interrupt(struct tc956xmac_priv *priv,
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enum mbx_msg_fns msg_dst)
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{
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void __iomem *ioaddr = priv->tc956x_BRIDGE_CFG_pci_base_addr;
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u32 rsc_mng_interrupt_ctl = readl(ioaddr + RSCMNG_INT_CTRL_REG);
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if (mcu == msg_dst)
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rsc_mng_interrupt_ctl |= MBX_MCU_INTERRUPT;
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else if ((pf0 == msg_dst) || (pf1 == msg_dst))
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rsc_mng_interrupt_ctl |= MBX_PF_INTERRUPT;
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writel(rsc_mng_interrupt_ctl, ioaddr + RSCMNG_INT_CTRL_REG);
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}
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/**
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* tc956x_vf_mbx_write
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*
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* \brief API to write a message to particular mailbox (sram)
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*
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* \details This function will post the request message to the mailbox memory.
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*
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* \param[in] priv - Pointer to device private structure
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* \param[in] msg_buff - Pointer to buffer having the request message
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* Skip the first 4 bytes while preparing data in this buffer
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* \param[in] msg_dst - Function to which message should be posted
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* \param[in] fn_id_info - Pointer to function id information
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*
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* \return success or error code
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*/
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static int tc956x_vf_mbx_write(struct tc956xmac_priv *priv, u8 *msg_buff,
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enum mbx_msg_fns msg_dst,
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struct fn_id *fn_id_info)
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{
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u8 *ptr_mail_box_idx;
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int ret;
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/* Read the correct mailbox access index as per
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* the destination function
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*/
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ptr_mail_box_idx = vf_get_mbx_mem_idx(msg_dst, fn_id_info);
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/* Get the semaphore lock before udpating mailbox */
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ret = trylock_semaphore(priv->ioaddr, ((*ptr_mail_box_idx + 1) >> 1));
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if (ret != 0)
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return ret;
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/* Clear the mailbox including ACK area (first 4 bytes) */
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memset_io((priv->tc956x_SRAM_mailbox_base_addr +
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((*ptr_mail_box_idx + VF_SEND_RQST_OFST) * MBX_TOT_SIZE)),
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0, MBX_TOT_SIZE);
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/* Copy the mailbox data from local buffer to VF->PF or VF->MCU
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* destination mailbox SRAM memory
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*/
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memcpy_toio((priv->tc956x_SRAM_mailbox_base_addr +
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((*ptr_mail_box_idx + VF_SEND_RQST_OFST) * MBX_TOT_SIZE) + MBX_MSG_OFST),
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msg_buff, MBX_MSG_SIZE);
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priv->xstats.mbx_vf_sent_pf++;
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/*Set the interrupt bit in resource manager interrupt register*/
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tc956x_vf_trigger_interrupt(priv, msg_dst);
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/*poll for ack/nack from the VF/MCU/Other PF*/
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ret = tc956xmac_mbx_poll_for_ack(priv, msg_dst);
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/* Read for ACK message */
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if (ret > 0) {
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/* msg_buff to be overwritten here with ACK notification data
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* and ACK message data
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*/
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tc956xmac_mbx_read(priv, msg_buff, msg_dst,
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&priv->fn_id_info);
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}
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unlock_semaphore(priv->ioaddr, ((*ptr_mail_box_idx + 1) >> 1));
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return ret;
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}
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/**
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* tc956x_vf_mbx_read
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*
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* \brief API to read a message from particular mailbox (sram)
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*
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* \details This function will read request message from the mailbox
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* memory. This function to be called from mailbox interrupt routine.
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* This API can be used in case of ACK message read as well.
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*
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* \param[in] priv - Pointer to device private structure
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* \param[in] msg_buff - Pointer to read the mailbox message of max size
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* 64 bytes
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* \param[in] msg_src - Function from which mailbox message should be read
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* \param[in] fn_id_info - Pointer to function id information
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*
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* \return success or error code
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*/
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static int tc956x_vf_mbx_read(struct tc956xmac_priv *priv, u8 *msg_buff,
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enum mbx_msg_fns msg_src,
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struct fn_id *fn_id_info)
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{
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u8 *ptr_mail_box_idx;
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enum mbx_msg_fns msg_dst;
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u8 ack_msg[MBX_MSG_SIZE];
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u8 ret_val = 0;
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/* Read the correct mailbox access index as per
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* the destination function
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*/
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ptr_mail_box_idx = vf_get_mbx_mem_idx(msg_src, fn_id_info);
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/* Copy the mailbox data from PF->VF mailbox*/
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memcpy_fromio(msg_buff,
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(priv->tc956x_SRAM_mailbox_base_addr +
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((*ptr_mail_box_idx + VF_READ_RQST_OFST) * MBX_TOT_SIZE)),
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MBX_TOT_SIZE);
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priv->xstats.mbx_vf_rcvd_pf++;
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switch (msg_buff[MBX_MSG_OFST]) {
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case OPCODE_MBX_PHY_LINK:
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ret_val = tc956x_phy_link(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_RX_CSUM:
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ret_val = tc956x_rx_csum(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_RX_CRC:
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ret_val = tc956x_rx_crc(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_DMA_CH_TLPTR:
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ret_val = tc956x_rx_dma_ch_tlptr(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_SETUP_ETF:
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ret_val = tc956x_setup_mbx_etf(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_FLR:
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ret_val = tc956x_mbx_flr(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_DMA_ERR:
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ret_val = tc956x_rx_dma_err(priv, &msg_buff[MBX_MSG_OFST], &ack_msg[0]);
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break;
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case OPCODE_MBX_ACK_MSG:
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/* ACK message */
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memset_io((priv->tc956x_SRAM_mailbox_base_addr +
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((*ptr_mail_box_idx + VF_READ_RQST_OFST) * MBX_TOT_SIZE)), 0,
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MBX_TOT_SIZE);
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break;
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default:
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break;
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}
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/* Send the Acknowldegment if message read is not ACK message */
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if (msg_buff[MBX_MSG_OFST] != OPCODE_MBX_ACK_MSG) {
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/* For sending ACK, source of request message becomes
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* the destination
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*/
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msg_dst = msg_src;
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/* Prepare first 4 bytes of ACK inidication data */
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msg_buff[0] = ret_val;
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msg_buff[1] = 0x0;
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msg_buff[2] = 0x0;
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msg_buff[3] = 0x0;
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/* Prepare 60 bytes of acknowledgment message */
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memcpy(&msg_buff[MBX_MSG_OFST], ack_msg,
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MBX_MSG_SIZE);
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/* After successful parsing, ACK/NACK the functions which
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* originated the message
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*/
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tc956xmac_mbx_send_ack(priv, msg_buff, msg_dst,
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fn_id_info);
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}
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return 0;
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}
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const struct mac_mbx_ops tc956xmac_mbx_ops = {
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.init = tc956x_vf_mbx_init,
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.read = tc956x_vf_mbx_read,
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.write = tc956x_vf_mbx_write,
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.send_ack = tc956x_vf_mbx_send_ack,
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.poll_for_ack = tc956x_vf_mbx_poll_for_ack,
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};
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#endif /* #ifdef TC956X_SRIOV_VF */
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