eea08813f0
This branch is based on V_01-00-59 ## TC956X_Linux_Host_Driver_20230810_V_01-01-59 1. A part of Automotive AVB/TSN support 2. Default Port 0 interface is XFI and Port1 interface is SGMII 3. IPA (macro TC956X_DMA_OFFLOAD_ENABLE) enabled by default 4. Kernel timers are used to process transmitted TX descriptor. Systick timers are not used. 5. Dynamic change of MTU not supported. Max MTU supported is 9000. 6. Port 1 supports USXGMII, XFI and 25000Base-X interface also. ## TC956X_Linux_Host_Driver_20231110_V_01-02-59 1. Kernel 6.1.18 Porting changes 2. TC956x switch to switch connection support (upto 1 level) over DSP ports ## TC956X_Linux_Host_Driver_20231226_V_01-03-59 1. Kernel 6.6.1 Porting changes 2. Added the support for TC commands taprio and flower
87 lines
2.6 KiB
C
87 lines
2.6 KiB
C
/*
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* TC956X ethernet driver.
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*
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* tc956x_pf_rsc_mng.h
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*
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* Copyright (C) 2021 Toshiba Electronic Devices & Storage Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/*! History:
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* 10 July 2020 : Initial Version
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* VERSION : 00-01
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*
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* 30 Nov 2021 : Base lined for SRIOV
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* VERSION : 01-02
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*/
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#ifndef __TC956X_PF_RSC_MNG_H__
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#define __TC956X_PF_RSC_MNG_H__
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#include "common.h"
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#include <linux/netdevice.h>
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#define MAX_FUNCTIONS_PER_PF 4 /*Max functions per pf including pf, vfs*/
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#define RSC_MNG_OFFSET 0x2000
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#define RSCMNG_ID_REG ((RSC_MNG_OFFSET) + 0x00000000)
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#define RSCMNG_RSC_CTRL_REG ((RSC_MNG_OFFSET) + 0x00000004)
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#define RSCMNG_RSC_ST_REG ((RSC_MNG_OFFSET) + 0x00000008)
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#define RSCMNG_INT_CTRL_REG ((RSC_MNG_OFFSET) + 0x0000000c)
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#define RSCMNG_INT_ST_REG ((RSC_MNG_OFFSET) + 0x00000010)
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#define RSC_MNG_FN_TYPE BIT(16)
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#define RSC_MNG_VF_FN_NUM GENMASK(11, 8)
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#define RSC_MNG_PF_FN_NUM GENMASK(3, 0)
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#define RSC_MNG_DMA_CH7_MASK 0x80
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#define RSC_MNG_DMA_CH6_MASK 0x40
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#define RSC_MNG_DMA_CH5_MASK 0x20
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#define RSC_MNG_DMA_CH4_MASK 0x10
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#define RSC_MNG_DMA_CH3_MASK 0x08
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#define RSC_MNG_DMA_CH2_MASK 0x04
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#define RSC_MNG_DMA_CH1_MASK 0x02
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#define RSC_MNG_DMA_CH0_MASK 0x01
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#define RSC_MNG_DMA_CH7_BIT_POS 28
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#define RSC_MNG_DMA_CH6_BIT_POS 24
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#define RSC_MNG_DMA_CH5_BIT_POS 20
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#define RSC_MNG_DMA_CH4_BIT_POS 16
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#define RSC_MNG_DMA_CH3_BIT_POS 12
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#define RSC_MNG_DMA_CH2_BIT_POS 8
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#define RSC_MNG_DMA_CH1_BIT_POS 4
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#define RSC_MNG_DMA_CH0_BIT_POS 0
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#define RSC_MNG_RSC_STATUS_MASK 0xff
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#define RSC_MNG_INT_STATUS_MASK 0x1f
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#define RSC_MNG_INT_MCU_MASK 0x10
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#define RSC_MNG_INT_VF2_MASK 0x08
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#define RSC_MNG_INT_VF1_MASK 0x04
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#define RSC_MNG_INT_VF0_MASK 0x02
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#define RSC_MNG_INT_OTHR_PF_MASK 0x01
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#define MBX_MCU_INTERRUPT BIT(4)
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#define MBX_VF3_INTERRUPT BIT(3)
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#define MBX_VF2_INTERRUPT BIT(2)
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#define MBX_VF1_INTERRUPT BIT(1)
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#define MBX_PF_INTERRUPT BIT(0)
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#define RSC_MNG_ACK_MASK 0x01
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#define RSC_MNG_NACK_MASK 0x02
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#define MBX_TIMEOUT 1000
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#endif /* __TC956X_PF_RSC_MNG_H__ */
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