Stefan Popa def914a4c3 iio: frequency: adf4371: Add support for output stage mute ... Another feature of the ADF4371/ADF4372 is that the supply current to the RF8P and RF8N output stage can shut down until the ADF4371 achieves lock as measured by the digital lock detect circuitry. The mute to lock detect bit (MUTE_LD) in REG25 enables this function. Signed-off-by: Stefan Popa <stefan.popa@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>		2019-06-26 21:24:21 +01:00
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ad9523.c	iio: ad9523-1: Improve reported VCO frequency accuracy	2019-05-18 09:40:37 +01:00
adf4350.c	iio: Convert to using %pOFn instead of device_node.name	2018-09-02 18:54:31 +01:00
adf4371.c	iio: frequency: adf4371: Add support for output stage mute	2019-06-26 21:24:21 +01:00
Kconfig	iio: frequency: adf4371: Add support for ADF4372 PLL	2019-06-26 21:24:21 +01:00
Makefile	iio: frequency: adf4371: Add support for ADF4371 PLL	2019-06-17 21:06:45 +01:00