Hyungwon Hwang 4f01e65037
ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi' ...
The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-06-22 21:40:13 +09:00
2015-05-26 10:01:51 -07:00
2015-05-11 11:21:41 +05:30
2015-06-22 21:40:13 +09:00
2015-05-16 15:33:25 -07:00
2015-04-15 13:53:55 -07:00
2015-04-24 07:58:07 -07:00
2015-04-16 18:48:55 -04:00
2015-04-26 13:31:05 -07:00
2015-04-24 08:46:18 -07:00
2015-04-15 13:53:55 -07:00
2015-05-28 01:39:53 +02:00
2015-05-09 11:09:29 -07:00
2015-04-20 10:12:29 -07:00
2015-04-24 07:56:50 -07:00
2015-04-17 09:04:10 -04:00
2015-05-29 20:23:58 +02:00
2015-04-24 08:46:18 -07:00
2015-04-24 07:59:07 -07:00
2015-04-15 16:39:15 -07:00
2015-05-12 22:03:44 +02:00
2015-05-21 20:15:16 -07:00
2015-05-22 14:26:36 -07:00
2015-04-12 21:03:30 +02:00
2015-04-24 09:49:37 -07:00
2015-04-21 23:21:34 -07:00
2015-04-28 10:36:45 -04:00
2015-04-15 13:53:55 -07:00
2015-04-15 13:53:55 -07:00
2015-06-04 09:23:51 +10:00
2015-05-25 23:03:16 +00:00
2015-04-16 13:53:32 -05:00
4f01e65037