Maxime Ripard 92ef67c53a clk: sunxi: Add support for PLL6 on the A31 ...

The A31 has a slightly different PLL6 clock. Add support for this new clock in
our driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>

2014-02-18 09:45:13 -03:00

..

clk-factors.c

clk: sunxi: register factors clocks behind composite

2013-12-28 17:07:42 -03:00

clk-factors.h

clk: sunxi: register factors clocks behind composite

2013-12-28 17:07:42 -03:00

clk-sunxi.c

clk: sunxi: Add support for PLL6 on the A31

2014-02-18 09:45:13 -03:00

Makefile

clk: arm: sunxi: Add a new clock driver for sunxi SOCs

2013-03-27 08:35:34 -07:00