Alex Deucher 8e66e134e2 drm/radeon: fix vm page table block size calculation ...

The page offset is 12 bits.  For example if we have an
8 GB VM, we'd need 33 bits.  The number of bits needed
for PD + PT is 21 (33 - 12 or log2(8) + 18), not 20
(log2(8) + 17).

Noticed by Alexey during code review.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

2014-10-16 18:34:09 -04:00

..

drm

drm/radeon: fix vm page table block size calculation

2014-10-16 18:34:09 -04:00

host1x

drm/tegra: Make job submission 64-bit safe

2014-08-04 10:07:36 +02:00

ipu-v3

IPUv3 fixes for v3.18

2014-10-07 14:31:14 +10:00

vga

vgaarb: We can own non-decoded resources

2014-07-08 11:15:09 +10:00

Makefile

gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging

2014-06-04 11:06:52 +02:00