Greg Rose 85624caff9 ixgbevf: Reduce size of maximum rx buffer
There's no need to support up to 15k buffers since the HW is limited to
9.5k in SR-IOV mode.  Instead, allocate buffers that fit and align inside
of a 32K memory buffer.

Signed-off-by: Greg Rose <gregory.v.rose@intel.com>
Tested-by: Sibai Li <sibai.li@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-11-13 14:18:14 -05:00
..
2012-10-26 01:05:56 +02:00
2012-10-15 14:45:51 -04:00
2012-10-02 17:26:42 -07:00
2012-10-07 20:55:16 +09:00
2012-10-28 21:37:01 +01:00
2012-09-26 22:28:21 -04:00
2012-10-24 16:58:53 +02:00
2012-09-24 10:07:40 -07:00
2012-10-07 17:29:24 +09:00
2012-10-10 20:15:24 +09:00
2012-10-17 15:53:03 -05:00
2012-10-09 16:11:46 +09:00
2012-10-10 20:15:24 +09:00
2012-10-18 17:50:08 +02:00
2012-10-28 11:13:54 -07:00
2012-10-26 10:25:31 -07:00
2012-11-02 13:26:11 -07:00
2012-10-01 12:09:59 -07:00
2012-11-02 13:26:11 -07:00
2012-10-01 18:46:13 -07:00
2012-10-16 18:07:12 -07:00