49cf3f29a1
x86 defines PIT_LATCH as LATCH which in <linux/timex.h> is defined as ((CLOCK_TICK_RATE + HZ/2) / HZ) and <asm/timex.h> again defines CLOCK_TICK_RATE as PIT_TICK_RATE. MIPS defines PIT_LATCH as LATCH which in <linux/timex.h> is defined as ((CLOCK_TICK_RATE + HZ/2) / HZ) and <asm/timex.h> again defines CLOCK_TICK_RATE as 1193182. ARM defines PITCH_LATCH as ((PIT_TICK_RATE + HZ / 2) / HZ) - and that's the sanest thing and equivalent to above definitions so use that as the new definition in <linux/i8253.h>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/20110601180610.832810002@duck.linux-mips.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
30 lines
713 B
C
30 lines
713 B
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Machine specific IO port address definition for generic.
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* Written by Osamu Tomita <tomita@cinet.co.jp>
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*/
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#ifndef __LINUX_I8253_H
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#define __LINUX_I8253_H
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#include <linux/param.h>
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#include <linux/spinlock.h>
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#include <linux/timex.h>
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#include <asm/i8253.h>
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/* i8253A PIT registers */
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#define PIT_MODE 0x43
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#define PIT_CH0 0x40
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#define PIT_CH2 0x42
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#define PIT_LATCH ((PIT_TICK_RATE + HZ/2) / HZ)
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#define inb_pit inb_p
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#define outb_pit outb_p
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extern raw_spinlock_t i8253_lock;
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#endif /* __LINUX_I8253_H */
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