android_kernel_samsung_sm8650/drivers/cxl
Lukas Wunner 5f625160b6 cxl/pci: Handle excessive CDAT length
commit 4fe2c13d59d849be3b45371e3913ec5dc77fc0fb upstream.

If the length in the CDAT header is larger than the concatenation of the
header and all table entries, then the CDAT exposed to user space
contains trailing null bytes.

Not every consumer may be able to handle that.  Per Postel's robustness
principle, "be liberal in what you accept" and silently reduce the
cached length to avoid exposing those null bytes.

Fixes: c97006046c ("cxl/port: Read CDAT table")
Tested-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: stable@vger.kernel.org # v6.0+
Link: https://lore.kernel.org/r/6d98b3c7da5343172bd3ccabfabbc1f31c079d74.1678543498.git.lukas@wunner.de
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-04-13 16:55:25 +02:00
..
core cxl/pci: Handle excessive CDAT length 2023-04-13 16:55:25 +02:00
acpi.c cxl/acpi: Minimize granularity for x1 interleaves 2022-08-01 15:36:33 -07:00
cxl.h cxl/region: Fix 'distance' calculation with passthrough ports 2022-11-04 16:01:24 -07:00
cxlmem.h cxl/region: Attach endpoint decoders 2022-07-25 12:18:07 -07:00
cxlpci.h cxl/pci: Handle truncated CDAT entries 2023-04-13 16:55:25 +02:00
Kconfig cxl/region: Allocate HPA capacity to regions 2022-07-25 12:18:06 -07:00
Makefile PM: CXL: Disable suspend 2022-04-22 16:09:42 -07:00
mem.c cxl/mem: Enumerate port targets before adding endpoints 2022-07-21 17:19:25 -07:00
pci.c cxl/pci: Create PCI DOE mailbox's for memory devices 2022-07-19 15:38:04 -07:00
pmem.c cxl/pmem: Fix nvdimm registration races 2023-03-10 09:34:20 +01:00
port.c cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00