d8e7f201a4
Some of the assembly in the LoongArch port seem to come from a prehistoric time, when the assembler didn't even have support for the ABI names we all come to know and love, thus used raw register numbers which hampered readability. The usages are found with a regex match inside arch/loongarch, then manually adjusted for those non-definitions. Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
160 lines
4.2 KiB
C
160 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef __ASM_BARRIER_H
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#define __ASM_BARRIER_H
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#define __sync() __asm__ __volatile__("dbar 0" : : : "memory")
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#define fast_wmb() __sync()
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#define fast_rmb() __sync()
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#define fast_mb() __sync()
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#define fast_iob() __sync()
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#define wbflush() __sync()
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#define wmb() fast_wmb()
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#define rmb() fast_rmb()
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#define mb() fast_mb()
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#define iob() fast_iob()
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#define __smp_mb() __asm__ __volatile__("dbar 0" : : : "memory")
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#define __smp_rmb() __asm__ __volatile__("dbar 0" : : : "memory")
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#define __smp_wmb() __asm__ __volatile__("dbar 0" : : : "memory")
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#ifdef CONFIG_SMP
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#define __WEAK_LLSC_MB " dbar 0 \n"
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#else
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#define __WEAK_LLSC_MB " \n"
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#endif
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#define __smp_mb__before_atomic() barrier()
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#define __smp_mb__after_atomic() barrier()
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/**
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* array_index_mask_nospec() - generate a ~0 mask when index < size, 0 otherwise
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* @index: array element index
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* @size: number of elements in array
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*
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* Returns:
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* 0 - (@index < @size)
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*/
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#define array_index_mask_nospec array_index_mask_nospec
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static inline unsigned long array_index_mask_nospec(unsigned long index,
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unsigned long size)
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{
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unsigned long mask;
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__asm__ __volatile__(
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"sltu %0, %1, %2\n\t"
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#if (__SIZEOF_LONG__ == 4)
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"sub.w %0, $zero, %0\n\t"
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#elif (__SIZEOF_LONG__ == 8)
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"sub.d %0, $zero, %0\n\t"
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#endif
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: "=r" (mask)
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: "r" (index), "r" (size)
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:);
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return mask;
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}
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#define __smp_load_acquire(p) \
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({ \
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union { typeof(*p) __val; char __c[1]; } __u; \
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unsigned long __tmp = 0; \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 1: \
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*(__u8 *)__u.__c = *(volatile __u8 *)p; \
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__smp_mb(); \
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break; \
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case 2: \
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*(__u16 *)__u.__c = *(volatile __u16 *)p; \
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__smp_mb(); \
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break; \
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case 4: \
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__asm__ __volatile__( \
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"amor_db.w %[val], %[tmp], %[mem] \n" \
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: [val] "=&r" (*(__u32 *)__u.__c) \
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: [mem] "ZB" (*(u32 *) p), [tmp] "r" (__tmp) \
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: "memory"); \
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break; \
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case 8: \
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__asm__ __volatile__( \
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"amor_db.d %[val], %[tmp], %[mem] \n" \
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: [val] "=&r" (*(__u64 *)__u.__c) \
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: [mem] "ZB" (*(u64 *) p), [tmp] "r" (__tmp) \
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: "memory"); \
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break; \
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} \
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(typeof(*p))__u.__val; \
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})
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#define __smp_store_release(p, v) \
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do { \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__val = (__force typeof(*p)) (v) }; \
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unsigned long __tmp; \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 1: \
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__smp_mb(); \
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*(volatile __u8 *)p = *(__u8 *)__u.__c; \
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break; \
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case 2: \
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__smp_mb(); \
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*(volatile __u16 *)p = *(__u16 *)__u.__c; \
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break; \
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case 4: \
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__asm__ __volatile__( \
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"amswap_db.w %[tmp], %[val], %[mem] \n" \
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: [mem] "+ZB" (*(u32 *)p), [tmp] "=&r" (__tmp) \
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: [val] "r" (*(__u32 *)__u.__c) \
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: ); \
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break; \
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case 8: \
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__asm__ __volatile__( \
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"amswap_db.d %[tmp], %[val], %[mem] \n" \
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: [mem] "+ZB" (*(u64 *)p), [tmp] "=&r" (__tmp) \
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: [val] "r" (*(__u64 *)__u.__c) \
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: ); \
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break; \
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} \
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} while (0)
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#define __smp_store_mb(p, v) \
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do { \
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union { typeof(p) __val; char __c[1]; } __u = \
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{ .__val = (__force typeof(p)) (v) }; \
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unsigned long __tmp; \
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switch (sizeof(p)) { \
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case 1: \
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*(volatile __u8 *)&p = *(__u8 *)__u.__c; \
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__smp_mb(); \
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break; \
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case 2: \
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*(volatile __u16 *)&p = *(__u16 *)__u.__c; \
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__smp_mb(); \
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break; \
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case 4: \
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__asm__ __volatile__( \
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"amswap_db.w %[tmp], %[val], %[mem] \n" \
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: [mem] "+ZB" (*(u32 *)&p), [tmp] "=&r" (__tmp) \
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: [val] "r" (*(__u32 *)__u.__c) \
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: ); \
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break; \
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case 8: \
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__asm__ __volatile__( \
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"amswap_db.d %[tmp], %[val], %[mem] \n" \
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: [mem] "+ZB" (*(u64 *)&p), [tmp] "=&r" (__tmp) \
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: [val] "r" (*(__u64 *)__u.__c) \
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: ); \
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break; \
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} \
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} while (0)
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#include <asm-generic/barrier.h>
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#endif /* __ASM_BARRIER_H */
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