The documentation for the S3C6410 CPU voltage scaling is rather
unclear, with omitted values for several speed settings. Originally
the code was using only quoted values, resulting in some fairly odd
settings. The S3C6410 is also unusual in that the both the maximum
and minimum voltages quoted scale as the frequency rises, rather
than just the minimum voltage.
Clean this up a bit by always using the specified typical settings
as the minimum voltage (ignoring any specified minimum voltage) in
order to avoid running near the edge of the processor capabilities.
Also use the next quoted maximum voltages rather than the typical
voltages where no maximum voltage is quoted, allowing operation on
a greater range of systems.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Currently the transition latency reported by the S3C64xx cpufreq
driver includes both the time for the CPU to reclock itself and
the time for a regulator to change voltage. This means that if
a regulator is not in use then the transition latency reported
is excessively high.
In future the regulator API will be extended to report latencies
so the driver will be able to query the performance of a given
regulator.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This provides symmetry with the voltage based checks done for the
regulator.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We need to free the buff and lli nodes if the buffer queue is
not CIRCULAR.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
buffdone callback should be called per buffer request with pointer
to the latest serviced request.
'next' should point to the one next to currently active.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Some devices don't seem to work if the source and desitnation transfer
widths are not same. For example, SPI dma xfers, with 8bits/word,
don't work without this patch.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Replace s3c64xx_dma_tcirq and s3c64xx_dma_errirq with the common
s3c64xx_dma_buffdone.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Ensure the DMA buffer points are not updated from
another source during the process of enquing a buffer.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
[ben-linux@fluff.org: Updated patch comment]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The current code assumes that the external clock mux will be set to
the crystal. Set this up explicitly within the clock API.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the values of S3C6400_CLKDIV0_ARM_MASK and S3C6410_CLKDIV0_ARM_MASK.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Set up some IRQ space to allocation to off-SoC interrupt controllers.
Default this to 16 IRQs. If individual boards require more than this
then they will need to modify this file so allocating a small number
helps reduce the number of modifications required.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
s3c2410_dma_enqueue makes call to kzalloc and dma_pool_alloc with GFP_KERNEL
flag set, this can be an issue for drivers, like I2S, which call
s3c2410_dma_enqueue from dma-bufferdone callback.
Change the flag GFP_KERNEL to GFP_ATOMIC to avoid any problems.
Signed-Off-by: Jassi <jassi.brar@samsung.com>
[ben-linux@fluff.org: Minor description edit and re-wrap]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Provide actual minimum(struct pl080s_lli) size of block to
dma_pool_create call, instead of hardcoded 32 bytes.
Signed-Off-by: Jassi <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Correct the lli structure in struct s3c64xx_dma_buff which should
have been 'struct pl080s_lli' (samsung specific) instead of the generic
version 'struct pl080_lli'
Signed-Off-by: Jassi <jassi.brar@samsung.com>
[ben-linux@fluff.org: Edited description and subject fields]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
In s3c64xx_roundrate_clksrc function, the calculation is wrong. This
patch fixes this calculation.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This ensures the clock hierarchy data structures are updated when we
change the clock source in the actual hardware registers.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[ben-linux@fluff.org: Minor re-indentation of subject]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
In s3c64xx_setrate_clksrc() we used sclk->shift, but actually need to
use sclk->divider_shift to correctly calculate the value for the divider
register.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[ben-linux@fluff.org: Minor re-indentation of description]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Currently the S5PC100 does not define S3C_PA_NAND, leaving the NAND device
definitions in arch/arm/plat-s3c/dev-nand.c unbuildable. Add a KConfig
entry to select whether this is built.
As backwards compatibility, both the S3C24XX and S3C64XX define the new
configuration in their main Kconfig files until better support for basing
this selection on a per-machine basis can be sorted out.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Allowing us to make the Kconfig a little bit saner.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The value of armclk_mask needs to be inverted for use as a mask on
the register value when updating ARM_RATIO.
This is critical for cpufreq support, without it attempts to scale
the frequency of the core trash pretty much the entire clock tree.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
If the requested clock is faster than the parent clock then the
parent clock is the closest we can get to the request so we need
to return that instead of the requested clock.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
fix the following 'make includecheck' warning:
arch/arm/plat-s3c64xx/pm.c: plat/regs-gpio.h is included more than once.
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
N group
Add to_irq() function to onvert gpio to irq for external interrupt
group (GPN).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The usb-host clock was using the wrong define (the SCLK enable for the
usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A few typos seems to have sneaked into the HCLK gate defines, causing the
usb host clock to not get enabled. Fix them according to the reference
manual and throw in the 3d accel bit for good measure.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch provides initial support for CPU frequency scaling on the
Samsung S3C ARM processors. Currently only S3C6410 processors are
supported, though addition of another data table with supported clock
rates should be sufficient to enable support for further CPUs.
Use the regulator framework to provide optional support for DVFS in
the S3C cpufreq driver. When a software controllable regulator is
configured the driver will use it to lower the supply voltage when
running at a lower frequency, giving improved power savings.
When regulator support is disabled or no regulator can be obtained
for VDDARM the driver will fall back to scaling only the frequency.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The message was missing a severity macro so pick pr_debug().
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add support for the DMA blocks in the S3C64XX series of CPUS,
which are based on the ARM PL080 PrimeCell system.
Unfortunately, these DMA controllers diverge from the PL080
design by adding another DMA controller register and
configuration for OneNAND.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Use the newly moved <plat/watchdog-reset.h> to perform the
arch_reset() call which has been unimplemented for a while.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix compilation bug when debug was enabled
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Cleanup arm/plat-s3c64xx/include/plat/gpio-bank-h.h include file.
Using shift-left operation with value >32 is a bad habit.
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add missing DMA controller block clocks.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add detection support for the S3C6400 SoC which has it's
id register in a different place to the S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add power management support to the VIC by registering
each VIC as a system device to get suspend/resume
events going.
Since the VIC registeration is done early, we need to
record the VICs in a static array which is used to add
the system devices later once the initcalls are run. This
means there is now a configuration value for the number
of VICs in the system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the GPIO suspend/resume support inline with the gpiolib support
so that it will work with both the S3C24XX and S3C64XX series.
The s3c_gpio_chip is extended to have a pm callback and a save block
to keep the state of the GPIO over suspend, and the code from the
s3c24xx implementation is added to a new common file.
The suspend process now uses the list of registered chips to go through
saving and restoring each one as appropriate, using the pm callback to
select the appropriate routine depending on the type of control register
present.
This change also means that any additional GPIO added should not require
changes to the PM.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add support for saving the state of the IRQ registers over suspend.
This requires moving the S3C64XX UART registers into <plat/regs-serial.h>
and adding irq-pm.c which saves the state of all the IRQ registers.
The irq-pm.c saves all the IRQ registers, including the IRQ_EINT and
IRQ_EINT_GROUP registers as it was easier than adding three different
files. Also ensuring that all the registers are restored to the same
state as before suspend is considered to be the best thing to do.
Note, we do not suspend the VIC here, this is done by the VIC driver
itself.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add an s3c64xx_sysclass and device for items that currently
want to bind to any s3c64xx processor. The first user of this
will be parts of the s3c64xx suspend support which need to
save device state over suspend/resume.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial support for the S3C64XX based systems to use
suspend-to-RAM to sleep.
Includes basic debugging for use with the SMDK6410 usign the
LEDs on the baseboard.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
