drivers:iio:stm:accel:st_lis2dw12: replace i2c/spi interfaces with regmap
Some drivers like lis2dw12 have not yet benefited from regmap support which unifies and simplifies access to the communication interfaces with devices and already implements all the transport synchronization and optimization mechanisms internally. This patch add support of regmap api to lis2dw12 and compatible devices. Signed-off-by: mariotesi <mario.tesi@st.com> Change-Id: I412e8a0e27636e3b49f747b5f6cb4e64ee3d0269
This commit is contained in:
mariotesi
parent
a4d9103148
commit
efe8afbe40
@ -10,10 +10,12 @@
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#ifndef ST_LIS2DW12_H
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#define ST_LIS2DW12_H
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#include <linux/bitfield.h>
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#include <linux/device.h>
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#include <linux/iio/events.h>
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#include <linux/iio/iio.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include "../common/stm_iio_types.h"
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@ -23,18 +25,8 @@
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#define ST_LIS2DW12_MAX_WATERMARK 31
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#define ST_LIS2DW12_DATA_SIZE 6
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struct st_lis2dw12_transfer_function {
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int (*read)(struct device *dev, u8 addr, int len, u8 *data);
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int (*write)(struct device *dev, u8 addr, int len, u8 *data);
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};
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#define ST_LIS2DW12_RX_MAX_LENGTH 96
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#define ST_LIS2DW12_TX_MAX_LENGTH 8
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struct st_lis2dw12_transfer_buffer {
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u8 rx_buf[ST_LIS2DW12_RX_MAX_LENGTH];
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u8 tx_buf[ST_LIS2DW12_TX_MAX_LENGTH] ____cacheline_aligned;
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};
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#define ST_LIS2DW12_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & \
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(mask))
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enum st_lis2dw12_fifo_mode {
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ST_LIS2DW12_FIFO_BYPASS = 0x0,
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@ -65,6 +57,7 @@ struct st_lis2dw12_sensor {
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};
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struct st_lis2dw12_hw {
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struct regmap *regmap;
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struct device *dev;
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int irq;
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int irq_emb;
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@ -87,17 +80,73 @@ struct st_lis2dw12_hw {
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s64 delta_ts;
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s64 ts_irq;
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s64 ts;
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const struct st_lis2dw12_transfer_function *tf;
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struct st_lis2dw12_transfer_buffer tb;
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};
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static inline int
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__st_lis2dw12_write_with_mask(struct st_lis2dw12_hw *hw,
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unsigned int addr, int mask,
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unsigned int data)
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{
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int err;
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unsigned int val = ST_LIS2DW12_SHIFT_VAL(data, mask);
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err = regmap_update_bits(hw->regmap, addr, mask, val);
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return err;
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}
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static inline int
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st_lis2dw12_update_bits_locked(struct st_lis2dw12_hw *hw,
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unsigned int addr, unsigned int mask,
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unsigned int val)
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{
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int err;
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mutex_lock(&hw->lock);
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err = __st_lis2dw12_write_with_mask(hw, addr, mask, val);
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mutex_unlock(&hw->lock);
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return err;
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}
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static inline int
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st_lis2dw12_write_with_mask_locked(struct st_lis2dw12_hw *hw,
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unsigned int addr, unsigned int mask,
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unsigned int data)
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{
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int err;
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mutex_lock(&hw->lock);
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err = __st_lis2dw12_write_with_mask(hw, addr, mask, data);
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mutex_unlock(&hw->lock);
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return err;
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}
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static inline int st_lis2dw12_write_locked(struct st_lis2dw12_hw *hw,
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unsigned int addr, u8 *val,
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unsigned int len)
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{
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int err;
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mutex_lock(&hw->lock);
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err = regmap_bulk_write(hw->regmap, addr, val, len);
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mutex_unlock(&hw->lock);
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return err;
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}
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static inline int st_lis2dw12_read(struct st_lis2dw12_hw *hw, unsigned int addr,
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void *val, unsigned int len)
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{
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return regmap_bulk_read(hw->regmap, addr, val, len);
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}
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int st_lis2dw12_probe(struct device *dev, int irq, const char *name,
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const struct st_lis2dw12_transfer_function *tf_ops);
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struct regmap *regmap);
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int st_lis2dw12_fifo_setup(struct st_lis2dw12_hw *hw);
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int st_lis2dw12_update_fifo_watermark(struct st_lis2dw12_hw *hw, u8 watermark);
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int st_lis2dw12_write_with_mask(struct st_lis2dw12_hw *hw, u8 addr, u8 mask,
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u8 val);
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ssize_t st_lis2dw12_flush_fifo(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size);
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@ -76,8 +76,10 @@ static int st_lis2dw12_update_fifo(struct iio_dev *iio_dev, bool enable)
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}
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mode = enable ? ST_LIS2DW12_FIFO_CONTINUOUS : ST_LIS2DW12_FIFO_BYPASS;
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_FIFO_CTRL_ADDR,
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ST_LIS2DW12_FIFOMODE_MASK, mode);
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err = st_lis2dw12_write_with_mask_locked(hw,
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ST_LIS2DW12_FIFO_CTRL_ADDR,
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ST_LIS2DW12_FIFOMODE_MASK,
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mode);
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if (err < 0)
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return err;
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@ -86,8 +88,10 @@ static int st_lis2dw12_update_fifo(struct iio_dev *iio_dev, bool enable)
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int st_lis2dw12_update_fifo_watermark(struct st_lis2dw12_hw *hw, u8 watermark)
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{
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return st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_FIFO_CTRL_ADDR,
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ST_LIS2DW12_FTH_MASK, watermark);
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return st_lis2dw12_write_with_mask_locked(hw,
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ST_LIS2DW12_FIFO_CTRL_ADDR,
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ST_LIS2DW12_FTH_MASK,
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watermark);
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}
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ssize_t st_lis2dw12_set_hwfifo_watermark(struct device *dev,
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@ -144,14 +148,14 @@ static const struct iio_buffer_setup_ops st_lis2dw12_acc_buffer_setup_ops = {
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static int st_lis2dw12_read_fifo(struct st_lis2dw12_hw *hw)
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{
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u8 iio_buff[ALIGN(ST_LIS2DW12_DATA_SIZE, sizeof(s64)) + sizeof(s64)];
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u8 buff[ST_LIS2DW12_RX_MAX_LENGTH], status, samples;
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u8 buff[6 * ST_LIS2DW12_DATA_SIZE], status, samples;
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struct iio_dev *iio_dev = hw->iio_devs[ST_LIS2DW12_ID_ACC];
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struct iio_chan_spec const *ch = iio_dev->channels;
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int i, err, word_len, fifo_len, read_len = 0;
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s64 delta_ts;
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err = hw->tf->read(hw->dev, ST_LIS2DW12_FIFO_SAMPLES_ADDR,
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sizeof(status), &status);
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err = st_lis2dw12_read(hw, ST_LIS2DW12_FIFO_SAMPLES_ADDR,
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&status, sizeof(status));
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if (err < 0)
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return err;
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@ -161,7 +165,7 @@ static int st_lis2dw12_read_fifo(struct st_lis2dw12_hw *hw)
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while (read_len < fifo_len) {
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word_len = min_t(int, fifo_len - read_len, sizeof(buff));
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err = hw->tf->read(hw->dev, ch[0].address, word_len, buff);
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err = st_lis2dw12_read(hw, ch[0].address, buff, word_len);
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if (err < 0)
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return err;
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@ -215,8 +219,8 @@ static irqreturn_t st_lis2dw12_emb_event(struct st_lis2dw12_hw *hw)
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s64 code;
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int err;
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err = hw->tf->read(hw->dev, ST_LIS2DW12_ALL_INT_SRC_ADDR,
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sizeof(status), &status);
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err = st_lis2dw12_read(hw, ST_LIS2DW12_ALL_INT_SRC_ADDR,
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&status, sizeof(status));
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if (err < 0)
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return IRQ_HANDLED;
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@ -228,8 +232,8 @@ static irqreturn_t st_lis2dw12_emb_event(struct st_lis2dw12_hw *hw)
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enum iio_chan_type type;
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u8 source;
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err = hw->tf->read(hw->dev, ST_LIS2DW12_TAP_SRC_ADDR,
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sizeof(source), &source);
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err = st_lis2dw12_read(hw, ST_LIS2DW12_TAP_SRC_ADDR,
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&source, sizeof(source));
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if (err < 0)
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return IRQ_HANDLED;
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@ -259,8 +263,8 @@ static irqreturn_t st_lis2dw12_emb_event(struct st_lis2dw12_hw *hw)
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if (status & ST_LIS2DW12_ALL_INT_SRC_WU_MASK) {
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u8 wu_src;
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err = hw->tf->read(hw->dev, ST_LIS2DW12_WU_SRC_ADDR,
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sizeof(wu_src), &wu_src);
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err = st_lis2dw12_read(hw, ST_LIS2DW12_WU_SRC_ADDR,
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&wu_src, sizeof(wu_src));
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if (err < 0)
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return IRQ_HANDLED;
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@ -304,8 +308,8 @@ static irqreturn_t st_lis2dw12_handler_thread(int irq, void *private)
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u8 status;
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int err;
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err = hw->tf->read(hw->dev, ST_LIS2DW12_STATUS_ADDR,
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sizeof(status), &status);
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err = st_lis2dw12_read(hw, ST_LIS2DW12_STATUS_ADDR,
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&status, sizeof(status));
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if (err < 0)
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return IRQ_HANDLED;
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@ -201,32 +201,6 @@ static const struct iio_chan_spec st_lis2dw12_wu_channels[] = {
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ST_LIS2DW12_EVENT_CHANNEL(STM_IIO_GESTURE, &st_lis2dw12_rthr_event),
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};
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int st_lis2dw12_write_with_mask(struct st_lis2dw12_hw *hw, u8 addr, u8 mask,
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u8 val)
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{
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u8 data;
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int err;
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mutex_lock(&hw->lock);
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err = hw->tf->read(hw->dev, addr, sizeof(data), &data);
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if (err < 0) {
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dev_err(hw->dev, "failed to read %02x register\n", addr);
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goto unlock;
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}
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data = (data & ~mask) | ((val << __ffs(mask)) & mask);
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err = hw->tf->write(hw->dev, addr, sizeof(data), &data);
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if (err < 0)
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dev_err(hw->dev, "failed to write %02x register\n", addr);
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unlock:
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mutex_unlock(&hw->lock);
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return err;
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}
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static int st_lis2dw12_set_fs(struct st_lis2dw12_sensor *sensor, u16 gain)
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{
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int i, err;
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@ -238,9 +212,10 @@ static int st_lis2dw12_set_fs(struct st_lis2dw12_sensor *sensor, u16 gain)
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if (i == ARRAY_SIZE(st_lis2dw12_fs_table))
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return -EINVAL;
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err = st_lis2dw12_write_with_mask(sensor->hw, ST_LIS2DW12_CTRL6_ADDR,
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ST_LIS2DW12_FS_MASK,
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st_lis2dw12_fs_table[i].val);
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err = st_lis2dw12_write_with_mask_locked(sensor->hw,
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ST_LIS2DW12_CTRL6_ADDR,
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ST_LIS2DW12_FS_MASK,
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st_lis2dw12_fs_table[i].val);
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if (err < 0)
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return err;
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@ -324,19 +299,17 @@ static int st_lis2dw12_set_odr(struct st_lis2dw12_sensor *sensor, u16 req_odr)
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val = (st_lis2dw12_odr_table[i].val << __ffs(ST_LIS2DW12_ODR_MASK)) |
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(mode << __ffs(ST_LIS2DW12_MODE_MASK)) | 0x01;
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err = hw->tf->write(hw->dev, ST_LIS2DW12_CTRL1_ADDR, sizeof(val),
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&val);
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err = st_lis2dw12_write_locked(hw, ST_LIS2DW12_CTRL1_ADDR,
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&val, sizeof(val));
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return err < 0 ? err : 0;
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}
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static int st_lis2dw12_check_whoami(struct st_lis2dw12_hw *hw)
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{
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int err;
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u8 data;
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int data, err;
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err = hw->tf->read(hw->dev, ST_LIS2DW12_WHOAMI_ADDR, sizeof(data),
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&data);
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err = regmap_read(hw->regmap, ST_LIS2DW12_WHOAMI_ADDR, &data);
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if (err < 0) {
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dev_err(hw->dev, "failed to read whoami register\n");
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return err;
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@ -422,20 +395,21 @@ static int st_lis2dw12_init_hw(struct st_lis2dw12_hw *hw)
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int err;
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/* soft reset the device */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL2_ADDR,
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ST_LIS2DW12_RESET_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL2_ADDR,
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ST_LIS2DW12_RESET_MASK, 1);
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if (err < 0)
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return err;
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/* enable BDU */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL2_ADDR,
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ST_LIS2DW12_BDU_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL2_ADDR,
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ST_LIS2DW12_BDU_MASK, 1);
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if (err < 0)
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return err;
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/* enable all interrupts */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_ABS_INT_CFG_ADDR,
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ST_LIS2DW12_ALL_INT_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw,
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ST_LIS2DW12_ABS_INT_CFG_ADDR,
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ST_LIS2DW12_ALL_INT_MASK, 1);
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if (err < 0)
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return err;
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@ -445,54 +419,57 @@ static int st_lis2dw12_init_hw(struct st_lis2dw12_hw *hw)
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return err;
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/* configure default free fall event threshold */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_FREE_FALL_ADDR,
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ST_LIS2DW12_FREE_FALL_THS_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_FREE_FALL_ADDR,
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ST_LIS2DW12_FREE_FALL_THS_MASK,
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1);
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if (err < 0)
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return err;
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/* configure default free fall event duration */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_FREE_FALL_ADDR,
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ST_LIS2DW12_FREE_FALL_DUR_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_FREE_FALL_ADDR,
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ST_LIS2DW12_FREE_FALL_DUR_MASK,
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1);
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if (err < 0)
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return err;
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/* enable tap event on all axes */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_TAP_THS_Z_ADDR,
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ST_LIS2DW12_TAP_AXIS_MASK, 0x7);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_TAP_THS_Z_ADDR,
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ST_LIS2DW12_TAP_AXIS_MASK,
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0x7);
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if (err < 0)
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return err;
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/* configure default threshold for Tap event recognition */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_TAP_THS_X_ADDR,
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ST_LIS2DW12_TAP_THS_MAK, 9);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_TAP_THS_X_ADDR,
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ST_LIS2DW12_TAP_THS_MAK, 9);
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if (err < 0)
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return err;
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_TAP_THS_Y_ADDR,
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ST_LIS2DW12_TAP_THS_MAK, 9);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_TAP_THS_Y_ADDR,
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ST_LIS2DW12_TAP_THS_MAK, 9);
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if (err < 0)
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return err;
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_TAP_THS_Z_ADDR,
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ST_LIS2DW12_TAP_THS_MAK, 9);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_TAP_THS_Z_ADDR,
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ST_LIS2DW12_TAP_THS_MAK, 9);
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if (err < 0)
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return err;
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/* low noise enabled by default */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL6_ADDR,
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ST_LIS2DW12_LN_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL6_ADDR,
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ST_LIS2DW12_LN_MASK, 1);
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if (err < 0)
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return err;
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/* BW = ODR/4 */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL6_ADDR,
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ST_LIS2DW12_BW_MASK, 1);
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err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL6_ADDR,
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ST_LIS2DW12_BW_MASK, 1);
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if (err < 0)
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return err;
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/* enable latched mode */
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err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL3_ADDR,
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ST_LIS2DW12_LIR_MASK, 1);
|
||||
err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL3_ADDR,
|
||||
ST_LIS2DW12_LIR_MASK, 1);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
@ -501,8 +478,8 @@ static int st_lis2dw12_init_hw(struct st_lis2dw12_hw *hw)
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
return st_lis2dw12_write_with_mask(hw, hw->irq_reg,
|
||||
ST_LIS2DW12_FTH_INT_MASK, 1);
|
||||
return st_lis2dw12_write_with_mask_locked(hw, hw->irq_reg,
|
||||
ST_LIS2DW12_FTH_INT_MASK, 1);
|
||||
}
|
||||
|
||||
static ssize_t
|
||||
@ -568,7 +545,7 @@ static int st_lis2dw12_read_oneshot(struct st_lis2dw12_sensor *sensor,
|
||||
delay = 3000000 / sensor->odr;
|
||||
usleep_range(delay, delay + 1);
|
||||
|
||||
err = hw->tf->read(hw->dev, addr, sizeof(data), data);
|
||||
err = st_lis2dw12_read(hw, addr, &data, sizeof(data));
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
@ -672,8 +649,8 @@ static int st_lis2dw12_write_event_config(struct iio_dev *iio_dev,
|
||||
int err;
|
||||
|
||||
/* Read initial configuration data */
|
||||
err = hw->tf->read(hw->dev, ST_LIS2DW12_INT_DUR_ADDR,
|
||||
sizeof(data), data);
|
||||
err = st_lis2dw12_read(hw, ST_LIS2DW12_INT_DUR_ADDR,
|
||||
&data, sizeof(data));
|
||||
if (err < 0)
|
||||
return -EINVAL;
|
||||
|
||||
@ -707,13 +684,14 @@ static int st_lis2dw12_write_event_config(struct iio_dev *iio_dev,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = hw->tf->write(hw->dev, ST_LIS2DW12_INT_DUR_ADDR,
|
||||
sizeof(data), data);
|
||||
err = st_lis2dw12_write_locked(hw, ST_LIS2DW12_INT_DUR_ADDR,
|
||||
data, sizeof(data));
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL4_INT1_CTRL_ADDR,
|
||||
drdy_mask, drdy_val);
|
||||
err = st_lis2dw12_write_with_mask_locked(hw,
|
||||
ST_LIS2DW12_CTRL4_INT1_CTRL_ADDR,
|
||||
drdy_mask, drdy_val);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
@ -817,8 +795,8 @@ static ssize_t st_lis2dw12_enable_selftest(struct device *dev,
|
||||
msleep(200);
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
err = hw->tf->read(hw->dev, ST_LIS2DW12_OUT_X_L_ADDR,
|
||||
sizeof(data), data);
|
||||
err = st_lis2dw12_read(hw, ST_LIS2DW12_OUT_X_L_ADDR,
|
||||
&data, sizeof(data));
|
||||
if (err < 0)
|
||||
goto unlock;
|
||||
|
||||
@ -830,16 +808,16 @@ static ssize_t st_lis2dw12_enable_selftest(struct device *dev,
|
||||
}
|
||||
|
||||
/* enable self test */
|
||||
err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL3_ADDR,
|
||||
ST_LIS2DW12_ST_MASK, val);
|
||||
err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL3_ADDR,
|
||||
ST_LIS2DW12_ST_MASK, val);
|
||||
if (err < 0)
|
||||
goto unlock;
|
||||
|
||||
msleep(200);
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
err = hw->tf->read(hw->dev, ST_LIS2DW12_OUT_X_L_ADDR,
|
||||
sizeof(data), data);
|
||||
err = st_lis2dw12_read(hw, ST_LIS2DW12_OUT_X_L_ADDR,
|
||||
&data, sizeof(data));
|
||||
if (err < 0)
|
||||
goto unlock;
|
||||
|
||||
@ -861,8 +839,8 @@ static ssize_t st_lis2dw12_enable_selftest(struct device *dev,
|
||||
hw->st_status = ST_LIS2DW12_ST_FAIL;
|
||||
|
||||
/* disable self test */
|
||||
err = st_lis2dw12_write_with_mask(hw, ST_LIS2DW12_CTRL3_ADDR,
|
||||
ST_LIS2DW12_ST_MASK, 0);
|
||||
err = st_lis2dw12_write_with_mask_locked(hw, ST_LIS2DW12_CTRL3_ADDR,
|
||||
ST_LIS2DW12_ST_MASK, 0);
|
||||
if (err < 0)
|
||||
goto unlock;
|
||||
|
||||
@ -1032,7 +1010,7 @@ static struct iio_dev *st_lis2dw12_alloc_iiodev(struct st_lis2dw12_hw *hw,
|
||||
}
|
||||
|
||||
int st_lis2dw12_probe(struct device *dev, int irq, const char *name,
|
||||
const struct st_lis2dw12_transfer_function *tf_ops)
|
||||
struct regmap *regmap)
|
||||
{
|
||||
struct st_lis2dw12_hw *hw;
|
||||
int i, err;
|
||||
@ -1048,7 +1026,7 @@ int st_lis2dw12_probe(struct device *dev, int irq, const char *name,
|
||||
|
||||
hw->dev = dev;
|
||||
hw->irq = irq;
|
||||
hw->tf = tf_ops;
|
||||
hw->regmap = regmap;
|
||||
hw->watermark = 1;
|
||||
|
||||
err = st_lis2dw12_check_whoami(hw);
|
||||
|
||||
@ -14,54 +14,27 @@
|
||||
|
||||
#include "st_lis2dw12.h"
|
||||
|
||||
static int st_lis2dw12_i2c_read(struct device *dev, u8 addr, int len, u8 *data)
|
||||
{
|
||||
struct i2c_client *client = to_i2c_client(dev);
|
||||
struct i2c_msg msg[2];
|
||||
|
||||
msg[0].addr = client->addr;
|
||||
msg[0].flags = client->flags;
|
||||
msg[0].len = 1;
|
||||
msg[0].buf = &addr;
|
||||
|
||||
msg[1].addr = client->addr;
|
||||
msg[1].flags = client->flags | I2C_M_RD;
|
||||
msg[1].len = len;
|
||||
msg[1].buf = data;
|
||||
|
||||
return i2c_transfer(client->adapter, msg, 2);
|
||||
}
|
||||
|
||||
static int st_lis2dw12_i2c_write(struct device *dev, u8 addr, int len, u8 *data)
|
||||
{
|
||||
struct i2c_client *client = to_i2c_client(dev);
|
||||
struct i2c_msg msg;
|
||||
u8 send[4];
|
||||
|
||||
if (len >= ARRAY_SIZE(send))
|
||||
return -ENOMEM;
|
||||
|
||||
send[0] = addr;
|
||||
memcpy(&send[1], data, len * sizeof(u8));
|
||||
|
||||
msg.addr = client->addr;
|
||||
msg.flags = client->flags;
|
||||
msg.len = len + 1;
|
||||
msg.buf = send;
|
||||
|
||||
return i2c_transfer(client->adapter, &msg, 1);
|
||||
}
|
||||
|
||||
static const struct st_lis2dw12_transfer_function st_lis2dw12_transfer_fn = {
|
||||
.read = st_lis2dw12_i2c_read,
|
||||
.write = st_lis2dw12_i2c_write,
|
||||
static const struct regmap_config st_lis2dw12_i2c_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
};
|
||||
|
||||
static int st_lis2dw12_i2c_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
return st_lis2dw12_probe(&client->dev, client->irq, client->name,
|
||||
&st_lis2dw12_transfer_fn);
|
||||
struct regmap *regmap;
|
||||
|
||||
regmap = devm_regmap_init_i2c(client, &st_lis2dw12_i2c_regmap_config);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(&client->dev,
|
||||
"Failed to register i2c regmap %d\n",
|
||||
(int)PTR_ERR(regmap));
|
||||
|
||||
return PTR_ERR(regmap);
|
||||
}
|
||||
|
||||
return st_lis2dw12_probe(&client->dev, client->irq,
|
||||
client->name, regmap);
|
||||
}
|
||||
|
||||
static const struct of_device_id st_lis2dw12_i2c_of_match[] = {
|
||||
|
||||
@ -14,62 +14,24 @@
|
||||
|
||||
#include "st_lis2dw12.h"
|
||||
|
||||
#define SENSORS_SPI_READ BIT(7)
|
||||
|
||||
static int st_lis2dw12_spi_read(struct device *dev, u8 addr, int len, u8 *data)
|
||||
{
|
||||
struct spi_device *spi = to_spi_device(dev);
|
||||
struct st_lis2dw12_hw *hw = spi_get_drvdata(spi);
|
||||
int err;
|
||||
|
||||
struct spi_transfer xfers[] = {
|
||||
{
|
||||
.tx_buf = hw->tb.tx_buf,
|
||||
.bits_per_word = 8,
|
||||
.len = 1,
|
||||
},
|
||||
{
|
||||
.rx_buf = hw->tb.rx_buf,
|
||||
.bits_per_word = 8,
|
||||
.len = len,
|
||||
}
|
||||
};
|
||||
|
||||
hw->tb.tx_buf[0] = addr | SENSORS_SPI_READ;
|
||||
|
||||
err = spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers));
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
memcpy(data, hw->tb.rx_buf, len * sizeof(u8));
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static int st_lis2dw12_spi_write(struct device *dev, u8 addr, int len,
|
||||
u8 *data)
|
||||
{
|
||||
struct spi_device *spi = to_spi_device(dev);
|
||||
struct st_lis2dw12_hw *hw = spi_get_drvdata(spi);
|
||||
|
||||
if (len >= ST_LIS2DW12_TX_MAX_LENGTH)
|
||||
return -ENOMEM;
|
||||
|
||||
hw->tb.tx_buf[0] = addr;
|
||||
memcpy(&hw->tb.tx_buf[1], data, len);
|
||||
|
||||
return spi_write(spi, hw->tb.tx_buf, len + 1);
|
||||
}
|
||||
|
||||
static const struct st_lis2dw12_transfer_function st_lis2dw12_transfer_fn = {
|
||||
.read = st_lis2dw12_spi_read,
|
||||
.write = st_lis2dw12_spi_write,
|
||||
static const struct regmap_config st_lis2dw12_spi_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
};
|
||||
|
||||
static int st_lis2dw12_spi_probe(struct spi_device *spi)
|
||||
{
|
||||
return st_lis2dw12_probe(&spi->dev, spi->irq, spi->modalias,
|
||||
&st_lis2dw12_transfer_fn);
|
||||
struct regmap *regmap;
|
||||
|
||||
regmap = devm_regmap_init_spi(spi, &st_lis2dw12_spi_regmap_config);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(&spi->dev,
|
||||
"Failed to register spi regmap %d\n",
|
||||
(int)PTR_ERR(regmap));
|
||||
return PTR_ERR(regmap);
|
||||
}
|
||||
|
||||
return st_lis2dw12_probe(&spi->dev, spi->irq, spi->modalias, regmap);
|
||||
}
|
||||
|
||||
static const struct of_device_id st_lis2dw12_spi_of_match[] = {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user