thunderbolt: Limit Intel Barlow Ridge USB3 bandwidth
[ Upstream commit f2bfa944080dcbb8eb56259dfd2c07204cbee17e ] Intel Barlow Ridge discrete USB4 host router has the same limitation as the previous generations so make sure the USB3 bandwidth limitation quirk is applied to Barlow Ridge too. Signed-off-by: Gil Fine <gil.fine@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -77,6 +77,8 @@ extern const struct tb_nhi_ops icl_nhi_ops;
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#define PCI_DEVICE_ID_INTEL_ADL_NHI1 0x466d
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#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI 0x5781
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#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI 0x5784
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#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE 0x5786
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#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE 0x57a4
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#define PCI_DEVICE_ID_INTEL_MTL_M_NHI0 0x7eb2
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#define PCI_DEVICE_ID_INTEL_MTL_P_NHI0 0x7ec2
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#define PCI_DEVICE_ID_INTEL_MTL_P_NHI1 0x7ec3
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@ -74,6 +74,14 @@ static const struct tb_quirk tb_quirks[] = {
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quirk_usb3_maximum_bandwidth },
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{ 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI1, 0x0000, 0x0000,
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quirk_usb3_maximum_bandwidth },
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{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI, 0x0000, 0x0000,
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quirk_usb3_maximum_bandwidth },
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{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI, 0x0000, 0x0000,
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quirk_usb3_maximum_bandwidth },
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{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE, 0x0000, 0x0000,
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quirk_usb3_maximum_bandwidth },
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{ 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE, 0x0000, 0x0000,
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quirk_usb3_maximum_bandwidth },
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/*
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* CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms.
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*/
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