Merge 6.1.28 into android14-6.1-lts
Changes in 6.1.28 ASOC: Intel: sof_sdw: add quirk for Intel 'Rooks County' NUC M15 ASoC: Intel: soc-acpi: add table for Intel 'Rooks County' NUC M15 ASoC: soc-pcm: fix hw->formats cleared by soc_pcm_hw_init() for dpcm x86/hyperv: Block root partition functionality in a Confidential VM ASoC: amd: yc: Add DMI entries to support Victus by HP Laptop 16-e1xxx (8A22) iio: adc: palmas_gpadc: fix NULL dereference on rmmod ASoC: Intel: bytcr_rt5640: Add quirk for the Acer Iconia One 7 B1-750 ASoC: da7213.c: add missing pm_runtime_disable() net: wwan: t7xx: do not compile with -Werror selftests mount: Fix mount_setattr_test builds failed scsi: mpi3mr: Handle soft reset in progress fault code (0xF002) net: sfp: add quirk enabling 2500Base-x for HG MXPD-483II platform/x86: thinkpad_acpi: Add missing T14s Gen1 type to s2idle quirk list wifi: ath11k: reduce the MHI timeout to 20s tracing: Error if a trace event has an array for a __field() asm-generic/io.h: suppress endianness warnings for readq() and writeq() x86/cpu: Add model number for Intel Arrow Lake processor wireguard: timers: cast enum limits members to int in prints wifi: mt76: mt7921e: Set memory space enable in PCI_COMMAND if unset ASoC: amd: fix ACP version typo mistake ASoC: amd: ps: update the acp clock source. arm64: Always load shadow stack pointer directly from the task struct arm64: Stash shadow stack pointer in the task struct on interrupt powerpc/boot: Fix boot wrapper code generation with CONFIG_POWER10_CPU PCI: kirin: Select REGMAP_MMIO PCI: pciehp: Fix AB-BA deadlock between reset_lock and device_lock PCI: qcom: Fix the incorrect register usage in v2.7.0 config phy: qcom-qmp-pcie: sc8180x PCIe PHY has 2 lanes IMA: allow/fix UML builds usb: gadget: udc: core: Invoke usb_gadget_connect only when started usb: gadget: udc: core: Prevent redundant calls to pullup usb: dwc3: gadget: Stall and restart EP0 if host is unresponsive USB: dwc3: fix runtime pm imbalance on probe errors USB: dwc3: fix runtime pm imbalance on unbind hwmon: (k10temp) Check range scale when CUR_TEMP register is read-write hwmon: (adt7475) Use device_property APIs when configuring polarity tpm: Add !tpm_amd_is_rng_defective() to the hwrng_unregister() call site posix-cpu-timers: Implement the missing timer_wait_running callback media: ov8856: Do not check for for module version blk-stat: fix QUEUE_FLAG_STATS clear blk-crypto: don't use struct request_queue for public interfaces blk-crypto: add a blk_crypto_config_supported_natively helper blk-crypto: move internal only declarations to blk-crypto-internal.h blk-crypto: Add a missing include directive blk-mq: release crypto keyslot before reporting I/O complete blk-crypto: make blk_crypto_evict_key() return void blk-crypto: make blk_crypto_evict_key() more robust staging: iio: resolver: ads1210: fix config mode tty: Prevent writing chars during tcsetattr TCSADRAIN/FLUSH xhci: fix debugfs register accesses while suspended serial: fix TIOCSRS485 locking serial: 8250: Fix serial8250_tx_empty() race with DMA Tx serial: max310x: fix IO data corruption in batched operations tick/nohz: Fix cpu_is_hotpluggable() by checking with nohz subsystem fs: fix sysctls.c built MIPS: fw: Allow firmware to pass a empty env ipmi:ssif: Add send_retries increment ipmi: fix SSIF not responding under certain cond. iio: addac: stx104: Fix race condition when converting analog-to-digital iio: addac: stx104: Fix race condition for stx104_write_raw() kheaders: Use array declaration instead of char wifi: mt76: add missing locking to protect against concurrent rx/status calls pwm: meson: Fix axg ao mux parents pwm: meson: Fix g12a ao clk81 name soundwire: qcom: correct setting ignore bit on v1.5.1 pinctrl: qcom: lpass-lpi: set output value before enabling output ring-buffer: Ensure proper resetting of atomic variables in ring_buffer_reset_online_cpus ring-buffer: Sync IRQ works before buffer destruction crypto: api - Demote BUG_ON() in crypto_unregister_alg() to a WARN_ON() crypto: safexcel - Cleanup ring IRQ workqueues on load failure crypto: arm64/aes-neonbs - fix crash with CFI enabled crypto: ccp - Don't initialize CCP for PSP 0x1649 rcu: Avoid stack overflow due to __rcu_irq_enter_check_tick() being kprobe-ed reiserfs: Add security prefix to xattr name in reiserfs_security_write() KVM: nVMX: Emulate NOPs in L2, and PAUSE if it's not intercepted KVM: arm64: Avoid vcpu->mutex v. kvm->lock inversion in CPU_ON KVM: arm64: Avoid lock inversion when setting the VM register width KVM: arm64: Use config_lock to protect data ordered against KVM_RUN KVM: arm64: Use config_lock to protect vgic state KVM: arm64: vgic: Don't acquire its_lock before config_lock relayfs: fix out-of-bounds access in relay_file_read drm/amd/display: Remove stutter only configurations drm/amd/display: limit timing for single dimm memory drm/amd/display: fix PSR-SU/DSC interoperability support drm/amd/display: fix a divided-by-zero error KVM: RISC-V: Retry fault if vma_lookup() results become invalid ksmbd: fix racy issue under cocurrent smb2 tree disconnect ksmbd: call rcu_barrier() in ksmbd_server_exit() ksmbd: fix NULL pointer dereference in smb2_get_info_filesystem() ksmbd: fix memleak in session setup ksmbd: not allow guest user on multichannel ksmbd: fix deadlock in ksmbd_find_crypto_ctx() ACPI: video: Remove acpi_backlight=video quirk for Lenovo ThinkPad W530 i2c: omap: Fix standard mode false ACK readings riscv: mm: remove redundant parameter of create_fdt_early_page_table tracing: Fix permissions for the buffer_percent file swsmu/amdgpu_smu: Fix the wrong if-condition drm/amd/pm: re-enable the gfx imu when smu resume iommu/amd: Fix "Guest Virtual APIC Table Root Pointer" configuration in IRTE RISC-V: Align SBI probe implementation with spec Revert "ubifs: dirty_cow_znode: Fix memleak in error handling path" ubifs: Fix memleak when insert_old_idx() failed ubi: Fix return value overwrite issue in try_write_vid_and_data() ubifs: Free memory for tmpfile name ubifs: Fix memory leak in do_rename ceph: fix potential use-after-free bug when trimming caps xfs: don't consider future format versions valid cxl/hdm: Fail upon detecting 0-sized decoders bus: mhi: host: Remove duplicate ee check for syserr bus: mhi: host: Use mhi_tryset_pm_state() for setting fw error state bus: mhi: host: Range check CHDBOFF and ERDBOFF ASoC: dt-bindings: qcom,lpass-rx-macro: correct minItems for clocks kunit: improve KTAP compliance of KUnit test output kunit: fix bug in the order of lines in debugfs logs rcu: Fix missing TICK_DEP_MASK_RCU_EXP dependency check selftests/resctrl: Return NULL if malloc_and_init_memory() did not alloc mem selftests/resctrl: Move ->setup() call outside of test specific branches selftests/resctrl: Allow ->setup() to return errors selftests/resctrl: Check for return value after write_schemata() selinux: fix Makefile dependencies of flask.h selinux: ensure av_permissions.h is built when needed tpm, tpm_tis: Do not skip reset of original interrupt vector tpm, tpm_tis: Claim locality before writing TPM_INT_ENABLE register tpm, tpm_tis: Disable interrupts if tpm_tis_probe_irq() failed tpm, tpm_tis: Claim locality before writing interrupt registers tpm, tpm: Implement usage counter for locality tpm, tpm_tis: Claim locality when interrupts are reenabled on resume erofs: stop parsing non-compact HEAD index if clusterofs is invalid erofs: initialize packed inode after root inode is assigned erofs: fix potential overflow calculating xattr_isize drm/rockchip: Drop unbalanced obj unref drm/i915/dg2: Drop one PCI ID drm/vgem: add missing mutex_destroy drm/probe-helper: Cancel previous job before starting new one drm/amdgpu: register a vga_switcheroo client for MacBooks with apple-gmux tools/x86/kcpuid: Fix avx512bw and avx512lvl fields in Fn00000007 soc: ti: pm33xx: Fix refcount leak in am33xx_pm_probe arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI channels arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels drm/mediatek: dp: Only trigger DRM HPD events if bridge is attached drm/msm/disp/dpu: check for crtc enable rather than crtc active to release shared resources EDAC/skx: Fix overflows on the DRAM row address mapping arrays ARM: dts: qcom-apq8064: Fix opp table child name regulator: core: Shorten off-on-delay-us for always-on/boot-on by time since booted arm64: dts: ti: k3-am62-main: Fix GPIO numbers in DT arm64: dts: ti: k3-am62a7-sk: Fix DDR size to full 4GB arm64: dts: ti: k3-j721e-main: Remove ti,strobe-sel property arm64: dts: broadcom: bcmbca: bcm4908: fix NAND interrupt name arm64: dts: broadcom: bcmbca: bcm4908: fix LED nodenames arm64: dts: broadcom: bcmbca: bcm4908: fix procmon nodename arm64: dts: qcom: msm8998: Fix stm-stimulus-base reg name arm64: dts: qcom: sc7280: fix EUD port properties arm64: dts: qcom: sdm845: correct dynamic power coefficients arm64: dts: qcom: sdm845: Fix the PCI I/O port range arm64: dts: qcom: msm8998: Fix the PCI I/O port range arm64: dts: qcom: sc7280: Fix the PCI I/O port range arm64: dts: qcom: ipq8074: Fix the PCI I/O port range arm64: dts: qcom: ipq6018: Fix the PCI I/O port range arm64: dts: qcom: msm8996: Fix the PCI I/O port range arm64: dts: qcom: sm8250: Fix the PCI I/O port range arm64: dts: qcom: sm8150: Fix the PCI I/O port range arm64: dts: qcom: sm8450: Fix the PCI I/O port range ARM: dts: qcom: ipq4019: Fix the PCI I/O port range ARM: dts: qcom: ipq8064: Fix the PCI I/O port range ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node x86/MCE/AMD: Use an u64 for bank_map media: bdisp: Add missing check for create_workqueue media: platform: mtk-mdp3: Add missing check and free for ida_alloc media: amphion: decoder implement display delay enable media: av7110: prevent underflow in write_ts_to_decoder() firmware: qcom_scm: Clear download bit during reboot drm/bridge: adv7533: Fix adv7533_mode_valid for adv7533 and adv7535 media: max9286: Free control handler arm64: dts: ti: k3-am625: Correct L2 cache size to 512KB arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB drm/msm/adreno: drop bogus pm_runtime_set_active() drm: msm: adreno: Disable preemption on Adreno 510 virt/coco/sev-guest: Double-buffer messages arm64: dts: qcom: sm8350-microsoft-surface: fix USB dual-role mode property drm/amd/display/dc/dce60/Makefile: Fix previous attempt to silence known override-init warnings ACPI: processor: Fix evaluating _PDC method when running as Xen dom0 mmc: sdhci-of-esdhc: fix quirk to ignore command inhibit for data arm64: dts: qcom: sm8450: fix pcie1 gpios properties name drm: rcar-du: Fix a NULL vs IS_ERR() bug ARM: dts: gta04: fix excess dma channel usage firmware: arm_scmi: Fix xfers allocation on Rx channel perf/arm-cmn: Move overlapping wp_combine field ARM: dts: stm32: fix spi1 pin assignment on stm32mp15 arm64: dts: apple: t8103: Disable unused PCIe ports cpufreq: mediatek: fix passing zero to 'PTR_ERR' cpufreq: mediatek: fix KP caused by handler usage after regulator_put/clk_put cpufreq: mediatek: raise proc/sram max voltage for MT8516 cpufreq: mediatek: Raise proc and sram max voltage for MT7622/7623 cpufreq: qcom-cpufreq-hw: Revert adding cpufreq qos arm64: dts: mediatek: mt8192-asurada: Fix voltage constraint for Vgpu ACPI: VIOT: Initialize the correct IOMMU fwspec drm/lima/lima_drv: Add missing unwind goto in lima_pdev_probe() drm/mediatek: dp: Change the aux retries times when receiving AUX_DEFER mailbox: mpfs: switch to txdone_poll soc: bcm: brcmstb: biuctrl: fix of_iomap leak soc: renesas: renesas-soc: Release 'chipid' from ioremap() gpu: host1x: Fix potential double free if IOMMU is disabled gpu: host1x: Fix memory leak of device names arm64: dts: qcom: sc7280-herobrine-villager: correct trackpad supply arm64: dts: qcom: sc7180-trogdor-lazor: correct trackpad supply arm64: dts: qcom: sc7180-trogdor-pazquel: correct trackpad supply arm64: dts: qcom: msm8994-kitakami: drop unit address from PMI8994 regulator arm64: dts: qcom: msm8994-msft-lumia-octagon: drop unit address from PMI8994 regulator arm64: dts: qcom: apq8096-db820c: drop unit address from PMI8994 regulator drm/ttm: optimize pool allocations a bit v2 drm/ttm/pool: Fix ttm_pool_alloc error path regulator: core: Consistently set mutex_owner when using ww_mutex_lock_slow() regulator: core: Avoid lockdep reports when resolving supplies x86/apic: Fix atomic update of offset in reserve_eilvt_offset() arm64: dts: qcom: msm8994-angler: Fix cont_splash_mem mapping arm64: dts: qcom: msm8994-angler: removed clash with smem_region arm64: dts: sc7180: Rename qspi data12 as data23 arm64: dts: sc7280: Rename qspi data12 as data23 media: mediatek: vcodec: Use 4K frame size when supported by stateful decoder media: mediatek: vcodec: Make MM21 the default capture format media: mediatek: vcodec: Force capture queue format to MM21 media: mediatek: vcodec: add params to record lat and core lat_buf count media: mediatek: vcodec: using each instance lat_buf count replace core ready list media: mediatek: vcodec: move lat_buf to the top of core list media: mediatek: vcodec: add core decode done event media: mediatek: vcodec: remove unused lat_buf media: mediatek: vcodec: making sure queue_work successfully media: mediatek: vcodec: change lat thread decode error condition media: cedrus: fix use after free bug in cedrus_remove due to race condition media: rkvdec: fix use after free bug in rkvdec_remove platform/x86/amd/pmf: Move out of BIOS SMN pair for driver probe platform/x86/amd: pmc: Don't try to read SMU version on Picasso platform/x86/amd: pmc: Hide SMU version and program attributes for Picasso platform/x86/amd: pmc: Don't dump data after resume from s0i3 on picasso platform/x86/amd: pmc: Move idlemask check into `amd_pmc_idlemask_read` platform/x86/amd: pmc: Utilize SMN index 0 for driver probe platform/x86/amd: pmc: Move out of BIOS SMN pair for STB init media: dm1105: Fix use after free bug in dm1105_remove due to race condition media: saa7134: fix use after free bug in saa7134_finidev due to race condition media: platform: mtk-mdp3: fix potential frame size overflow in mdp_try_fmt_mplane() media: rcar_fdp1: Fix refcount leak in probe and remove function media: v4l: async: Return async sub-devices to subnotifier list media: hi846: Fix memleak in hi846_init_controls() drm/amd/display: Fix potential null dereference media: rc: gpio-ir-recv: Fix support for wake-up media: venus: dec: Fix handling of the start cmd media: venus: dec: Fix capture formats enumeration order regulator: stm32-pwr: fix of_iomap leak x86/ioapic: Don't return 0 from arch_dynirq_lower_bound() arm64: kgdb: Set PSTATE.SS to 1 to re-enable single-step perf/arm-cmn: Fix port detection for CMN-700 media: mediatek: vcodec: fix decoder disable pm crash media: mediatek: vcodec: add remove function for decoder platform driver debugobject: Prevent init race with static objects drm/i915: Make intel_get_crtc_new_encoder() less oopsy tick/common: Align tick period with the HZ tick. ACPI: bus: Ensure that notify handlers are not running after removal cpufreq: use correct unit when verify cur freq rpmsg: glink: Propagate TX failures in intentless mode as well hwmon: (pmbus/fsp-3y) Fix functionality bitmask in FSP-3Y YM-2151E platform/chrome: cros_typec_switch: Add missing fwnode_handle_put() wifi: ath6kl: minor fix for allocation size wifi: ath9k: hif_usb: fix memory leak of remain_skbs wifi: ath11k: Use platform_get_irq() to get the interrupt wifi: ath5k: Use platform_get_irq() to get the interrupt wifi: ath5k: fix an off by one check in ath5k_eeprom_read_freq_list() wifi: ath11k: fix SAC bug on peer addition with sta band migration wifi: brcmfmac: support CQM RSSI notification with older firmware wifi: ath6kl: reduce WARN to dev_dbg() in callback tools: bpftool: Remove invalid \' json escape wifi: rtw88: mac: Return the original error from rtw_pwr_seq_parser() wifi: rtw88: mac: Return the original error from rtw_mac_power_switch() bpf: take into account liveness when propagating precision bpf: fix precision propagation verbose logging crypto: qat - fix concurrency issue when device state changes scm: fix MSG_CTRUNC setting condition for SO_PASSSEC wifi: ath11k: fix deinitialization of firmware resources selftests/bpf: Fix a fd leak in an error path in network_helpers.c bpf: Remove misleading spec_v1 check on var-offset stack read net: pcs: xpcs: remove double-read of link state when using AN vlan: partially enable SIOCSHWTSTAMP in container net/packet: annotate accesses to po->xmit net/packet: convert po->origdev to an atomic flag net/packet: convert po->auxdata to an atomic flag libbpf: Fix ld_imm64 copy logic for ksym in light skeleton. net: dsa: qca8k: remove assignment of an_enabled in pcs_get_state() netfilter: keep conntrack reference until IPsecv6 policy checks are done bpf: Fix __reg_bound_offset 64->32 var_off subreg propagation scsi: target: core: Change the way target_xcopy_do_work() sets restiction on max I/O scsi: target: Move sess cmd counter to new struct scsi: target: Move cmd counter allocation scsi: target: Pass in cmd counter to use during cmd setup scsi: target: iscsit: isert: Alloc per conn cmd counter scsi: target: iscsit: Stop/wait on cmds during conn close scsi: target: Fix multiple LUN_RESET handling scsi: target: iscsit: Fix TAS handling during conn cleanup scsi: megaraid: Fix mega_cmd_done() CMDID_INT_CMDS net: sunhme: Fix uninitialized return code f2fs: handle dqget error in f2fs_transfer_project_quota() f2fs: fix uninitialized skipped_gc_rwsem f2fs: apply zone capacity to all zone type f2fs: compress: fix to call f2fs_wait_on_page_writeback() in f2fs_write_raw_pages() f2fs: fix scheduling while atomic in decompression path crypto: caam - Clear some memory in instantiate_rng crypto: sa2ul - Select CRYPTO_DES wifi: rtlwifi: fix incorrect error codes in rtl_debugfs_set_write_rfreg() wifi: rtlwifi: fix incorrect error codes in rtl_debugfs_set_write_reg() scsi: libsas: Add sas_ata_device_link_abort() scsi: hisi_sas: Handle NCQ error when IPTT is valid wifi: rt2x00: Fix memory leak when handling surveys f2fs: fix iostat lock protection net: qrtr: correct types of trace event parameters selftests: xsk: Use correct UMEM size in testapp_invalid_desc selftests: xsk: Disable IPv6 on VETH1 selftests: xsk: Deflakify STATS_RX_DROPPED test selftests/bpf: Wait for receive in cg_storage_multi test bpftool: Fix bug for long instructions in program CFG dumps crypto: drbg - Only fail when jent is unavailable in FIPS mode xsk: Fix unaligned descriptor validation f2fs: fix to avoid use-after-free for cached IPU bio wifi: iwlwifi: fix duplicate entry in iwl_dev_info_table bpf/btf: Fix is_int_ptr() scsi: lpfc: Fix ioremap issues in lpfc_sli4_pci_mem_setup() net: ethernet: stmmac: dwmac-rk: rework optional clock handling net: ethernet: stmmac: dwmac-rk: fix optional phy regulator handling wifi: ath11k: fix writing to unintended memory region bpf, sockmap: fix deadlocks in the sockhash and sockmap nvmet: fix error handling in nvmet_execute_identify_cns_cs_ns() nvmet: fix Identify Namespace handling nvmet: fix Identify Controller handling nvmet: fix Identify Active Namespace ID list handling nvmet: fix I/O Command Set specific Identify Controller nvme: fix async event trace event nvme-fcloop: fix "inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage" selftests/bpf: Use read_perf_max_sample_freq() in perf_event_stackmap selftests/bpf: Fix leaked bpf_link in get_stackid_cannot_attach blk-mq: don't plug for head insertions in blk_execute_rq_nowait wifi: iwlwifi: debug: fix crash in __iwl_err() wifi: iwlwifi: trans: don't trigger d3 interrupt twice wifi: iwlwifi: mvm: don't set CHECKSUM_COMPLETE for unsupported protocols bpf, sockmap: Revert buggy deadlock fix in the sockhash and sockmap f2fs: fix to check return value of f2fs_do_truncate_blocks() f2fs: fix to check return value of inc_valid_block_count() md/raid10: fix task hung in raid10d md/raid10: fix leak of 'r10bio->remaining' for recovery md/raid10: fix memleak for 'conf->bio_split' md/raid10: fix memleak of md thread md/raid10: don't call bio_start_io_acct twice for bio which experienced read error wifi: iwlwifi: mvm: don't drop unencrypted MCAST frames wifi: iwlwifi: yoyo: skip dump correctly on hw error wifi: iwlwifi: yoyo: Fix possible division by zero wifi: iwlwifi: mvm: initialize seq variable wifi: iwlwifi: fw: move memset before early return jdb2: Don't refuse invalidation of already invalidated buffers io_uring/rsrc: use nospec'ed indexes wifi: iwlwifi: make the loop for card preparation effective wifi: mt76: mt7915: expose device tree match table wifi: mt76: handle failure of vzalloc in mt7615_coredump_work wifi: mt76: add flexible polling wait-interval support wifi: mt76: mt7921e: fix probe timeout after reboot wifi: mt76: fix 6GHz high channel not be scanned mt76: mt7921: fix kernel panic by accessing unallocated eeprom.data wifi: mt76: mt7921: fix missing unwind goto in `mt7921u_probe` wifi: mt76: mt7921e: improve reliability of dma reset wifi: mt76: mt7921e: stop chip reset worker in unregister hook wifi: mt76: connac: fix txd multicast rate setting wifi: iwlwifi: mvm: check firmware response size netfilter: conntrack: restore IPS_CONFIRMED out of nf_conntrack_hash_check_insert() netfilter: conntrack: fix wrong ct->timeout value wifi: iwlwifi: fw: fix memory leak in debugfs ixgbe: Allow flow hash to be set via ethtool ixgbe: Enable setting RSS table to default values net/mlx5e: Don't clone flow post action attributes second time net/mlx5: E-switch, Create per vport table based on devlink encap mode net/mlx5: E-switch, Don't destroy indirect table in split rule net/mlx5e: Fix error flow in representor failing to add vport rx rule net/mlx5: Remove "recovery" arg from mlx5_load_one() function net/mlx5: Suspend auxiliary devices only in case of PCI device suspend Revert "net/mlx5: Remove "recovery" arg from mlx5_load_one() function" net/mlx5: Use recovery timeout on sync reset flow net/mlx5e: Nullify table pointer when failing to create net: stmmac:fix system hang when setting up tag_8021q VLAN for DSA ports bpf: Fix race between btf_put and btf_idr walk. bpf: Don't EFAULT for getsockopt with optval=NULL netfilter: nf_tables: don't write table validation state without mutex net: dpaa: Fix uninitialized variable in dpaa_stop() net/sched: sch_fq: fix integer overflow of "credit" ipv4: Fix potential uninit variable access bug in __ip_make_skb() Revert "Bluetooth: btsdio: fix use after free bug in btsdio_remove due to unfinished work" netlink: Use copy_to_user() for optval in netlink_getsockopt(). net: amd: Fix link leak when verifying config failed tcp/udp: Fix memleaks of sk and zerocopy skbs with TX timestamp. ipmi: ASPEED_BT_IPMI_BMC: select REGMAP_MMIO instead of depending on it ASoC: cs35l41: Only disable internal boost drivers: staging: rtl8723bs: Fix locking in _rtw_join_timeout_handler() drivers: staging: rtl8723bs: Fix locking in rtw_scan_timeout_handler() pstore: Revert pmsg_lock back to a normal mutex usb: host: xhci-rcar: remove leftover quirk handling usb: dwc3: gadget: Change condition for processing suspend event serial: stm32: Re-assert RTS/DE GPIO in RS485 mode only if more data are transmitted fpga: bridge: fix kernel-doc parameter description iio: light: max44009: add missing OF device matching serial: 8250_bcm7271: Fix arbitration handling spi: atmel-quadspi: Don't leak clk enable count in pm resume spi: atmel-quadspi: Free resources even if runtime resume failed in .remove() spi: imx: Don't skip cleanup in remove's error path usb: gadget: udc: renesas_usb3: Fix use after free bug in renesas_usb3_remove due to race condition ASoC: soc-compress: Inherit atomicity from DAI link for Compress FE PCI: imx6: Install the fault handler only on compatible match ASoC: es8316: Handle optional IRQ assignment linux/vt_buffer.h: allow either builtin or modular for macros spi: qup: Don't skip cleanup in remove's error path interconnect: qcom: rpm: drop bogus pm domain attach spi: fsl-spi: Fix CPM/QE mode Litte Endian vmci_host: fix a race condition in vmci_host_poll() causing GPF of: Fix modalias string generation PCI/EDR: Clear Device Status after EDR error recovery ia64: mm/contig: fix section mismatch warning/error ia64: salinfo: placate defined-but-not-used warning scripts/gdb: bail early if there are no clocks scripts/gdb: bail early if there are no generic PD HID: amd_sfh: Correct the structure fields HID: amd_sfh: Correct the sensor enable and disable command HID: amd_sfh: Fix illuminance value HID: amd_sfh: Add support for shutdown operation HID: amd_sfh: Correct the stop all command HID: amd_sfh: Increase sensor command timeout for SFH1.1 HID: amd_sfh: Handle "no sensors" enabled for SFH1.1 cacheinfo: Check sib_leaf in cache_leaves_are_shared() coresight: etm_pmu: Set the module field drm/panel: novatek-nt35950: Improve error handling ASoC: fsl_mqs: move of_node_put() to the correct location PCI/PM: Extend D3hot delay for NVIDIA HDA controllers drm/panel: novatek-nt35950: Only unregister DSI1 if it exists spi: cadence-quadspi: fix suspend-resume implementations i2c: cadence: cdns_i2c_master_xfer(): Fix runtime PM leak on error path i2c: xiic: xiic_xfer(): Fix runtime PM leak on error path scripts/gdb: raise error with reduced debugging information uapi/linux/const.h: prefer ISO-friendly __typeof__ sh: sq: Fix incorrect element size for allocating bitmap buffer usb: gadget: tegra-xudc: Fix crash in vbus_draw usb: chipidea: fix missing goto in `ci_hdrc_probe` usb: mtu3: fix kernel panic at qmu transfer done irq handler firmware: stratix10-svc: Fix an NULL vs IS_ERR() bug in probe tty: serial: fsl_lpuart: adjust buffer length to the intended size serial: 8250: Add missing wakeup event reporting spi: cadence-quadspi: use macro DEFINE_SIMPLE_DEV_PM_OPS staging: rtl8192e: Fix W_DISABLE# does not work after stop/start spmi: Add a check for remove callback when removing a SPMI driver virtio_ring: don't update event idx on get_buf fbdev: mmp: Fix deferred clk handling in mmphw_probe() selftests/powerpc/pmu: Fix sample field check in the mmcra_thresh_marked_sample_test macintosh/windfarm_smu_sat: Add missing of_node_put() powerpc/perf: Properly detect mpc7450 family powerpc/mpc512x: fix resource printk format warning powerpc/wii: fix resource printk format warnings powerpc/sysdev/tsi108: fix resource printk format warnings macintosh: via-pmu-led: requires ATA to be set powerpc/rtas: use memmove for potentially overlapping buffer copy sched/fair: Fix inaccurate tally of ttwu_move_affine perf/core: Fix hardlockup failure caused by perf throttle Revert "objtool: Support addition to set CFA base" riscv: Fix ptdump when KASAN is enabled sched/rt: Fix bad task migration for rt tasks tracing/user_events: Ensure write index cannot be negative clk: at91: clk-sam9x60-pll: fix return value check IB/hifi1: add a null check of kzalloc_node in hfi1_ipoib_txreq_init RDMA/siw: Fix potential page_array out of range access clk: mediatek: mt2712: Add error handling to clk_mt2712_apmixed_probe() clk: mediatek: Consistently use GATE_MTK() macro clk: mediatek: mt7622: Properly use CLK_IS_CRITICAL flag clk: mediatek: mt8135: Properly use CLK_IS_CRITICAL flag RDMA/rdmavt: Delete unnecessary NULL check clk: qcom: gcc-qcm2290: Fix up gcc_sdcc2_apps_clk_src workqueue: Fix hung time report of worker pools rtc: omap: include header for omap_rtc_power_off_program prototype RDMA/mlx4: Prevent shift wrapping in set_user_sq_size() rtc: meson-vrtc: Use ktime_get_real_ts64() to get the current time rtc: k3: handle errors while enabling wake irq RDMA/erdma: Use fixed hardware page size fs/ntfs3: Fix memory leak if ntfs_read_mft failed fs/ntfs3: Add check for kmemdup fs/ntfs3: Fix OOB read in indx_insert_into_buffer fs/ntfs3: Fix slab-out-of-bounds read in hdr_delete_de() iommu/mediatek: Set dma_mask for PGTABLE_PA_35_EN power: supply: generic-adc-battery: fix unit scaling clk: add missing of_node_put() in "assigned-clocks" property parsing RDMA/siw: Remove namespace check from siw_netdev_event() clk: qcom: gcc-sm6115: Mark RCGs shared where applicable power: supply: rk817: Fix low SOC bugs RDMA/cm: Trace icm_send_rej event before the cm state is reset RDMA/srpt: Add a check for valid 'mad_agent' pointer IB/hfi1: Fix SDMA mmu_rb_node not being evicted in LRU order IB/hfi1: Fix bugs with non-PAGE_SIZE-end multi-iovec user SDMA requests clk: imx: fracn-gppll: fix the rate table clk: imx: fracn-gppll: disable hardware select control clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents NFSv4.1: Always send a RECLAIM_COMPLETE after establishing lease iommu/amd: Set page size bitmap during V2 domain allocation clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: dispcc-qcm2290: get rid of test clock clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk Input: raspberrypi-ts - fix refcount leak in rpi_ts_probe swiotlb: relocate PageHighMem test away from rmem_swiotlb_setup swiotlb: fix debugfs reporting of reserved memory pools RDMA/mlx5: Check pcie_relaxed_ordering_enabled() in UMR RDMA/mlx5: Fix flow counter query via DEVX SUNRPC: remove the maximum number of retries in call_bind_status RDMA/mlx5: Use correct device num_ports when modify DC clocksource/drivers/davinci: Fix memory leak in davinci_timer_register when init fails openrisc: Properly store r31 to pt_regs on unhandled exceptions timekeeping: Fix references to nonexistent ktime_get_fast_ns() SMB3: Add missing locks to protect deferred close file list SMB3: Close deferred file handles in case of handle lease break ext4: fix i_disksize exceeding i_size problem in paritally written case ext4: fix use-after-free read in ext4_find_extent for bigalloc + inline pinctrl: renesas: r8a779a0: Remove incorrect AVB[01] pinmux configuration pinctrl: renesas: r8a779f0: Fix tsn1_avtp_pps pin group pinctrl: renesas: r8a779g0: Fix Group 4/5 pin functions pinctrl: renesas: r8a779g0: Fix Group 6/7 pin functions pinctrl: renesas: r8a779g0: Fix ERROROUTC function names leds: TI_LMU_COMMON: select REGMAP instead of depending on it pinctrl: ralink: reintroduce ralink,rt2880-pinmux compatible string dmaengine: mv_xor_v2: Fix an error code. leds: tca6507: Fix error handling of using fwnode_property_read_string pwm: mtk-disp: Disable shadow registers before setting backlight values pwm: mtk-disp: Configure double buffering before reading in .get_state() soundwire: cadence: rename sdw_cdns_dai_dma_data as sdw_cdns_dai_runtime soundwire: intel: don't save hw_params for use in prepare phy: tegra: xusb: Add missing tegra_xusb_port_unregister for usb2_port and ulpi_port phy: ti: j721e-wiz: Fix unreachable code in wiz_mode_select() dma: gpi: remove spurious unlock in gpi_ch_init dmaengine: dw-edma: Fix to change for continuous transfer dmaengine: dw-edma: Fix to enable to issue dma request on DMA processing dmaengine: at_xdmac: do not enable all cyclic channels pinctrl-bcm2835.c: fix race condition when setting gpio dir thermal/drivers/mediatek: Use devm_of_iomap to avoid resource leak in mtk_thermal_probe mfd: tqmx86: Do not access I2C_DETECT register through io_base mfd: tqmx86: Specify IO port register range more precisely mfd: tqmx86: Correct board names for TQMxE39x mfd: ocelot-spi: Fix unsupported bulk read mfd: arizona-spi: Add missing MODULE_DEVICE_TABLE hte: tegra: fix 'struct of_device_id' build error hte: tegra-194: Fix off by one in tegra_hte_map_to_line_id() ACPI: PM: Do not turn of unused power resources on the Toshiba Click Mini PM: hibernate: Turn snapshot_test into global variable PM: hibernate: Do not get block device exclusively in test_resume mode afs: Fix updating of i_size with dv jump from server afs: Fix getattr to report server i_size on dirs, not local size afs: Avoid endless loop if file is larger than expected parisc: Fix argument pointer in real64_call_asm() parisc: Ensure page alignment in flush functions ALSA: usb-audio: Add quirk for Pioneer DDJ-800 ALSA: hda/realtek: Add quirk for ThinkPad P1 Gen 6 ALSA: hda/realtek: Add quirk for ASUS UM3402YAR using CS35L41 ALSA: hda/realtek: support HP Pavilion Aero 13-be0xxx Mute LED ALSA: hda/realtek: Fix mute and micmute LEDs for an HP laptop nilfs2: do not write dirty data after degenerating to read-only nilfs2: fix infinite loop in nilfs_mdt_get_block() mm: do not reclaim private data from pinned page drbd: correctly submit flush bio on barrier md/raid10: fix null-ptr-deref in raid10_sync_request md/raid5: Improve performance for sequential IO kasan: hw_tags: avoid invalid virt_to_page() mtd: core: provide unique name for nvmem device, take two mtd: core: fix nvmem error reporting mtd: core: fix error path for nvmem provider mtd: spi-nor: core: Update flash's current address mode when changing address mode mailbox: zynqmp: Fix IPI isr handling kcsan: Avoid READ_ONCE() in read_instrumented_memory() mailbox: zynqmp: Fix typo in IPI documentation wifi: rtl8xxxu: RTL8192EU always needs full init wifi: rtw89: fix potential race condition between napi_init and napi_enable clk: microchip: fix potential UAF in auxdev release callback clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent scripts/gdb: fix lx-timerlist for Python3 btrfs: scrub: reject unsupported scrub flags s390/dasd: fix hanging blockdevice after request requeue ia64: fix an addr to taddr in huge_pte_offset() mm/mempolicy: correctly update prev when policy is equal on mbind vhost_vdpa: fix unmap process in no-batch mode dm verity: fix error handling for check_at_most_once on FEC dm clone: call kmem_cache_destroy() in dm_clone_init() error path dm integrity: call kmem_cache_destroy() in dm_integrity_init() error path dm flakey: fix a crash with invalid table line dm ioctl: fix nested locking in table_clear() to remove deadlock concern dm: don't lock fs when the map is NULL in process of resume blk-iocost: avoid 64-bit division in ioc_timer_fn cifs: fix potential use-after-free bugs in TCP_Server_Info::hostname cifs: protect session status check in smb2_reconnect() thunderbolt: Use correct type in tb_port_is_clx_enabled() prototype bonding (gcc13): synchronize bond_{a,t}lb_xmit() types wifi: ath11k: synchronize ath11k_mac_he_gi_to_nl80211_he_gi()'s return type perf auxtrace: Fix address filter entire kernel size perf intel-pt: Fix CYC timestamps after standalone CBR block/blk-iocost (gcc13): keep large values in a new enum sfc (gcc13): synchronize ef100_enqueue_skb()'s return type i40e: Remove unused i40e status codes i40e: Remove string printing for i40e_status i40e: use int for i40e_status drm/amd/display (gcc13): fix enum mismatch debugobject: Ensure pool refill (again) scsi: libsas: Grab the ATA port lock in sas_ata_device_link_abort() netfilter: nf_tables: deactivate anonymous set from preparation phase Linux 6.1.28 Change-Id: I61b5133e2d051cc2aa39b8c7c1be3fc25da40210 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
commit
ef75a88787
@ -27,6 +27,7 @@ properties:
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const: 0
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clocks:
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minItems: 3
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maxItems: 5
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clock-names:
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4
Makefile
4
Makefile
@ -1,9 +1,9 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 1
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SUBLEVEL = 27
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SUBLEVEL = 28
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EXTRAVERSION =
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NAME = Hurr durr I'ma ninja sloth
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NAME = Curry Ramen
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# *DOCUMENTATION*
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# To see a list of typical targets execute "make help"
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@ -612,6 +612,22 @@ &i2c3 {
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clock-frequency = <100000>;
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};
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&mcspi1 {
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status = "disabled";
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};
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&mcspi2 {
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status = "disabled";
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};
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&mcspi3 {
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status = "disabled";
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};
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&mcspi4 {
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status = "disabled";
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};
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&usb_otg_hs {
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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@ -1271,7 +1271,7 @@ &gfx3d1 30
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gpu_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-320000000 {
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opp-450000000 {
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opp-hz = /bits/ 64 <450000000>;
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};
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@ -426,8 +426,8 @@ pcie0: pci@40000000 {
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
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<0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;
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ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>,
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<0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@ -1085,8 +1085,8 @@ pcie0: pci@1b500000 {
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
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ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000 /* I/O */
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0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@ -1136,8 +1136,8 @@ pcie1: pci@1b700000 {
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
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ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000 /* I/O */
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0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@ -1187,8 +1187,8 @@ pcie2: pci@1b900000 {
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
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ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000 /* I/O */
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0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@ -303,6 +303,45 @@ qpic_nand: nand-controller@1b30000 {
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status = "disabled";
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};
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pcie_ep: pcie-ep@1c00000 {
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compatible = "qcom,sdx55-pcie-ep";
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reg = <0x01c00000 0x3000>,
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<0x40000000 0xf1d>,
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<0x40000f20 0xc8>,
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<0x40001000 0x1000>,
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<0x40200000 0x100000>,
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<0x01c03000 0x3000>;
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reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
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"mmio";
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qcom,perst-regs = <&tcsr 0xb258 0xb270>;
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clocks = <&gcc GCC_PCIE_AUX_CLK>,
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<&gcc GCC_PCIE_CFG_AHB_CLK>,
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<&gcc GCC_PCIE_MSTR_AXI_CLK>,
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<&gcc GCC_PCIE_SLV_AXI_CLK>,
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<&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>,
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<&gcc GCC_PCIE_SLEEP_CLK>,
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<&gcc GCC_PCIE_0_CLKREF_CLK>;
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clock-names = "aux", "cfg", "bus_master", "bus_slave",
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"slave_q2a", "sleep", "ref";
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "global", "doorbell";
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reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
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resets = <&gcc GCC_PCIE_BCR>;
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reset-names = "core";
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power-domains = <&gcc PCIE_GDSC>;
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phys = <&pcie0_lane>;
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phy-names = "pciephy";
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max-link-speed = <3>;
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num-lanes = <2>;
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status = "disabled";
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};
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pcie0_phy: phy@1c07000 {
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compatible = "qcom,sdx55-qmp-pcie-phy";
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reg = <0x01c07000 0x1c4>;
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@ -400,45 +439,6 @@ sdhc_1: mmc@8804000 {
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status = "disabled";
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};
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pcie_ep: pcie-ep@40000000 {
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compatible = "qcom,sdx55-pcie-ep";
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reg = <0x01c00000 0x3000>,
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<0x40000000 0xf1d>,
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<0x40000f20 0xc8>,
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<0x40001000 0x1000>,
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<0x40200000 0x100000>,
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<0x01c03000 0x3000>;
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reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
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"mmio";
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qcom,perst-regs = <&tcsr 0xb258 0xb270>;
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clocks = <&gcc GCC_PCIE_AUX_CLK>,
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<&gcc GCC_PCIE_CFG_AHB_CLK>,
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<&gcc GCC_PCIE_MSTR_AXI_CLK>,
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<&gcc GCC_PCIE_SLV_AXI_CLK>,
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<&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>,
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<&gcc GCC_PCIE_SLEEP_CLK>,
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<&gcc GCC_PCIE_0_CLKREF_CLK>;
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clock-names = "aux", "cfg", "bus_master", "bus_slave",
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"slave_q2a", "sleep", "ref";
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "global", "doorbell";
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reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
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resets = <&gcc GCC_PCIE_BCR>;
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reset-names = "core";
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power-domains = <&gcc PCIE_GDSC>;
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phys = <&pcie0_lane>;
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phy-names = "pciephy";
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max-link-speed = <3>;
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num-lanes = <2>;
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status = "disabled";
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};
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remoteproc_mpss: remoteproc@4080000 {
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compatible = "qcom,sdx55-mpss-pas";
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reg = <0x04080000 0x4040>;
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@ -1880,6 +1880,21 @@ pins {
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};
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};
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spi1_pins_b: spi1-1 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
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<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
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bias-disable;
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drive-push-pull;
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slew-rate = <1>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
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bias-disable;
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};
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};
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spi2_pins_a: spi2-0 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
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@ -2448,19 +2463,4 @@ pins2 {
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bias-disable;
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};
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};
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spi1_pins_b: spi1-1 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
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<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
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bias-disable;
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drive-push-pull;
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slew-rate = <1>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
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bias-disable;
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};
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};
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};
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@ -33,10 +33,12 @@ &wifi0 {
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&port01 {
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bus-range = <2 2>;
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status = "okay";
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};
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&port02 {
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bus-range = <3 3>;
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status = "okay";
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ethernet0: ethernet@0,0 {
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reg = <0x30000 0x0 0x0 0x0 0x0>;
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/* To be filled by the loader */
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@ -44,6 +46,14 @@ ethernet0: ethernet@0,0 {
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};
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};
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&pcie0_dart_1 {
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status = "okay";
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||||
};
|
||||
|
||||
&pcie0_dart_2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -21,21 +21,6 @@ &wifi0 {
|
||||
brcm,board-type = "apple,honshu";
|
||||
};
|
||||
|
||||
/*
|
||||
* Remove unused PCIe ports and disable the associated DARTs.
|
||||
*/
|
||||
|
||||
&pcie0_dart_1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie0_dart_2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/delete-node/ &port01;
|
||||
/delete-node/ &port02;
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -20,18 +20,3 @@ / {
|
||||
&wifi0 {
|
||||
brcm,board-type = "apple,shikoku";
|
||||
};
|
||||
|
||||
/*
|
||||
* Remove unused PCIe ports and disable the associated DARTs.
|
||||
*/
|
||||
|
||||
&pcie0_dart_1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie0_dart_2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/delete-node/ &port01;
|
||||
/delete-node/ &port02;
|
||||
|
@ -51,13 +51,23 @@ hpm3: usb-pd@3c {
|
||||
|
||||
&port01 {
|
||||
bus-range = <2 2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&port02 {
|
||||
bus-range = <3 3>;
|
||||
status = "okay";
|
||||
ethernet0: ethernet@0,0 {
|
||||
reg = <0x30000 0x0 0x0 0x0 0x0>;
|
||||
/* To be filled by the loader */
|
||||
local-mac-address = [00 10 18 00 00 00];
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0_dart_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0_dart_2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -33,6 +33,7 @@ &wifi0 {
|
||||
|
||||
&port02 {
|
||||
bus-range = <3 3>;
|
||||
status = "okay";
|
||||
ethernet0: ethernet@0,0 {
|
||||
reg = <0x30000 0x0 0x0 0x0 0x0>;
|
||||
/* To be filled by the loader */
|
||||
@ -40,12 +41,6 @@ ethernet0: ethernet@0,0 {
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Remove unused PCIe port and disable the associated DART.
|
||||
*/
|
||||
|
||||
&pcie0_dart_1 {
|
||||
status = "disabled";
|
||||
&pcie0_dart_2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/delete-node/ &port01;
|
||||
|
@ -428,6 +428,7 @@ pcie0_dart_1: iommu@682008000 {
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&ps_apcie_gp>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie0_dart_2: iommu@683008000 {
|
||||
@ -437,6 +438,7 @@ pcie0_dart_2: iommu@683008000 {
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&ps_apcie_gp>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie0: pcie@690000000 {
|
||||
@ -511,6 +513,7 @@ port01: pci@1,0 {
|
||||
<0 0 0 2 &port01 0 0 0 1>,
|
||||
<0 0 0 3 &port01 0 0 0 2>,
|
||||
<0 0 0 4 &port01 0 0 0 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
port02: pci@2,0 {
|
||||
@ -530,6 +533,7 @@ port02: pci@2,0 {
|
||||
<0 0 0 2 &port02 0 0 0 1>,
|
||||
<0 0 0 3 &port02 0 0 0 2>,
|
||||
<0 0 0 4 &port02 0 0 0 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -120,7 +120,7 @@ ethernet-phy@3 {
|
||||
};
|
||||
|
||||
&leds {
|
||||
led-power@11 {
|
||||
led@11 {
|
||||
reg = <0x11>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
@ -130,7 +130,7 @@ led-power@11 {
|
||||
pinctrl-0 = <&pins_led_17_a>;
|
||||
};
|
||||
|
||||
led-wan-red@12 {
|
||||
led@12 {
|
||||
reg = <0x12>;
|
||||
function = LED_FUNCTION_WAN;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
@ -139,7 +139,7 @@ led-wan-red@12 {
|
||||
pinctrl-0 = <&pins_led_18_a>;
|
||||
};
|
||||
|
||||
led-wps@14 {
|
||||
led@14 {
|
||||
reg = <0x14>;
|
||||
function = LED_FUNCTION_WPS;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
@ -148,7 +148,7 @@ led-wps@14 {
|
||||
pinctrl-0 = <&pins_led_20_a>;
|
||||
};
|
||||
|
||||
led-wan-white@15 {
|
||||
led@15 {
|
||||
reg = <0x15>;
|
||||
function = LED_FUNCTION_WAN;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
@ -157,7 +157,7 @@ led-wan-white@15 {
|
||||
pinctrl-0 = <&pins_led_21_a>;
|
||||
};
|
||||
|
||||
led-lan@19 {
|
||||
led@19 {
|
||||
reg = <0x19>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
|
@ -253,7 +253,7 @@ phy12: ethernet-phy@c {
|
||||
};
|
||||
};
|
||||
|
||||
procmon: syscon@280000 {
|
||||
procmon: bus@280000 {
|
||||
compatible = "simple-bus";
|
||||
reg = <0x280000 0x1000>;
|
||||
ranges;
|
||||
@ -532,7 +532,7 @@ nand-controller@1800 {
|
||||
reg = <0x1800 0x600>, <0x2000 0x10>;
|
||||
reg-names = "nand", "nand-int-base";
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "nand";
|
||||
interrupt-names = "nand_ctlrdy";
|
||||
status = "okay";
|
||||
|
||||
nandcs: nand@0 {
|
||||
|
@ -935,7 +935,7 @@ mt6315_7_vbuck1: vbuck1 {
|
||||
regulator-compatible = "vbuck1";
|
||||
regulator-name = "Vgpu";
|
||||
regulator-min-microvolt = <606250>;
|
||||
regulator-max-microvolt = <1193750>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-enable-ramp-delay = <256>;
|
||||
regulator-allowed-modes = <0 1 2>;
|
||||
};
|
||||
|
@ -742,8 +742,7 @@ pmi8994_mpp2_userled4: mpp2-userled4-state {
|
||||
&pmi8994_spmi_regulators {
|
||||
vdd_s2-supply = <&vph_pwr>;
|
||||
|
||||
vdd_gfx: s2@1700 {
|
||||
reg = <0x1700 0x100>;
|
||||
vdd_gfx: s2 {
|
||||
regulator-name = "VDD_GFX";
|
||||
regulator-min-microvolt = <980000>;
|
||||
regulator-max-microvolt = <980000>;
|
||||
|
@ -436,10 +436,8 @@ pcie0: pci@20000000 {
|
||||
phys = <&pcie_phy0>;
|
||||
phy-names = "pciephy";
|
||||
|
||||
ranges = <0x81000000 0 0x20200000 0 0x20200000
|
||||
0 0x10000>, /* downstream I/O */
|
||||
<0x82000000 0 0x20220000 0 0x20220000
|
||||
0 0xfde0000>; /* non-prefetchable memory */
|
||||
ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>,
|
||||
<0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>;
|
||||
|
||||
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
|
@ -750,10 +750,8 @@ pcie1: pci@10000000 {
|
||||
phys = <&pcie_phy1>;
|
||||
phy-names = "pciephy";
|
||||
|
||||
ranges = <0x81000000 0 0x10200000 0x10200000
|
||||
0 0x10000>, /* downstream I/O */
|
||||
<0x82000000 0 0x10220000 0x10220000
|
||||
0 0xfde0000>; /* non-prefetchable memory */
|
||||
ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
|
||||
<0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
|
||||
|
||||
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
@ -814,10 +812,8 @@ pcie0: pci@20000000 {
|
||||
phys = <&pcie_phy0>;
|
||||
phy-names = "pciephy";
|
||||
|
||||
ranges = <0x81000000 0 0x20200000 0x20200000
|
||||
0 0x10000>, /* downstream I/O */
|
||||
<0x82000000 0 0x20220000 0x20220000
|
||||
0 0xfde0000>; /* non-prefetchable memory */
|
||||
ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
|
||||
<0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
|
||||
|
||||
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
|
@ -60,11 +60,6 @@ reserved@5000000 {
|
||||
reg = <0x0 0x05000000 0x0 0x1a00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
reserved@6c00000 {
|
||||
reg = <0x0 0x06c00000 0x0 0x400000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/* Copyright (c) 2015, Huawei Inc. All rights reserved.
|
||||
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2022, Petr Vorel <petr.vorel@gmail.com>
|
||||
* Copyright (c) 2021-2023, Petr Vorel <petr.vorel@gmail.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
@ -30,13 +30,18 @@ reserved-memory {
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
cont_splash_mem: memory@3401000 {
|
||||
reg = <0 0x03401000 0 0x1000000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
tzapp_mem: tzapp@4800000 {
|
||||
reg = <0 0x04800000 0 0x1900000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
removed_region: reserved@6300000 {
|
||||
reg = <0 0x06300000 0 0xD00000>;
|
||||
reserved@6300000 {
|
||||
reg = <0 0x06300000 0 0x700000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
@ -542,8 +542,7 @@ hd3ss460_en: en-high-state {
|
||||
};
|
||||
|
||||
&pmi8994_spmi_regulators {
|
||||
vdd_gfx: s2@1700 {
|
||||
reg = <0x1700 0x100>;
|
||||
vdd_gfx: s2 {
|
||||
regulator-min-microvolt = <980000>;
|
||||
regulator-max-microvolt = <980000>;
|
||||
};
|
||||
|
@ -173,8 +173,7 @@ &pmi8994_spmi_regulators {
|
||||
* power domain.. which still isn't enough and forces us to bind
|
||||
* OXILI_CX and OXILI_GX together!
|
||||
*/
|
||||
vdd_gfx: s2@1700 {
|
||||
reg = <0x1700 0x100>;
|
||||
vdd_gfx: s2 {
|
||||
regulator-name = "VDD_GFX";
|
||||
regulator-min-microvolt = <980000>;
|
||||
regulator-max-microvolt = <980000>;
|
||||
|
@ -227,6 +227,11 @@ adsp_mem: memory@c9400000 {
|
||||
reg = <0 0xc9400000 0 0x3f00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
reserved@6c00000 {
|
||||
reg = <0 0x06c00000 0 0x400000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
smd {
|
||||
|
@ -1828,8 +1828,8 @@ pcie0: pcie@600000 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x01000000 0x0 0x0c200000 0x0c200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
|
||||
|
||||
device_type = "pci";
|
||||
|
||||
@ -1882,8 +1882,8 @@ pcie1: pcie@608000 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x01000000 0x0 0x0d200000 0x0d200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
|
||||
|
||||
device_type = "pci";
|
||||
|
||||
@ -1933,8 +1933,8 @@ pcie2: pcie@610000 {
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x01000000 0x0 0x0e200000 0x0e200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
|
||||
|
||||
device_type = "pci";
|
||||
|
||||
|
@ -916,7 +916,7 @@ pcie0: pci@1c00000 {
|
||||
phy-names = "pciephy";
|
||||
status = "disabled";
|
||||
|
||||
ranges = <0x01000000 0x0 0x1b200000 0x1b200000 0x0 0x100000>,
|
||||
ranges = <0x01000000 0x0 0x00000000 0x1b200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
@ -1513,7 +1513,7 @@ stm: stm@6002000 {
|
||||
compatible = "arm,coresight-stm", "arm,primecell";
|
||||
reg = <0x06002000 0x1000>,
|
||||
<0x16280000 0x180000>;
|
||||
reg-names = "stm-base", "stm-data-base";
|
||||
reg-names = "stm-base", "stm-stimulus-base";
|
||||
status = "disabled";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
|
||||
|
@ -49,8 +49,6 @@ pmi8994_lpg: pwm {
|
||||
|
||||
pmi8994_spmi_regulators: regulators {
|
||||
compatible = "qcom,pmi8994-regulators";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
pmi8994_wled: wled@d800 {
|
||||
|
@ -26,7 +26,7 @@ trackpad: trackpad@2c {
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
vcc-supply = <&pp3300_fp_tp>;
|
||||
vdd-supply = <&pp3300_fp_tp>;
|
||||
hid-descr-addr = <0x20>;
|
||||
|
||||
wakeup-source;
|
||||
|
@ -39,7 +39,7 @@ trackpad: trackpad@15 {
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
vcc-supply = <&pp3300_fp_tp>;
|
||||
vdd-supply = <&pp3300_fp_tp>;
|
||||
post-power-on-delay-ms = <100>;
|
||||
hid-descr-addr = <0x0001>;
|
||||
|
||||
|
@ -1521,7 +1521,7 @@ pinmux-data {
|
||||
};
|
||||
};
|
||||
|
||||
qspi_data12: qspi-data12 {
|
||||
qspi_data23: qspi-data23 {
|
||||
pinmux-data {
|
||||
pins = "gpio66", "gpio67";
|
||||
function = "qspi_data";
|
||||
|
@ -33,7 +33,7 @@ trackpad: trackpad@2c {
|
||||
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
hid-descr-addr = <0x20>;
|
||||
vcc-supply = <&pp3300_z1>;
|
||||
vdd-supply = <&pp3300_z1>;
|
||||
|
||||
wakeup-source;
|
||||
};
|
||||
|
@ -2023,7 +2023,7 @@ pcie1: pci@1c08000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -3590,12 +3590,17 @@ eud: eud@88e0000 {
|
||||
<0 0x88e2000 0 0x1000>;
|
||||
interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
eud_ep: endpoint {
|
||||
remote-endpoint = <&usb2_role_switch>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
eud_con: endpoint {
|
||||
remote-endpoint = <&con_eud>;
|
||||
};
|
||||
@ -3606,7 +3611,11 @@ eud_con: endpoint {
|
||||
eud_typec: connector {
|
||||
compatible = "usb-c-connector";
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
con_eud: endpoint {
|
||||
remote-endpoint = <&eud_con>;
|
||||
};
|
||||
@ -4336,7 +4345,7 @@ qspi_data01: qspi-data01-pins {
|
||||
function = "qspi_data";
|
||||
};
|
||||
|
||||
qspi_data12: qspi-data12-pins {
|
||||
qspi_data23: qspi-data23-pins {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "qspi_data";
|
||||
};
|
||||
|
@ -198,7 +198,7 @@ CPU0: cpu@0 {
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "psci";
|
||||
capacity-dmips-mhz = <611>;
|
||||
dynamic-power-coefficient = <290>;
|
||||
dynamic-power-coefficient = <154>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
|
||||
@ -222,7 +222,7 @@ CPU1: cpu@100 {
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "psci";
|
||||
capacity-dmips-mhz = <611>;
|
||||
dynamic-power-coefficient = <290>;
|
||||
dynamic-power-coefficient = <154>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
|
||||
@ -243,7 +243,7 @@ CPU2: cpu@200 {
|
||||
reg = <0x0 0x200>;
|
||||
enable-method = "psci";
|
||||
capacity-dmips-mhz = <611>;
|
||||
dynamic-power-coefficient = <290>;
|
||||
dynamic-power-coefficient = <154>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
|
||||
@ -264,7 +264,7 @@ CPU3: cpu@300 {
|
||||
reg = <0x0 0x300>;
|
||||
enable-method = "psci";
|
||||
capacity-dmips-mhz = <611>;
|
||||
dynamic-power-coefficient = <290>;
|
||||
dynamic-power-coefficient = <154>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
|
||||
@ -2226,8 +2226,8 @@ pcie0: pci@1c00000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0 0x60300000 0x0 0xd00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>;
|
||||
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
@ -2331,7 +2331,7 @@ pcie1: pci@1c08000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
|
||||
|
@ -1783,8 +1783,8 @@ pcie0: pci@1c00000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
|
||||
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
@ -1879,7 +1879,7 @@ pcie1: pci@1c08000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
|
||||
|
@ -1808,8 +1808,8 @@ pcie0: pci@1c00000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
|
||||
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
@ -1917,7 +1917,7 @@ pcie1: pci@1c08000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -2025,7 +2025,7 @@ pcie2: pci@1c10000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>,
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x64200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>;
|
||||
|
||||
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -341,6 +341,9 @@ &ufs_mem_phy {
|
||||
|
||||
&usb_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_1_dwc3 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
|
@ -1722,8 +1722,8 @@ pcie0: pci@1c00000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
|
||||
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
@ -1831,8 +1831,8 @@ pcie1: pci@1c08000 {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
|
||||
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
|
||||
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "msi";
|
||||
@ -1879,8 +1879,8 @@ pcie1: pci@1c08000 {
|
||||
phys = <&pcie1_lane>;
|
||||
phy-names = "pciephy";
|
||||
|
||||
perst-gpio = <&tlmm 97 GPIO_ACTIVE_LOW>;
|
||||
enable-gpio = <&tlmm 99 GPIO_ACTIVE_HIGH>;
|
||||
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
|
||||
wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie1_default_state>;
|
||||
|
@ -49,17 +49,14 @@ cluster1_opp: opp-table-1 {
|
||||
opp-shared;
|
||||
opp-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1200000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
@ -49,17 +49,14 @@ cluster1_opp: opp-table-1 {
|
||||
opp-shared;
|
||||
opp-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
};
|
||||
opp-1200000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <820000>;
|
||||
clock-latency-ns = <300000>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
@ -5,7 +5,6 @@
|
||||
* Copyright (C) 2022 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/r9a07g043-cpg.h>
|
||||
|
||||
/ {
|
||||
@ -107,11 +106,10 @@ ssi0: ssi@10049c00 {
|
||||
compatible = "renesas,r9a07g043-ssi",
|
||||
"renesas,rz-ssi";
|
||||
reg = <0 0x10049c00 0 0x400>;
|
||||
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(326) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(327) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(328) IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SSI0_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G043_SSI0_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -128,11 +126,10 @@ ssi1: ssi@1004a000 {
|
||||
compatible = "renesas,r9a07g043-ssi",
|
||||
"renesas,rz-ssi";
|
||||
reg = <0 0x1004a000 0 0x400>;
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(330) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(331) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(332) IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SSI1_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G043_SSI1_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -149,11 +146,9 @@ ssi2: ssi@1004a400 {
|
||||
compatible = "renesas,r9a07g043-ssi",
|
||||
"renesas,rz-ssi";
|
||||
reg = <0 0x1004a400 0 0x400>;
|
||||
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 336 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(334) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(337) IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rt";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SSI2_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G043_SSI2_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -170,11 +165,10 @@ ssi3: ssi@1004a800 {
|
||||
compatible = "renesas,r9a07g043-ssi",
|
||||
"renesas,rz-ssi";
|
||||
reg = <0 0x1004a800 0 0x400>;
|
||||
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 340 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 341 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(338) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(339) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(340) IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SSI3_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G043_SSI3_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -190,9 +184,9 @@ ssi3: ssi@1004a800 {
|
||||
spi0: spi@1004ac00 {
|
||||
compatible = "renesas,r9a07g043-rspi", "renesas,rspi-rz";
|
||||
reg = <0 0x1004ac00 0 0x400>;
|
||||
interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(415) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(413) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(414) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error", "rx", "tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_RSPI0_CLKB>;
|
||||
resets = <&cpg R9A07G043_RSPI0_RST>;
|
||||
@ -208,9 +202,9 @@ spi0: spi@1004ac00 {
|
||||
spi1: spi@1004b000 {
|
||||
compatible = "renesas,r9a07g043-rspi", "renesas,rspi-rz";
|
||||
reg = <0 0x1004b000 0 0x400>;
|
||||
interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(418) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(416) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(417) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error", "rx", "tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_RSPI1_CLKB>;
|
||||
resets = <&cpg R9A07G043_RSPI1_RST>;
|
||||
@ -226,9 +220,9 @@ spi1: spi@1004b000 {
|
||||
spi2: spi@1004b400 {
|
||||
compatible = "renesas,r9a07g043-rspi", "renesas,rspi-rz";
|
||||
reg = <0 0x1004b400 0 0x400>;
|
||||
interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(421) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(419) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(420) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error", "rx", "tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_RSPI2_CLKB>;
|
||||
resets = <&cpg R9A07G043_RSPI2_RST>;
|
||||
@ -245,12 +239,12 @@ scif0: serial@1004b800 {
|
||||
compatible = "renesas,scif-r9a07g043",
|
||||
"renesas,scif-r9a07g044";
|
||||
reg = <0 0x1004b800 0 0x400>;
|
||||
interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(380) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(382) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(383) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(381) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(384) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(384) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi",
|
||||
"bri", "dri", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
|
||||
@ -264,12 +258,12 @@ scif1: serial@1004bc00 {
|
||||
compatible = "renesas,scif-r9a07g043",
|
||||
"renesas,scif-r9a07g044";
|
||||
reg = <0 0x1004bc00 0 0x400>;
|
||||
interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(385) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(387) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(388) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(386) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(389) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(389) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi",
|
||||
"bri", "dri", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCIF1_CLK_PCK>;
|
||||
@ -283,12 +277,12 @@ scif2: serial@1004c000 {
|
||||
compatible = "renesas,scif-r9a07g043",
|
||||
"renesas,scif-r9a07g044";
|
||||
reg = <0 0x1004c000 0 0x400>;
|
||||
interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(390) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(392) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(393) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(391) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(394) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(394) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi",
|
||||
"bri", "dri", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCIF2_CLK_PCK>;
|
||||
@ -302,12 +296,12 @@ scif3: serial@1004c400 {
|
||||
compatible = "renesas,scif-r9a07g043",
|
||||
"renesas,scif-r9a07g044";
|
||||
reg = <0 0x1004c400 0 0x400>;
|
||||
interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(395) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(397) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(398) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(396) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(399) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(399) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi",
|
||||
"bri", "dri", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCIF3_CLK_PCK>;
|
||||
@ -321,12 +315,12 @@ scif4: serial@1004c800 {
|
||||
compatible = "renesas,scif-r9a07g043",
|
||||
"renesas,scif-r9a07g044";
|
||||
reg = <0 0x1004c800 0 0x400>;
|
||||
interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(400) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(402) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(403) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(401) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(404) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(404) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi",
|
||||
"bri", "dri", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCIF4_CLK_PCK>;
|
||||
@ -339,10 +333,10 @@ scif4: serial@1004c800 {
|
||||
sci0: serial@1004d000 {
|
||||
compatible = "renesas,r9a07g043-sci", "renesas,sci";
|
||||
reg = <0 0x1004d000 0 0x400>;
|
||||
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(405) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(406) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(407) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(408) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCI0_CLKP>;
|
||||
clock-names = "fck";
|
||||
@ -354,10 +348,10 @@ sci0: serial@1004d000 {
|
||||
sci1: serial@1004d400 {
|
||||
compatible = "renesas,r9a07g043-sci", "renesas,sci";
|
||||
reg = <0 0x1004d400 0 0x400>;
|
||||
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(409) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(410) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(411) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(412) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi", "tei";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SCI1_CLKP>;
|
||||
clock-names = "fck";
|
||||
@ -369,14 +363,14 @@ sci1: serial@1004d400 {
|
||||
canfd: can@10050000 {
|
||||
compatible = "renesas,r9a07g043-canfd", "renesas,rzg2l-canfd";
|
||||
reg = <0 0x10050000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(426) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(427) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(422) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(424) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(428) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(423) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(425) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(429) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "g_err", "g_recc",
|
||||
"ch0_err", "ch0_rec", "ch0_trx",
|
||||
"ch1_err", "ch1_rec", "ch1_trx";
|
||||
@ -405,14 +399,14 @@ i2c0: i2c@10058000 {
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
|
||||
reg = <0 0x10058000 0 0x400>;
|
||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 348 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 349 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(350) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(348) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(349) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(352) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(353) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(351) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(354) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(355) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tei", "ri", "ti", "spi", "sti",
|
||||
"naki", "ali", "tmoi";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_I2C0_PCLK>;
|
||||
@ -427,14 +421,14 @@ i2c1: i2c@10058400 {
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
|
||||
reg = <0 0x10058400 0 0x400>;
|
||||
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 356 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 357 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(358) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(356) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(357) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(360) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(361) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(359) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(362) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(363) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tei", "ri", "ti", "spi", "sti",
|
||||
"naki", "ali", "tmoi";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_I2C1_PCLK>;
|
||||
@ -449,14 +443,14 @@ i2c2: i2c@10058800 {
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
|
||||
reg = <0 0x10058800 0 0x400>;
|
||||
interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(366) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(364) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(365) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(368) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(369) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(367) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(370) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(371) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tei", "ri", "ti", "spi", "sti",
|
||||
"naki", "ali", "tmoi";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_I2C2_PCLK>;
|
||||
@ -471,14 +465,14 @@ i2c3: i2c@10058c00 {
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,riic-r9a07g043", "renesas,riic-rz";
|
||||
reg = <0 0x10058c00 0 0x400>;
|
||||
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 372 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(374) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(372) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(373) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(376) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(377) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(375) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(378) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(379) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tei", "ri", "ti", "spi", "sti",
|
||||
"naki", "ali", "tmoi";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_I2C3_PCLK>;
|
||||
@ -491,7 +485,7 @@ i2c3: i2c@10058c00 {
|
||||
adc: adc@10059000 {
|
||||
compatible = "renesas,r9a07g043-adc", "renesas,rzg2l-adc";
|
||||
reg = <0 0x10059000 0 0x400>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(347) IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_ADC_ADCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_ADC_PCLK>;
|
||||
clock-names = "adclk", "pclk";
|
||||
@ -551,10 +545,10 @@ cpg: clock-controller@11010000 {
|
||||
sysc: system-controller@11020000 {
|
||||
compatible = "renesas,r9a07g043-sysc";
|
||||
reg = <0 0x11020000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(42) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(43) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(44) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(45) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "lpm_int", "ca55stbydone_int",
|
||||
"cm33stbyr_int", "ca55_deny";
|
||||
status = "disabled";
|
||||
@ -578,23 +572,23 @@ dmac: dma-controller@11820000 {
|
||||
"renesas,rz-dmac";
|
||||
reg = <0 0x11820000 0 0x10000>,
|
||||
<0 0x11830000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(141) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(125) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(126) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(127) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(128) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(129) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(130) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(131) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(132) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(133) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(134) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(135) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(136) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(137) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(138) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(139) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(140) IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
@ -623,8 +617,8 @@ sdhi0: mmc@11c00000 {
|
||||
compatible = "renesas,sdhi-r9a07g043",
|
||||
"renesas,rcar-gen3-sdhi";
|
||||
reg = <0x0 0x11c00000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(104) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(105) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SDHI0_IMCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_SDHI0_CLK_HS>,
|
||||
<&cpg CPG_MOD R9A07G043_SDHI0_IMCLK2>,
|
||||
@ -639,8 +633,8 @@ sdhi1: mmc@11c10000 {
|
||||
compatible = "renesas,sdhi-r9a07g043",
|
||||
"renesas,rcar-gen3-sdhi";
|
||||
reg = <0x0 0x11c10000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(106) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(107) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_SDHI1_IMCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_SDHI1_CLK_HS>,
|
||||
<&cpg CPG_MOD R9A07G043_SDHI1_IMCLK2>,
|
||||
@ -655,9 +649,9 @@ eth0: ethernet@11c20000 {
|
||||
compatible = "renesas,r9a07g043-gbeth",
|
||||
"renesas,rzg2l-gbeth";
|
||||
reg = <0 0x11c20000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(84) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(85) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(86) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "mux", "fil", "arp_ns";
|
||||
phy-mode = "rgmii";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_ETH0_CLK_AXI>,
|
||||
@ -675,9 +669,9 @@ eth1: ethernet@11c30000 {
|
||||
compatible = "renesas,r9a07g043-gbeth",
|
||||
"renesas,rzg2l-gbeth";
|
||||
reg = <0 0x11c30000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(87) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(88) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(89) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "mux", "fil", "arp_ns";
|
||||
phy-mode = "rgmii";
|
||||
clocks = <&cpg CPG_MOD R9A07G043_ETH1_CLK_AXI>,
|
||||
@ -705,7 +699,7 @@ phyrst: usbphy-ctrl@11c40000 {
|
||||
ohci0: usb@11c50000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = <0 0x11c50000 0 0x100>;
|
||||
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(91) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2H0_HCLK>;
|
||||
resets = <&phyrst 0>,
|
||||
@ -719,7 +713,7 @@ ohci0: usb@11c50000 {
|
||||
ohci1: usb@11c70000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = <0 0x11c70000 0 0x100>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(96) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2H1_HCLK>;
|
||||
resets = <&phyrst 1>,
|
||||
@ -733,7 +727,7 @@ ohci1: usb@11c70000 {
|
||||
ehci0: usb@11c50100 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0 0x11c50100 0 0x100>;
|
||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(92) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2H0_HCLK>;
|
||||
resets = <&phyrst 0>,
|
||||
@ -748,7 +742,7 @@ ehci0: usb@11c50100 {
|
||||
ehci1: usb@11c70100 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0 0x11c70100 0 0x100>;
|
||||
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(97) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2H1_HCLK>;
|
||||
resets = <&phyrst 1>,
|
||||
@ -764,7 +758,7 @@ usb2_phy0: usb-phy@11c50200 {
|
||||
compatible = "renesas,usb2-phy-r9a07g043",
|
||||
"renesas,rzg2l-usb2-phy";
|
||||
reg = <0 0x11c50200 0 0x700>;
|
||||
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(94) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2H0_HCLK>;
|
||||
resets = <&phyrst 0>;
|
||||
@ -777,7 +771,7 @@ usb2_phy1: usb-phy@11c70200 {
|
||||
compatible = "renesas,usb2-phy-r9a07g043",
|
||||
"renesas,rzg2l-usb2-phy";
|
||||
reg = <0 0x11c70200 0 0x700>;
|
||||
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(99) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2H1_HCLK>;
|
||||
resets = <&phyrst 1>;
|
||||
@ -790,10 +784,10 @@ hsusb: usb@11c60000 {
|
||||
compatible = "renesas,usbhs-r9a07g043",
|
||||
"renesas,rza2-usbhs";
|
||||
reg = <0 0x11c60000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(100) IRQ_TYPE_EDGE_RISING>,
|
||||
<SOC_PERIPHERAL_IRQ(101) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(102) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(103) IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_USB_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_USB_U2P_EXR_CPUCLK>;
|
||||
resets = <&phyrst 0>,
|
||||
@ -812,8 +806,8 @@ wdt0: watchdog@12800800 {
|
||||
clocks = <&cpg CPG_MOD R9A07G043_WDT0_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G043_WDT0_CLK>;
|
||||
clock-names = "pclk", "oscclk";
|
||||
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(49) IRQ_TYPE_LEVEL_HIGH>,
|
||||
<SOC_PERIPHERAL_IRQ(50) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "wdt", "perrout";
|
||||
resets = <&cpg R9A07G043_WDT0_PRESETN>;
|
||||
power-domains = <&cpg>;
|
||||
@ -839,7 +833,7 @@ ostm0: timer@12801000 {
|
||||
compatible = "renesas,r9a07g043-ostm",
|
||||
"renesas,ostm";
|
||||
reg = <0x0 0x12801000 0x0 0x400>;
|
||||
interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(46) IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_OSTM0_PCLK>;
|
||||
resets = <&cpg R9A07G043_OSTM0_PRESETZ>;
|
||||
power-domains = <&cpg>;
|
||||
@ -850,7 +844,7 @@ ostm1: timer@12801400 {
|
||||
compatible = "renesas,r9a07g043-ostm",
|
||||
"renesas,ostm";
|
||||
reg = <0x0 0x12801400 0x0 0x400>;
|
||||
interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(47) IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_OSTM1_PCLK>;
|
||||
resets = <&cpg R9A07G043_OSTM1_PRESETZ>;
|
||||
power-domains = <&cpg>;
|
||||
@ -861,7 +855,7 @@ ostm2: timer@12801800 {
|
||||
compatible = "renesas,r9a07g043-ostm",
|
||||
"renesas,ostm";
|
||||
reg = <0x0 0x12801800 0x0 0x400>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <SOC_PERIPHERAL_IRQ(48) IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>;
|
||||
resets = <&cpg R9A07G043_OSTM2_PRESETZ>;
|
||||
power-domains = <&cpg>;
|
||||
|
12
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
Normal file
12
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
Normal file
@ -0,0 +1,12 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
/*
|
||||
* Device Tree Source for the RZ/G2UL SoC
|
||||
*
|
||||
* Copyright (C) 2022 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr
|
||||
|
||||
#include "r9a07g043.dtsi"
|
@ -17,7 +17,7 @@
|
||||
#define SW_SW0_DEV_SEL 1
|
||||
#define SW_ET0_EN_N 1
|
||||
|
||||
#include "r9a07g043.dtsi"
|
||||
#include "r9a07g043u.dtsi"
|
||||
#include "rzg2ul-smarc-som.dtsi"
|
||||
#include "rzg2ul-smarc.dtsi"
|
||||
|
||||
|
@ -174,9 +174,8 @@ ssi0: ssi@10049c00 {
|
||||
reg = <0 0x10049c00 0 0x400>;
|
||||
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -195,9 +194,8 @@ ssi1: ssi@1004a000 {
|
||||
reg = <0 0x1004a000 0 0x400>;
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 332 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_SSI1_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SSI1_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -215,10 +213,8 @@ ssi2: ssi@1004a400 {
|
||||
"renesas,rz-ssi";
|
||||
reg = <0 0x1004a400 0 0x400>;
|
||||
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 336 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
interrupt-names = "int_req", "dma_rt";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_SSI2_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SSI2_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -237,9 +233,8 @@ ssi3: ssi@1004a800 {
|
||||
reg = <0 0x1004a800 0 0x400>;
|
||||
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 340 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 341 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_SSI3_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SSI3_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
|
@ -174,9 +174,8 @@ ssi0: ssi@10049c00 {
|
||||
reg = <0 0x10049c00 0 0x400>;
|
||||
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G054_SSI0_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G054_SSI0_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -195,9 +194,8 @@ ssi1: ssi@1004a000 {
|
||||
reg = <0 0x1004a000 0 0x400>;
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 332 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G054_SSI1_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G054_SSI1_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -215,10 +213,8 @@ ssi2: ssi@1004a400 {
|
||||
"renesas,rz-ssi";
|
||||
reg = <0 0x1004a400 0 0x400>;
|
||||
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 336 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
interrupt-names = "int_req", "dma_rt";
|
||||
clocks = <&cpg CPG_MOD R9A07G054_SSI2_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G054_SSI2_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
@ -237,9 +233,8 @@ ssi3: ssi@1004a800 {
|
||||
reg = <0 0x1004a800 0 0x400>;
|
||||
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 340 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 341 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G054_SSI3_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G054_SSI3_PCLK_SFR>,
|
||||
<&audio_clk1>, <&audio_clk2>;
|
||||
|
@ -354,7 +354,7 @@ main_gpio0: gpio@600000 {
|
||||
<193>, <194>, <195>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <87>;
|
||||
ti,ngpio = <92>;
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 77 0>;
|
||||
@ -371,7 +371,7 @@ main_gpio1: gpio@601000 {
|
||||
<183>, <184>, <185>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <88>;
|
||||
ti,ngpio = <52>;
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 78 0>;
|
||||
|
@ -96,7 +96,7 @@ cpu3: cpu@3 {
|
||||
L2_0: l2-cache0 {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-size = <0x40000>;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
|
@ -26,8 +26,9 @@ chosen {
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 2G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
|
||||
/* 4G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
||||
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
|
@ -96,7 +96,7 @@ cpu3: cpu@3 {
|
||||
L2_0: l2-cache0 {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-size = <0x40000>;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
|
@ -1093,7 +1093,6 @@ main_sdhci0: mmc@4f80000 {
|
||||
ti,itap-del-sel-mmc-hs = <0xa>;
|
||||
ti,itap-del-sel-ddr52 = <0x3>;
|
||||
ti,trm-icp = <0x8>;
|
||||
ti,strobe-sel = <0x77>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
|
@ -15,6 +15,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/cfi_types.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
.text
|
||||
@ -620,12 +621,12 @@ SYM_FUNC_END(aesbs_decrypt8)
|
||||
.endm
|
||||
|
||||
.align 4
|
||||
SYM_FUNC_START(aesbs_ecb_encrypt)
|
||||
SYM_TYPED_FUNC_START(aesbs_ecb_encrypt)
|
||||
__ecb_crypt aesbs_encrypt8, v0, v1, v4, v6, v3, v7, v2, v5
|
||||
SYM_FUNC_END(aesbs_ecb_encrypt)
|
||||
|
||||
.align 4
|
||||
SYM_FUNC_START(aesbs_ecb_decrypt)
|
||||
SYM_TYPED_FUNC_START(aesbs_ecb_decrypt)
|
||||
__ecb_crypt aesbs_decrypt8, v0, v1, v6, v4, v2, v7, v3, v5
|
||||
SYM_FUNC_END(aesbs_ecb_decrypt)
|
||||
|
||||
@ -799,11 +800,11 @@ SYM_FUNC_END(__xts_crypt8)
|
||||
ret
|
||||
.endm
|
||||
|
||||
SYM_FUNC_START(aesbs_xts_encrypt)
|
||||
SYM_TYPED_FUNC_START(aesbs_xts_encrypt)
|
||||
__xts_crypt aesbs_encrypt8, v0, v1, v4, v6, v3, v7, v2, v5
|
||||
SYM_FUNC_END(aesbs_xts_encrypt)
|
||||
|
||||
SYM_FUNC_START(aesbs_xts_decrypt)
|
||||
SYM_TYPED_FUNC_START(aesbs_xts_decrypt)
|
||||
__xts_crypt aesbs_decrypt8, v0, v1, v6, v4, v2, v7, v3, v5
|
||||
SYM_FUNC_END(aesbs_xts_decrypt)
|
||||
|
||||
|
@ -104,6 +104,7 @@ void user_regs_reset_single_step(struct user_pt_regs *regs,
|
||||
void kernel_enable_single_step(struct pt_regs *regs);
|
||||
void kernel_disable_single_step(void);
|
||||
int kernel_active_single_step(void);
|
||||
void kernel_rewind_single_step(struct pt_regs *regs);
|
||||
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
int reinstall_suspended_bps(struct pt_regs *regs);
|
||||
|
@ -203,6 +203,9 @@ struct kvm_arch {
|
||||
/* Mandated version of PSCI */
|
||||
u32 psci_version;
|
||||
|
||||
/* Protects VM-scoped configuration data */
|
||||
struct mutex config_lock;
|
||||
|
||||
/*
|
||||
* If we encounter a data abort without valid instruction syndrome
|
||||
* information, report this to user space. User space can (and
|
||||
@ -507,6 +510,7 @@ struct kvm_vcpu_arch {
|
||||
|
||||
/* vcpu power state */
|
||||
struct kvm_mp_state mp_state;
|
||||
spinlock_t mp_state_lock;
|
||||
|
||||
union {
|
||||
/* Cache some mmu pages needed inside spinlock regions */
|
||||
|
@ -10,15 +10,16 @@
|
||||
#ifdef CONFIG_SHADOW_CALL_STACK
|
||||
scs_sp .req x18
|
||||
|
||||
.macro scs_load tsk
|
||||
ldr scs_sp, [\tsk, #TSK_TI_SCS_SP]
|
||||
.macro scs_load_current
|
||||
get_current_task scs_sp
|
||||
ldr scs_sp, [scs_sp, #TSK_TI_SCS_SP]
|
||||
.endm
|
||||
|
||||
.macro scs_save tsk
|
||||
str scs_sp, [\tsk, #TSK_TI_SCS_SP]
|
||||
.endm
|
||||
#else
|
||||
.macro scs_load tsk
|
||||
.macro scs_load_current
|
||||
.endm
|
||||
|
||||
.macro scs_save tsk
|
||||
|
@ -442,6 +442,11 @@ int kernel_active_single_step(void)
|
||||
}
|
||||
NOKPROBE_SYMBOL(kernel_active_single_step);
|
||||
|
||||
void kernel_rewind_single_step(struct pt_regs *regs)
|
||||
{
|
||||
set_regs_spsr_ss(regs);
|
||||
}
|
||||
|
||||
/* ptrace API */
|
||||
void user_enable_single_step(struct task_struct *task)
|
||||
{
|
||||
|
@ -272,7 +272,7 @@ alternative_if ARM64_HAS_ADDRESS_AUTH
|
||||
alternative_else_nop_endif
|
||||
1:
|
||||
|
||||
scs_load tsk
|
||||
scs_load_current
|
||||
.else
|
||||
add x21, sp, #PT_REGS_SIZE
|
||||
get_current_task tsk
|
||||
@ -845,7 +845,7 @@ SYM_FUNC_START(cpu_switch_to)
|
||||
msr sp_el0, x1
|
||||
ptrauth_keys_install_kernel x1, x8, x9, x10
|
||||
scs_save x0
|
||||
scs_load x1
|
||||
scs_load_current
|
||||
ret
|
||||
SYM_FUNC_END(cpu_switch_to)
|
||||
NOKPROBE(cpu_switch_to)
|
||||
@ -873,19 +873,19 @@ NOKPROBE(ret_from_fork)
|
||||
*/
|
||||
SYM_FUNC_START(call_on_irq_stack)
|
||||
#ifdef CONFIG_SHADOW_CALL_STACK
|
||||
stp scs_sp, xzr, [sp, #-16]!
|
||||
get_current_task x16
|
||||
scs_save x16
|
||||
ldr_this_cpu scs_sp, irq_shadow_call_stack_ptr, x17
|
||||
#endif
|
||||
|
||||
/* Create a frame record to save our LR and SP (implicit in FP) */
|
||||
stp x29, x30, [sp, #-16]!
|
||||
mov x29, sp
|
||||
|
||||
ldr_this_cpu x16, irq_stack_ptr, x17
|
||||
mov x15, #IRQ_STACK_SIZE
|
||||
add x16, x16, x15
|
||||
|
||||
/* Move to the new stack and call the function there */
|
||||
mov sp, x16
|
||||
add sp, x16, #IRQ_STACK_SIZE
|
||||
blr x1
|
||||
|
||||
/*
|
||||
@ -894,9 +894,7 @@ SYM_FUNC_START(call_on_irq_stack)
|
||||
*/
|
||||
mov sp, x29
|
||||
ldp x29, x30, [sp], #16
|
||||
#ifdef CONFIG_SHADOW_CALL_STACK
|
||||
ldp scs_sp, xzr, [sp], #16
|
||||
#endif
|
||||
scs_load_current
|
||||
ret
|
||||
SYM_FUNC_END(call_on_irq_stack)
|
||||
NOKPROBE(call_on_irq_stack)
|
||||
|
@ -404,7 +404,7 @@ SYM_FUNC_END(create_kernel_mapping)
|
||||
stp xzr, xzr, [sp, #S_STACKFRAME]
|
||||
add x29, sp, #S_STACKFRAME
|
||||
|
||||
scs_load \tsk
|
||||
scs_load_current
|
||||
|
||||
adr_l \tmp1, __per_cpu_offset
|
||||
ldr w\tmp2, [\tsk, #TSK_TI_CPU]
|
||||
|
@ -224,6 +224,8 @@ int kgdb_arch_handle_exception(int exception_vector, int signo,
|
||||
*/
|
||||
if (!kernel_active_single_step())
|
||||
kernel_enable_single_step(linux_regs);
|
||||
else
|
||||
kernel_rewind_single_step(linux_regs);
|
||||
err = 0;
|
||||
break;
|
||||
default:
|
||||
|
@ -155,6 +155,16 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
|
||||
if (type & ~KVM_VM_TYPE_MASK)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_init(&kvm->arch.config_lock);
|
||||
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
/* Clue in lockdep that the config_lock must be taken inside kvm->lock */
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
mutex_unlock(&kvm->lock);
|
||||
#endif
|
||||
|
||||
ret = kvm_share_hyp(kvm, kvm + 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
@ -423,6 +433,16 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
int err;
|
||||
|
||||
spin_lock_init(&vcpu->arch.mp_state_lock);
|
||||
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
/* Inform lockdep that the config_lock is acquired after vcpu->mutex */
|
||||
mutex_lock(&vcpu->mutex);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
mutex_unlock(&vcpu->mutex);
|
||||
#endif
|
||||
|
||||
/* Force users to call KVM_ARM_VCPU_INIT */
|
||||
vcpu->arch.target = -1;
|
||||
bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES);
|
||||
@ -566,34 +586,41 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
|
||||
vcpu->cpu = -1;
|
||||
}
|
||||
|
||||
void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu)
|
||||
static void __kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
vcpu->arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;
|
||||
WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED);
|
||||
kvm_make_request(KVM_REQ_SLEEP, vcpu);
|
||||
kvm_vcpu_kick(vcpu);
|
||||
}
|
||||
|
||||
void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
spin_lock(&vcpu->arch.mp_state_lock);
|
||||
__kvm_arm_vcpu_power_off(vcpu);
|
||||
spin_unlock(&vcpu->arch.mp_state_lock);
|
||||
}
|
||||
|
||||
bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return vcpu->arch.mp_state.mp_state == KVM_MP_STATE_STOPPED;
|
||||
return READ_ONCE(vcpu->arch.mp_state.mp_state) == KVM_MP_STATE_STOPPED;
|
||||
}
|
||||
|
||||
static void kvm_arm_vcpu_suspend(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
vcpu->arch.mp_state.mp_state = KVM_MP_STATE_SUSPENDED;
|
||||
WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_SUSPENDED);
|
||||
kvm_make_request(KVM_REQ_SUSPEND, vcpu);
|
||||
kvm_vcpu_kick(vcpu);
|
||||
}
|
||||
|
||||
static bool kvm_arm_vcpu_suspended(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return vcpu->arch.mp_state.mp_state == KVM_MP_STATE_SUSPENDED;
|
||||
return READ_ONCE(vcpu->arch.mp_state.mp_state) == KVM_MP_STATE_SUSPENDED;
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
|
||||
struct kvm_mp_state *mp_state)
|
||||
{
|
||||
*mp_state = vcpu->arch.mp_state;
|
||||
*mp_state = READ_ONCE(vcpu->arch.mp_state);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -603,12 +630,14 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
spin_lock(&vcpu->arch.mp_state_lock);
|
||||
|
||||
switch (mp_state->mp_state) {
|
||||
case KVM_MP_STATE_RUNNABLE:
|
||||
vcpu->arch.mp_state = *mp_state;
|
||||
WRITE_ONCE(vcpu->arch.mp_state, *mp_state);
|
||||
break;
|
||||
case KVM_MP_STATE_STOPPED:
|
||||
kvm_arm_vcpu_power_off(vcpu);
|
||||
__kvm_arm_vcpu_power_off(vcpu);
|
||||
break;
|
||||
case KVM_MP_STATE_SUSPENDED:
|
||||
kvm_arm_vcpu_suspend(vcpu);
|
||||
@ -617,6 +646,8 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
spin_unlock(&vcpu->arch.mp_state_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -711,9 +742,9 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)
|
||||
static_branch_inc(&userspace_irqchip_in_use);
|
||||
}
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
set_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &kvm->arch.flags);
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -1327,7 +1358,7 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu,
|
||||
if (test_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features))
|
||||
kvm_arm_vcpu_power_off(vcpu);
|
||||
else
|
||||
vcpu->arch.mp_state.mp_state = KVM_MP_STATE_RUNNABLE;
|
||||
WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_RUNNABLE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -953,7 +953,9 @@ int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
|
||||
|
||||
switch (attr->group) {
|
||||
case KVM_ARM_VCPU_PMU_V3_CTRL:
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
ret = kvm_arm_pmu_v3_set_attr(vcpu, attr);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
break;
|
||||
case KVM_ARM_VCPU_TIMER_CTRL:
|
||||
ret = kvm_arm_timer_set_attr(vcpu, attr);
|
||||
|
@ -409,7 +409,7 @@ static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val)
|
||||
if (val & ~fw_reg_features)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
|
||||
if (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &kvm->arch.flags) &&
|
||||
val != *fw_reg_bmap) {
|
||||
@ -419,7 +419,7 @@ static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val)
|
||||
|
||||
WRITE_ONCE(*fw_reg_bmap, val);
|
||||
out:
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -850,7 +850,7 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)
|
||||
struct arm_pmu *arm_pmu;
|
||||
int ret = -ENXIO;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
mutex_lock(&arm_pmus_lock);
|
||||
|
||||
list_for_each_entry(entry, &arm_pmus, entry) {
|
||||
@ -870,7 +870,6 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)
|
||||
}
|
||||
|
||||
mutex_unlock(&arm_pmus_lock);
|
||||
mutex_unlock(&kvm->lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -878,22 +877,20 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
|
||||
{
|
||||
struct kvm *kvm = vcpu->kvm;
|
||||
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
|
||||
if (!kvm_vcpu_has_pmu(vcpu))
|
||||
return -ENODEV;
|
||||
|
||||
if (vcpu->arch.pmu.created)
|
||||
return -EBUSY;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
if (!kvm->arch.arm_pmu) {
|
||||
/* No PMU set, get the default one */
|
||||
kvm->arch.arm_pmu = kvm_pmu_probe_armpmu();
|
||||
if (!kvm->arch.arm_pmu) {
|
||||
mutex_unlock(&kvm->lock);
|
||||
if (!kvm->arch.arm_pmu)
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&kvm->lock);
|
||||
|
||||
switch (attr->attr) {
|
||||
case KVM_ARM_VCPU_PMU_V3_IRQ: {
|
||||
@ -937,19 +934,13 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
|
||||
filter.action != KVM_PMU_EVENT_DENY))
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
|
||||
if (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &kvm->arch.flags)) {
|
||||
mutex_unlock(&kvm->lock);
|
||||
if (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &kvm->arch.flags))
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (!kvm->arch.pmu_filter) {
|
||||
kvm->arch.pmu_filter = bitmap_alloc(nr_events, GFP_KERNEL_ACCOUNT);
|
||||
if (!kvm->arch.pmu_filter) {
|
||||
mutex_unlock(&kvm->lock);
|
||||
if (!kvm->arch.pmu_filter)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/*
|
||||
* The default depends on the first applied filter.
|
||||
@ -968,8 +959,6 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
|
||||
else
|
||||
bitmap_clear(kvm->arch.pmu_filter, filter.base_event, filter.nevents);
|
||||
|
||||
mutex_unlock(&kvm->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
case KVM_ARM_VCPU_PMU_V3_SET_PMU: {
|
||||
|
@ -46,6 +46,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
||||
struct vcpu_reset_state *reset_state;
|
||||
struct kvm *kvm = source_vcpu->kvm;
|
||||
struct kvm_vcpu *vcpu = NULL;
|
||||
int ret = PSCI_RET_SUCCESS;
|
||||
unsigned long cpu_id;
|
||||
|
||||
cpu_id = smccc_get_arg1(source_vcpu);
|
||||
@ -60,11 +61,15 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
||||
*/
|
||||
if (!vcpu)
|
||||
return PSCI_RET_INVALID_PARAMS;
|
||||
|
||||
spin_lock(&vcpu->arch.mp_state_lock);
|
||||
if (!kvm_arm_vcpu_stopped(vcpu)) {
|
||||
if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
|
||||
return PSCI_RET_ALREADY_ON;
|
||||
ret = PSCI_RET_ALREADY_ON;
|
||||
else
|
||||
return PSCI_RET_INVALID_PARAMS;
|
||||
ret = PSCI_RET_INVALID_PARAMS;
|
||||
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
reset_state = &vcpu->arch.reset_state;
|
||||
@ -80,7 +85,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
||||
*/
|
||||
reset_state->r0 = smccc_get_arg3(source_vcpu);
|
||||
|
||||
WRITE_ONCE(reset_state->reset, true);
|
||||
reset_state->reset = true;
|
||||
kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
|
||||
|
||||
/*
|
||||
@ -92,7 +97,9 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
||||
vcpu->arch.mp_state.mp_state = KVM_MP_STATE_RUNNABLE;
|
||||
kvm_vcpu_wake_up(vcpu);
|
||||
|
||||
return PSCI_RET_SUCCESS;
|
||||
out_unlock:
|
||||
spin_unlock(&vcpu->arch.mp_state_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
|
||||
@ -152,8 +159,11 @@ static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type, u64 flags)
|
||||
* after this call is handled and before the VCPUs have been
|
||||
* re-initialized.
|
||||
*/
|
||||
kvm_for_each_vcpu(i, tmp, vcpu->kvm)
|
||||
tmp->arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;
|
||||
kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
|
||||
spin_lock(&tmp->arch.mp_state_lock);
|
||||
WRITE_ONCE(tmp->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED);
|
||||
spin_unlock(&tmp->arch.mp_state_lock);
|
||||
}
|
||||
kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
|
||||
|
||||
memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
|
||||
@ -201,7 +211,6 @@ static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32
|
||||
|
||||
static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm *kvm = vcpu->kvm;
|
||||
u32 psci_fn = smccc_get_function(vcpu);
|
||||
unsigned long val;
|
||||
int ret = 1;
|
||||
@ -226,9 +235,7 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
|
||||
kvm_psci_narrow_to_32bit(vcpu);
|
||||
fallthrough;
|
||||
case PSCI_0_2_FN64_CPU_ON:
|
||||
mutex_lock(&kvm->lock);
|
||||
val = kvm_psci_vcpu_on(vcpu);
|
||||
mutex_unlock(&kvm->lock);
|
||||
break;
|
||||
case PSCI_0_2_FN_AFFINITY_INFO:
|
||||
kvm_psci_narrow_to_32bit(vcpu);
|
||||
@ -367,7 +374,6 @@ static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)
|
||||
|
||||
static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm *kvm = vcpu->kvm;
|
||||
u32 psci_fn = smccc_get_function(vcpu);
|
||||
unsigned long val;
|
||||
|
||||
@ -377,9 +383,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
|
||||
val = PSCI_RET_SUCCESS;
|
||||
break;
|
||||
case KVM_PSCI_FN_CPU_ON:
|
||||
mutex_lock(&kvm->lock);
|
||||
val = kvm_psci_vcpu_on(vcpu);
|
||||
mutex_unlock(&kvm->lock);
|
||||
break;
|
||||
default:
|
||||
val = PSCI_RET_NOT_SUPPORTED;
|
||||
|
@ -176,7 +176,7 @@ static int kvm_set_vm_width(struct kvm_vcpu *vcpu)
|
||||
|
||||
is32bit = vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT);
|
||||
|
||||
lockdep_assert_held(&kvm->lock);
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
|
||||
if (test_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, &kvm->arch.flags)) {
|
||||
/*
|
||||
@ -228,17 +228,18 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
||||
int ret;
|
||||
bool loaded;
|
||||
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
ret = kvm_set_vm_width(vcpu);
|
||||
if (!ret) {
|
||||
reset_state = vcpu->arch.reset_state;
|
||||
WRITE_ONCE(vcpu->arch.reset_state.reset, false);
|
||||
}
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
spin_lock(&vcpu->arch.mp_state_lock);
|
||||
reset_state = vcpu->arch.reset_state;
|
||||
vcpu->arch.reset_state.reset = false;
|
||||
spin_unlock(&vcpu->arch.mp_state_lock);
|
||||
|
||||
/* Reset PMU outside of the non-preemptible section */
|
||||
kvm_pmu_vcpu_reset(vcpu);
|
||||
|
||||
|
@ -85,7 +85,7 @@ static void *vgic_debug_start(struct seq_file *s, loff_t *pos)
|
||||
struct kvm *kvm = s->private;
|
||||
struct vgic_state_iter *iter;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
iter = kvm->arch.vgic.iter;
|
||||
if (iter) {
|
||||
iter = ERR_PTR(-EBUSY);
|
||||
@ -104,7 +104,7 @@ static void *vgic_debug_start(struct seq_file *s, loff_t *pos)
|
||||
if (end_of_vgic(iter))
|
||||
iter = NULL;
|
||||
out:
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
return iter;
|
||||
}
|
||||
|
||||
@ -132,12 +132,12 @@ static void vgic_debug_stop(struct seq_file *s, void *v)
|
||||
if (IS_ERR(v))
|
||||
return;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
iter = kvm->arch.vgic.iter;
|
||||
kfree(iter->lpi_array);
|
||||
kfree(iter);
|
||||
kvm->arch.vgic.iter = NULL;
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
}
|
||||
|
||||
static void print_dist_state(struct seq_file *s, struct vgic_dist *dist)
|
||||
|
@ -74,9 +74,6 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
|
||||
unsigned long i;
|
||||
int ret;
|
||||
|
||||
if (irqchip_in_kernel(kvm))
|
||||
return -EEXIST;
|
||||
|
||||
/*
|
||||
* This function is also called by the KVM_CREATE_IRQCHIP handler,
|
||||
* which had no chance yet to check the availability of the GICv2
|
||||
@ -87,10 +84,20 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
|
||||
!kvm_vgic_global_state.can_emulate_gicv2)
|
||||
return -ENODEV;
|
||||
|
||||
/* Must be held to avoid race with vCPU creation */
|
||||
lockdep_assert_held(&kvm->lock);
|
||||
|
||||
ret = -EBUSY;
|
||||
if (!lock_all_vcpus(kvm))
|
||||
return ret;
|
||||
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
|
||||
if (irqchip_in_kernel(kvm)) {
|
||||
ret = -EEXIST;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
kvm_for_each_vcpu(i, vcpu, kvm) {
|
||||
if (vcpu_has_run_once(vcpu))
|
||||
goto out_unlock;
|
||||
@ -118,6 +125,7 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
|
||||
INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
|
||||
|
||||
out_unlock:
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
unlock_all_vcpus(kvm);
|
||||
return ret;
|
||||
}
|
||||
@ -227,9 +235,9 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
|
||||
* KVM io device for the redistributor that belongs to this VCPU.
|
||||
*/
|
||||
if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
ret = vgic_register_redist_iodev(vcpu);
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@ -250,7 +258,6 @@ static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu)
|
||||
* The function is generally called when nr_spis has been explicitly set
|
||||
* by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
|
||||
* vgic_initialized() returns true when this function has succeeded.
|
||||
* Must be called with kvm->lock held!
|
||||
*/
|
||||
int vgic_init(struct kvm *kvm)
|
||||
{
|
||||
@ -259,6 +266,8 @@ int vgic_init(struct kvm *kvm)
|
||||
int ret = 0, i;
|
||||
unsigned long idx;
|
||||
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
|
||||
if (vgic_initialized(kvm))
|
||||
return 0;
|
||||
|
||||
@ -373,12 +382,13 @@ void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
|
||||
vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
|
||||
}
|
||||
|
||||
/* To be called with kvm->lock held */
|
||||
static void __kvm_vgic_destroy(struct kvm *kvm)
|
||||
{
|
||||
struct kvm_vcpu *vcpu;
|
||||
unsigned long i;
|
||||
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
|
||||
vgic_debug_destroy(kvm);
|
||||
|
||||
kvm_for_each_vcpu(i, vcpu, kvm)
|
||||
@ -389,9 +399,9 @@ static void __kvm_vgic_destroy(struct kvm *kvm)
|
||||
|
||||
void kvm_vgic_destroy(struct kvm *kvm)
|
||||
{
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
__kvm_vgic_destroy(kvm);
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -414,9 +424,9 @@ int vgic_lazy_init(struct kvm *kvm)
|
||||
if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
|
||||
return -EBUSY;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
ret = vgic_init(kvm);
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
}
|
||||
|
||||
return ret;
|
||||
@ -441,7 +451,7 @@ int kvm_vgic_map_resources(struct kvm *kvm)
|
||||
if (likely(vgic_ready(kvm)))
|
||||
return 0;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
if (vgic_ready(kvm))
|
||||
goto out;
|
||||
|
||||
@ -459,7 +469,7 @@ int kvm_vgic_map_resources(struct kvm *kvm)
|
||||
dist->ready = true;
|
||||
|
||||
out:
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -1958,6 +1958,16 @@ static int vgic_its_create(struct kvm_device *dev, u32 type)
|
||||
mutex_init(&its->its_lock);
|
||||
mutex_init(&its->cmd_lock);
|
||||
|
||||
/* Yep, even more trickery for lock ordering... */
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
mutex_lock(&its->cmd_lock);
|
||||
mutex_lock(&its->its_lock);
|
||||
mutex_unlock(&its->its_lock);
|
||||
mutex_unlock(&its->cmd_lock);
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
#endif
|
||||
|
||||
its->vgic_its_base = VGIC_ADDR_UNDEF;
|
||||
|
||||
INIT_LIST_HEAD(&its->device_list);
|
||||
@ -2045,6 +2055,13 @@ static int vgic_its_attr_regs_access(struct kvm_device *dev,
|
||||
|
||||
mutex_lock(&dev->kvm->lock);
|
||||
|
||||
if (!lock_all_vcpus(dev->kvm)) {
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
|
||||
if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
|
||||
ret = -ENXIO;
|
||||
goto out;
|
||||
@ -2058,11 +2075,6 @@ static int vgic_its_attr_regs_access(struct kvm_device *dev,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!lock_all_vcpus(dev->kvm)) {
|
||||
ret = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
|
||||
addr = its->vgic_its_base + offset;
|
||||
|
||||
len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
|
||||
@ -2076,8 +2088,9 @@ static int vgic_its_attr_regs_access(struct kvm_device *dev,
|
||||
} else {
|
||||
*reg = region->its_read(dev->kvm, its, addr, len);
|
||||
}
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
out:
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
return ret;
|
||||
}
|
||||
@ -2749,14 +2762,15 @@ static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr)
|
||||
return 0;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&its->its_lock);
|
||||
|
||||
if (!lock_all_vcpus(kvm)) {
|
||||
mutex_unlock(&its->its_lock);
|
||||
mutex_unlock(&kvm->lock);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
mutex_lock(&its->its_lock);
|
||||
|
||||
switch (attr) {
|
||||
case KVM_DEV_ARM_ITS_CTRL_RESET:
|
||||
vgic_its_reset(kvm, its);
|
||||
@ -2769,8 +2783,9 @@ static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr)
|
||||
break;
|
||||
}
|
||||
|
||||
unlock_all_vcpus(kvm);
|
||||
mutex_unlock(&its->its_lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
unlock_all_vcpus(kvm);
|
||||
mutex_unlock(&kvm->lock);
|
||||
return ret;
|
||||
}
|
||||
|
@ -46,7 +46,7 @@ int kvm_set_legacy_vgic_v2_addr(struct kvm *kvm, struct kvm_arm_device_addr *dev
|
||||
struct vgic_dist *vgic = &kvm->arch.vgic;
|
||||
int r;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
switch (FIELD_GET(KVM_ARM_DEVICE_TYPE_MASK, dev_addr->id)) {
|
||||
case KVM_VGIC_V2_ADDR_TYPE_DIST:
|
||||
r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
|
||||
@ -68,7 +68,7 @@ int kvm_set_legacy_vgic_v2_addr(struct kvm *kvm, struct kvm_arm_device_addr *dev
|
||||
r = -ENODEV;
|
||||
}
|
||||
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
|
||||
return r;
|
||||
}
|
||||
@ -102,7 +102,7 @@ static int kvm_vgic_addr(struct kvm *kvm, struct kvm_device_attr *attr, bool wri
|
||||
if (get_user(addr, uaddr))
|
||||
return -EFAULT;
|
||||
|
||||
mutex_lock(&kvm->lock);
|
||||
mutex_lock(&kvm->arch.config_lock);
|
||||
switch (attr->attr) {
|
||||
case KVM_VGIC_V2_ADDR_TYPE_DIST:
|
||||
r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
|
||||
@ -191,7 +191,7 @@ static int kvm_vgic_addr(struct kvm *kvm, struct kvm_device_attr *attr, bool wri
|
||||
}
|
||||
|
||||
out:
|
||||
mutex_unlock(&kvm->lock);
|
||||
mutex_unlock(&kvm->arch.config_lock);
|
||||
|
||||
if (!r && !write)
|
||||
r = put_user(addr, uaddr);
|
||||
@ -227,7 +227,7 @@ static int vgic_set_common_attr(struct kvm_device *dev,
|
||||
(val & 31))
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&dev->kvm->lock);
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
|
||||
if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
|
||||
ret = -EBUSY;
|
||||
@ -235,16 +235,16 @@ static int vgic_set_common_attr(struct kvm_device *dev,
|
||||
dev->kvm->arch.vgic.nr_spis =
|
||||
val - VGIC_NR_PRIVATE_IRQS;
|
||||
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
case KVM_DEV_ARM_VGIC_GRP_CTRL: {
|
||||
switch (attr->attr) {
|
||||
case KVM_DEV_ARM_VGIC_CTRL_INIT:
|
||||
mutex_lock(&dev->kvm->lock);
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
r = vgic_init(dev->kvm);
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
return r;
|
||||
case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
|
||||
/*
|
||||
@ -260,7 +260,10 @@ static int vgic_set_common_attr(struct kvm_device *dev,
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
r = vgic_v3_save_pending_tables(dev->kvm);
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
return r;
|
||||
@ -411,15 +414,17 @@ static int vgic_v2_attr_regs_access(struct kvm_device *dev,
|
||||
|
||||
mutex_lock(&dev->kvm->lock);
|
||||
|
||||
if (!lock_all_vcpus(dev->kvm)) {
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
|
||||
ret = vgic_init(dev->kvm);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
if (!lock_all_vcpus(dev->kvm)) {
|
||||
ret = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
|
||||
switch (attr->group) {
|
||||
case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
|
||||
ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, &val);
|
||||
@ -432,8 +437,9 @@ static int vgic_v2_attr_regs_access(struct kvm_device *dev,
|
||||
break;
|
||||
}
|
||||
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
out:
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
|
||||
if (!ret && !is_write)
|
||||
@ -569,12 +575,14 @@ static int vgic_v3_attr_regs_access(struct kvm_device *dev,
|
||||
|
||||
mutex_lock(&dev->kvm->lock);
|
||||
|
||||
if (unlikely(!vgic_initialized(dev->kvm))) {
|
||||
ret = -EBUSY;
|
||||
goto out;
|
||||
if (!lock_all_vcpus(dev->kvm)) {
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (!lock_all_vcpus(dev->kvm)) {
|
||||
mutex_lock(&dev->kvm->arch.config_lock);
|
||||
|
||||
if (unlikely(!vgic_initialized(dev->kvm))) {
|
||||
ret = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
@ -609,8 +617,9 @@ static int vgic_v3_attr_regs_access(struct kvm_device *dev,
|
||||
break;
|
||||
}
|
||||
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
out:
|
||||
mutex_unlock(&dev->kvm->arch.config_lock);
|
||||
unlock_all_vcpus(dev->kvm);
|
||||
mutex_unlock(&dev->kvm->lock);
|
||||
|
||||
if (!ret && uaccess && !is_write) {
|
||||
|
@ -111,7 +111,7 @@ static void vgic_mmio_write_v3_misc(struct kvm_vcpu *vcpu,
|
||||
case GICD_CTLR: {
|
||||
bool was_enabled, is_hwsgi;
|
||||
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
|
||||
was_enabled = dist->enabled;
|
||||
is_hwsgi = dist->nassgireq;
|
||||
@ -139,7 +139,7 @@ static void vgic_mmio_write_v3_misc(struct kvm_vcpu *vcpu,
|
||||
else if (!was_enabled && dist->enabled)
|
||||
vgic_kick_vcpus(vcpu->kvm);
|
||||
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
break;
|
||||
}
|
||||
case GICD_TYPER:
|
||||
|
@ -527,13 +527,13 @@ unsigned long vgic_mmio_read_active(struct kvm_vcpu *vcpu,
|
||||
u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
|
||||
u32 val;
|
||||
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
vgic_access_active_prepare(vcpu, intid);
|
||||
|
||||
val = __vgic_mmio_read_active(vcpu, addr, len);
|
||||
|
||||
vgic_access_active_finish(vcpu, intid);
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
|
||||
return val;
|
||||
}
|
||||
@ -622,13 +622,13 @@ void vgic_mmio_write_cactive(struct kvm_vcpu *vcpu,
|
||||
{
|
||||
u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
|
||||
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
vgic_access_active_prepare(vcpu, intid);
|
||||
|
||||
__vgic_mmio_write_cactive(vcpu, addr, len, val);
|
||||
|
||||
vgic_access_active_finish(vcpu, intid);
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
}
|
||||
|
||||
int vgic_mmio_uaccess_write_cactive(struct kvm_vcpu *vcpu,
|
||||
@ -659,13 +659,13 @@ void vgic_mmio_write_sactive(struct kvm_vcpu *vcpu,
|
||||
{
|
||||
u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
|
||||
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
mutex_lock(&vcpu->kvm->arch.config_lock);
|
||||
vgic_access_active_prepare(vcpu, intid);
|
||||
|
||||
__vgic_mmio_write_sactive(vcpu, addr, len, val);
|
||||
|
||||
vgic_access_active_finish(vcpu, intid);
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
mutex_unlock(&vcpu->kvm->arch.config_lock);
|
||||
}
|
||||
|
||||
int vgic_mmio_uaccess_write_sactive(struct kvm_vcpu *vcpu,
|
||||
|
@ -232,9 +232,8 @@ int vgic_v4_request_vpe_irq(struct kvm_vcpu *vcpu, int irq)
|
||||
* @kvm: Pointer to the VM being initialized
|
||||
*
|
||||
* We may be called each time a vITS is created, or when the
|
||||
* vgic is initialized. This relies on kvm->lock to be
|
||||
* held. In both cases, the number of vcpus should now be
|
||||
* fixed.
|
||||
* vgic is initialized. In both cases, the number of vcpus
|
||||
* should now be fixed.
|
||||
*/
|
||||
int vgic_v4_init(struct kvm *kvm)
|
||||
{
|
||||
@ -243,6 +242,8 @@ int vgic_v4_init(struct kvm *kvm)
|
||||
int nr_vcpus, ret;
|
||||
unsigned long i;
|
||||
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
|
||||
if (!kvm_vgic_global_state.has_gicv4)
|
||||
return 0; /* Nothing to see here... move along. */
|
||||
|
||||
@ -309,14 +310,14 @@ int vgic_v4_init(struct kvm *kvm)
|
||||
/**
|
||||
* vgic_v4_teardown - Free the GICv4 data structures
|
||||
* @kvm: Pointer to the VM being destroyed
|
||||
*
|
||||
* Relies on kvm->lock to be held.
|
||||
*/
|
||||
void vgic_v4_teardown(struct kvm *kvm)
|
||||
{
|
||||
struct its_vm *its_vm = &kvm->arch.vgic.its_vm;
|
||||
int i;
|
||||
|
||||
lockdep_assert_held(&kvm->arch.config_lock);
|
||||
|
||||
if (!its_vm->vpes)
|
||||
return;
|
||||
|
||||
|
@ -24,11 +24,13 @@ struct vgic_global kvm_vgic_global_state __ro_after_init = {
|
||||
/*
|
||||
* Locking order is always:
|
||||
* kvm->lock (mutex)
|
||||
* its->cmd_lock (mutex)
|
||||
* its->its_lock (mutex)
|
||||
* vgic_cpu->ap_list_lock must be taken with IRQs disabled
|
||||
* kvm->lpi_list_lock must be taken with IRQs disabled
|
||||
* vgic_irq->irq_lock must be taken with IRQs disabled
|
||||
* vcpu->mutex (mutex)
|
||||
* kvm->arch.config_lock (mutex)
|
||||
* its->cmd_lock (mutex)
|
||||
* its->its_lock (mutex)
|
||||
* vgic_cpu->ap_list_lock must be taken with IRQs disabled
|
||||
* kvm->lpi_list_lock must be taken with IRQs disabled
|
||||
* vgic_irq->irq_lock must be taken with IRQs disabled
|
||||
*
|
||||
* As the ap_list_lock might be taken from the timer interrupt handler,
|
||||
* we have to disable IRQs before taking this lock and everything lower
|
||||
|
@ -581,7 +581,7 @@ static int salinfo_cpu_pre_down(unsigned int cpu)
|
||||
* 'data' contains an integer that corresponds to the feature we're
|
||||
* testing
|
||||
*/
|
||||
static int proc_salinfo_show(struct seq_file *m, void *v)
|
||||
static int __maybe_unused proc_salinfo_show(struct seq_file *m, void *v)
|
||||
{
|
||||
unsigned long data = (unsigned long)v;
|
||||
seq_puts(m, (sal_platform_features & data) ? "1\n" : "0\n");
|
||||
|
@ -77,7 +77,7 @@ void *per_cpu_init(void)
|
||||
return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
|
||||
}
|
||||
|
||||
static inline void
|
||||
static inline __init void
|
||||
alloc_per_cpu_data(void)
|
||||
{
|
||||
size_t size = PERCPU_PAGE_SIZE * num_possible_cpus();
|
||||
|
@ -58,7 +58,7 @@ huge_pte_offset (struct mm_struct *mm, unsigned long addr, unsigned long sz)
|
||||
|
||||
pgd = pgd_offset(mm, taddr);
|
||||
if (pgd_present(*pgd)) {
|
||||
p4d = p4d_offset(pgd, addr);
|
||||
p4d = p4d_offset(pgd, taddr);
|
||||
if (p4d_present(*p4d)) {
|
||||
pud = pud_offset(p4d, taddr);
|
||||
if (pud_present(*pud)) {
|
||||
|
@ -53,7 +53,7 @@ char *fw_getenv(char *envname)
|
||||
{
|
||||
char *result = NULL;
|
||||
|
||||
if (_fw_envp != NULL) {
|
||||
if (_fw_envp != NULL && fw_envp(0) != NULL) {
|
||||
/*
|
||||
* Return a pointer to the given environment variable.
|
||||
* YAMON uses "name", "value" pairs, while U-Boot uses
|
||||
|
@ -173,7 +173,6 @@ handler: ;\
|
||||
l.sw PT_GPR28(r1),r28 ;\
|
||||
l.sw PT_GPR29(r1),r29 ;\
|
||||
/* r30 already save */ ;\
|
||||
/* l.sw PT_GPR30(r1),r30*/ ;\
|
||||
l.sw PT_GPR31(r1),r31 ;\
|
||||
TRACE_IRQS_OFF_ENTRY ;\
|
||||
/* Store -1 in orig_gpr11 for non-syscall exceptions */ ;\
|
||||
@ -211,9 +210,8 @@ handler: ;\
|
||||
l.sw PT_GPR27(r1),r27 ;\
|
||||
l.sw PT_GPR28(r1),r28 ;\
|
||||
l.sw PT_GPR29(r1),r29 ;\
|
||||
/* r31 already saved */ ;\
|
||||
l.sw PT_GPR30(r1),r30 ;\
|
||||
/* l.sw PT_GPR31(r1),r31 */ ;\
|
||||
/* r30 already saved */ ;\
|
||||
l.sw PT_GPR31(r1),r31 ;\
|
||||
/* Store -1 in orig_gpr11 for non-syscall exceptions */ ;\
|
||||
l.addi r30,r0,-1 ;\
|
||||
l.sw PT_ORIG_GPR11(r1),r30 ;\
|
||||
|
@ -889,6 +889,7 @@ ENDPROC_CFI(flush_icache_page_asm)
|
||||
ENTRY_CFI(flush_kernel_dcache_page_asm)
|
||||
88: ldil L%dcache_stride, %r1
|
||||
ldw R%dcache_stride(%r1), %r23
|
||||
depi_safe 0, 31,PAGE_SHIFT, %r26 /* Clear any offset bits */
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
depdi,z 1, 63-PAGE_SHIFT,1, %r25
|
||||
@ -925,6 +926,7 @@ ENDPROC_CFI(flush_kernel_dcache_page_asm)
|
||||
ENTRY_CFI(purge_kernel_dcache_page_asm)
|
||||
88: ldil L%dcache_stride, %r1
|
||||
ldw R%dcache_stride(%r1), %r23
|
||||
depi_safe 0, 31,PAGE_SHIFT, %r26 /* Clear any offset bits */
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
depdi,z 1, 63-PAGE_SHIFT,1, %r25
|
||||
|
@ -248,9 +248,6 @@ ENTRY_CFI(real64_call_asm)
|
||||
/* save fn */
|
||||
copy %arg2, %r31
|
||||
|
||||
/* set up the new ap */
|
||||
ldo 64(%arg1), %r29
|
||||
|
||||
/* load up the arg registers from the saved arg area */
|
||||
/* 32-bit calling convention passes first 4 args in registers */
|
||||
ldd 0*REG_SZ(%arg1), %arg0 /* note overwriting arg0 */
|
||||
@ -262,7 +259,9 @@ ENTRY_CFI(real64_call_asm)
|
||||
ldd 7*REG_SZ(%arg1), %r19
|
||||
ldd 1*REG_SZ(%arg1), %arg1 /* do this one last! */
|
||||
|
||||
/* set up real-mode stack and real-mode ap */
|
||||
tophys_r1 %sp
|
||||
ldo -16(%sp), %r29 /* Reference param save area */
|
||||
|
||||
b,l rfi_virt2real,%r2
|
||||
nop
|
||||
|
@ -34,6 +34,8 @@ endif
|
||||
|
||||
BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
|
||||
-fno-strict-aliasing -O2 -msoft-float -mno-altivec -mno-vsx \
|
||||
$(call cc-option,-mno-prefixed) $(call cc-option,-mno-pcrel) \
|
||||
$(call cc-option,-mno-mma) \
|
||||
$(call cc-option,-mno-spe) $(call cc-option,-mspe=no) \
|
||||
-pipe -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \
|
||||
$(LINUXINCLUDE)
|
||||
|
@ -1310,6 +1310,11 @@
|
||||
#define PVR_VER_E500MC 0x8023
|
||||
#define PVR_VER_E5500 0x8024
|
||||
#define PVR_VER_E6500 0x8040
|
||||
#define PVR_VER_7450 0x8000
|
||||
#define PVR_VER_7455 0x8001
|
||||
#define PVR_VER_7447 0x8002
|
||||
#define PVR_VER_7447A 0x8003
|
||||
#define PVR_VER_7448 0x8004
|
||||
|
||||
/*
|
||||
* For the 8xx processors, all of them report the same PVR family for
|
||||
|
@ -421,7 +421,7 @@ static char *__fetch_rtas_last_error(char *altbuf)
|
||||
buf = kmalloc(RTAS_ERROR_LOG_MAX, GFP_ATOMIC);
|
||||
}
|
||||
if (buf)
|
||||
memcpy(buf, rtas_err_buf, RTAS_ERROR_LOG_MAX);
|
||||
memmove(buf, rtas_err_buf, RTAS_ERROR_LOG_MAX);
|
||||
}
|
||||
|
||||
return buf;
|
||||
|
@ -417,9 +417,9 @@ struct power_pmu mpc7450_pmu = {
|
||||
|
||||
static int __init init_mpc7450_pmu(void)
|
||||
{
|
||||
unsigned int pvr = mfspr(SPRN_PVR);
|
||||
|
||||
if (PVR_VER(pvr) != PVR_7450)
|
||||
if (!pvr_version_is(PVR_VER_7450) && !pvr_version_is(PVR_VER_7455) &&
|
||||
!pvr_version_is(PVR_VER_7447) && !pvr_version_is(PVR_VER_7447A) &&
|
||||
!pvr_version_is(PVR_VER_7448))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&mpc7450_pmu);
|
||||
|
@ -986,7 +986,7 @@ static void __init mpc5121_clk_provide_migration_support(void)
|
||||
|
||||
#define NODE_PREP do { \
|
||||
of_address_to_resource(np, 0, &res); \
|
||||
snprintf(devname, sizeof(devname), "%08x.%s", res.start, np->name); \
|
||||
snprintf(devname, sizeof(devname), "%pa.%s", &res.start, np->name); \
|
||||
} while (0)
|
||||
|
||||
#define NODE_CHK(clkname, clkitem, regnode, regflag) do { \
|
||||
|
@ -145,7 +145,7 @@ static struct irq_domain * __init flipper_pic_init(struct device_node *np)
|
||||
}
|
||||
io_base = ioremap(res.start, resource_size(&res));
|
||||
|
||||
pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);
|
||||
pr_info("controller at 0x%pa mapped to 0x%p\n", &res.start, io_base);
|
||||
|
||||
__flipper_quiesce(io_base);
|
||||
|
||||
|
@ -171,7 +171,7 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);
|
||||
pr_info("controller at 0x%pa mapped to 0x%p\n", &res.start, io_base);
|
||||
|
||||
__hlwd_quiesce(io_base);
|
||||
|
||||
|
@ -74,8 +74,8 @@ static void __iomem *__init wii_ioremap_hw_regs(char *name, char *compatible)
|
||||
|
||||
hw_regs = ioremap(res.start, resource_size(&res));
|
||||
if (hw_regs) {
|
||||
pr_info("%s at 0x%08x mapped to 0x%p\n", name,
|
||||
res.start, hw_regs);
|
||||
pr_info("%s at 0x%pa mapped to 0x%p\n", name,
|
||||
&res.start, hw_regs);
|
||||
}
|
||||
|
||||
out_put:
|
||||
|
@ -217,9 +217,8 @@ int __init tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary)
|
||||
|
||||
(hose)->ops = &tsi108_direct_pci_ops;
|
||||
|
||||
printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08x. "
|
||||
"Firmware bus number: %d->%d\n",
|
||||
rsrc.start, hose->first_busno, hose->last_busno);
|
||||
pr_info("Found tsi108 PCI host bridge at 0x%pa. Firmware bus number: %d->%d\n",
|
||||
&rsrc.start, hose->first_busno, hose->last_busno);
|
||||
|
||||
/* Interpret the "ranges" property */
|
||||
/* This also maps the I/O region and sets isa_io/mem_base */
|
||||
|
@ -293,7 +293,7 @@ int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask,
|
||||
unsigned long start,
|
||||
unsigned long size,
|
||||
unsigned long asid);
|
||||
int sbi_probe_extension(int ext);
|
||||
long sbi_probe_extension(int ext);
|
||||
|
||||
/* Check if current SBI specification version is 0.1 or not */
|
||||
static inline int sbi_spec_is_0_1(void)
|
||||
|
@ -27,7 +27,7 @@ const struct cpu_operations cpu_ops_spinwait = {
|
||||
void __init cpu_set_ops(int cpuid)
|
||||
{
|
||||
#if IS_ENABLED(CONFIG_RISCV_SBI)
|
||||
if (sbi_probe_extension(SBI_EXT_HSM) > 0) {
|
||||
if (sbi_probe_extension(SBI_EXT_HSM)) {
|
||||
if (!cpuid)
|
||||
pr_info("SBI HSM extension detected\n");
|
||||
cpu_ops[cpuid] = &cpu_ops_sbi;
|
||||
|
@ -581,19 +581,18 @@ static void sbi_srst_power_off(void)
|
||||
* sbi_probe_extension() - Check if an SBI extension ID is supported or not.
|
||||
* @extid: The extension ID to be probed.
|
||||
*
|
||||
* Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
|
||||
* Return: 1 or an extension specific nonzero value if yes, 0 otherwise.
|
||||
*/
|
||||
int sbi_probe_extension(int extid)
|
||||
long sbi_probe_extension(int extid)
|
||||
{
|
||||
struct sbiret ret;
|
||||
|
||||
ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,
|
||||
0, 0, 0, 0, 0);
|
||||
if (!ret.error)
|
||||
if (ret.value)
|
||||
return ret.value;
|
||||
return ret.value;
|
||||
|
||||
return -ENOTSUPP;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(sbi_probe_extension);
|
||||
|
||||
@ -662,26 +661,26 @@ void __init sbi_init(void)
|
||||
if (!sbi_spec_is_0_1()) {
|
||||
pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
|
||||
sbi_get_firmware_id(), sbi_get_firmware_version());
|
||||
if (sbi_probe_extension(SBI_EXT_TIME) > 0) {
|
||||
if (sbi_probe_extension(SBI_EXT_TIME)) {
|
||||
__sbi_set_timer = __sbi_set_timer_v02;
|
||||
pr_info("SBI TIME extension detected\n");
|
||||
} else {
|
||||
__sbi_set_timer = __sbi_set_timer_v01;
|
||||
}
|
||||
if (sbi_probe_extension(SBI_EXT_IPI) > 0) {
|
||||
if (sbi_probe_extension(SBI_EXT_IPI)) {
|
||||
__sbi_send_ipi = __sbi_send_ipi_v02;
|
||||
pr_info("SBI IPI extension detected\n");
|
||||
} else {
|
||||
__sbi_send_ipi = __sbi_send_ipi_v01;
|
||||
}
|
||||
if (sbi_probe_extension(SBI_EXT_RFENCE) > 0) {
|
||||
if (sbi_probe_extension(SBI_EXT_RFENCE)) {
|
||||
__sbi_rfence = __sbi_rfence_v02;
|
||||
pr_info("SBI RFENCE extension detected\n");
|
||||
} else {
|
||||
__sbi_rfence = __sbi_rfence_v01;
|
||||
}
|
||||
if ((sbi_spec_version >= sbi_mk_version(0, 3)) &&
|
||||
(sbi_probe_extension(SBI_EXT_SRST) > 0)) {
|
||||
sbi_probe_extension(SBI_EXT_SRST)) {
|
||||
pr_info("SBI SRST extension detected\n");
|
||||
pm_power_off = sbi_srst_power_off;
|
||||
sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
|
||||
|
@ -84,7 +84,7 @@ int kvm_arch_init(void *opaque)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (sbi_probe_extension(SBI_EXT_RFENCE) <= 0) {
|
||||
if (!sbi_probe_extension(SBI_EXT_RFENCE)) {
|
||||
kvm_info("require SBI RFENCE extension\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -630,6 +630,13 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
|
||||
!(memslot->flags & KVM_MEM_READONLY)) ? true : false;
|
||||
unsigned long vma_pagesize, mmu_seq;
|
||||
|
||||
/* We need minimum second+third level pages */
|
||||
ret = kvm_mmu_topup_memory_cache(pcache, gstage_pgd_levels);
|
||||
if (ret) {
|
||||
kvm_err("Failed to topup G-stage cache\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
mmap_read_lock(current->mm);
|
||||
|
||||
vma = find_vma_intersection(current->mm, hva, hva + 1);
|
||||
@ -650,6 +657,15 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
|
||||
if (vma_pagesize == PMD_SIZE || vma_pagesize == PGDIR_SIZE)
|
||||
gfn = (gpa & huge_page_mask(hstate_vma(vma))) >> PAGE_SHIFT;
|
||||
|
||||
/*
|
||||
* Read mmu_invalidate_seq so that KVM can detect if the results of
|
||||
* vma_lookup() or gfn_to_pfn_prot() become stale priort to acquiring
|
||||
* kvm->mmu_lock.
|
||||
*
|
||||
* Rely on mmap_read_unlock() for an implicit smp_rmb(), which pairs
|
||||
* with the smp_wmb() in kvm_mmu_invalidate_end().
|
||||
*/
|
||||
mmu_seq = kvm->mmu_invalidate_seq;
|
||||
mmap_read_unlock(current->mm);
|
||||
|
||||
if (vma_pagesize != PGDIR_SIZE &&
|
||||
@ -659,15 +675,6 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
/* We need minimum second+third level pages */
|
||||
ret = kvm_mmu_topup_memory_cache(pcache, gstage_pgd_levels);
|
||||
if (ret) {
|
||||
kvm_err("Failed to topup G-stage cache\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
mmu_seq = kvm->mmu_invalidate_seq;
|
||||
|
||||
hfn = gfn_to_pfn_prot(kvm, gfn, is_write, &writable);
|
||||
if (hfn == KVM_PFN_ERR_HWPOISON) {
|
||||
send_sig_mceerr(BUS_MCEERR_AR, (void __user *)hva,
|
||||
|
@ -842,8 +842,7 @@ static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
|
||||
* this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
|
||||
* entry.
|
||||
*/
|
||||
static void __init create_fdt_early_page_table(pgd_t *pgdir,
|
||||
uintptr_t fix_fdt_va,
|
||||
static void __init create_fdt_early_page_table(uintptr_t fix_fdt_va,
|
||||
uintptr_t dtb_pa)
|
||||
{
|
||||
uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
|
||||
@ -1033,8 +1032,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
|
||||
create_kernel_page_table(early_pg_dir, true);
|
||||
|
||||
/* Setup early mapping for FDT early scan */
|
||||
create_fdt_early_page_table(early_pg_dir,
|
||||
__fix_to_virt(FIX_FDT), dtb_pa);
|
||||
create_fdt_early_page_table(__fix_to_virt(FIX_FDT), dtb_pa);
|
||||
|
||||
/*
|
||||
* Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
|
||||
|
@ -59,10 +59,6 @@ struct ptd_mm_info {
|
||||
};
|
||||
|
||||
enum address_markers_idx {
|
||||
#ifdef CONFIG_KASAN
|
||||
KASAN_SHADOW_START_NR,
|
||||
KASAN_SHADOW_END_NR,
|
||||
#endif
|
||||
FIXMAP_START_NR,
|
||||
FIXMAP_END_NR,
|
||||
PCI_IO_START_NR,
|
||||
@ -74,6 +70,10 @@ enum address_markers_idx {
|
||||
VMALLOC_START_NR,
|
||||
VMALLOC_END_NR,
|
||||
PAGE_OFFSET_NR,
|
||||
#ifdef CONFIG_KASAN
|
||||
KASAN_SHADOW_START_NR,
|
||||
KASAN_SHADOW_END_NR,
|
||||
#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
MODULES_MAPPING_NR,
|
||||
KERNEL_MAPPING_NR,
|
||||
@ -82,10 +82,6 @@ enum address_markers_idx {
|
||||
};
|
||||
|
||||
static struct addr_marker address_markers[] = {
|
||||
#ifdef CONFIG_KASAN
|
||||
{0, "Kasan shadow start"},
|
||||
{0, "Kasan shadow end"},
|
||||
#endif
|
||||
{0, "Fixmap start"},
|
||||
{0, "Fixmap end"},
|
||||
{0, "PCI I/O start"},
|
||||
@ -97,6 +93,10 @@ static struct addr_marker address_markers[] = {
|
||||
{0, "vmalloc() area"},
|
||||
{0, "vmalloc() end"},
|
||||
{0, "Linear mapping"},
|
||||
#ifdef CONFIG_KASAN
|
||||
{0, "Kasan shadow start"},
|
||||
{0, "Kasan shadow end"},
|
||||
#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
{0, "Modules/BPF mapping"},
|
||||
{0, "Kernel mapping"},
|
||||
@ -362,10 +362,6 @@ static int __init ptdump_init(void)
|
||||
{
|
||||
unsigned int i, j;
|
||||
|
||||
#ifdef CONFIG_KASAN
|
||||
address_markers[KASAN_SHADOW_START_NR].start_address = KASAN_SHADOW_START;
|
||||
address_markers[KASAN_SHADOW_END_NR].start_address = KASAN_SHADOW_END;
|
||||
#endif
|
||||
address_markers[FIXMAP_START_NR].start_address = FIXADDR_START;
|
||||
address_markers[FIXMAP_END_NR].start_address = FIXADDR_TOP;
|
||||
address_markers[PCI_IO_START_NR].start_address = PCI_IO_START;
|
||||
@ -377,6 +373,10 @@ static int __init ptdump_init(void)
|
||||
address_markers[VMALLOC_START_NR].start_address = VMALLOC_START;
|
||||
address_markers[VMALLOC_END_NR].start_address = VMALLOC_END;
|
||||
address_markers[PAGE_OFFSET_NR].start_address = PAGE_OFFSET;
|
||||
#ifdef CONFIG_KASAN
|
||||
address_markers[KASAN_SHADOW_START_NR].start_address = KASAN_SHADOW_START;
|
||||
address_markers[KASAN_SHADOW_END_NR].start_address = KASAN_SHADOW_END;
|
||||
#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
address_markers[MODULES_MAPPING_NR].start_address = MODULES_VADDR;
|
||||
address_markers[KERNEL_MAPPING_NR].start_address = kernel_map.virt_addr;
|
||||
|
@ -382,7 +382,7 @@ static int __init sq_api_init(void)
|
||||
if (unlikely(!sq_cache))
|
||||
return ret;
|
||||
|
||||
sq_bitmap = kzalloc(size, GFP_KERNEL);
|
||||
sq_bitmap = kcalloc(size, sizeof(long), GFP_KERNEL);
|
||||
if (unlikely(!sq_bitmap))
|
||||
goto out;
|
||||
|
||||
|
@ -125,6 +125,8 @@
|
||||
|
||||
#define INTEL_FAM6_LUNARLAKE_M 0xBD
|
||||
|
||||
#define INTEL_FAM6_ARROWLAKE 0xC6
|
||||
|
||||
/* "Small Core" Processors (Atom/E-Core) */
|
||||
|
||||
#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
|
||||
|
@ -422,10 +422,9 @@ static unsigned int reserve_eilvt_offset(int offset, unsigned int new)
|
||||
if (vector && !eilvt_entry_is_changeable(vector, new))
|
||||
/* may not change if vectors are different */
|
||||
return rsvd;
|
||||
rsvd = atomic_cmpxchg(&eilvt_offsets[offset], rsvd, new);
|
||||
} while (rsvd != new);
|
||||
} while (!atomic_try_cmpxchg(&eilvt_offsets[offset], &rsvd, new));
|
||||
|
||||
rsvd &= ~APIC_EILVT_MASKED;
|
||||
rsvd = new & ~APIC_EILVT_MASKED;
|
||||
if (rsvd && rsvd != vector)
|
||||
pr_info("LVT offset %d assigned for vector 0x%02x\n",
|
||||
offset, rsvd);
|
||||
|
@ -2480,17 +2480,21 @@ static int io_apic_get_redir_entries(int ioapic)
|
||||
|
||||
unsigned int arch_dynirq_lower_bound(unsigned int from)
|
||||
{
|
||||
unsigned int ret;
|
||||
|
||||
/*
|
||||
* dmar_alloc_hwirq() may be called before setup_IO_APIC(), so use
|
||||
* gsi_top if ioapic_dynirq_base hasn't been initialized yet.
|
||||
*/
|
||||
if (!ioapic_initialized)
|
||||
return gsi_top;
|
||||
ret = ioapic_dynirq_base ? : gsi_top;
|
||||
|
||||
/*
|
||||
* For DT enabled machines ioapic_dynirq_base is irrelevant and not
|
||||
* updated. So simply return @from if ioapic_dynirq_base == 0.
|
||||
* For DT enabled machines ioapic_dynirq_base is irrelevant and
|
||||
* always 0. gsi_top can be 0 if there is no IO/APIC registered.
|
||||
* 0 is an invalid interrupt number for dynamic allocations. Return
|
||||
* @from instead.
|
||||
*/
|
||||
return ioapic_dynirq_base ? : from;
|
||||
return ret ? : from;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
|
@ -235,10 +235,10 @@ static DEFINE_PER_CPU(struct threshold_bank **, threshold_banks);
|
||||
* A list of the banks enabled on each logical CPU. Controls which respective
|
||||
* descriptors to initialize later in mce_threshold_create_device().
|
||||
*/
|
||||
static DEFINE_PER_CPU(unsigned int, bank_map);
|
||||
static DEFINE_PER_CPU(u64, bank_map);
|
||||
|
||||
/* Map of banks that have more than MCA_MISC0 available. */
|
||||
static DEFINE_PER_CPU(u32, smca_misc_banks_map);
|
||||
static DEFINE_PER_CPU(u64, smca_misc_banks_map);
|
||||
|
||||
static void amd_threshold_interrupt(void);
|
||||
static void amd_deferred_error_interrupt(void);
|
||||
@ -267,7 +267,7 @@ static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu)
|
||||
return;
|
||||
|
||||
if (low & MASK_BLKPTR_LO)
|
||||
per_cpu(smca_misc_banks_map, cpu) |= BIT(bank);
|
||||
per_cpu(smca_misc_banks_map, cpu) |= BIT_ULL(bank);
|
||||
|
||||
}
|
||||
|
||||
@ -528,7 +528,7 @@ static u32 smca_get_block_address(unsigned int bank, unsigned int block,
|
||||
if (!block)
|
||||
return MSR_AMD64_SMCA_MCx_MISC(bank);
|
||||
|
||||
if (!(per_cpu(smca_misc_banks_map, cpu) & BIT(bank)))
|
||||
if (!(per_cpu(smca_misc_banks_map, cpu) & BIT_ULL(bank)))
|
||||
return 0;
|
||||
|
||||
return MSR_AMD64_SMCA_MCx_MISCy(bank, block - 1);
|
||||
@ -572,7 +572,7 @@ prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr,
|
||||
int new;
|
||||
|
||||
if (!block)
|
||||
per_cpu(bank_map, cpu) |= (1 << bank);
|
||||
per_cpu(bank_map, cpu) |= BIT_ULL(bank);
|
||||
|
||||
memset(&b, 0, sizeof(b));
|
||||
b.cpu = cpu;
|
||||
@ -884,7 +884,7 @@ static void amd_threshold_interrupt(void)
|
||||
return;
|
||||
|
||||
for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) {
|
||||
if (!(per_cpu(bank_map, cpu) & (1 << bank)))
|
||||
if (!(per_cpu(bank_map, cpu) & BIT_ULL(bank)))
|
||||
continue;
|
||||
|
||||
first_block = bp[bank]->blocks;
|
||||
@ -1362,7 +1362,7 @@ int mce_threshold_create_device(unsigned int cpu)
|
||||
return -ENOMEM;
|
||||
|
||||
for (bank = 0; bank < numbanks; ++bank) {
|
||||
if (!(this_cpu_read(bank_map) & (1 << bank)))
|
||||
if (!(this_cpu_read(bank_map) & BIT_ULL(bank)))
|
||||
continue;
|
||||
err = threshold_create_bank(bp, cpu, bank);
|
||||
if (err) {
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user