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ANDROID: arm64: cache: Lower ARCH_DMA_MINALIGN to 64 bytes

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Currently, ARCH_DMA_MINALIGN is set to 128 bytes for ARM64, which
means that the minimum size for kmalloc objects is 128 bytes.
ARCH_DMA_MINALIGN is required to be 128 bytes to be able to use a
single kernel image to support non-coherent DMA on systems with
cachelines up to 128 bytes in size.

However, the current value of 128 bytes leads to a large amount of
wasted memory for slab allocations on systems that have 64 byte
cachelines and only need a minimum alignment of 64 bytes for
DMA buffers. If these systems are allowed to use a smaller
ARCH_DMA_MINALIGN value of 64, the memory footprint of slab
allocations can be reduced by redirecting some allocations from
the kmalloc-128 and kmalloc-256 caches to the kmalloc-64 and
kmalloc-192 slab caches.

The following output from the slabinfo tool from a device running
Linux 6.1-rc5 reveals that lowering ARCH_DMA_MINALIGN from 128 bytes
to 64 bytes reduces the memory footprint of slab allocations by
16.6 MB--almost 5%.

ARCH_DMA_MINALIGN == 128:

Name                   Objects Objsize           Space
kmalloc-128             236973     128           33.0M
kmalloc-rcl-128           5541     128          724.9K
kmalloc-cg-128           10367     128            1.5M
kmalloc-256              12986     256            3.5M
kmalloc-rcl-256            256     256           65.5K
kmalloc-cg-256             544     256          139.2K

Total:                  266667                   38.9M

ARCH_DMA_MINALIGN == 64:

Name                   Objects Objsize           Space
kmalloc-64              216525      64           14.9M
kmalloc-rcl-64            3663      64          249.8K
kmalloc-cg-64            10269      64          864.2K
kmalloc-128              22797     128            3.5M
kmalloc-rcl-128           2016     128          258.0K
kmalloc-cg-128             288     128           36.8K
kmalloc-192               5532     192            1.1M
kmalloc-rcl-192            147     192           28.6K
kmalloc-cg-192             462     192           90.1K
kmalloc-256               5110     256            1.3M
kmalloc-rcl-256              0     256              0K
kmalloc-cg-256             224     256           57.3K

Total:                  267033                   22.3M

Thus, given the amount of memory saved by lowering ARCH_DMA_MINALIGN,
and that we are not aware of systems that have 128 byte cachelines
that will launch with newer kernels, lower the value of
ARCH_DMA_MINALIGN to 64 bytes for ARM64.

This is meant to serve as an intermediate solution while the series
in [1] is finalized.

[1] https://lore.kernel.org/linux-iommu/20221106220143.2129263-1-catalin.marinas@arm.com/

Bug: 241844128
Bug: 267786731
Signed-off-by: Isaac J. Manjarres <isaacmanjarres@google.com>
Change-Id: Idde8d1c682865582382766acc0443dda1a8a4f12
This commit is contained in:
Isaac J. Manjarres 2022-10-13 00:03:54 +00:00 committed by Todd Kjos
parent aa23dbe7ec
commit e6284969d9
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/include/asm/cache.h
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@ -23,7 +23,7 @@
* cache before the transfer is done, causing old data to be seen by
* the CPU.
*/
#define ARCH_DMA_MINALIGN (128)
#define ARCH_DMA_MINALIGN (64)
#ifndef __ASSEMBLY__