dmaengine: stm32-dma: fix incomplete configuration in cyclic mode
When in cyclic mode, the configuration is updated after having started the DMA hardware (STM32_DMA_SCR_EN) leading to incomplete configuration of SMxAR registers. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -441,6 +441,8 @@ static void stm32_dma_dump_reg(struct stm32_dma_chan *chan)
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dev_dbg(chan2dev(chan), "SFCR: 0x%08x\n", sfcr);
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}
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static void stm32_dma_configure_next_sg(struct stm32_dma_chan *chan);
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static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
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{
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struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan);
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@ -483,6 +485,9 @@ static void stm32_dma_start_transfer(struct stm32_dma_chan *chan)
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if (status)
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stm32_dma_irq_clear(chan, status);
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if (chan->desc->cyclic)
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stm32_dma_configure_next_sg(chan);
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stm32_dma_dump_reg(chan);
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/* Start DMA */
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@ -576,8 +581,7 @@ static void stm32_dma_issue_pending(struct dma_chan *c)
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if (vchan_issue_pending(&chan->vchan) && !chan->desc && !chan->busy) {
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dev_dbg(chan2dev(chan), "vchan %p: issued\n", &chan->vchan);
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stm32_dma_start_transfer(chan);
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if (chan->desc->cyclic)
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stm32_dma_configure_next_sg(chan);
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}
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spin_unlock_irqrestore(&chan->vchan.lock, flags);
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}
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