spi: sun6i: reduce DMA RX transfer width to single byte
[ Upstream commit 171f8a49f212e87a8b04087568e1b3d132e36a18 ] Through empirical testing it has been determined that sometimes RX SPI transfers with DMA enabled return corrupted data. This is down to single or even multiple bytes lost during DMA transfer from SPI peripheral to memory. It seems the RX FIFO within the SPI peripheral can become confused when performing bus read accesses wider than a single byte to it during an active SPI transfer. This patch reduces the width of individual DMA read accesses to the RX FIFO to a single byte to mitigate that issue. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Link: https://lore.kernel.org/r/20230827152558.5368-2-t.schramm@manjaro.org Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -200,7 +200,7 @@ static int sun6i_spi_prepare_dma(struct sun6i_spi *sspi,
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struct dma_slave_config rxconf = {
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.direction = DMA_DEV_TO_MEM,
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.src_addr = sspi->dma_addr_rx,
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.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
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.src_maxburst = 8,
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};
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