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Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

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This commit is contained in:
Russell King 2008-05-17 22:56:08 +01:00 committed by Russell King
commit dfb0ae0914
16 changed files with 67 additions and 35 deletions
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2
arch/arm/mach-omap1/board-palmte.c
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@ -63,7 +63,7 @@ static const int palmte_keymap[] = {
KEY(1, 1, KEY_DOWN), KEY(1, 1, KEY_DOWN),
KEY(1, 2, KEY_UP), KEY(1, 2, KEY_UP),
KEY(1, 3, KEY_RIGHT), KEY(1, 3, KEY_RIGHT),
KEY(1, 4, KEY_CENTER), KEY(1, 4, KEY_ENTER),
0, 0,
}; };

2
arch/arm/mach-omap1/board-palmz71.c
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@ -65,7 +65,7 @@ static int palmz71_keymap[] = {
KEY(1, 1, KEY_DOWN), KEY(1, 1, KEY_DOWN),
KEY(1, 2, KEY_UP), KEY(1, 2, KEY_UP),
KEY(1, 3, KEY_RIGHT), KEY(1, 3, KEY_RIGHT),
KEY(1, 4, KEY_CENTER), KEY(1, 4, KEY_ENTER),
KEY(2, 0, KEY_CAMERA), KEY(2, 0, KEY_CAMERA),
0, 0,
}; };

1
arch/arm/mach-omap2/board-2430sdp.c
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@ -208,6 +208,7 @@ static void __init omap_2430sdp_init(void)
static void __init omap_2430sdp_map_io(void) static void __init omap_2430sdp_map_io(void)
{ {
omap2_set_globals_243x();
omap2_map_common_io(); omap2_map_common_io();
} }

1
arch/arm/mach-omap2/board-apollon.c
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@ -394,6 +394,7 @@ static void __init omap_apollon_init(void)
static void __init omap_apollon_map_io(void) static void __init omap_apollon_map_io(void)
{ {
omap2_set_globals_242x();
omap2_map_common_io(); omap2_map_common_io();
} }

1
arch/arm/mach-omap2/board-generic.c
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@ -65,6 +65,7 @@ static void __init omap_generic_init(void)
static void __init omap_generic_map_io(void) static void __init omap_generic_map_io(void)
{ {
omap2_set_globals_242x(); /* should be 242x, 243x, or 343x */
omap2_map_common_io(); omap2_map_common_io();
} }

1
arch/arm/mach-omap2/board-h4.c
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@ -420,6 +420,7 @@ static void __init omap_h4_init(void)
static void __init omap_h4_map_io(void) static void __init omap_h4_map_io(void)
{ {
omap2_set_globals_242x();
omap2_map_common_io(); omap2_map_common_io();
} }

4
arch/arm/mach-omap2/clock.c
View File

@ -205,7 +205,9 @@ static void omap2_clk_wait_ready(struct clk *clk)
/* REVISIT: What are the appropriate exclusions for 34XX? */ /* REVISIT: What are the appropriate exclusions for 34XX? */
/* OMAP3: ignore DSS-mod clocks */ /* OMAP3: ignore DSS-mod clocks */
if (cpu_is_omap34xx() && if (cpu_is_omap34xx() &&
(((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0))) (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) ||
((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) &&
clk->enable_bit == OMAP3430_EN_SSI_SHIFT)))
return; return;
/* Check if both functional and interface clocks /* Check if both functional and interface clocks

21
arch/arm/mach-omap2/clock34xx.h
View File

@ -836,7 +836,8 @@ static struct clk dpll5_m2_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5),
.clksel_mask = OMAP3430ES2_DIV_120M_MASK, .clksel_mask = OMAP3430ES2_DIV_120M_MASK,
.clksel = div16_dpll5_clksel, .clksel = div16_dpll5_clksel,
.flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
}; };
@ -1046,12 +1047,13 @@ static struct clk iva2_ck = {
.name = "iva2_ck", .name = "iva2_ck",
.parent = &dpll2_m2_ck, .parent = &dpll2_m2_ck,
.init = &omap2_init_clksel_parent, .init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD,
OMAP3430_CM_IDLEST_PLL), OMAP3430_CM_IDLEST_PLL),
.clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK,
.clksel = iva2_clksel, .clksel = iva2_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
PARENT_CONTROLS_CLOCK,
.recalc = &omap2_clksel_recalc, .recalc = &omap2_clksel_recalc,
}; };
@ -1836,7 +1838,8 @@ static struct clk omapctrl_ick = {
static struct clk ssi_l4_ick = { static struct clk ssi_l4_ick = {
.name = "ssi_l4_ick", .name = "ssi_l4_ick",
.parent = &l4_ick, .parent = &l4_ick,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
@ -2344,7 +2347,7 @@ static struct clk gpio6_fck = {
.name = "gpio6_fck", .name = "gpio6_fck",
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPT6_SHIFT, .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
.flags = CLOCK_IN_OMAP343X, .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
@ -2353,7 +2356,7 @@ static struct clk gpio5_fck = {
.name = "gpio5_fck", .name = "gpio5_fck",
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPT5_SHIFT, .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
.flags = CLOCK_IN_OMAP343X, .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
@ -2362,7 +2365,7 @@ static struct clk gpio4_fck = {
.name = "gpio4_fck", .name = "gpio4_fck",
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPT4_SHIFT, .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
.flags = CLOCK_IN_OMAP343X, .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
@ -2371,7 +2374,7 @@ static struct clk gpio3_fck = {
.name = "gpio3_fck", .name = "gpio3_fck",
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPT3_SHIFT, .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
.flags = CLOCK_IN_OMAP343X, .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
@ -2380,7 +2383,7 @@ static struct clk gpio2_fck = {
.name = "gpio2_fck", .name = "gpio2_fck",
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPT2_SHIFT, .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
.flags = CLOCK_IN_OMAP343X, .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };

1
arch/arm/mach-omap2/cm-regbits-34xx.h
View File

@ -56,6 +56,7 @@
/* CM_FCLKEN_IVA2 */ /* CM_FCLKEN_IVA2 */
#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0) #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0)
#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
/* CM_CLKEN_PLL_IVA2 */ /* CM_CLKEN_PLL_IVA2 */
#define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 #define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8

25
arch/arm/mach-omap2/mailbox.c
View File

@ -70,6 +70,9 @@ struct omap_mbox2_priv {
static struct clk *mbox_ick_handle; static struct clk *mbox_ick_handle;
static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq);
static inline unsigned int mbox_read_reg(unsigned int reg) static inline unsigned int mbox_read_reg(unsigned int reg)
{ {
return __raw_readl(mbox_base + reg); return __raw_readl(mbox_base + reg);
@ -81,7 +84,7 @@ static inline void mbox_write_reg(unsigned int val, unsigned int reg)
} }
/* Mailbox H/W preparations */ /* Mailbox H/W preparations */
static inline int omap2_mbox_startup(struct omap_mbox *mbox) static int omap2_mbox_startup(struct omap_mbox *mbox)
{ {
unsigned int l; unsigned int l;
@ -97,38 +100,40 @@ static inline int omap2_mbox_startup(struct omap_mbox *mbox)
l |= 0x00000011; l |= 0x00000011;
mbox_write_reg(l, MAILBOX_SYSCONFIG); mbox_write_reg(l, MAILBOX_SYSCONFIG);
omap2_mbox_enable_irq(mbox, IRQ_RX);
return 0; return 0;
} }
static inline void omap2_mbox_shutdown(struct omap_mbox *mbox) static void omap2_mbox_shutdown(struct omap_mbox *mbox)
{ {
clk_disable(mbox_ick_handle); clk_disable(mbox_ick_handle);
clk_put(mbox_ick_handle); clk_put(mbox_ick_handle);
} }
/* Mailbox FIFO handle functions */ /* Mailbox FIFO handle functions */
static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
{ {
struct omap_mbox2_fifo *fifo = struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
return (mbox_msg_t) mbox_read_reg(fifo->msg); return (mbox_msg_t) mbox_read_reg(fifo->msg);
} }
static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
{ {
struct omap_mbox2_fifo *fifo = struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
mbox_write_reg(msg, fifo->msg); mbox_write_reg(msg, fifo->msg);
} }
static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox) static int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
{ {
struct omap_mbox2_fifo *fifo = struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
return (mbox_read_reg(fifo->msg_stat) == 0); return (mbox_read_reg(fifo->msg_stat) == 0);
} }
static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) static int omap2_mbox_fifo_full(struct omap_mbox *mbox)
{ {
struct omap_mbox2_fifo *fifo = struct omap_mbox2_fifo *fifo =
&((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
@ -136,7 +141,7 @@ static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox)
} }
/* Mailbox IRQ handle functions */ /* Mailbox IRQ handle functions */
static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq) omap_mbox_type_t irq)
{ {
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
@ -147,7 +152,7 @@ static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox,
mbox_write_reg(l, p->irqenable); mbox_write_reg(l, p->irqenable);
} }
static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq) omap_mbox_type_t irq)
{ {
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
@ -158,7 +163,7 @@ static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox,
mbox_write_reg(l, p->irqenable); mbox_write_reg(l, p->irqenable);
} }
static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq) omap_mbox_type_t irq)
{ {
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
@ -167,7 +172,7 @@ static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox,
mbox_write_reg(bit, p->irqstatus); mbox_write_reg(bit, p->irqstatus);
} }
static inline int omap2_mbox_is_irq(struct omap_mbox *mbox, static int omap2_mbox_is_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq) omap_mbox_type_t irq)
{ {
struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;

2
arch/arm/mach-omap2/prm.h
View File

@ -30,7 +30,7 @@
/* /*
* Architecture-specific global PRM registers * Architecture-specific global PRM registers
* Use prm_{read,write}_reg() with these registers. * Use __raw_{read,write}l() with these registers.
* *
* With a few exceptions, these are the register names beginning with * With a few exceptions, these are the register names beginning with
* PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the

10
arch/arm/plat-omap/clock.c
View File

@ -134,9 +134,17 @@ void clk_disable(struct clk *clk)
return; return;
spin_lock_irqsave(&clockfw_lock, flags); spin_lock_irqsave(&clockfw_lock, flags);
BUG_ON(clk->usecount == 0); if (clk->usecount == 0) {
printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
clk->name);
WARN_ON(1);
goto out;
}
if (arch_clock->clk_disable) if (arch_clock->clk_disable)
arch_clock->clk_disable(clk); arch_clock->clk_disable(clk);
out:
spin_unlock_irqrestore(&clockfw_lock, flags); spin_unlock_irqrestore(&clockfw_lock, flags);
} }
EXPORT_SYMBOL(clk_disable); EXPORT_SYMBOL(clk_disable);

2
arch/arm/plat-omap/dma.c
View File

@ -604,6 +604,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
chan->data = data; chan->data = data;
#ifndef CONFIG_ARCH_OMAP1 #ifndef CONFIG_ARCH_OMAP1
chan->chain_id = -1; chan->chain_id = -1;
chan->next_linked_ch = -1;
#endif #endif
chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
@ -1087,7 +1088,6 @@ int omap_request_dma_chain(int dev_id, const char *dev_name,
printk(KERN_ERR "omap_dma: Request failed %d\n", err); printk(KERN_ERR "omap_dma: Request failed %d\n", err);
return err; return err;
} }
dma_chan[channels[i]].next_linked_ch = -1;
dma_chan[channels[i]].prev_linked_ch = -1; dma_chan[channels[i]].prev_linked_ch = -1;
dma_chan[channels[i]].state = DMA_CH_NOTSTARTED; dma_chan[channels[i]].state = DMA_CH_NOTSTARTED;

1
arch/arm/plat-omap/mailbox.c
View File

@ -355,7 +355,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
"failed to register mailbox interrupt:%d\n", ret); "failed to register mailbox interrupt:%d\n", ret);
goto fail_request_irq; goto fail_request_irq;
} }
enable_mbox_irq(mbox, IRQ_RX);
mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work);
if (!mq) { if (!mq) {

4
include/asm-arm/arch-omap/common.h
View File

@ -47,4 +47,8 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
} }
#endif #endif
void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_343x(void);
#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */

24
include/asm-arm/arch-omap/mmc.h
View File

@ -15,21 +15,16 @@
#include <linux/device.h> #include <linux/device.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include <asm/arch/board.h>
#define OMAP_MMC_MAX_SLOTS 2 #define OMAP_MMC_MAX_SLOTS 2
struct omap_mmc_platform_data { struct omap_mmc_platform_data {
struct omap_mmc_conf conf; struct omap_mmc_conf conf;
unsigned enabled:1;
/* number of slots on board */ /* number of slots on board */
unsigned nr_slots:2; unsigned nr_slots:2;
/* nomux means "standard" muxing is wrong on this board, and that
* board-specific code handled it before common init logic.
*/
unsigned nomux:1;
/* 4 wire signaling is optional, and is only used for SD/SDIO and
* MMCv4 */
unsigned wire4:1;
/* set if your board has components or wiring that limits the /* set if your board has components or wiring that limits the
* maximum frequency on the MMC bus */ * maximum frequency on the MMC bus */
unsigned int max_freq; unsigned int max_freq;
@ -40,6 +35,11 @@ struct omap_mmc_platform_data {
* not supported */ * not supported */
int (* init)(struct device *dev); int (* init)(struct device *dev);
void (* cleanup)(struct device *dev); void (* cleanup)(struct device *dev);
void (* shutdown)(struct device *dev);
/* To handle board related suspend/resume functionality for MMC */
int (*suspend)(struct device *dev, int slot);
int (*resume)(struct device *dev, int slot);
struct omap_mmc_slot_data { struct omap_mmc_slot_data {
int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
@ -56,13 +56,19 @@ struct omap_mmc_platform_data {
const char *name; const char *name;
u32 ocr_mask; u32 ocr_mask;
/* Card detection IRQs */
int card_detect_irq;
int (* card_detect)(int irq);
unsigned int ban_openended:1;
} slots[OMAP_MMC_MAX_SLOTS]; } slots[OMAP_MMC_MAX_SLOTS];
}; };
extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
/* called from board-specific card detection service routine */ /* called from board-specific card detection service routine */
extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected);
extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
#endif #endif