android/android_kernel_samsung_sm8650
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

mmc: debugfs: expose the SDCLK frq in sys ios

Browse Source 
This patch is to expose the actual SDCLK frequency in
/sys/kernel/debug/mmcX/ios entry.

For example, if the max clk for a normal speed card is 20MHz this
is reported in /sys/kernel/debug/mmcX/ios.  Unfortunately the actual
SDCLK frequency (i.e. Baseclock / divisor) is not reported at all:
for example, in that case, on Arasan HC, it should be 48/4=12 (MHz).

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
Giuseppe CAVALLARO 2011-11-04 13:53:19 +01:00 committed by Chris Ball
parent 052d81da6e
commit df16219f36
3 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/mmc/core/debugfs.c
View File

@ -57,6 +57,8 @@ static int mmc_ios_show(struct seq_file *s, void *data)
const char *str; const char *str;
seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); seq_printf(s, "clock:\t\t%u Hz\n", ios->clock);
if (host->actual_clock)
seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock);
seq_printf(s, "vdd:\t\t%u ", ios->vdd); seq_printf(s, "vdd:\t\t%u ", ios->vdd);
if ((1 << ios->vdd) & MMC_VDD_165_195) if ((1 << ios->vdd) & MMC_VDD_165_195)
seq_printf(s, "(1.65 - 1.95 V)\n"); seq_printf(s, "(1.65 - 1.95 V)\n");

10
drivers/mmc/host/sdhci.c
View File

@ -1066,12 +1066,15 @@ static void sdhci_finish_command(struct sdhci_host *host)
static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
{ {
int div = 0; /* Initialized for compiler warning */ int div = 0; /* Initialized for compiler warning */
int real_div = div, clk_mul = 1;
u16 clk = 0; u16 clk = 0;
unsigned long timeout; unsigned long timeout;
if (clock == host->clock) if (clock == host->clock)
return; return;
host->mmc->actual_clock = 0;
if (host->ops->set_clock) { if (host->ops->set_clock) {
host->ops->set_clock(host, clock); host->ops->set_clock(host, clock);
if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
@ -1109,6 +1112,8 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
* Control register. * Control register.
*/ */
clk = SDHCI_PROG_CLOCK_MODE; clk = SDHCI_PROG_CLOCK_MODE;
real_div = div;
clk_mul = host->clk_mul;
div--; div--;
} }
} else { } else {
@ -1122,6 +1127,7 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
break; break;
} }
} }
real_div = div;
div >>= 1; div >>= 1;
} }
} else { } else {
@ -1130,9 +1136,13 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
if ((host->max_clk / div) <= clock) if ((host->max_clk / div) <= clock)
break; break;
} }
real_div = div;
div >>= 1; div >>= 1;
} }
if (real_div)
host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div;
clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
<< SDHCI_DIVIDER_HI_SHIFT; << SDHCI_DIVIDER_HI_SHIFT;

2
include/linux/mmc/host.h
View File

@ -323,6 +323,8 @@ struct mmc_host {
struct fault_attr fail_mmc_request; struct fault_attr fail_mmc_request;
#endif #endif
unsigned int actual_clock; /* Actual HC clock rate */
unsigned long private[0] ____cacheline_aligned; unsigned long private[0] ____cacheline_aligned;
}; };