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soc: qcom: Add support for llcc driver for niobe

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Add LLCC slice configuration data, enable llcc driver for niobe.

Change-Id: I5f615bb603760e1cc3023b20d2d3a4ed24f98a89
Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
This commit is contained in:
Amrit Anand 2023-10-31 11:58:53 +05:30
parent f383d4edca
commit dba3186f18
5 changed files with 26 additions and 0 deletions
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3
arch/arm64/configs/vendor/niobe_GKI.config vendored
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@ -5,6 +5,8 @@ CONFIG_ARM_SMMU_QCOM=m
# CONFIG_ARM_SMMU_QCOM_DEBUG is not set
# CONFIG_ARM_SMMU_SELFTEST is not set
CONFIG_COMMON_CLK_QCOM=m
CONFIG_EDAC_QCOM=m
CONFIG_EDAC_QCOM_LLCC_PANIC_ON_UE=y
CONFIG_HWSPINLOCK_QCOM=m
CONFIG_INTERCONNECT_QCOM_BCM_VOTER=m
CONFIG_INTERCONNECT_QCOM_DEBUG=m
@ -44,6 +46,7 @@ CONFIG_QCOM_GDSC_REGULATOR=m
CONFIG_QCOM_IOMMU_UTIL=m
CONFIG_QCOM_IPCC=m
CONFIG_QCOM_LAZY_MAPPING=m
CONFIG_QCOM_LLCC=m
CONFIG_QCOM_MEM_BUF=m
CONFIG_QCOM_MEM_BUF_DEV=m
CONFIG_QCOM_PDC=m

19
drivers/soc/qcom/llcc-qcom.c
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@ -473,6 +473,19 @@ static struct llcc_slice_config monaco_auto_ivi_data[] = {
{LLCC_WRTCH, 31, 128, 1, 1, 0x00F, 0x0, 0, 0, 0, 0, 1, 0, 0},
};
static const struct llcc_slice_config niobe_data[] = {
{LLCC_CPUSS, 1, 4096, 1, 0, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_GPUHTW, 11, 1024, 1, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_GPU, 9, 5120, 1, 0, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_WRTCH, 31, 512, 1, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_LCPDARE, 30, 128, 3, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0},
{LLCC_VIDVSP, 28, 256, 3, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{LLCC_EVA_3DR, 8, 1310, 3, 1, 0xFFFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
};
static const struct qcom_llcc_config sc7180_cfg = {
.sct_data = sc7180_data,
.size = ARRAY_SIZE(sc7180_data),
@ -528,6 +541,11 @@ static const struct qcom_llcc_config cliffs7_cfg = {
.size = ARRAY_SIZE(cliffs7_data),
};
static const struct qcom_llcc_config niobe_cfg = {
.sct_data = niobe_data,
.size = ARRAY_SIZE(niobe_data),
};
static const struct qcom_llcc_config qdu1000_cfg[] = {
{
.sct_data = qdu1000_data_8ch,
@ -1288,6 +1306,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
{ .compatible = "qcom,cliffs-llcc", .data = &cliffs_cfg },
{ .compatible = "qcom,cliffs7-llcc", .data = &cliffs7_cfg },
{ .compatible = "qcom,monaco_auto_ivi-llcc", .data = &monaco_auto_ivi_cfg },
{ .compatible = "qcom,niobe-llcc", .data = &niobe_cfg },
{ }
};

1
include/linux/soc/qcom/llcc-qcom.h
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@ -57,6 +57,7 @@
#define LLCC_DISP_1 54
#define LLCC_SAIL 55
#define LLCC_VIDVSP 64
#define LLCC_EVA_3DR 69
/**
* llcc_slice_desc - Cache slice descriptor

1
modules.list.msm.niobe
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@ -23,3 +23,4 @@ qcom-ipcc.ko
phy-qcom-ufs.ko
phy-qcom-ufs-qrbtc-sdm845.ko
ufs_qcom.ko
llcc-qcom.ko

2
niobe.bzl
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@ -12,6 +12,7 @@ def define_niobe():
"drivers/clk/qcom/clk-qcom.ko",
"drivers/clk/qcom/gdsc-regulator.ko",
"drivers/dma-buf/heaps/qcom_dma_heaps.ko",
"drivers/edac/qcom_edac.ko",
"drivers/firmware/qcom-scm.ko",
"drivers/hwspinlock/qcom_hwspinlock.ko",
"drivers/interconnect/icc-test.ko",
@ -34,6 +35,7 @@ def define_niobe():
"drivers/regulator/stub-regulator.ko",
"drivers/soc/qcom/boot_stats.ko",
"drivers/soc/qcom/cmd-db.ko",
"drivers/soc/qcom/llcc-qcom.ko",
"drivers/soc/qcom/mem_buf/mem_buf.ko",
"drivers/soc/qcom/mem_buf/mem_buf_dev.ko",
"drivers/soc/qcom/qcom_rpmh.ko",