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x86/fpu: Move mxcsr related code to core

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No need to expose that to code which only needs the XCR0 accessors.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211015011539.740012411@linutronix.de
This commit is contained in:
Thomas Gleixner 2021-10-15 03:16:31 +02:00 committed by Borislav Petkov
parent 9848fb9683
commit d9d005f32a
6 changed files with 12 additions and 13 deletions
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11
arch/x86/include/asm/fpu/xcr.h
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@ -2,17 +2,6 @@
#ifndef _ASM_X86_FPU_XCR_H
#define _ASM_X86_FPU_XCR_H
/*
* MXCSR and XCR definitions:
*/
static inline void ldmxcsr(u32 mxcsr)
{
asm volatile("ldmxcsr %0" :: "m" (mxcsr));
}
extern unsigned int mxcsr_feature_mask;
#define XCR_XFEATURE_ENABLED_MASK 0x00000000
static inline u64 xgetbv(u32 index)

1
arch/x86/kernel/fpu/init.c
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@ -11,6 +11,7 @@
#include <linux/init.h>
#include "internal.h"
#include "legacy.h"
/*
* Initialize the registers found in all CPUs, CR0 and CR4:

7
arch/x86/kernel/fpu/legacy.h
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@ -4,6 +4,13 @@
#include <asm/fpu/types.h>
extern unsigned int mxcsr_feature_mask;
static inline void ldmxcsr(u32 mxcsr)
{
asm volatile("ldmxcsr %0" :: "m" (mxcsr));
}
/*
* Returns 0 on success or the trap number when the operation raises an
* exception.

1
arch/x86/kernel/fpu/regset.c
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@ -12,6 +12,7 @@
#include "context.h"
#include "internal.h"
#include "legacy.h"
/*
* The xstateregs_active() routine is the same as the regset_fpregs_active() routine,

3
arch/x86/kernel/fpu/xstate.c
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@ -14,8 +14,9 @@
#include <asm/fpu/api.h>
#include <asm/fpu/internal.h>
#include <asm/fpu/signal.h>
#include <asm/fpu/regset.h>
#include <asm/fpu/signal.h>
#include <asm/fpu/xcr.h>
#include <asm/tlbflush.h>

2
arch/x86/kvm/svm/sev.c
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@ -17,10 +17,10 @@
#include <linux/misc_cgroup.h>
#include <linux/processor.h>
#include <linux/trace_events.h>
#include <asm/fpu/internal.h>
#include <asm/pkru.h>
#include <asm/trapnr.h>
#include <asm/fpu/xcr.h>
#include "x86.h"
#include "svm.h"