octeontx2-af: Fix mcs stats register address
[ Upstream commit 3ba98a8c6f8ceb4e01a78f973d8d9017020bbd57 ]
This patch adds the miss mcs stats register
for mcs supported platforms.
Fixes: 9312150af8
("octeontx2-af: cn10k: mcs: Support for stats collection")
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -117,7 +117,7 @@ void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(id);
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stats->pkt_tagged_ctl_cnt = mcs_reg_read(mcs, reg);
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(id);
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(id);
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stats->pkt_untaged_cnt = mcs_reg_read(mcs, reg);
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(id);
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@ -215,7 +215,7 @@ void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats,
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(id);
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stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(id);
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reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(id);
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stats->pkt_unchecked_cnt = mcs_reg_read(mcs, reg);
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if (mcs->hw->mcs_blks > 1) {
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@ -810,14 +810,37 @@
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offset = 0x9d8ull; \
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offset; })
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(a) ({ \
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u64 offset; \
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\
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offset = 0xee80ull; \
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if (mcs->hw->mcs_blks > 1) \
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offset = 0xe818ull; \
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offset += (a) * 0x8ull; \
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offset; })
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) ({ \
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u64 offset; \
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\
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offset = 0xa680ull; \
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if (mcs->hw->mcs_blks > 1) \
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offset = 0xd018ull; \
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offset += (a) * 0x8ull; \
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offset; })
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) ({ \
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u64 offset; \
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\
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offset = 0xf680ull; \
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if (mcs->hw->mcs_blks > 1) \
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offset = 0xe018ull; \
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offset += (a) * 0x8ull; \
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offset; })
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#define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(a) (0xe680ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(a) (0xde80ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(a) (0xa680ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(a) (0xd218 + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) (0xd018ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(a) (0xee80ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(a) (0xb680ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) (0xf680ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(a) (0x12680ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(a) (0x15680ull + (a) * 0x8ull)
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#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(a) (0x13680ull + (a) * 0x8ull)
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