From 3b161e51b254fa7bd3a9b0bd7ca7a2ac8ceaae8b Mon Sep 17 00:00:00 2001 From: Javier Martin Date: Fri, 30 Jul 2010 10:06:01 +0200 Subject: [PATCH 01/72] ARM: imx: Add support for Vista Silicon Visstrim_m10 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Vista Silicon Visstrim_m10 i.MX27 based board is used as multimedia streaming server, access control and other custom applications. Signed-off-by: Javier Martin Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-imx/Kconfig | 9 + arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 263 ++++++++++++++++++++ 3 files changed, 273 insertions(+) create mode 100644 arch/arm/mach-imx/mach-imx27_visstrim_m10.c diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index c5c0369bb481..19ed16d0017e 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -163,6 +163,15 @@ config MACH_MX27_3DS Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. +config MACH_IMX27_VISSTRIM_M10 + bool "Vista Silicon i.MX27 Visstrim_m10" + select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_UART + help + Include support for Visstrim_m10 platform and its different variants. + This includes specific configurations for the board and its + peripherals. + config MACH_IMX27LITE bool "LogicPD MX27 LITEKIT platform" select IMX_HAVE_PLATFORM_IMX_UART diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 46a9fdfbbd15..5582692bb176 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o +obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o obj-$(CONFIG_MACH_PCA100) += mach-pca100.o diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c new file mode 100644 index 000000000000..6dad632b83d6 --- /dev/null +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -0,0 +1,263 @@ +/* + * mach-imx27_visstrim_m10.c + * + * Copyright 2010 Javier Martin + * + * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "devices-imx27.h" +#include "devices.h" + +#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17) +#define SDHC1_IRQ IRQ_GPIOB(25) + +static int visstrim_m10_pins[] = { + /* UART1 (console) */ + PE12_PF_UART1_TXD, + PE13_PF_UART1_RXD, + PE14_PF_UART1_CTS, + PE15_PF_UART1_RTS, + /* FEC */ + PD0_AIN_FEC_TXD0, + PD1_AIN_FEC_TXD1, + PD2_AIN_FEC_TXD2, + PD3_AIN_FEC_TXD3, + PD4_AOUT_FEC_RX_ER, + PD5_AOUT_FEC_RXD1, + PD6_AOUT_FEC_RXD2, + PD7_AOUT_FEC_RXD3, + PD8_AF_FEC_MDIO, + PD9_AIN_FEC_MDC, + PD10_AOUT_FEC_CRS, + PD11_AOUT_FEC_TX_CLK, + PD12_AOUT_FEC_RXD0, + PD13_AOUT_FEC_RX_DV, + PD14_AOUT_FEC_RX_CLK, + PD15_AOUT_FEC_COL, + PD16_AIN_FEC_TX_ER, + PF23_AIN_FEC_TX_EN, + /* SDHC1 */ + PE18_PF_SD1_D0, + PE19_PF_SD1_D1, + PE20_PF_SD1_D2, + PE21_PF_SD1_D3, + PE22_PF_SD1_CMD, + PE23_PF_SD1_CLK, + /* Both I2Cs */ + PD17_PF_I2C_DATA, + PD18_PF_I2C_CLK, + PC5_PF_I2C2_SDA, + PC6_PF_I2C2_SCL, + /* USB OTG */ + OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT, + PC9_PF_USBOTG_DATA0, + PC11_PF_USBOTG_DATA1, + PC10_PF_USBOTG_DATA2, + PC13_PF_USBOTG_DATA3, + PC12_PF_USBOTG_DATA4, + PC7_PF_USBOTG_DATA5, + PC8_PF_USBOTG_DATA6, + PE25_PF_USBOTG_DATA7, + PE24_PF_USBOTG_CLK, + PE2_PF_USBOTG_DIR, + PE0_PF_USBOTG_NXT, + PE1_PF_USBOTG_STP, + PB23_PF_USB_PWR, + PB24_PF_USB_OC, +}; + +/* GPIOs used as events for applications */ +static struct gpio_keys_button visstrim_gpio_keys[] = { + { + .type = EV_KEY, + .code = KEY_RESTART, + .gpio = (GPIO_PORTC + 15), + .desc = "Default config", + .active_low = 0, + .wakeup = 1, + }, + { + .type = EV_KEY, + .code = KEY_RECORD, + .gpio = (GPIO_PORTF + 14), + .desc = "Record", + .active_low = 0, + .wakeup = 1, + }, + { + .type = EV_KEY, + .code = KEY_STOP, + .gpio = (GPIO_PORTF + 13), + .desc = "Stop", + .active_low = 0, + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data visstrim_gpio_keys_platform_data = { + .buttons = visstrim_gpio_keys, + .nbuttons = ARRAY_SIZE(visstrim_gpio_keys), +}; + +static struct platform_device visstrim_gpio_keys_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &visstrim_gpio_keys_platform_data, + }, +}; + +/* Visstrim_SM10 has a microSD slot connected to sdhc1 */ +static int visstrim_m10_sdhc1_init(struct device *dev, + irq_handler_t detect_irq, void *data) +{ + int ret; + + ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING, + "mmc-detect", data); + return ret; +} + +static void visstrim_m10_sdhc1_exit(struct device *dev, void *data) +{ + free_irq(SDHC1_IRQ, data); +} + +static struct imxmmc_platform_data visstrim_m10_sdhc_pdata = { + .init = visstrim_m10_sdhc1_init, + .exit = visstrim_m10_sdhc1_exit, +}; + +/* Visstrim_SM10 NOR flash */ +static struct physmap_flash_data visstrim_m10_flash_data = { + .width = 2, +}; + +static struct resource visstrim_m10_flash_resource = { + .start = 0xc0000000, + .end = 0xc0000000 + SZ_64M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device visstrim_m10_nor_mtd_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &visstrim_m10_flash_data, + }, + .num_resources = 1, + .resource = &visstrim_m10_flash_resource, +}; + +static struct platform_device *platform_devices[] __initdata = { + &visstrim_gpio_keys_device, + &visstrim_m10_nor_mtd_device, + &mxc_fec_device, +}; + +/* Visstrim_M10 uses UART0 as console */ +static const struct imxuart_platform_data uart_pdata __initconst = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +/* I2C */ +static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = { + .bitrate = 100000, +}; + +static struct pca953x_platform_data visstrim_m10_pca9555_pdata = { + .gpio_base = 240, /* After MX27 internal GPIOs */ + .invert = 0, +}; + +static struct i2c_board_info visstrim_m10_i2c_devices[] = { + { + I2C_BOARD_INFO("pca9555", 0x20), + .platform_data = &visstrim_m10_pca9555_pdata, + }, +}; + +/* USB OTG */ +static int otg_phy_init(struct platform_device *pdev) +{ + gpio_set_value(OTG_PHY_CS_GPIO, 0); + return 0; +} + +static struct mxc_usbh_platform_data visstrim_m10_usbotg_pdata = { + .init = otg_phy_init, + .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, + .flags = MXC_EHCI_POWER_PINS_ENABLED, +}; + +static void __init visstrim_m10_board_init(void) +{ + int ret; + + ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins, + ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10"); + if (ret) + pr_err("Failed to setup pins (%d)\n", ret); + + imx27_add_imx_uart0(&uart_pdata); + + i2c_register_board_info(0, visstrim_m10_i2c_devices, + ARRAY_SIZE(visstrim_m10_i2c_devices)); + imx27_add_i2c_imx0(&visstrim_m10_i2c_data); + imx27_add_i2c_imx1(&visstrim_m10_i2c_data); + mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata); + mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); + platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); +} + +static void __init visstrim_m10_timer_init(void) +{ + mx27_clocks_init((unsigned long)25000000); +} + +static struct sys_timer visstrim_m10_timer = { + .init = visstrim_m10_timer_init, +}; + +MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = MX27_PHYS_OFFSET + 0x100, + .map_io = mx27_map_io, + .init_irq = mx27_init_irq, + .init_machine = visstrim_m10_board_init, + .timer = &visstrim_m10_timer, +MACHINE_END From d17e1c1ac3a1e4befecb34c20dc8cb901aa72aba Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 18 Aug 2010 18:20:24 +0200 Subject: [PATCH 02/72] ARM: mx3/mx35_3ds: add physmap-flash NOR at CS0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mx35_3ds comes with 64 MiByte for NOR flash at CS0, add physmap-flash platform device for it. Signed-off-by: Marc Kleine-Budde Signed-off-by: Michael Grzeschik Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx3/mach-mx35_3ds.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index 1c30d7212f17..73149b8fe92c 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -1,5 +1,6 @@ /* * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix * * Author: Fabio Estevam * @@ -27,6 +28,8 @@ #include #include +#include + #include #include #include @@ -43,8 +46,29 @@ static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; +static struct physmap_flash_data mx35pdk_flash_data = { + .width = 2, +}; + +static struct resource mx35pdk_flash_resource = { + .start = MX35_CS0_BASE_ADDR, + .end = MX35_CS0_BASE_ADDR + SZ_64M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device mx35pdk_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &mx35pdk_flash_data, + }, + .resource = &mx35pdk_flash_resource, + .num_resources = 1, +}; + static struct platform_device *devices[] __initdata = { &mxc_fec_device, + &mx35pdk_flash, }; static struct pad_desc mx35pdk_pads[] = { From 81aa17207b3c50f32be31a1be949e98c660da5f1 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 18 Aug 2010 18:22:59 +0200 Subject: [PATCH 03/72] ARM: mx3/mx35_3ds: add NAND flash MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mx35_3ds comes with 2 GiByte NAND flash. This adds the corresponding platform device. Signed-off-by: Marc Kleine-Budde Signed-off-by: Michael Grzeschik Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx3/Kconfig | 1 + arch/arm/mach-mx3/mach-mx35_3ds.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 85beece802aa..2ae10885635a 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -140,6 +140,7 @@ config MACH_MX35_3DS bool "Support MX35PDK platform" select ARCH_MX35 select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_NAND default n help Include support for MX35PDK platform. This includes specific diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index 73149b8fe92c..b3629e735606 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -66,6 +66,12 @@ static struct platform_device mx35pdk_flash = { .num_resources = 1, }; +static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = { + .width = 1, + .hw_ecc = 1, + .flash_bbt = 1, +}; + static struct platform_device *devices[] __initdata = { &mxc_fec_device, &mx35pdk_flash, @@ -119,6 +125,8 @@ static void __init mxc_board_init(void) imx35_add_imx_uart0(&uart_pdata); mxc_register_device(&mxc_otg_udc_device, &usb_pdata); + + imx35_add_mxc_nand(&mx35pdk_nand_board_info); } static void __init mx35pdk_timer_init(void) From 79a11b0ba4a4e2f042b143e6ac0813d6fab90626 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 18 Aug 2010 17:56:44 +0200 Subject: [PATCH 04/72] ARM: mx3/mx35_3ds: rename usb otg platform data variable name MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename the variable holding the usb otg platform data to avoid clash with usb host platform data variable. usb_pdata -> usb_otg_pdata Signed-off-by: Marc Kleine-Budde Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx3/mach-mx35_3ds.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index b3629e735606..ae0f17cc8d73 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -108,7 +108,7 @@ static struct pad_desc mx35pdk_pads[] = { }; /* OTG config */ -static struct fsl_usb2_platform_data usb_pdata = { +static struct fsl_usb2_platform_data usb_otg_pdata = { .operating_mode = FSL_USB2_DR_DEVICE, .phy_mode = FSL_USB2_PHY_UTMI_WIDE, }; @@ -124,7 +124,7 @@ static void __init mxc_board_init(void) imx35_add_imx_uart0(&uart_pdata); - mxc_register_device(&mxc_otg_udc_device, &usb_pdata); + mxc_register_device(&mxc_otg_udc_device, &usb_otg_pdata); imx35_add_mxc_nand(&mx35pdk_nand_board_info); } From ab3d8b5859234d1d60b9592e9e9c5eaa9bb55678 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 18 Aug 2010 18:26:42 +0200 Subject: [PATCH 05/72] ARM: mx3/mx35_3ds: add usb host2 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit we still have to toggle two pins on the mc9sdz60: /* MUX3_CTR to be low for USB Host2 DP&DM */ pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 6, 0); /* CAN_PWDN to be high for USB Host2 Power&OC */ pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 1, 1); until we've a proper driver for the mx9sdz60 in linux we'll do this in barebox (a.k.a. u-boot-v2) Signed-off-by: Marc Kleine-Budde Signed-off-by: Michael Grzeschik Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx3/mach-mx35_3ds.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index ae0f17cc8d73..1dd7baae4507 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "devices-imx35.h" #include "devices.h" @@ -105,6 +106,9 @@ static struct pad_desc mx35pdk_pads[] = { /* USBOTG */ MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, + /* USBH1 */ + MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR, + MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC, }; /* OTG config */ @@ -113,6 +117,13 @@ static struct fsl_usb2_platform_data usb_otg_pdata = { .phy_mode = FSL_USB2_PHY_UTMI_WIDE, }; +/* USB HOST config */ +static struct mxc_usbh_platform_data usb_host_pdata = { + .portsc = MXC_EHCI_MODE_SERIAL, + .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | + MXC_EHCI_INTERNAL_PHY, +}; + /* * Board specific initialization. */ @@ -126,6 +137,8 @@ static void __init mxc_board_init(void) mxc_register_device(&mxc_otg_udc_device, &usb_otg_pdata); + mxc_register_device(&mxc_usbh1, &usb_host_pdata); + imx35_add_mxc_nand(&mx35pdk_nand_board_info); } From f2b8901d3efe5e1603c8f6a102b2d5c851c108c6 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 Aug 2010 14:08:04 +0200 Subject: [PATCH 06/72] ARM: imx: Add EPIT support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Enhanced Periodic Interrupt Timer (EPIT) is found on newer i.MX SoCs and can be used as an alternative system timer. Signed-off-by: Sascha Hauer Signed-off-by: Michael Grzeschik Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/Kconfig | 12 ++ arch/arm/plat-mxc/Makefile | 1 + arch/arm/plat-mxc/epit.c | 242 ++++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/common.h | 1 + 4 files changed, 256 insertions(+) create mode 100644 arch/arm/plat-mxc/epit.c diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 6785db4179b8..95f8d614d4fc 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -92,6 +92,18 @@ config MXC_DEBUG_BOARD data/address de-multiplexing and decode, signal level shift, interrupt control and various board functions. +config HAVE_EPIT + bool + +config MXC_USE_EPIT + bool "Use EPIT instead of GPT" + depends on HAVE_EPIT + help + Use EPIT as the system timer on systems that have it. Normally you + don't have a reason to do so as the EPIT has the same features and + uses the same clocks as the GPT. Anyway, on some systems the GPT + may be in use for other purposes. + config MXC_ULPI bool diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index 78d405ed8616..bb3443f9751a 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o obj-$(CONFIG_MXC_PWM) += pwm.o obj-$(CONFIG_USB_EHCI_MXC) += ehci.o obj-$(CONFIG_MXC_ULPI) += ulpi.o +obj-$(CONFIG_MXC_USE_EPIT) += epit.o obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/plat-mxc/epit.c new file mode 100644 index 000000000000..ee9582f4972e --- /dev/null +++ b/arch/arm/plat-mxc/epit.c @@ -0,0 +1,242 @@ +/* + * linux/arch/arm/plat-mxc/epit.c + * + * Copyright (C) 2010 Sascha Hauer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#define EPITCR 0x00 +#define EPITSR 0x04 +#define EPITLR 0x08 +#define EPITCMPR 0x0c +#define EPITCNR 0x10 + +#define EPITCR_EN (1 << 0) +#define EPITCR_ENMOD (1 << 1) +#define EPITCR_OCIEN (1 << 2) +#define EPITCR_RLD (1 << 3) +#define EPITCR_PRESC(x) (((x) & 0xfff) << 4) +#define EPITCR_SWR (1 << 16) +#define EPITCR_IOVW (1 << 17) +#define EPITCR_DBGEN (1 << 18) +#define EPITCR_WAITEN (1 << 19) +#define EPITCR_RES (1 << 20) +#define EPITCR_STOPEN (1 << 21) +#define EPITCR_OM_DISCON (0 << 22) +#define EPITCR_OM_TOGGLE (1 << 22) +#define EPITCR_OM_CLEAR (2 << 22) +#define EPITCR_OM_SET (3 << 22) +#define EPITCR_CLKSRC_OFF (0 << 24) +#define EPITCR_CLKSRC_PERIPHERAL (1 << 24) +#define EPITCR_CLKSRC_REF_HIGH (1 << 24) +#define EPITCR_CLKSRC_REF_LOW (3 << 24) + +#define EPITSR_OCIF (1 << 0) + +#include +#include +#include +#include + +#include +#include +#include + +static struct clock_event_device clockevent_epit; +static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; + +static void __iomem *timer_base; + +static inline void epit_irq_disable(void) +{ + u32 val; + + val = __raw_readl(timer_base + EPITCR); + val &= ~EPITCR_OCIEN; + __raw_writel(val, timer_base + EPITCR); +} + +static inline void epit_irq_enable(void) +{ + u32 val; + + val = __raw_readl(timer_base + EPITCR); + val |= EPITCR_OCIEN; + __raw_writel(val, timer_base + EPITCR); +} + +static void epit_irq_acknowledge(void) +{ + __raw_writel(EPITSR_OCIF, timer_base + EPITSR); +} + +static cycle_t epit_read(struct clocksource *cs) +{ + return 0 - __raw_readl(timer_base + EPITCNR); +} + +static struct clocksource clocksource_epit = { + .name = "epit", + .rating = 200, + .read = epit_read, + .mask = CLOCKSOURCE_MASK(32), + .shift = 20, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static int __init epit_clocksource_init(struct clk *timer_clk) +{ + unsigned int c = clk_get_rate(timer_clk); + + clocksource_epit.mult = clocksource_hz2mult(c, + clocksource_epit.shift); + clocksource_register(&clocksource_epit); + + return 0; +} + +/* clock event */ + +static int epit_set_next_event(unsigned long evt, + struct clock_event_device *unused) +{ + unsigned long tcmp; + + tcmp = __raw_readl(timer_base + EPITCNR); + + __raw_writel(tcmp - evt, timer_base + EPITCMPR); + + return 0; +} + +static void epit_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + unsigned long flags; + + /* + * The timer interrupt generation is disabled at least + * for enough time to call epit_set_next_event() + */ + local_irq_save(flags); + + /* Disable interrupt in GPT module */ + epit_irq_disable(); + + if (mode != clockevent_mode) { + /* Set event time into far-far future */ + + /* Clear pending interrupt */ + epit_irq_acknowledge(); + } + + /* Remember timer mode */ + clockevent_mode = mode; + local_irq_restore(flags); + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + printk(KERN_ERR "epit_set_mode: Periodic mode is not " + "supported for i.MX EPIT\n"); + break; + case CLOCK_EVT_MODE_ONESHOT: + /* + * Do not put overhead of interrupt enable/disable into + * epit_set_next_event(), the core has about 4 minutes + * to call epit_set_next_event() or shutdown clock after + * mode switching + */ + local_irq_save(flags); + epit_irq_enable(); + local_irq_restore(flags); + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_RESUME: + /* Left event sources disabled, no more interrupts appear */ + break; + } +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t epit_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = &clockevent_epit; + + epit_irq_acknowledge(); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static struct irqaction epit_timer_irq = { + .name = "i.MX EPIT Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = epit_timer_interrupt, +}; + +static struct clock_event_device clockevent_epit = { + .name = "epit", + .features = CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + .set_mode = epit_set_mode, + .set_next_event = epit_set_next_event, + .rating = 200, +}; + +static int __init epit_clockevent_init(struct clk *timer_clk) +{ + unsigned int c = clk_get_rate(timer_clk); + + clockevent_epit.mult = div_sc(c, NSEC_PER_SEC, + clockevent_epit.shift); + clockevent_epit.max_delta_ns = + clockevent_delta2ns(0xfffffffe, &clockevent_epit); + clockevent_epit.min_delta_ns = + clockevent_delta2ns(0x800, &clockevent_epit); + + clockevent_epit.cpumask = cpumask_of(0); + + clockevents_register_device(&clockevent_epit); + + return 0; +} + +void __init epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq) +{ + clk_enable(timer_clk); + + timer_base = base; + + /* + * Initialise to a known state (all timers off, and timing reset) + */ + __raw_writel(0x0, timer_base + EPITCR); + + __raw_writel(0xffffffff, timer_base + EPITLR); + __raw_writel(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN, + timer_base + EPITCR); + + /* init and register the timer to the framework */ + epit_clocksource_init(timer_clk); + epit_clockevent_init(timer_clk); + + /* Make irqs happen */ + setup_irq(irq, &epit_timer_irq); +} diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 2941472582d2..7a1e1f89ff09 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -32,6 +32,7 @@ extern void mx31_init_irq(void); extern void mx35_init_irq(void); extern void mx51_init_irq(void); extern void mxc91231_init_irq(void); +extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); extern int mx1_clocks_init(unsigned long fref); extern int mx21_clocks_init(unsigned long lref, unsigned long fref); From bd45140d98b60c8ddef8f053ad1645dc1572a15a Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 Aug 2010 14:08:05 +0200 Subject: [PATCH 07/72] ARM: mx3/imx35: Add EPIT support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Sascha Hauer Signed-off-by: Michael Grzeschik Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx3/Kconfig | 1 + arch/arm/mach-mx3/clock-imx35.c | 13 +++++++++---- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 2ae10885635a..5cee1a5c4bd2 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -9,6 +9,7 @@ config ARCH_MX35 bool select ARCH_MXC_IOMUX_V3 select ARCH_MXC_AUDMUX_V2 + select HAVE_EPIT comment "MX3 platforms:" diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index 7a62e744a8b0..f11ef990120c 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -364,8 +364,8 @@ DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL); DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); -DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg_per, NULL); -DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg_per, NULL); +DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL); +DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL); DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); @@ -456,8 +456,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "ect", ect_clk) _REGISTER_CLOCK(NULL, "edio", edio_clk) _REGISTER_CLOCK(NULL, "emi", emi_clk) - _REGISTER_CLOCK(NULL, "epit", epit1_clk) - _REGISTER_CLOCK(NULL, "epit", epit2_clk) + _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk) + _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk) _REGISTER_CLOCK(NULL, "esai", esai_clk) _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) @@ -535,8 +535,13 @@ int __init mx35_clocks_init() __raw_writel(cgr2, CCM_BASE + CCM_CGR2); __raw_writel(cgr3, CCM_BASE + CCM_CGR3); +#ifdef CONFIG_MXC_USE_EPIT + epit_timer_init(&epit1_clk, + MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); +#else mxc_timer_init(&gpt_clk, MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); +#endif return 0; } From 3efee47db7a191443b529740b35240d63ae1ad20 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 23 Aug 2010 07:32:09 -0700 Subject: [PATCH 08/72] ARM: mx5/mx51_babbage: Add FEC support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested it by booting a rootfs via NFS. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx5/board-mx51_babbage.c | 43 ++++++++++++++++++++- arch/arm/plat-mxc/include/mach/iomux-mx51.h | 24 ++++++++++++ 2 files changed, 66 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 6e384d92e625..10d2f6bde172 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -35,7 +36,8 @@ #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */ #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */ -#define BABBAGE_PHY_RESET (1*32 +5) /* GPIO_2_5 */ +#define BABBAGE_PHY_RESET (1*32 + 5) /* GPIO_2_5 */ +#define BABBAGE_FEC_PHY_RESET (1*32 + 14) /* GPIO_2_14 */ /* USB_CTRL_1 */ #define MX51_USB_CTRL_1_OFFSET 0x10 @@ -93,6 +95,28 @@ static struct pad_desc mx51babbage_pads[] = { /* USB HUB reset line*/ MX51_PAD_GPIO_1_7__GPIO_1_7, + + /* FEC */ + MX51_PAD_EIM_EB2__FEC_MDIO, + MX51_PAD_EIM_EB3__FEC_RDAT1, + MX51_PAD_EIM_CS2__FEC_RDAT2, + MX51_PAD_EIM_CS3__FEC_RDAT3, + MX51_PAD_EIM_CS4__FEC_RX_ER, + MX51_PAD_EIM_CS5__FEC_CRS, + MX51_PAD_NANDF_RB2__FEC_COL, + MX51_PAD_NANDF_RB3__FEC_RXCLK, + MX51_PAD_NANDF_RB6__FEC_RDAT0, + MX51_PAD_NANDF_RB7__FEC_TDAT0, + MX51_PAD_NANDF_CS2__FEC_TX_ER, + MX51_PAD_NANDF_CS3__FEC_MDC, + MX51_PAD_NANDF_CS4__FEC_TDAT1, + MX51_PAD_NANDF_CS5__FEC_TDAT2, + MX51_PAD_NANDF_CS6__FEC_TDAT3, + MX51_PAD_NANDF_CS7__FEC_TX_EN, + MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK, + + /* FEC PHY reset line */ + MX51_PAD_EIM_A20__GPIO_2_14, }; /* Serial ports */ @@ -171,6 +195,22 @@ static inline void babbage_usbhub_reset(void) gpio_set_value(BABBAGE_USB_HUB_RESET, 1); } +static inline void babbage_fec_reset(void) +{ + int ret; + + /* reset FEC PHY */ + ret = gpio_request(BABBAGE_FEC_PHY_RESET, "fec-phy-reset"); + if (ret) { + printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); + return; + } + gpio_direction_output(BABBAGE_FEC_PHY_RESET, 0); + gpio_set_value(BABBAGE_FEC_PHY_RESET, 0); + msleep(1); + gpio_set_value(BABBAGE_FEC_PHY_RESET, 1); +} + /* This function is board specific as the bit mask for the plldiv will also be different for other Freescale SoCs, thus a common bitmask is not possible and cannot get place in /plat-mxc/ehci.c.*/ @@ -250,6 +290,7 @@ static void __init mxc_board_init(void) mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, ARRAY_SIZE(mx51babbage_pads)); mxc_init_imx_uart(); + babbage_fec_reset(); platform_add_devices(devices, ARRAY_SIZE(devices)); mxc_register_device(&mxc_i2c_device0, &babbage_i2c_data); diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index 21bfa46785bb..0d77be3a2374 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h @@ -46,6 +46,13 @@ typedef enum iomux_config { #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \ PAD_CTL_SRE_FAST) +#define MX51_PAD_CTRL_1 (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_HYS) +#define MX51_PAD_CTRL_2 (PAD_CTL_HYS | PAD_CTL_PKE) +#define MX51_PAD_CTRL_3 (PAD_CTL_PKE | PAD_CTL_PUS_100K_UP) +#define MX51_PAD_CTRL_4 (PAD_CTL_DVS | PAD_CTL_HYS | PAD_CTL_PKE) +#define MX51_PAD_CTRL_5 (PAD_CTL_DVS | PAD_CTL_DSE_HIGH) + /* * The naming convention for the pad modes is MX51_PAD___ * If or refers to a GPIO, it is named GPIO__ @@ -106,14 +113,20 @@ typedef enum iomux_config { #define MX51_PAD_EIM_EB0__EIM_EB0 IOMUX_PAD(0x460, 0x0cc, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_EB1__EIM_EB1 IOMUX_PAD(0x464, 0x0d0, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_EB2__GPIO_2_22 IOMUX_PAD(0x468, 0x0d4, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_EB2__FEC_MDIO IOMUX_PAD(0x468, 0x0d4, 3, 0x0, 0, MX51_PAD_CTRL_1 | PAD_CTL_PUS_22K_UP) #define MX51_PAD_EIM_EB3__GPIO_2_23 IOMUX_PAD(0x46c, 0x0d8, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_EB3__FEC_RDAT1 IOMUX_PAD(0x46c, 0x0d8, 3, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_EIM_OE__GPIO_2_24 IOMUX_PAD(0x470, 0x0dc, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_CS0__GPIO_2_25 IOMUX_PAD(0x474, 0x0e0, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_CS1__GPIO_2_26 IOMUX_PAD(0x478, 0x0e4, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_CS2__GPIO_2_27 IOMUX_PAD(0x47c, 0x0e8, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_CS2__FEC_RDAT2 IOMUX_PAD(0x47c, 0x0e8, 3, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_EIM_CS3__GPIO_2_28 IOMUX_PAD(0x480, 0x0ec, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_CS3__FEC_RDAT3 IOMUX_PAD(0x480, 0x0ec, 3, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_EIM_CS4__GPIO_2_29 IOMUX_PAD(0x484, 0x0f0, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_CS4__FEC_RX_ER IOMUX_PAD(0x484, 0x0f0, 3, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_EIM_CS5__GPIO_2_30 IOMUX_PAD(0x488, 0x0f4, 1, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_CS5__FEC_CRS IOMUX_PAD(0x488, 0x0f4, 3, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_EIM_DTACK__GPIO_2_31 IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_LBA__GPIO_3_1 IOMUX_PAD(0x494, 0x0FC, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_CRE__GPIO_3_2 IOMUX_PAD(0x4A0, 0x100, 1, 0x0, 0, NO_PAD_CTRL) @@ -126,17 +139,28 @@ typedef enum iomux_config { #define MX51_PAD_NANDF_RB0__GPIO_3_8 IOMUX_PAD(0x4F8, 0x11C, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB1__GPIO_3_9 IOMUX_PAD(0x4FC, 0x120, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB2__GPIO_3_10 IOMUX_PAD(0x500, 0x124, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RB2__FEC_COL IOMUX_PAD(0x500, 0x124, 1, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_NANDF_RB3__GPIO_3_11 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RB3__FEC_RXCLK IOMUX_PAD(0x504, 0x128, 1, 0x0, 0, MX51_PAD_CTRL_2) +#define MX51_PAD_NANDF_RB6__FEC_RDAT0 IOMUX_PAD(0x5DC, 0x134, 1, 0x0, 0, MX51_PAD_CTRL_4) +#define MX51_PAD_NANDF_RB7__FEC_TDAT0 IOMUX_PAD(0x5E0, 0x138, 1, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_GPIO_NAND__GPIO_3_12 IOMUX_PAD(0x514, 0x12C, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_CS0__GPIO_3_16 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_CS1__GPIO_3_17 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_CS2__GPIO_3_18 IOMUX_PAD(0x520, 0x138, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_CS2__FEC_TX_ER IOMUX_PAD(0x520, 0x138, 2, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_NANDF_CS3__GPIO_3_19 IOMUX_PAD(0x524, 0x13C, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_CS3__FEC_MDC IOMUX_PAD(0x524, 0x13C, 2, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_NANDF_CS4__GPIO_3_20 IOMUX_PAD(0x528, 0x140, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_CS4__FEC_TDAT1 IOMUX_PAD(0x528, 0x140, 2, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_NANDF_CS5__GPIO_3_21 IOMUX_PAD(0x52C, 0x144, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_CS5__FEC_TDAT2 IOMUX_PAD(0x52C, 0x144, 2, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_NANDF_CS6__GPIO_3_22 IOMUX_PAD(0x530, 0x148, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_CS6__FEC_TDAT3 IOMUX_PAD(0x530, 0x148, 2, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_NANDF_CS7__GPIO_3_23 IOMUX_PAD(0x534, 0x14C, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_CS7__FEC_TX_EN IOMUX_PAD(0x534, 0x14C, 1, 0x0, 0, MX51_PAD_CTRL_5) #define MX51_PAD_NANDF_RDY_INT__GPIO_3_24 IOMUX_PAD(0x538, 0x150, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x0, 0, MX51_PAD_CTRL_4) #define MX51_PAD_NANDF_D15__GPIO_3_25 IOMUX_PAD(0x53C, 0x154, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_D14__GPIO_3_26 IOMUX_PAD(0x540, 0x158, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_D13__GPIO_3_27 IOMUX_PAD(0x544, 0x15C, 3, 0x0, 0, NO_PAD_CTRL) From 556cbdbf23fb43433dba9657ad194a36be18f81b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Sat, 14 Aug 2010 14:00:16 +0200 Subject: [PATCH 09/72] ARM: imx: remove #ifdefery for unmerged flexcan driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The flexcan driver was merged as e955cead. Cc: Sascha Hauer Acked-by: Marc Kleine-Budde Cc: Wolfgang Grandegger Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/devices/Makefile | 5 +---- arch/arm/plat-mxc/include/mach/devices-common.h | 12 ------------ 2 files changed, 1 insertion(+), 16 deletions(-) diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 347da5161f7e..2062ab4d094d 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -1,7 +1,4 @@ -ifdef CONFIG_CAN_FLEXCAN -# the ifdef can be removed once the flexcan driver has been merged -obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o -endif +obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index c5f68c587309..4a170a8da26c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -14,23 +14,11 @@ struct platform_device *imx_add_platform_device(const char *name, int id, const struct resource *res, unsigned int num_resources, const void *data, size_t size_data); -#if defined (CONFIG_CAN_FLEXCAN) || defined (CONFIG_CAN_FLEXCAN_MODULE) #include struct platform_device *__init imx_add_flexcan(int id, resource_size_t iobase, resource_size_t iosize, resource_size_t irq, const struct flexcan_platform_data *pdata); -#else -/* the ifdef can be removed once the flexcan driver has been merged */ -struct flexcan_platform_data; -static inline struct platform_device *__init imx_add_flexcan(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irq, - const struct flexcan_platform_data *pdata) -{ - return NULL; -} -#endif #include struct platform_device *__init imx_add_imx_i2c(int id, From a060656240af125b22b1c011944377ff4216ac3e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 13 Aug 2010 17:34:05 +0200 Subject: [PATCH 10/72] ARM: imx: ehci: use void __iomem * to hold i/o addresses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes: arch/arm/plat-mxc/ehci.c: In function 'mxc_initialize_usb_hw': arch/arm/plat-mxc/ehci.c:260: warning: assignment makes integer from pointer without a cast arch/arm/plat-mxc/ehci.c:263: warning: assignment makes integer from pointer without a cast arch/arm/plat-mxc/ehci.c:270: warning: assignment makes integer from pointer without a cast Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/ehci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c index 35a064ff02ba..9915607683de 100644 --- a/arch/arm/plat-mxc/ehci.c +++ b/arch/arm/plat-mxc/ehci.c @@ -249,8 +249,8 @@ int mxc_initialize_usb_hw(int port, unsigned int flags) #ifdef CONFIG_ARCH_MX51 if (cpu_is_mx51()) { void __iomem *usb_base; - u32 usbotg_base; - u32 usbother_base; + void __iomem *usbotg_base; + void __iomem *usbother_base; int ret = 0; usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); From e7a895bf64e9360499d04b80fa33b0ad93546d44 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 Aug 2010 11:37:31 +0200 Subject: [PATCH 11/72] ARM: mx5/mx51_babbage: fix compiler warnings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx5/board-mx51_babbage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 10d2f6bde172..3ef1214cb0d4 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -218,7 +218,7 @@ static int initialize_otg_port(struct platform_device *pdev) { u32 v; void __iomem *usb_base; - u32 usbother_base; + void __iomem *usbother_base; usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; @@ -236,7 +236,7 @@ static int initialize_usbh1_port(struct platform_device *pdev) { u32 v; void __iomem *usb_base; - u32 usbother_base; + void __iomem *usbother_base; usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; From e16ddb3ad2b42d7c906748dc3bc3f393ddb94c67 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 24 Aug 2010 12:33:23 +0200 Subject: [PATCH 12/72] ARM: mx5/mx51_babbage: don't use PHYS_OFFSET MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mx5/board-mx51_babbage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 3ef1214cb0d4..caa8f680649e 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -324,7 +324,7 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") /* Maintainer: Amit Kucheria */ .phys_io = MX51_AIPS1_BASE_ADDR, .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, - .boot_params = PHYS_OFFSET + 0x100, + .boot_params = MX51_PHYS_OFFSET + 0x100, .map_io = mx51_map_io, .init_irq = mx51_init_irq, .init_machine = mxc_board_init, From 0ac15c884eceaf5b0917d4d28d86ff1bb4845d37 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 21 Sep 2010 12:35:41 +0200 Subject: [PATCH 13/72] ARM: mx27_defconfig: enable switches used in mx27 code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - enable all mx27 machines (MACH_CPUIMX27, MACH_IMX27_VISSTRIM_M10, MACH_PCA100, MACH_MXT_TD60) including optional features for CPUIMX27 - eukrea_mbimx27-baseboard.c uses TOUCHSCREEN_ADS7846 - mach-cpuimx27.c uses SERIAL_8250 - several machines make use of SPI_IMX (selects SPI_BITBANG) - drop VGA_CONSOLE as this isn't selectable anymore since fb78b51cb11e - several machines make use of USB_ULPI (depends on USB, but don't enable USB_DEVICE_CLASS as it's deprecated) Signed-off-by: Uwe Kleine-König --- arch/arm/configs/mx27_defconfig | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig index b2038b0e266f..813cfb366c18 100644 --- a/arch/arm/configs/mx27_defconfig +++ b/arch/arm/configs/mx27_defconfig @@ -21,8 +21,14 @@ CONFIG_ARCH_MX2=y CONFIG_MACH_MX27=y CONFIG_MACH_MX27ADS=y CONFIG_MACH_PCM038=y +CONFIG_MACH_CPUIMX27=y +CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2=y +CONFIG_MACH_EUKREA_CPUIMX27_USEUART4=y CONFIG_MACH_MX27_3DS=y +CONFIG_MACH_IMX27_VISSTRIM_M10=y CONFIG_MACH_IMX27LITE=y +CONFIG_MACH_PCA100=y +CONFIG_MACH_MXT_TD60=y CONFIG_MXC_IRQ_PRIOR=y CONFIG_MXC_PWM=y CONFIG_NO_HZ=y @@ -76,7 +82,9 @@ CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m # CONFIG_SERIO is not set +CONFIG_SERIAL_8250=m CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y # CONFIG_LEGACY_PTYS is not set @@ -85,19 +93,20 @@ CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_IMX=y CONFIG_SPI=y -CONFIG_SPI_BITBANG=y +CONFIG_SPI_IMX=y CONFIG_W1=y CONFIG_W1_MASTER_MXC=y CONFIG_W1_SLAVE_THERM=y # CONFIG_HWMON is not set CONFIG_FB=y CONFIG_FB_IMX=y -# CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FONTS=y CONFIG_FONT_8x8=y # CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set +CONFIG_USB=m +# CONFIG_USB_DEVICE_CLASS is not set +CONFIG_USB_ULPI=y CONFIG_MMC=y CONFIG_MMC_MXC=y CONFIG_RTC_CLASS=y From 801561cdda3027a0d1e0e15a3772e5dab5af7c65 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 13 Aug 2010 12:38:56 +0200 Subject: [PATCH 14/72] ARM: mx3_defconfig: add new machine MACH_EUKREA_CPUIMX35 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Furthermore INOTIFY is gone since 2dfc1ca (inotify: remove inotify in kernel interface) Signed-off-by: Uwe Kleine-König --- arch/arm/configs/mx3_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig index 161f907b611f..f0c339fd5d21 100644 --- a/arch/arm/configs/mx3_defconfig +++ b/arch/arm/configs/mx3_defconfig @@ -24,6 +24,7 @@ CONFIG_MACH_PCM043=y CONFIG_MACH_ARMADILLO5X0=y CONFIG_MACH_MX35_3DS=y CONFIG_MACH_KZM_ARM11_01=y +CONFIG_MACH_EUKREA_CPUIMX35=y CONFIG_MXC_IRQ_PRIOR=y CONFIG_MXC_PWM=y CONFIG_NO_HZ=y @@ -108,7 +109,6 @@ CONFIG_MMC=y CONFIG_MMC_MXC=y CONFIG_DMADEVICES=y # CONFIG_DNOTIFY is not set -CONFIG_INOTIFY=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y CONFIG_UBIFS_FS=y From ea9a9b2ba239792be57d8601f57a4971958ebad5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 11 Aug 2010 07:32:33 +0200 Subject: [PATCH 15/72] ARM: remove mx31pdk_defconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This machine is enabled in mx3_defconfig and so mx31pdk_defconfig isn't really useful. Signed-off-by: Uwe Kleine-König --- arch/arm/configs/mx31pdk_defconfig | 44 ------------------------------ 1 file changed, 44 deletions(-) delete mode 100644 arch/arm/configs/mx31pdk_defconfig diff --git a/arch/arm/configs/mx31pdk_defconfig b/arch/arm/configs/mx31pdk_defconfig deleted file mode 100644 index 2d29329749e4..000000000000 --- a/arch/arm/configs/mx31pdk_defconfig +++ /dev/null @@ -1,44 +0,0 @@ -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_MXC=y -# CONFIG_MACH_MX31ADS is not set -CONFIG_MACH_MX31_3DS=y -CONFIG_AEABI=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_NET_KEY=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_LRO is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FIRMWARE_IN_KERNEL is not set -# CONFIG_BLK_DEV is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_DEVKMEM is not set -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_DNOTIFY is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRC32 is not set From 6470310865dc8d7ed78f0df8f4c7f7e39c7bab99 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 21 Sep 2010 10:46:15 +0200 Subject: [PATCH 16/72] ARM: mx51_defconfig: add new boards MACH_MX51_3DS and MACH_EUKREA_CPUIMX51 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Further remove FIXED_PHY as it breaks the ethernet. VGA_CONSOLE isn't selectable anymore since fb78b51cb11e. EXT3_DEFAULTS_TO_ORDERED defaults to y since aa32a796389b. INOTIFY is gone since 2dfc1cae4c42. CONFIG_DETECT_SOFTLOCKUP is gone since e16bb1d7fe07. Enable TMPFS for udev. KEYS is selected by NFS_USE_KERNEL_DNS Signed-off-by: Uwe Kleine-König --- arch/arm/configs/mx51_defconfig | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index a665ecbbe2bc..163cfee7644c 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig @@ -15,6 +15,8 @@ CONFIG_MODULE_SRCVERSION_ALL=y CONFIG_ARCH_MXC=y CONFIG_ARCH_MX5=y CONFIG_MACH_MX51_BABBAGE=y +CONFIG_MACH_MX51_3DS=y +CONFIG_MACH_EUKREA_CPUIMX51=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_PREEMPT_VOLUNTARY=y @@ -69,7 +71,6 @@ CONFIG_REALTEK_PHY=y CONFIG_NATIONAL_PHY=y CONFIG_STE10XP=y CONFIG_LSI_ET1011C_PHY=y -CONFIG_FIXED_PHY=y CONFIG_MDIO_BITBANG=y CONFIG_MDIO_GPIO=y CONFIG_NET_ETHERNET=y @@ -100,7 +101,6 @@ CONFIG_I2C_ALGOPCF=m CONFIG_I2C_ALGOPCA=m CONFIG_GPIO_SYSFS=y # CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set # CONFIG_HID_SUPPORT is not set CONFIG_USB=y CONFIG_USB_EHCI_HCD=y @@ -117,13 +117,11 @@ CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y -CONFIG_EXT3_DEFAULTS_TO_ORDERED=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y -CONFIG_INOTIFY=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_PRINT_QUOTA_WARNING is not set @@ -136,6 +134,7 @@ CONFIG_ZISOFS=y CONFIG_UDF_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=y +CONFIG_TMPFS=y CONFIG_CONFIGFS_FS=m CONFIG_NFS_FS=y CONFIG_NFS_V3=y @@ -151,7 +150,6 @@ CONFIG_NLS_UTF8=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y -# CONFIG_DETECT_SOFTLOCKUP is not set # CONFIG_SCHED_DEBUG is not set # CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set @@ -159,7 +157,6 @@ CONFIG_DEBUG_KERNEL=y # CONFIG_ARM_UNWIND is not set CONFIG_DEBUG_LL=y CONFIG_EARLY_PRINTK=y -CONFIG_KEYS=y CONFIG_SECURITYFS=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y From 5a2db4e3865868c3bf230435fb312524c0e10bd4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 3 Aug 2010 16:03:26 +0200 Subject: [PATCH 17/72] ARM: mx51: clean up mx51 header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes the header more look like the other ones, i.e. - sort #defines by value - use lowercase hex constants - use a consistently named header guard Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/include/mach/mx51.h | 610 +++++++++++++------------- 1 file changed, 301 insertions(+), 309 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 5aad344d5651..92b39f7256e9 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -1,5 +1,5 @@ -#ifndef __ASM_ARCH_MXC_MX51_H__ -#define __ASM_ARCH_MXC_MX51_H__ +#ifndef __MACH_MX51_H__ +#define __MACH_MX51_H__ /* * MX51 memory map: @@ -7,24 +7,23 @@ * * Virt Phys Size What * --------------------------------------------------------------------------- - * FA3E0000 1FFE0000 128K IRAM (SCCv2 RAM) + * fa3e0000 1ffe0000 128K IRAM (SCCv2 RAM) * 30000000 256M GPU * 40000000 512M IPU - * FA200000 60000000 1M DEBUG - * FB100000 70000000 1M SPBA 0 - * FB000000 73F00000 1M AIPS 1 - * FB200000 83F00000 1M AIPS 2 - * 8FFFC000 16K TZIC (interrupt controller) + * fa200000 60000000 1M DEBUG + * fb100000 70000000 1M SPBA 0 + * fb000000 73f00000 1M AIPS 1 + * fb200000 83f00000 1M AIPS 2 + * 8fffc000 16K TZIC (interrupt controller) * 90000000 256M CSD0 SDRAM/DDR - * A0000000 256M CSD1 SDRAM/DDR - * B0000000 128M CS0 Flash - * B8000000 128M CS1 Flash - * C0000000 128M CS2 Flash - * C8000000 64M CS3 Flash - * CC000000 32M CS4 SRAM - * CE000000 32M CS5 SRAM - * CFFF0000 64K NFC (NAND Flash AXI) - * + * a0000000 256M CSD1 SDRAM/DDR + * b0000000 128M CS0 Flash + * b8000000 128M CS1 Flash + * c0000000 128M CS2 Flash + * c8000000 64M CS3 Flash + * cc000000 32M CS4 SRAM + * ce000000 32M CS5 SRAM + * cfff0000 64K NFC (NAND Flash AXI) */ /* @@ -36,65 +35,140 @@ /* * IRAM */ -#define MX51_IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ -#define MX51_IRAM_BASE_ADDR_VIRT 0xFA3E0000 +#define MX51_IRAM_BASE_ADDR 0x1ffe0000 /* internal ram */ +#define MX51_IRAM_BASE_ADDR_VIRT 0xfa3e0000 #define MX51_IRAM_PARTITIONS 16 -#define MX51_IRAM_PARTITIONS_TO1 12 #define MX51_IRAM_SIZE (MX51_IRAM_PARTITIONS * SZ_8K) /* 128KB */ -/* - * NFC - */ -#define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */ -#define MX51_NFC_AXI_SIZE SZ_64K - -/* - * Graphics Memory of GPU - */ #define MX51_GPU_BASE_ADDR 0x20000000 -#define MX51_GPU2D_BASE_ADDR 0xD0000000 - -#define MX51_TZIC_BASE_ADDR_TO1 0x8FFFC000 -#define MX51_TZIC_BASE_ADDR 0xE0000000 +#define MX51_GPU_CTRL_BASE_ADDR 0x30000000 +#define MX51_IPU_CTRL_BASE_ADDR 0x40000000 #define MX51_DEBUG_BASE_ADDR 0x60000000 -#define MX51_DEBUG_BASE_ADDR_VIRT 0xFA200000 +#define MX51_DEBUG_BASE_ADDR_VIRT 0xfa200000 #define MX51_DEBUG_SIZE SZ_1M -#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00001000) -#define MX51_ETM_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00002000) -#define MX51_TPIU_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00003000) -#define MX51_CTI0_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00004000) -#define MX51_CTI1_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00005000) -#define MX51_CTI2_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00006000) -#define MX51_CTI3_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00007000) -#define MX51_CORTEX_DBG_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x00008000) + +#define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x01000) +#define MX51_ETM_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x02000) +#define MX51_TPIU_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x03000) +#define MX51_CTI0_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x04000) +#define MX51_CTI1_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x05000) +#define MX51_CTI2_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x06000) +#define MX51_CTI3_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x07000) +#define MX51_CORTEX_DBG_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x08000) /* * SPBA global module enabled #0 */ -#define MX51_SPBA0_BASE_ADDR 0x70000000 -#define MX51_SPBA0_BASE_ADDR_VIRT 0xFB100000 +#define MX51_SPBA0_BASE_ADDR 0x70000000 +#define MX51_SPBA0_BASE_ADDR_VIRT 0xfb100000 #define MX51_SPBA0_SIZE SZ_1M -#define MX51_MMC_SDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00004000) -#define MX51_MMC_SDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00008000) -#define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0000C000) -#define MX51_CSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00010000) -#define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00014000) -#define MX51_MMC_SDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00020000) -#define MX51_MMC_SDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00024000) -#define MX51_SPDIF_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00028000) -#define MX51_ATA_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00030000) -#define MX51_SLIM_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00034000) -#define MX51_HSI2C_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x00038000) -#define MX51_SPBA_CTRL_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0003C000) +#define MX51_MMC_SDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) +#define MX51_MMC_SDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x08000) +#define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0c000) +#define MX51_CSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x10000) +#define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x14000) +#define MX51_MMC_SDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x20000) +#define MX51_MMC_SDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x24000) +#define MX51_SPDIF_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x28000) +#define MX51_ATA_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x30000) +#define MX51_SLIM_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x34000) +#define MX51_HSI2C_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x38000) +#define MX51_SPBA_CTRL_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x3c000) + +/* + * AIPS 1 + */ +#define MX51_AIPS1_BASE_ADDR 0x73f00000 +#define MX51_AIPS1_BASE_ADDR_VIRT 0xfb000000 +#define MX51_AIPS1_SIZE SZ_1M + +#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000) +#define MX51_GPIO1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x84000) +#define MX51_GPIO2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x88000) +#define MX51_GPIO3_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x8c000) +#define MX51_GPIO4_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x90000) +#define MX51_KPP_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x94000) +#define MX51_WDOG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x98000) +#define MX51_WDOG2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x9c000) +#define MX51_GPT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xa0000) +#define MX51_SRTC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xa4000) +#define MX51_IOMUXC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xa8000) +#define MX51_EPIT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xac000) +#define MX51_EPIT2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xb0000) +#define MX51_PWM1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xb4000) +#define MX51_PWM2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xb8000) +#define MX51_UART1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xbc000) +#define MX51_UART2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xc0000) +#define MX51_SRC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xd0000) +#define MX51_CCM_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xd4000) +#define MX51_GPC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xd8000) + +/* + * AIPS 2 + */ +#define MX51_AIPS2_BASE_ADDR 0x83f00000 +#define MX51_AIPS2_BASE_ADDR_VIRT 0xfb200000 +#define MX51_AIPS2_SIZE SZ_1M + +#define MX51_PLL1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x80000) +#define MX51_PLL2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x84000) +#define MX51_PLL3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x88000) +#define MX51_AHBMAX_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x94000) +#define MX51_IIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x98000) +#define MX51_CSU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x9c000) +#define MX51_ARM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xa0000) +#define MX51_OWIRE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xa4000) +#define MX51_FIRI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xa8000) +#define MX51_CSPI2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xac000) +#define MX51_SDMA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xb0000) +#define MX51_SCC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xb4000) +#define MX51_ROMCP_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xb8000) +#define MX51_RTIC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xbc000) +#define MX51_CSPI3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc0000) +#define MX51_I2C2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc4000) +#define MX51_I2C1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc8000) +#define MX51_SSI1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xcc000) +#define MX51_AUDMUX_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xd0000) +#define MX51_M4IF_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xd8000) +#define MX51_ESDCTL_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xd9000) +#define MX51_WEIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xda000) +#define MX51_NFC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xdb000) +#define MX51_EMI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xdbf00) +#define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xdc000) +#define MX51_ATA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe0000) +#define MX51_SIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe4000) +#define MX51_SSI3BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe8000) +#define MX51_MXC_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xec000) +#define MX51_TVE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf0000) +#define MX51_VPU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf4000) +#define MX51_SAHARA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf8000) + +#define MX51_CSD0_BASE_ADDR 0x90000000 +#define MX51_CSD1_BASE_ADDR 0xa0000000 +#define MX51_CS0_BASE_ADDR 0xb0000000 +#define MX51_CS1_BASE_ADDR 0xb8000000 +#define MX51_CS2_BASE_ADDR 0xc0000000 +#define MX51_CS3_BASE_ADDR 0xc8000000 +#define MX51_CS4_BASE_ADDR 0xcc000000 +#define MX51_CS5_BASE_ADDR 0xce000000 + +/* + * NFC + */ +#define MX51_NFC_AXI_BASE_ADDR 0xcfff0000 /* NAND flash AXI */ +#define MX51_NFC_AXI_SIZE SZ_64K + +#define MX51_GPU2D_BASE_ADDR 0xd0000000 +#define MX51_TZIC_BASE_ADDR 0xe0000000 /* * defines for SPBA modules */ #define MX51_SPBA_SDHC1 0x04 #define MX51_SPBA_SDHC2 0x08 -#define MX51_SPBA_UART3 0x0C +#define MX51_SPBA_UART3 0x0c #define MX51_SPBA_CSPI1 0x10 #define MX51_SPBA_SSI2 0x14 #define MX51_SPBA_SDHC3 0x20 @@ -103,35 +177,7 @@ #define MX51_SPBA_ATA 0x30 #define MX51_SPBA_SLIM 0x34 #define MX51_SPBA_HSI2C 0x38 -#define MX51_SPBA_CTRL 0x3C - -/* - * AIPS 1 - */ -#define MX51_AIPS1_BASE_ADDR 0x73F00000 -#define MX51_AIPS1_BASE_ADDR_VIRT 0xFB000000 -#define MX51_AIPS1_SIZE SZ_1M - -#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00080000) -#define MX51_GPIO1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00084000) -#define MX51_GPIO2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00088000) -#define MX51_GPIO3_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x0008C000) -#define MX51_GPIO4_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00090000) -#define MX51_KPP_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00094000) -#define MX51_WDOG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x00098000) -#define MX51_WDOG2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x0009C000) -#define MX51_GPT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000A0000) -#define MX51_SRTC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000A4000) -#define MX51_IOMUXC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000A8000) -#define MX51_EPIT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000AC000) -#define MX51_EPIT2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000B0000) -#define MX51_PWM1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000B4000) -#define MX51_PWM2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000B8000) -#define MX51_UART1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000BC000) -#define MX51_UART2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000C0000) -#define MX51_SRC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000D0000) -#define MX51_CCM_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000D4000) -#define MX51_GPC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x000D8000) +#define MX51_SPBA_CTRL 0x3c /* * Defines for modules using static and dynamic DMA channels @@ -164,60 +210,6 @@ #define MX51_MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL #define MX51_MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL -/* - * AIPS 2 - */ -#define MX51_AIPS2_BASE_ADDR 0x83F00000 -#define MX51_AIPS2_BASE_ADDR_VIRT 0xFB200000 -#define MX51_AIPS2_SIZE SZ_1M - -#define MX51_PLL1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00080000) -#define MX51_PLL2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00084000) -#define MX51_PLL3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00088000) -#define MX51_AHBMAX_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00094000) -#define MX51_IIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x00098000) -#define MX51_CSU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x0009C000) -#define MX51_ARM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000A0000) -#define MX51_OWIRE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000A4000) -#define MX51_FIRI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000A8000) -#define MX51_CSPI2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000AC000) -#define MX51_SDMA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000B0000) -#define MX51_SCC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000B4000) -#define MX51_ROMCP_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000B8000) -#define MX51_RTIC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000BC000) -#define MX51_CSPI3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000C0000) -#define MX51_I2C2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000C4000) -#define MX51_I2C1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000C8000) -#define MX51_SSI1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000CC000) -#define MX51_AUDMUX_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000D0000) -#define MX51_M4IF_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000D8000) -#define MX51_ESDCTL_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000D9000) -#define MX51_WEIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DA000) -#define MX51_NFC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DB000) -#define MX51_EMI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DBF00) -#define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DC000) -#define MX51_ATA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E0000) -#define MX51_SIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E4000) -#define MX51_SSI3BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E8000) -#define MX51_MXC_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000EC000) -#define MX51_TVE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F0000) -#define MX51_VPU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F4000) -#define MX51_SAHARA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F8000) - -/* - * Memory regions and CS - */ -#define MX51_GPU_CTRL_BASE_ADDR 0x30000000 -#define MX51_IPU_CTRL_BASE_ADDR 0x40000000 -#define MX51_CSD0_BASE_ADDR 0x90000000 -#define MX51_CSD1_BASE_ADDR 0xA0000000 -#define MX51_CS0_BASE_ADDR 0xB0000000 -#define MX51_CS1_BASE_ADDR 0xB8000000 -#define MX51_CS2_BASE_ADDR 0xC0000000 -#define MX51_CS3_BASE_ADDR 0xC8000000 -#define MX51_CS4_BASE_ADDR 0xCC000000 -#define MX51_CS5_BASE_ADDR 0xCE000000 - /* Does given address belongs to the specified memory region? */ #define ADDRESS_IN_REGION(addr, start, size) \ (((addr) >= (start)) && ((addr) < (start)+(size))) @@ -230,7 +222,7 @@ * This macro defines the physical to virtual address mapping for all the * peripheral modules. It is used by passing in the physical address as x * and returning the virtual address. If the physical address is not mapped, - * it returns 0xDEADBEEF + * it returns 0xdeadbeef */ #define MX51_IO_ADDRESS(x) \ @@ -240,7 +232,7 @@ MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \ - 0xDEADBEEF) + 0xdeadbeef) /* * define the address mapping macros: in physical address order @@ -265,181 +257,181 @@ /* * DMA request assignments */ -#define MX51_DMA_REQ_SSI3_TX1 47 -#define MX51_DMA_REQ_SSI3_RX1 46 -#define MX51_DMA_REQ_SPDIF 45 -#define MX51_DMA_REQ_UART3_TX 44 -#define MX51_DMA_REQ_UART3_RX 43 -#define MX51_DMA_REQ_SLIM_B_TX 42 -#define MX51_DMA_REQ_SDHC4 41 -#define MX51_DMA_REQ_SDHC3 40 -#define MX51_DMA_REQ_CSPI_TX 39 -#define MX51_DMA_REQ_CSPI_RX 38 -#define MX51_DMA_REQ_SSI3_TX2 37 -#define MX51_DMA_REQ_IPU 36 -#define MX51_DMA_REQ_SSI3_RX2 35 -#define MX51_DMA_REQ_EPIT2 34 -#define MX51_DMA_REQ_CTI2_1 33 -#define MX51_DMA_REQ_EMI_WR 32 -#define MX51_DMA_REQ_CTI2_0 31 -#define MX51_DMA_REQ_EMI_RD 30 -#define MX51_DMA_REQ_SSI1_TX1 29 -#define MX51_DMA_REQ_SSI1_RX1 28 -#define MX51_DMA_REQ_SSI1_TX2 27 -#define MX51_DMA_REQ_SSI1_RX2 26 -#define MX51_DMA_REQ_SSI2_TX1 25 -#define MX51_DMA_REQ_SSI2_RX1 24 -#define MX51_DMA_REQ_SSI2_TX2 23 -#define MX51_DMA_REQ_SSI2_RX2 22 -#define MX51_DMA_REQ_SDHC2 21 -#define MX51_DMA_REQ_SDHC1 20 -#define MX51_DMA_REQ_UART1_TX 19 -#define MX51_DMA_REQ_UART1_RX 18 -#define MX51_DMA_REQ_UART2_TX 17 -#define MX51_DMA_REQ_UART2_RX 16 -#define MX51_DMA_REQ_GPU 15 -#define MX51_DMA_REQ_EXTREQ1 14 -#define MX51_DMA_REQ_FIRI_TX 13 -#define MX51_DMA_REQ_FIRI_RX 12 -#define MX51_DMA_REQ_HS_I2C_RX 11 -#define MX51_DMA_REQ_HS_I2C_TX 10 -#define MX51_DMA_REQ_CSPI2_TX 9 -#define MX51_DMA_REQ_CSPI2_RX 8 -#define MX51_DMA_REQ_CSPI1_TX 7 -#define MX51_DMA_REQ_CSPI1_RX 6 -#define MX51_DMA_REQ_SLIM_B 5 -#define MX51_DMA_REQ_ATA_TX_END 4 -#define MX51_DMA_REQ_ATA_TX 3 -#define MX51_DMA_REQ_ATA_RX 2 -#define MX51_DMA_REQ_GPC 1 -#define MX51_DMA_REQ_VPU 0 +#define MX51_DMA_REQ_VPU 0 +#define MX51_DMA_REQ_GPC 1 +#define MX51_DMA_REQ_ATA_RX 2 +#define MX51_DMA_REQ_ATA_TX 3 +#define MX51_DMA_REQ_ATA_TX_END 4 +#define MX51_DMA_REQ_SLIM_B 5 +#define MX51_DMA_REQ_CSPI1_RX 6 +#define MX51_DMA_REQ_CSPI1_TX 7 +#define MX51_DMA_REQ_CSPI2_RX 8 +#define MX51_DMA_REQ_CSPI2_TX 9 +#define MX51_DMA_REQ_HS_I2C_TX 10 +#define MX51_DMA_REQ_HS_I2C_RX 11 +#define MX51_DMA_REQ_FIRI_RX 12 +#define MX51_DMA_REQ_FIRI_TX 13 +#define MX51_DMA_REQ_EXTREQ1 14 +#define MX51_DMA_REQ_GPU 15 +#define MX51_DMA_REQ_UART2_RX 16 +#define MX51_DMA_REQ_UART2_TX 17 +#define MX51_DMA_REQ_UART1_RX 18 +#define MX51_DMA_REQ_UART1_TX 19 +#define MX51_DMA_REQ_SDHC1 20 +#define MX51_DMA_REQ_SDHC2 21 +#define MX51_DMA_REQ_SSI2_RX2 22 +#define MX51_DMA_REQ_SSI2_TX2 23 +#define MX51_DMA_REQ_SSI2_RX1 24 +#define MX51_DMA_REQ_SSI2_TX1 25 +#define MX51_DMA_REQ_SSI1_RX2 26 +#define MX51_DMA_REQ_SSI1_TX2 27 +#define MX51_DMA_REQ_SSI1_RX1 28 +#define MX51_DMA_REQ_SSI1_TX1 29 +#define MX51_DMA_REQ_EMI_RD 30 +#define MX51_DMA_REQ_CTI2_0 31 +#define MX51_DMA_REQ_EMI_WR 32 +#define MX51_DMA_REQ_CTI2_1 33 +#define MX51_DMA_REQ_EPIT2 34 +#define MX51_DMA_REQ_SSI3_RX2 35 +#define MX51_DMA_REQ_IPU 36 +#define MX51_DMA_REQ_SSI3_TX2 37 +#define MX51_DMA_REQ_CSPI_RX 38 +#define MX51_DMA_REQ_CSPI_TX 39 +#define MX51_DMA_REQ_SDHC3 40 +#define MX51_DMA_REQ_SDHC4 41 +#define MX51_DMA_REQ_SLIM_B_TX 42 +#define MX51_DMA_REQ_UART3_RX 43 +#define MX51_DMA_REQ_UART3_TX 44 +#define MX51_DMA_REQ_SPDIF 45 +#define MX51_DMA_REQ_SSI3_RX1 46 +#define MX51_DMA_REQ_SSI3_TX1 47 /* * Interrupt numbers */ -#define MX51_MXC_INT_BASE 0 -#define MX51_MXC_INT_RESV0 0 -#define MX51_MXC_INT_MMC_SDHC1 1 -#define MX51_MXC_INT_MMC_SDHC2 2 -#define MX51_MXC_INT_MMC_SDHC3 3 -#define MX51_MXC_INT_MMC_SDHC4 4 -#define MX51_MXC_INT_RESV5 5 -#define MX51_MXC_INT_SDMA 6 -#define MX51_MXC_INT_IOMUX 7 -#define MX51_MXC_INT_NFC 8 -#define MX51_MXC_INT_VPU 9 -#define MX51_MXC_INT_IPU_ERR 10 -#define MX51_MXC_INT_IPU_SYN 11 -#define MX51_MXC_INT_GPU 12 -#define MX51_MXC_INT_RESV13 13 -#define MX51_MXC_INT_USB_H1 14 -#define MX51_MXC_INT_EMI 15 -#define MX51_MXC_INT_USB_H2 16 -#define MX51_MXC_INT_USB_H3 17 -#define MX51_MXC_INT_USB_OTG 18 -#define MX51_MXC_INT_SAHARA_H0 19 -#define MX51_MXC_INT_SAHARA_H1 20 -#define MX51_MXC_INT_SCC_SMN 21 -#define MX51_MXC_INT_SCC_STZ 22 -#define MX51_MXC_INT_SCC_SCM 23 -#define MX51_MXC_INT_SRTC_NTZ 24 -#define MX51_MXC_INT_SRTC_TZ 25 -#define MX51_MXC_INT_RTIC 26 -#define MX51_MXC_INT_CSU 27 -#define MX51_MXC_INT_SLIM_B 28 -#define MX51_MXC_INT_SSI1 29 -#define MX51_MXC_INT_SSI2 30 -#define MX51_MXC_INT_UART1 31 -#define MX51_MXC_INT_UART2 32 -#define MX51_MXC_INT_UART3 33 -#define MX51_MXC_INT_RESV34 34 -#define MX51_MXC_INT_RESV35 35 -#define MX51_MXC_INT_CSPI1 36 -#define MX51_MXC_INT_CSPI2 37 -#define MX51_MXC_INT_CSPI 38 -#define MX51_MXC_INT_GPT 39 -#define MX51_MXC_INT_EPIT1 40 -#define MX51_MXC_INT_EPIT2 41 -#define MX51_MXC_INT_GPIO1_INT7 42 -#define MX51_MXC_INT_GPIO1_INT6 43 -#define MX51_MXC_INT_GPIO1_INT5 44 -#define MX51_MXC_INT_GPIO1_INT4 45 -#define MX51_MXC_INT_GPIO1_INT3 46 -#define MX51_MXC_INT_GPIO1_INT2 47 -#define MX51_MXC_INT_GPIO1_INT1 48 -#define MX51_MXC_INT_GPIO1_INT0 49 -#define MX51_MXC_INT_GPIO1_LOW 50 -#define MX51_MXC_INT_GPIO1_HIGH 51 -#define MX51_MXC_INT_GPIO2_LOW 52 -#define MX51_MXC_INT_GPIO2_HIGH 53 -#define MX51_MXC_INT_GPIO3_LOW 54 -#define MX51_MXC_INT_GPIO3_HIGH 55 -#define MX51_MXC_INT_GPIO4_LOW 56 -#define MX51_MXC_INT_GPIO4_HIGH 57 -#define MX51_MXC_INT_WDOG1 58 -#define MX51_MXC_INT_WDOG2 59 -#define MX51_MXC_INT_KPP 60 -#define MX51_MXC_INT_PWM1 61 -#define MX51_MXC_INT_I2C1 62 -#define MX51_MXC_INT_I2C2 63 -#define MX51_MXC_INT_HS_I2C 64 -#define MX51_MXC_INT_RESV65 65 -#define MX51_MXC_INT_RESV66 66 -#define MX51_MXC_INT_SIM_IPB 67 -#define MX51_MXC_INT_SIM_DAT 68 -#define MX51_MXC_INT_IIM 69 -#define MX51_MXC_INT_ATA 70 -#define MX51_MXC_INT_CCM1 71 -#define MX51_MXC_INT_CCM2 72 -#define MX51_MXC_INT_GPC1 73 -#define MX51_MXC_INT_GPC2 74 -#define MX51_MXC_INT_SRC 75 -#define MX51_MXC_INT_NM 76 -#define MX51_MXC_INT_PMU 77 -#define MX51_MXC_INT_CTI_IRQ 78 -#define MX51_MXC_INT_CTI1_TG0 79 -#define MX51_MXC_INT_CTI1_TG1 80 -#define MX51_MXC_INT_MCG_ERR 81 -#define MX51_MXC_INT_MCG_TMR 82 -#define MX51_MXC_INT_MCG_FUNC 83 -#define MX51_MXC_INT_GPU2_IRQ 84 -#define MX51_MXC_INT_GPU2_BUSY 85 -#define MX51_MXC_INT_RESV86 86 -#define MX51_MXC_INT_FEC 87 -#define MX51_MXC_INT_OWIRE 88 -#define MX51_MXC_INT_CTI1_TG2 89 -#define MX51_MXC_INT_SJC 90 -#define MX51_MXC_INT_SPDIF 91 -#define MX51_MXC_INT_TVE 92 -#define MX51_MXC_INT_FIRI 93 -#define MX51_MXC_INT_PWM2 94 -#define MX51_MXC_INT_SLIM_EXP 95 -#define MX51_MXC_INT_SSI3 96 -#define MX51_MXC_INT_EMI_BOOT 97 -#define MX51_MXC_INT_CTI1_TG3 98 -#define MX51_MXC_INT_SMC_RX 99 -#define MX51_MXC_INT_VPU_IDLE 100 -#define MX51_MXC_INT_EMI_NFC 101 -#define MX51_MXC_INT_GPU_IDLE 102 +#define MX51_MXC_INT_BASE 0 +#define MX51_MXC_INT_RESV0 0 +#define MX51_MXC_INT_MMC_SDHC1 1 +#define MX51_MXC_INT_MMC_SDHC2 2 +#define MX51_MXC_INT_MMC_SDHC3 3 +#define MX51_MXC_INT_MMC_SDHC4 4 +#define MX51_MXC_INT_RESV5 5 +#define MX51_MXC_INT_SDMA 6 +#define MX51_MXC_INT_IOMUX 7 +#define MX51_MXC_INT_NFC 8 +#define MX51_MXC_INT_VPU 9 +#define MX51_MXC_INT_IPU_ERR 10 +#define MX51_MXC_INT_IPU_SYN 11 +#define MX51_MXC_INT_GPU 12 +#define MX51_MXC_INT_RESV13 13 +#define MX51_MXC_INT_USB_H1 14 +#define MX51_MXC_INT_EMI 15 +#define MX51_MXC_INT_USB_H2 16 +#define MX51_MXC_INT_USB_H3 17 +#define MX51_MXC_INT_USB_OTG 18 +#define MX51_MXC_INT_SAHARA_H0 19 +#define MX51_MXC_INT_SAHARA_H1 20 +#define MX51_MXC_INT_SCC_SMN 21 +#define MX51_MXC_INT_SCC_STZ 22 +#define MX51_MXC_INT_SCC_SCM 23 +#define MX51_MXC_INT_SRTC_NTZ 24 +#define MX51_MXC_INT_SRTC_TZ 25 +#define MX51_MXC_INT_RTIC 26 +#define MX51_MXC_INT_CSU 27 +#define MX51_MXC_INT_SLIM_B 28 +#define MX51_MXC_INT_SSI1 29 +#define MX51_MXC_INT_SSI2 30 +#define MX51_MXC_INT_UART1 31 +#define MX51_MXC_INT_UART2 32 +#define MX51_MXC_INT_UART3 33 +#define MX51_MXC_INT_RESV34 34 +#define MX51_MXC_INT_RESV35 35 +#define MX51_MXC_INT_CSPI1 36 +#define MX51_MXC_INT_CSPI2 37 +#define MX51_MXC_INT_CSPI 38 +#define MX51_MXC_INT_GPT 39 +#define MX51_MXC_INT_EPIT1 40 +#define MX51_MXC_INT_EPIT2 41 +#define MX51_MXC_INT_GPIO1_INT7 42 +#define MX51_MXC_INT_GPIO1_INT6 43 +#define MX51_MXC_INT_GPIO1_INT5 44 +#define MX51_MXC_INT_GPIO1_INT4 45 +#define MX51_MXC_INT_GPIO1_INT3 46 +#define MX51_MXC_INT_GPIO1_INT2 47 +#define MX51_MXC_INT_GPIO1_INT1 48 +#define MX51_MXC_INT_GPIO1_INT0 49 +#define MX51_MXC_INT_GPIO1_LOW 50 +#define MX51_MXC_INT_GPIO1_HIGH 51 +#define MX51_MXC_INT_GPIO2_LOW 52 +#define MX51_MXC_INT_GPIO2_HIGH 53 +#define MX51_MXC_INT_GPIO3_LOW 54 +#define MX51_MXC_INT_GPIO3_HIGH 55 +#define MX51_MXC_INT_GPIO4_LOW 56 +#define MX51_MXC_INT_GPIO4_HIGH 57 +#define MX51_MXC_INT_WDOG1 58 +#define MX51_MXC_INT_WDOG2 59 +#define MX51_MXC_INT_KPP 60 +#define MX51_MXC_INT_PWM1 61 +#define MX51_MXC_INT_I2C1 62 +#define MX51_MXC_INT_I2C2 63 +#define MX51_MXC_INT_HS_I2C 64 +#define MX51_MXC_INT_RESV65 65 +#define MX51_MXC_INT_RESV66 66 +#define MX51_MXC_INT_SIM_IPB 67 +#define MX51_MXC_INT_SIM_DAT 68 +#define MX51_MXC_INT_IIM 69 +#define MX51_MXC_INT_ATA 70 +#define MX51_MXC_INT_CCM1 71 +#define MX51_MXC_INT_CCM2 72 +#define MX51_MXC_INT_GPC1 73 +#define MX51_MXC_INT_GPC2 74 +#define MX51_MXC_INT_SRC 75 +#define MX51_MXC_INT_NM 76 +#define MX51_MXC_INT_PMU 77 +#define MX51_MXC_INT_CTI_IRQ 78 +#define MX51_MXC_INT_CTI1_TG0 79 +#define MX51_MXC_INT_CTI1_TG1 80 +#define MX51_MXC_INT_MCG_ERR 81 +#define MX51_MXC_INT_MCG_TMR 82 +#define MX51_MXC_INT_MCG_FUNC 83 +#define MX51_MXC_INT_GPU2_IRQ 84 +#define MX51_MXC_INT_GPU2_BUSY 85 +#define MX51_MXC_INT_RESV86 86 +#define MX51_MXC_INT_FEC 87 +#define MX51_MXC_INT_OWIRE 88 +#define MX51_MXC_INT_CTI1_TG2 89 +#define MX51_MXC_INT_SJC 90 +#define MX51_MXC_INT_SPDIF 91 +#define MX51_MXC_INT_TVE 92 +#define MX51_MXC_INT_FIRI 93 +#define MX51_MXC_INT_PWM2 94 +#define MX51_MXC_INT_SLIM_EXP 95 +#define MX51_MXC_INT_SSI3 96 +#define MX51_MXC_INT_EMI_BOOT 97 +#define MX51_MXC_INT_CTI1_TG3 98 +#define MX51_MXC_INT_SMC_RX 99 +#define MX51_MXC_INT_VPU_IDLE 100 +#define MX51_MXC_INT_EMI_NFC 101 +#define MX51_MXC_INT_GPU_IDLE 102 /* silicon revisions specific to i.MX51 */ -#define MX51_CHIP_REV_1_0 0x10 -#define MX51_CHIP_REV_1_1 0x11 -#define MX51_CHIP_REV_1_2 0x12 -#define MX51_CHIP_REV_1_3 0x13 -#define MX51_CHIP_REV_2_0 0x20 -#define MX51_CHIP_REV_2_1 0x21 -#define MX51_CHIP_REV_2_2 0x22 -#define MX51_CHIP_REV_2_3 0x23 -#define MX51_CHIP_REV_3_0 0x30 -#define MX51_CHIP_REV_3_1 0x31 -#define MX51_CHIP_REV_3_2 0x32 - -/* Mandatory defines used globally */ +#define MX51_CHIP_REV_1_0 0x10 +#define MX51_CHIP_REV_1_1 0x11 +#define MX51_CHIP_REV_1_2 0x12 +#define MX51_CHIP_REV_1_3 0x13 +#define MX51_CHIP_REV_2_0 0x20 +#define MX51_CHIP_REV_2_1 0x21 +#define MX51_CHIP_REV_2_2 0x22 +#define MX51_CHIP_REV_2_3 0x23 +#define MX51_CHIP_REV_3_0 0x30 +#define MX51_CHIP_REV_3_1 0x31 +#define MX51_CHIP_REV_3_2 0x32 #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) - extern int mx51_revision(void); #endif -#endif /* __ASM_ARCH_MXC_MX51_H__ */ +/* tape-out 1 defines */ +#define MX51_TZIC_BASE_ADDR_TO1 0x8fffc000 + +#endif /* ifndef __MACH_MX51_H__ */ From 68b5e858dde8dcb0413b7c1d699c1056ecc0934d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 3 Aug 2010 16:15:29 +0200 Subject: [PATCH 18/72] ARM: mx51: fix naming of spi related defines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The names used now match the processor's reference manual. Also remove MXC from the interrupt defines to match the other imx platforms. Acked-by: Wolfram Sang Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/include/mach/mx51.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 92b39f7256e9..d0fda396adf2 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -67,7 +67,7 @@ #define MX51_MMC_SDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) #define MX51_MMC_SDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x08000) #define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0c000) -#define MX51_CSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x10000) +#define MX51_ECSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x10000) #define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x14000) #define MX51_MMC_SDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x20000) #define MX51_MMC_SDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x24000) @@ -121,12 +121,12 @@ #define MX51_ARM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xa0000) #define MX51_OWIRE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xa4000) #define MX51_FIRI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xa8000) -#define MX51_CSPI2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xac000) +#define MX51_ECSPI2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xac000) #define MX51_SDMA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xb0000) #define MX51_SCC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xb4000) #define MX51_ROMCP_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xb8000) #define MX51_RTIC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xbc000) -#define MX51_CSPI3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc0000) +#define MX51_CSPI_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc0000) #define MX51_I2C2_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc4000) #define MX51_I2C1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xc8000) #define MX51_SSI1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xcc000) @@ -346,9 +346,9 @@ #define MX51_MXC_INT_UART3 33 #define MX51_MXC_INT_RESV34 34 #define MX51_MXC_INT_RESV35 35 -#define MX51_MXC_INT_CSPI1 36 -#define MX51_MXC_INT_CSPI2 37 -#define MX51_MXC_INT_CSPI 38 +#define MX51_INT_ECSPI1 36 +#define MX51_INT_ECSPI2 37 +#define MX51_INT_CSPI 38 #define MX51_MXC_INT_GPT 39 #define MX51_MXC_INT_EPIT1 40 #define MX51_MXC_INT_EPIT2 41 From a8a05b855291defb1d97a1c3681480e4ca330254 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 3 Aug 2010 16:09:35 +0200 Subject: [PATCH 19/72] ARM: mx51: use IMX_IO_ADDRESS to define MX51_IO_ADDRESS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/include/mach/mx51.h | 53 ++++++--------------------- 1 file changed, 11 insertions(+), 42 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index d0fda396adf2..f6026506c5ef 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -163,6 +163,17 @@ #define MX51_GPU2D_BASE_ADDR 0xd0000000 #define MX51_TZIC_BASE_ADDR 0xe0000000 +#define MX51_IO_ADDRESS(x) ( \ + IMX_IO_ADDRESS(x, MX51_IRAM) ?: \ + IMX_IO_ADDRESS(x, MX51_DEBUG) ?: \ + IMX_IO_ADDRESS(x, MX51_SPBA0) ?: \ + IMX_IO_ADDRESS(x, MX51_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX51_AIPS2)) + +/* This is currently used in , but should go away */ +#define MX51_AIPS1_IO_ADDRESS(x) \ + (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT) + /* * defines for SPBA modules */ @@ -210,48 +221,6 @@ #define MX51_MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL #define MX51_MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL -/* Does given address belongs to the specified memory region? */ -#define ADDRESS_IN_REGION(addr, start, size) \ - (((addr) >= (start)) && ((addr) < (start)+(size))) - -/* Does given address belongs to the specified named `module'? */ -#define MX51_IS_MODULE(addr, module) \ - ADDRESS_IN_REGION(addr, MX51_ ## module ## _BASE_ADDR, \ - MX51_ ## module ## _SIZE) -/* - * This macro defines the physical to virtual address mapping for all the - * peripheral modules. It is used by passing in the physical address as x - * and returning the virtual address. If the physical address is not mapped, - * it returns 0xdeadbeef - */ - -#define MX51_IO_ADDRESS(x) \ - (void __iomem *) \ - (MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) : \ - MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) : \ - MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \ - MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \ - MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \ - 0xdeadbeef) - -/* - * define the address mapping macros: in physical address order - */ -#define MX51_IRAM_IO_ADDRESS(x) \ - (((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT) - -#define MX51_DEBUG_IO_ADDRESS(x) \ - (((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT) - -#define MX51_SPBA0_IO_ADDRESS(x) \ - (((x) - MX51_SPBA0_BASE_ADDR) + MX51_SPBA0_BASE_ADDR_VIRT) - -#define MX51_AIPS1_IO_ADDRESS(x) \ - (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT) - -#define MX51_AIPS2_IO_ADDRESS(x) \ - (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT) - #define MX51_IS_MEM_DEVICE_NONSHARED(x) 0 /* From 35bab0589b9a71533b37280eefa430c21dc102fe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 9 Sep 2010 21:02:02 +0200 Subject: [PATCH 20/72] ARM: imx: change the way spi-imx devices are registered MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Group soc specific data in a global struct instead of repeating it for each call to imxXX_add_spi_imxX. The structs holding the actual data are placed in .init.constdata and so don't do much harm. Compared to the previous approach this reduces code size to call imx_add_spi_imx. Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König --- arch/arm/mach-imx/devices-imx21.h | 9 ++- arch/arm/mach-imx/devices-imx27.h | 12 +-- arch/arm/mach-mx25/devices-imx25.h | 12 +-- arch/arm/mach-mx3/devices-imx31.h | 12 +-- arch/arm/mach-mx3/devices-imx35.h | 9 ++- arch/arm/plat-mxc/devices/platform-spi_imx.c | 76 ++++++++++++++++--- .../plat-mxc/include/mach/devices-common.h | 10 ++- 7 files changed, 103 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 42788e99d127..2b45d3316267 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -24,7 +24,8 @@ #define imx21_add_mxc_nand(pdata) \ imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata) -#define imx21_add_spi_imx0(pdata) \ - imx_add_spi_imx(0, MX21_CSPI1_BASE_ADDR, SZ_4K, MX21_INT_CSPI1, pdata) -#define imx21_add_spi_imx1(pdata) \ - imx_add_spi_imx(1, MX21_CSPI2_BASE_ADDR, SZ_4K, MX21_INT_CSPI2, pdata) +extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst; +#define imx21_add_cspi(id, pdata) \ + imx_add_spi_imx(&imx21_cspi_data[id], pdata) +#define imx21_add_spi_imx0(pdata) imx21_add_cspi(0, pdata) +#define imx21_add_spi_imx1(pdata) imx21_add_cspi(1, pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 65e7bb7ec2e8..04bfcf0f63d2 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -30,9 +30,9 @@ #define imx27_add_mxc_nand(pdata) \ imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata) -#define imx27_add_spi_imx0(pdata) \ - imx_add_spi_imx(0, MX27_CSPI1_BASE_ADDR, SZ_4K, MX27_INT_CSPI1, pdata) -#define imx27_add_spi_imx1(pdata) \ - imx_add_spi_imx(1, MX27_CSPI2_BASE_ADDR, SZ_4K, MX27_INT_CSPI2, pdata) -#define imx27_add_spi_imx2(pdata) \ - imx_add_spi_imx(2, MX27_CSPI3_BASE_ADDR, SZ_4K, MX27_INT_CSPI3, pdata) +extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst; +#define imx27_add_cspi(id, pdata) \ + imx_add_spi_imx(&imx27_cspi_data[id], pdata) +#define imx27_add_spi_imx0(pdata) imx27_add_cspi(0, pdata) +#define imx27_add_spi_imx1(pdata) imx27_add_cspi(1, pdata) +#define imx27_add_spi_imx2(pdata) imx27_add_cspi(2, pdata) diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index d86a7c3ca8b0..34a706105064 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -35,9 +35,9 @@ #define imx25_add_mxc_nand(pdata) \ imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata) -#define imx25_add_spi_imx0(pdata) \ - imx_add_spi_imx(0, MX25_CSPI1_BASE_ADDR, SZ_16K, MX25_INT_CSPI1, pdata) -#define imx25_add_spi_imx1(pdata) \ - imx_add_spi_imx(1, MX25_CSPI2_BASE_ADDR, SZ_16K, MX25_INT_CSPI2, pdata) -#define imx25_add_spi_imx2(pdata) \ - imx_add_spi_imx(2, MX25_CSPI3_BASE_ADDR, SZ_16K, MX25_INT_CSPI3, pdata) +extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst; +#define imx25_add_spi_imx(id, pdata) \ + imx_add_spi_imx(&imx25_spi_imx_data[id], pdata) +#define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata) +#define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata) +#define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata) diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h index 3b1a44a20585..7b4d022a59fa 100644 --- a/arch/arm/mach-mx3/devices-imx31.h +++ b/arch/arm/mach-mx3/devices-imx31.h @@ -30,9 +30,9 @@ #define imx31_add_mxc_nand(pdata) \ imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata) -#define imx31_add_spi_imx0(pdata) \ - imx_add_spi_imx(0, MX31_CSPI1_BASE_ADDR, SZ_4K, MX31_INT_CSPI1, pdata) -#define imx31_add_spi_imx1(pdata) \ - imx_add_spi_imx(1, MX31_CSPI2_BASE_ADDR, SZ_4K, MX31_INT_CSPI2, pdata) -#define imx31_add_spi_imx2(pdata) \ - imx_add_spi_imx(2, MX31_CSPI3_BASE_ADDR, SZ_4K, MX31_INT_CSPI3, pdata) +extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst; +#define imx31_add_cspi(id, pdata) \ + imx_add_spi_imx(&imx31_cspi_data[id], pdata) +#define imx31_add_spi_imx0(pdata) imx31_add_cspi(0, pdata) +#define imx31_add_spi_imx1(pdata) imx31_add_cspi(1, pdata) +#define imx31_add_spi_imx2(pdata) imx31_add_cspi(2, pdata) diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index f6a431a4c3d2..af0bc1f86237 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -31,7 +31,8 @@ #define imx35_add_mxc_nand(pdata) \ imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata) -#define imx35_add_spi_imx0(pdata) \ - imx_add_spi_imx(0, MX35_CSPI1_BASE_ADDR, SZ_4K, MX35_INT_CSPI1, pdata) -#define imx35_add_spi_imx1(pdata) \ - imx_add_spi_imx(1, MX35_CSPI2_BASE_ADDR, SZ_4K, MX35_INT_CSPI2, pdata) +extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst; +#define imx35_add_cspi(id, pdata) \ + imx_add_spi_imx(&imx35_cspi_data[id], pdata) +#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata) +#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata) diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c index 2831a6d3eb4b..412a81f24101 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c @@ -6,25 +6,83 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include +#include #include -struct platform_device *__init imx_add_spi_imx(int id, - resource_size_t iobase, resource_size_t iosize, int irq, +#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_ ## type ## hwid, \ + } + +#define imx_spi_imx_data_entry(soc, type, devid, id, hwid, size) \ + [id] = imx_spi_imx_data_entry_single(soc, type, devid, id, hwid, size) + +#ifdef CONFIG_SOC_IMX21 +const struct imx_spi_imx_data imx21_cspi_data[] __initconst = { +#define imx21_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K) + imx21_cspi_data_entry(0, 1), + imx21_cspi_data_entry(1, 2), +#endif + +#ifdef CONFIG_ARCH_MX25 +const struct imx_spi_imx_data imx25_cspi_data[] __initconst = { +#define imx25_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX25, CSPI, "imx25-cspi", _id, _hwid, SZ_16K) + imx25_cspi_data_entry(0, 1), + imx25_cspi_data_entry(1, 2), + imx25_cspi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_spi_imx_data imx27_cspi_data[] __initconst = { +#define imx27_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K) + imx27_cspi_data_entry(0, 1), + imx27_cspi_data_entry(1, 2), + imx27_cspi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX31 +const struct imx_spi_imx_data imx31_cspi_data[] __initconst = { +#define imx31_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K) + imx31_cspi_data_entry(0, 1), + imx31_cspi_data_entry(1, 2), + imx31_cspi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_ARCH_MX31 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_spi_imx_data imx35_cspi_data[] __initconst = { +#define imx35_cspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K) + imx35_cspi_data_entry(0, 1), + imx35_cspi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX35 */ + +struct platform_device *__init imx_add_spi_imx( + const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata) { struct resource res[] = { { - .start = iobase, - .end = iobase + iosize - 1, + .start = data->iobase, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { - .start = irq, - .end = irq, + .start = data->irq, + .end = data->irq, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("spi_imx", id, res, ARRAY_SIZE(res), - pdata, sizeof(*pdata)); + return imx_add_platform_device("spi_imx", data->id, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 4a170a8da26c..e654287f0ba8 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -43,6 +43,12 @@ struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase, int irq, const struct mxc_nand_platform_data *pdata); #include -struct platform_device *__init imx_add_spi_imx(int id, - resource_size_t iobase, resource_size_t iosize, int irq, +struct imx_spi_imx_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + int irq; +}; +struct platform_device *__init imx_add_spi_imx( + const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); From 5162de08d116fe7bbb912b17d84169983bfa16a8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 10 Aug 2010 22:57:24 +0200 Subject: [PATCH 21/72] ARM: imx: change the way imx-uarts are registered MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For mx1_defconfig this yields: add/remove: 1/0 grow/shrink: 1/4 up/down: 49/-108 (-59) function old new delta imx1_imx_uart_data - 48 +48 kernel_config_data 7277 7278 +1 imx_add_imx_uart_1irq 132 128 -4 imx_add_imx_uart_3irq 164 156 -8 scb9328_init 96 64 -32 mx1ads_init 220 156 -64 for mx21_defconfig this yields: add/remove: 1/0 grow/shrink: 0/3 up/down: 64/-52 (12) function old new delta imx21_imx_uart_data - 64 +64 imx_add_imx_uart_3irq 160 156 -4 imx_add_imx_uart_1irq 140 136 -4 mx21ads_board_init 220 176 -44 for a random mx25 config this yields: add/remove: 1/0 grow/shrink: 0/5 up/down: 80/-56 (24) function old new delta imx25_imx_uart_data - 80 +80 imx_add_imx_uart_3irq 160 156 -4 imx_add_imx_uart_1irq 140 136 -4 mx25pdk_init 288 272 -16 eukrea_mbimxsd_baseboard_init 272 256 -16 eukrea_cpuimx25_init 252 236 -16 for mx27_defconfig this yields: add/remove: 1/0 grow/shrink: 0/10 up/down: 96/-280 (-184) function old new delta imx27_imx_uart_data - 96 +96 imx_add_imx_uart_3irq 160 156 -4 imx_add_imx_uart_1irq 140 136 -4 pca100_init 560 544 -16 mx27pdk_init 112 96 -16 mx27lite_init 92 76 -16 eukrea_cpuimx27_init 332 316 -16 pcm038_init 388 348 -40 mxt_td60_board_init 320 280 -40 eukrea_mbimx27_baseboard_init 476 436 -40 mx27ads_board_init 368 280 -88 and finally for mx3_defconfig: add/remove: 2/0 grow/shrink: 0/9 up/down: 128/-344 (-216) function old new delta imx31_imx_uart_data - 80 +80 imx35_imx_uart_data - 48 +48 imx_add_imx_uart_1irq 132 128 -4 imx_add_imx_uart_3irq 164 152 -12 mx31moboard_devboard_init 360 344 -16 mx31lite_db_init 176 160 -16 mx31moboard_smartbot_init 384 360 -24 kzm_board_init 232 208 -24 armadillo5x0_init 392 364 -28 mx31lilly_db_init 248 208 -40 mxc_board_init 3760 3580 -180 Signed-off-by: Uwe Kleine-König --- arch/arm/mach-imx/devices-imx1.h | 9 +- arch/arm/mach-imx/devices-imx21.h | 15 +-- arch/arm/mach-imx/devices-imx27.h | 21 ++- arch/arm/mach-mx25/devices-imx25.h | 18 ++- arch/arm/mach-mx3/devices-imx31.h | 18 ++- arch/arm/mach-mx3/devices-imx35.h | 12 +- arch/arm/plat-mxc/devices/platform-imx-uart.c | 127 +++++++++++++++--- .../plat-mxc/include/mach/devices-common.h | 26 +++- 8 files changed, 167 insertions(+), 79 deletions(-) diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h index a8d94f078196..2861cb8b100a 100644 --- a/arch/arm/mach-imx/devices-imx1.h +++ b/arch/arm/mach-imx/devices-imx1.h @@ -12,7 +12,8 @@ #define imx1_add_i2c_imx(pdata) \ imx_add_imx_i2c(0, MX1_I2C_BASE_ADDR, SZ_4K, MX1_INT_I2C, pdata) -#define imx1_add_imx_uart0(pdata) \ - imx_add_imx_uart_3irq(0, MX1_UART1_BASE_ADDR, 0xd0, MX1_INT_UART1RX, MX1_INT_UART1TX, MX1_INT_UART1RTS, pdata) -#define imx1_add_imx_uart1(pdata) \ - imx_add_imx_uart_3irq(0, MX1_UART2_BASE_ADDR, 0xd0, MX1_INT_UART2RX, MX1_INT_UART2TX, MX1_INT_UART2RTS, pdata) +extern const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst; +#define imx1_add_imx_uart(id, pdata) \ + imx_add_imx_uart_3irq(&imx1_imx_uart_data[id], pdata) +#define imx1_add_imx_uart0(pdata) imx1_add_imx_uart(0, pdata) +#define imx1_add_imx_uart1(pdata) imx1_add_imx_uart(1, pdata) diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 2b45d3316267..f75b5e4d0ed5 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -12,14 +12,13 @@ #define imx21_add_i2c_imx(pdata) \ imx_add_imx_i2c(0, MX2x_I2C_BASE_ADDR, SZ_4K, MX2x_INT_I2C, pdata) -#define imx21_add_imx_uart0(pdata) \ - imx_add_imx_uart_1irq(0, MX21_UART1_BASE_ADDR, SZ_4K, MX21_INT_UART1, pdata) -#define imx21_add_imx_uart1(pdata) \ - imx_add_imx_uart_1irq(1, MX21_UART2_BASE_ADDR, SZ_4K, MX21_INT_UART2, pdata) -#define imx21_add_imx_uart2(pdata) \ - imx_add_imx_uart_1irq(2, MX21_UART3_BASE_ADDR, SZ_4K, MX21_INT_UART3, pdata) -#define imx21_add_imx_uart3(pdata) \ - imx_add_imx_uart_1irq(3, MX21_UART4_BASE_ADDR, SZ_4K, MX21_INT_UART4, pdata) +extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst; +#define imx21_add_imx_uart(id, pdata) \ + imx_add_imx_uart_1irq(&imx21_imx_uart_data[id], pdata) +#define imx21_add_imx_uart0(pdata) imx21_add_imx_uart(0, pdata) +#define imx21_add_imx_uart1(pdata) imx21_add_imx_uart(1, pdata) +#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata) +#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata) #define imx21_add_mxc_nand(pdata) \ imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 04bfcf0f63d2..bf9dab3a0858 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -14,18 +14,15 @@ #define imx27_add_i2c_imx1(pdata) \ imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata) -#define imx27_add_imx_uart0(pdata) \ - imx_add_imx_uart_1irq(0, MX27_UART1_BASE_ADDR, SZ_4K, MX27_INT_UART1, pdata) -#define imx27_add_imx_uart1(pdata) \ - imx_add_imx_uart_1irq(1, MX27_UART2_BASE_ADDR, SZ_4K, MX27_INT_UART2, pdata) -#define imx27_add_imx_uart2(pdata) \ - imx_add_imx_uart_1irq(2, MX27_UART3_BASE_ADDR, SZ_4K, MX27_INT_UART3, pdata) -#define imx27_add_imx_uart3(pdata) \ - imx_add_imx_uart_1irq(3, MX27_UART4_BASE_ADDR, SZ_4K, MX27_INT_UART4, pdata) -#define imx27_add_imx_uart4(pdata) \ - imx_add_imx_uart_1irq(4, MX27_UART5_BASE_ADDR, SZ_4K, MX27_INT_UART5, pdata) -#define imx27_add_imx_uart5(pdata) \ - imx_add_imx_uart_1irq(5, MX27_UART6_BASE_ADDR, SZ_4K, MX27_INT_UART6, pdata) +extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst; +#define imx27_add_imx_uart(id, pdata) \ + imx_add_imx_uart_1irq(&imx27_imx_uart_data[id], pdata) +#define imx27_add_imx_uart0(pdata) imx27_add_imx_uart(0, pdata) +#define imx27_add_imx_uart1(pdata) imx27_add_imx_uart(1, pdata) +#define imx27_add_imx_uart2(pdata) imx27_add_imx_uart(2, pdata) +#define imx27_add_imx_uart3(pdata) imx27_add_imx_uart(3, pdata) +#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata) +#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata) #define imx27_add_mxc_nand(pdata) \ imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata) diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index 34a706105064..439400b5d275 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -21,16 +21,14 @@ #define imx25_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata) -#define imx25_add_imx_uart0(pdata) \ - imx_add_imx_uart_1irq(0, MX25_UART1_BASE_ADDR, SZ_16K, MX25_INT_UART1, pdata) -#define imx25_add_imx_uart1(pdata) \ - imx_add_imx_uart_1irq(1, MX25_UART2_BASE_ADDR, SZ_16K, MX25_INT_UART2, pdata) -#define imx25_add_imx_uart2(pdata) \ - imx_add_imx_uart_1irq(2, MX25_UART3_BASE_ADDR, SZ_16K, MX25_INT_UART3, pdata) -#define imx25_add_imx_uart3(pdata) \ - imx_add_imx_uart_1irq(3, MX25_UART4_BASE_ADDR, SZ_16K, MX25_INT_UART4, pdata) -#define imx25_add_imx_uart4(pdata) \ - imx_add_imx_uart_1irq(4, MX25_UART5_BASE_ADDR, SZ_16K, MX25_INT_UART5, pdata) +extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst; +#define imx25_add_imx_uart(id, pdata) \ + imx_add_imx_uart_1irq(&imx25_imx_uart_data[id], pdata) +#define imx25_add_imx_uart0(pdata) imx25_add_imx_uart(0, pdata) +#define imx25_add_imx_uart1(pdata) imx25_add_imx_uart(1, pdata) +#define imx25_add_imx_uart2(pdata) imx25_add_imx_uart(2, pdata) +#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata) +#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata) #define imx25_add_mxc_nand(pdata) \ imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata) diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h index 7b4d022a59fa..a8c5f1bfce3b 100644 --- a/arch/arm/mach-mx3/devices-imx31.h +++ b/arch/arm/mach-mx3/devices-imx31.h @@ -16,16 +16,14 @@ #define imx31_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata) -#define imx31_add_imx_uart0(pdata) \ - imx_add_imx_uart_1irq(0, MX31_UART1_BASE_ADDR, SZ_16K, MX31_INT_UART1, pdata) -#define imx31_add_imx_uart1(pdata) \ - imx_add_imx_uart_1irq(1, MX31_UART2_BASE_ADDR, SZ_16K, MX31_INT_UART2, pdata) -#define imx31_add_imx_uart2(pdata) \ - imx_add_imx_uart_1irq(2, MX31_UART3_BASE_ADDR, SZ_16K, MX31_INT_UART3, pdata) -#define imx31_add_imx_uart3(pdata) \ - imx_add_imx_uart_1irq(3, MX31_UART4_BASE_ADDR, SZ_16K, MX31_INT_UART4, pdata) -#define imx31_add_imx_uart4(pdata) \ - imx_add_imx_uart_1irq(4, MX31_UART5_BASE_ADDR, SZ_16K, MX31_INT_UART5, pdata) +extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst; +#define imx31_add_imx_uart(id, pdata) \ + imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata) +#define imx31_add_imx_uart0(pdata) imx31_add_imx_uart(0, pdata) +#define imx31_add_imx_uart1(pdata) imx31_add_imx_uart(1, pdata) +#define imx31_add_imx_uart2(pdata) imx31_add_imx_uart(2, pdata) +#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata) +#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata) #define imx31_add_mxc_nand(pdata) \ imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata) diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index af0bc1f86237..6a76b4d72e49 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -21,12 +21,12 @@ #define imx35_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata) -#define imx35_add_imx_uart0(pdata) \ - imx_add_imx_uart_1irq(0, MX35_UART1_BASE_ADDR, SZ_16K, MX35_INT_UART1, pdata) -#define imx35_add_imx_uart1(pdata) \ - imx_add_imx_uart_1irq(1, MX35_UART2_BASE_ADDR, SZ_16K, MX35_INT_UART2, pdata) -#define imx35_add_imx_uart2(pdata) \ - imx_add_imx_uart_1irq(2, MX35_UART3_BASE_ADDR, SZ_16K, MX35_INT_UART3, pdata) +extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst; +#define imx35_add_imx_uart(id, pdata) \ + imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata) +#define imx35_add_imx_uart0(pdata) imx35_add_imx_uart(0, pdata) +#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata) +#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata) #define imx35_add_mxc_nand(pdata) \ imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index fa3dff1433e8..af7fabba4e71 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -6,55 +6,138 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ +#include #include -struct platform_device *__init imx_add_imx_uart_3irq(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irqrx, resource_size_t irqtx, - resource_size_t irqrts, +#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irqrx = soc ## _INT_UART ## _hwid ## RX, \ + .irqtx = soc ## _INT_UART ## _hwid ## TX, \ + .irqrts = soc ## _INT_UART ## _hwid ## RTS, \ + } + +#define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_UART ## _hwid, \ + } + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst = { +#define imx1_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_3irq_data_entry(MX1, _id, _hwid, 0xd0) + imx1_imx_uart_data_entry(0, 1), + imx1_imx_uart_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX1 */ + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = { +#define imx21_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K) + imx21_imx_uart_data_entry(0, 1), + imx21_imx_uart_data_entry(1, 2), + imx21_imx_uart_data_entry(2, 3), + imx21_imx_uart_data_entry(3, 4), +}; +#endif + +#ifdef CONFIG_ARCH_MX25 +const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = { +#define imx25_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K) + imx25_imx_uart_data_entry(0, 1), + imx25_imx_uart_data_entry(1, 2), + imx25_imx_uart_data_entry(2, 3), + imx25_imx_uart_data_entry(3, 4), + imx25_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = { +#define imx27_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_imx_uart_data_entry(0, 1), + imx27_imx_uart_data_entry(1, 2), + imx27_imx_uart_data_entry(2, 3), + imx27_imx_uart_data_entry(3, 4), + imx27_imx_uart_data_entry(4, 5), + imx27_imx_uart_data_entry(5, 6), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX31 +const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = { +#define imx31_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K) + imx31_imx_uart_data_entry(0, 1), + imx31_imx_uart_data_entry(1, 2), + imx31_imx_uart_data_entry(2, 3), + imx31_imx_uart_data_entry(3, 4), + imx31_imx_uart_data_entry(4, 5), +}; +#endif /* ifdef CONFIG_ARCH_MX31 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = { +#define imx35_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_16K) + imx35_imx_uart_data_entry(0, 1), + imx35_imx_uart_data_entry(1, 2), + imx35_imx_uart_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_ARCH_MX35 */ + +struct platform_device *__init imx_add_imx_uart_3irq( + const struct imx_imx_uart_3irq_data *data, const struct imxuart_platform_data *pdata) { struct resource res[] = { { - .start = iobase, - .end = iobase + iosize - 1, + .start = data->iobase, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { - .start = irqrx, - .end = irqrx, + .start = data->irqrx, + .end = data->irqrx, .flags = IORESOURCE_IRQ, }, { - .start = irqtx, - .end = irqtx, + .start = data->irqtx, + .end = data->irqtx, .flags = IORESOURCE_IRQ, }, { - .start = irqrts, - .end = irqrx, + .start = data->irqrts, + .end = data->irqrx, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("imx-uart", id, res, ARRAY_SIZE(res), - pdata, sizeof(*pdata)); + return imx_add_platform_device("imx-uart", data->id, res, + ARRAY_SIZE(res), pdata, sizeof(*pdata)); } -struct platform_device *__init imx_add_imx_uart_1irq(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irq, +struct platform_device *__init imx_add_imx_uart_1irq( + const struct imx_imx_uart_1irq_data *data, const struct imxuart_platform_data *pdata) { struct resource res[] = { { - .start = iobase, - .end = iobase + iosize - 1, + .start = data->iobase, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { - .start = irq, - .end = irq, + .start = data->irq, + .end = data->irq, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("imx-uart", id, res, ARRAY_SIZE(res), + return imx_add_platform_device("imx-uart", data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index e654287f0ba8..12bdc7d027c7 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -26,14 +26,26 @@ struct platform_device *__init imx_add_imx_i2c(int id, const struct imxi2c_platform_data *pdata); #include -struct platform_device *__init imx_add_imx_uart_3irq(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irqrx, resource_size_t irqtx, - resource_size_t irqrts, +struct imx_imx_uart_3irq_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irqrx; + resource_size_t irqtx; + resource_size_t irqrts; +}; +struct platform_device *__init imx_add_imx_uart_3irq( + const struct imx_imx_uart_3irq_data *data, const struct imxuart_platform_data *pdata); -struct platform_device *__init imx_add_imx_uart_1irq(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irq, + +struct imx_imx_uart_1irq_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_imx_uart_1irq( + const struct imx_imx_uart_1irq_data *data, const struct imxuart_platform_data *pdata); #include From 4697bb926f43b8012ebd111ef43834f42126a0ef Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 25 Aug 2010 17:37:45 +0200 Subject: [PATCH 22/72] ARM: imx: dynamically allocate imx-ssi devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König --- arch/arm/mach-imx/Kconfig | 5 +- arch/arm/mach-imx/devices-imx21.h | 4 + arch/arm/mach-imx/devices-imx27.h | 4 + arch/arm/mach-imx/devices.c | 35 ------- arch/arm/mach-imx/devices.h | 2 - arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 6 +- arch/arm/mach-imx/mach-pca100.c | 5 +- arch/arm/mach-mx25/Kconfig | 4 +- arch/arm/mach-mx25/devices-imx25.h | 4 + arch/arm/mach-mx25/devices.c | 38 ------- arch/arm/mach-mx25/devices.h | 2 - arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c | 6 +- arch/arm/mach-mx3/Kconfig | 6 +- arch/arm/mach-mx3/devices-imx31.h | 4 + arch/arm/mach-mx3/devices-imx35.h | 4 + arch/arm/mach-mx3/devices.c | 42 -------- arch/arm/mach-mx3/devices.h | 3 - arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c | 6 +- arch/arm/mach-mx3/mach-mx31ads.c | 2 +- arch/arm/mach-mx3/mach-pcm043.c | 5 +- arch/arm/plat-mxc/devices/Kconfig | 3 + arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-imx-ssi.c | 98 +++++++++++++++++++ .../plat-mxc/include/mach/devices-common.h | 15 +++ arch/arm/plat-mxc/include/mach/mx25.h | 9 ++ arch/arm/plat-mxc/include/mach/mx31.h | 9 ++ arch/arm/plat-mxc/include/mach/mx35.h | 9 ++ 27 files changed, 187 insertions(+), 144 deletions(-) create mode 100644 arch/arm/plat-mxc/devices/platform-imx-ssi.c diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 19ed16d0017e..9b45f1f523fa 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -146,8 +146,8 @@ choice default MACH_EUKREA_MBIMX27_BASEBOARD config MACH_EUKREA_MBIMX27_BASEBOARD - prompt "Eukrea MBIMX27 development board" - bool + bool "Eukrea MBIMX27 development board" + select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SPI_IMX help @@ -182,6 +182,7 @@ config MACH_IMX27LITE config MACH_PCA100 bool "Phytec phyCARD-s (pca100)" select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SPI_IMX diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index f75b5e4d0ed5..24868c36d824 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -12,6 +12,10 @@ #define imx21_add_i2c_imx(pdata) \ imx_add_imx_i2c(0, MX2x_I2C_BASE_ADDR, SZ_4K, MX2x_INT_I2C, pdata) +extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst; +#define imx21_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata) + extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst; #define imx21_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx21_imx_uart_data[id], pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index bf9dab3a0858..2972e6912af4 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -14,6 +14,10 @@ #define imx27_add_i2c_imx1(pdata) \ imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata) +extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst; +#define imx27_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata) + extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst; #define imx27_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx27_imx_uart_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 9c271a752b84..423fa05dabd0 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -480,41 +480,6 @@ struct platform_device mxc_usbh2 = { }; #endif -#define DEFINE_IMX_SSI_DMARES(_name, ssin, suffix) \ - { \ - .name = _name, \ - .start = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \ - .end = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix, \ - .flags = IORESOURCE_DMA, \ - } - -#define DEFINE_IMX_SSI_DEVICE(n, ssin, baseaddr, irq) \ - static struct resource imx_ssi_resources ## n[] = { \ - { \ - .start = MX2x_SSI ## ssin ## _BASE_ADDR, \ - .end = MX2x_SSI ## ssin ## _BASE_ADDR + 0x6f, \ - .flags = IORESOURCE_MEM, \ - }, { \ - .start = MX2x_INT_SSI1, \ - .end = MX2x_INT_SSI1, \ - .flags = IORESOURCE_IRQ, \ - }, \ - DEFINE_IMX_SSI_DMARES("tx0", ssin, TX0), \ - DEFINE_IMX_SSI_DMARES("rx0", ssin, RX0), \ - DEFINE_IMX_SSI_DMARES("tx1", ssin, TX1), \ - DEFINE_IMX_SSI_DMARES("rx1", ssin, RX1), \ - }; \ - \ - struct platform_device imx_ssi_device ## n = { \ - .name = "imx-ssi", \ - .id = n, \ - .num_resources = ARRAY_SIZE(imx_ssi_resources ## n), \ - .resource = imx_ssi_resources ## n, \ - } - -DEFINE_IMX_SSI_DEVICE(0, 1, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1); -DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1); - /* GPIO port description */ #define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \ { \ diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index efd4527506a5..57d4b1cac039 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -26,7 +26,5 @@ extern struct platform_device mxc_otg_host; extern struct platform_device mxc_usbh1; extern struct platform_device mxc_usbh2; extern struct platform_device mx21_usbhc_device; -extern struct platform_device imx_ssi_device0; -extern struct platform_device imx_ssi_device1; extern struct platform_device imx_kpp_device; #endif diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 4edc5f439201..cb433aeec939 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include "devices-imx27.h" @@ -311,7 +310,8 @@ static struct imxmmc_platform_data sdhc_pdata = { .dat3_card_detect = 1, }; -struct imx_ssi_platform_data eukrea_mbimx27_ssi_pdata = { +static const +struct imx_ssi_platform_data eukrea_mbimx27_ssi_pdata __initconst = { .flags = IMX_SSI_DMA | IMX_SSI_USE_I2S_SLAVE, }; @@ -357,7 +357,7 @@ void __init eukrea_mbimx27_baseboard_init(void) i2c_register_board_info(0, eukrea_mbimx27_i2c_devices, ARRAY_SIZE(eukrea_mbimx27_i2c_devices)); - mxc_register_device(&imx_ssi_device0, &eukrea_mbimx27_ssi_pdata); + imx27_add_imx_ssi(0, &eukrea_mbimx27_ssi_pdata); #if defined(CONFIG_TOUCHSCREEN_ADS7846) \ || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 23c9e1f37b9c..93e0d66e37dc 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include #include @@ -252,7 +251,7 @@ static void pca100_ac97_cold_reset(struct snd_ac97 *ac97) msleep(2); } -static struct imx_ssi_platform_data pca100_ssi_pdata = { +static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = { .ac97_reset = pca100_ac97_cold_reset, .ac97_warm_reset = pca100_ac97_warm_reset, .flags = IMX_SSI_USE_AC97, @@ -389,7 +388,7 @@ static void __init pca100_init(void) if (ret) printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret); - mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata); + imx27_add_imx_ssi(0, &pca100_ssi_pdata); imx27_add_imx_uart0(&uart_pdata); diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig index c71a7bc19284..326bb648f466 100644 --- a/arch/arm/mach-mx25/Kconfig +++ b/arch/arm/mach-mx25/Kconfig @@ -20,8 +20,8 @@ choice default MACH_EUKREA_MBIMXSD25_BASEBOARD config MACH_EUKREA_MBIMXSD25_BASEBOARD - prompt "Eukrea MBIMXSD development board" - bool + bool "Eukrea MBIMXSD development board" + select IMX_HAVE_PLATFORM_IMX_SSI help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index 439400b5d275..bf93facef3d0 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -21,6 +21,10 @@ #define imx25_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata) +extern const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst; +#define imx25_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx25_imx_ssi_data[id], pdata) + extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst; #define imx25_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx25_imx_uart_data[id], pdata) diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 3468eb15b236..bc19e8cc26df 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c @@ -305,44 +305,6 @@ struct platform_device mx25_kpp_device = { .resource = mx25_kpp_resources, }; -static struct resource imx_ssi_resources0[] = { - { - .start = MX25_SSI1_BASE_ADDR, - .end = MX25_SSI1_BASE_ADDR + 0x3fff, - .flags = IORESOURCE_MEM, - }, { - .start = MX25_INT_SSI1, - .end = MX25_INT_SSI1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource imx_ssi_resources1[] = { - { - .start = MX25_SSI2_BASE_ADDR, - .end = MX25_SSI2_BASE_ADDR + 0x3fff, - .flags = IORESOURCE_MEM - }, { - .start = MX25_INT_SSI2, - .end = MX25_INT_SSI2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device imx_ssi_device0 = { - .name = "imx-ssi", - .id = 0, - .num_resources = ARRAY_SIZE(imx_ssi_resources0), - .resource = imx_ssi_resources0, -}; - -struct platform_device imx_ssi_device1 = { - .name = "imx-ssi", - .id = 1, - .num_resources = ARRAY_SIZE(imx_ssi_resources1), - .resource = imx_ssi_resources1, -}; - static struct resource mx25_csi_resources[] = { { .start = MX25_CSI_BASE_ADDR, diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index 4aceb68e35a7..f6e6d3a5f640 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h @@ -11,6 +11,4 @@ extern struct platform_device mx25_rtc_device; extern struct platform_device mx25_fb_device; extern struct platform_device mxc_wdt; extern struct platform_device mx25_kpp_device; -extern struct platform_device imx_ssi_device0; -extern struct platform_device imx_ssi_device1; extern struct platform_device mx25_csi_device; diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c index 4aaadc753d3e..2062dd930955 100644 --- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include "devices-imx25.h" @@ -205,7 +204,8 @@ static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = { }, }; -struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = { +static const +struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = { .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, }; @@ -239,7 +239,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void) imx25_add_imx_uart1(&uart_pdata); mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata); - mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata); + imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); gpio_request(GPIO_LED1, "LED1"); gpio_direction_output(GPIO_LED1, 1); diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 5cee1a5c4bd2..d762bf8e539b 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -17,6 +17,7 @@ config MACH_MX31ADS bool "Support MX31ADS platforms" select ARCH_MX31 select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART default y help @@ -118,6 +119,7 @@ config MACH_PCM043 bool "Support Phytec pcm043 (i.MX35) platforms" select ARCH_MX35 select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_FLEXCAN @@ -172,8 +174,8 @@ choice default MACH_EUKREA_MBIMXSD35_BASEBOARD config MACH_EUKREA_MBIMXSD35_BASEBOARD - prompt "Eukrea MBIMXSD development board" - bool + bool "Eukrea MBIMXSD development board" + select IMX_HAVE_PLATFORM_IMX_SSI help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h index a8c5f1bfce3b..b8568a1af81d 100644 --- a/arch/arm/mach-mx3/devices-imx31.h +++ b/arch/arm/mach-mx3/devices-imx31.h @@ -16,6 +16,10 @@ #define imx31_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata) +extern const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst; +#define imx31_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata) + extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst; #define imx31_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata) diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index 6a76b4d72e49..813e570fd3ba 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -21,6 +21,10 @@ #define imx35_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata) +extern const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst; +#define imx35_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata) + extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst; #define imx35_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata) diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index a4fd1a26fc91..87a9a21457b9 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -302,44 +302,6 @@ struct platform_device mxc_fec_device = { }; #endif -static struct resource imx_ssi_resources0[] = { - { - .start = SSI1_BASE_ADDR, - .end = SSI1_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, { - .start = MX31_INT_SSI1, - .end = MX31_INT_SSI1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource imx_ssi_resources1[] = { - { - .start = SSI2_BASE_ADDR, - .end = SSI2_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM - }, { - .start = MX31_INT_SSI2, - .end = MX31_INT_SSI2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device imx_ssi_device0 = { - .name = "imx-ssi", - .id = 0, - .num_resources = ARRAY_SIZE(imx_ssi_resources0), - .resource = imx_ssi_resources0, -}; - -struct platform_device imx_ssi_device1 = { - .name = "imx-ssi", - .id = 1, - .num_resources = ARRAY_SIZE(imx_ssi_resources1), - .resource = imx_ssi_resources1, -}; - static struct resource imx_wdt_resources[] = { { .flags = IORESOURCE_MEM, @@ -410,10 +372,6 @@ static int __init mx3_devices_init(void) mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; mxc_usbh1_resources[1].start = MXC_INT_USBHS; mxc_usbh1_resources[1].end = MXC_INT_USBHS; - imx_ssi_resources0[1].start = MX35_INT_SSI1; - imx_ssi_resources0[1].end = MX35_INT_SSI1; - imx_ssi_resources1[1].start = MX35_INT_SSI2; - imx_ssi_resources1[1].end = MX35_INT_SSI2; imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; } diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index e5535234839f..2a69465bc542 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h @@ -10,9 +10,6 @@ extern struct platform_device mxc_otg_host; extern struct platform_device mxc_usbh1; extern struct platform_device mxc_usbh2; extern struct platform_device mxc_rnga_device; -extern struct platform_device imx_ssi_device0; -extern struct platform_device imx_ssi_device1; -extern struct platform_device imx_ssi_device1; extern struct platform_device imx_wdt_device0; extern struct platform_device imx_rtc_device0; extern struct platform_device imx_kpp_device; diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c index f8f15e3ac7a0..cb667b6f17ae 100644 --- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c @@ -43,7 +43,6 @@ #include #include #include -#include #include "devices-imx35.h" #include "devices.h" @@ -206,7 +205,8 @@ static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = { }, }; -struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = { +static const +struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = { .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, }; @@ -242,7 +242,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void) mxc_register_device(&mx3_ipu, &mx3_ipu_data); mxc_register_device(&mx3_fb, &mx3fb_pdata); - mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata); + imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); gpio_request(GPIO_LED1, "LED1"); gpio_direction_output(GPIO_LED1, 1); diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c index 94b3e7c42404..96cedc4a47f5 100644 --- a/arch/arm/mach-mx3/mach-mx31ads.c +++ b/arch/arm/mach-mx3/mach-mx31ads.c @@ -517,7 +517,7 @@ static unsigned int ssi_pins[] = { static void mxc_init_audio(void) { - mxc_register_device(&imx_ssi_device0, NULL); + imx31_add_imx_ssi(0, NULL); mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi"); } diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index 28886f0e62f9..dcc216bb3952 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c @@ -42,7 +42,6 @@ #include #include #include -#include #include "devices-imx35.h" #include "devices.h" @@ -293,7 +292,7 @@ static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97) mdelay(1); } -static struct imx_ssi_platform_data pcm043_ssi_pdata = { +static const struct imx_ssi_platform_data pcm043_ssi_pdata __initconst = { .ac97_reset = pcm043_ac97_cold_reset, .ac97_warm_reset = pcm043_ac97_warm_reset, .flags = IMX_SSI_USE_AC97, @@ -361,7 +360,7 @@ static void __init mxc_board_init(void) imx35_add_imx_uart0(&uart_pdata); imx35_add_mxc_nand(&pcm037_nand_board_info); - mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata); + imx35_add_imx_ssi(0, &pcm043_ssi_pdata); imx35_add_imx_uart1(&uart_pdata); diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 9ab784b776f9..d736c3d4e292 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -5,6 +5,9 @@ config IMX_HAVE_PLATFORM_FLEXCAN config IMX_HAVE_PLATFORM_IMX_I2C bool +config IMX_HAVE_PLATFORM_IMX_SSI + bool + config IMX_HAVE_PLATFORM_IMX_UART bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 2062ab4d094d..ac7738379374 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c new file mode 100644 index 000000000000..1535bc9f0601 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ + [_id] = { \ + .id = _id, \ + .iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_SSI ## _hwid, \ + .dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \ + .dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \ + .dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \ + .dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = { +#define imx21_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K) + imx21_imx_ssi_data_entry(0, 1), + imx21_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_ARCH_MX25 +const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst = { +#define imx25_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX25, _id, _hwid, SZ_4K) + imx25_imx_ssi_data_entry(0, 1), + imx25_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = { +#define imx27_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_imx_ssi_data_entry(0, 1), + imx27_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX31 +const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst = { +#define imx31_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K) + imx31_imx_ssi_data_entry(0, 1), + imx31_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX31 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { +#define imx35_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K) + imx35_imx_ssi_data_entry(0, 1), + imx35_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX35 */ + +struct platform_device *__init imx_add_imx_ssi( + const struct imx_imx_ssi_data *data, + const struct imx_ssi_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, +#define DMARES(_name) { \ + .name = #_name, \ + .start = data->dma ## _name, \ + .end = data->dma ## _name, \ + .flags = IORESOURCE_DMA, \ +} + DMARES(tx0), + DMARES(rx0), + DMARES(tx1), + DMARES(rx1), + }; + + return imx_add_platform_device("imx-ssi", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 12bdc7d027c7..84bfe44ec2cd 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -25,6 +25,21 @@ struct platform_device *__init imx_add_imx_i2c(int id, resource_size_t iobase, resource_size_t iosize, int irq, const struct imxi2c_platform_data *pdata); +#include +struct imx_imx_ssi_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; + resource_size_t dmatx0; + resource_size_t dmarx0; + resource_size_t dmatx1; + resource_size_t dmarx1; +}; +struct platform_device *__init imx_add_imx_ssi( + const struct imx_imx_ssi_data *data, + const struct imx_ssi_platform_data *pdata); + #include struct imx_imx_uart_3irq_data { int id; diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 4a6f800990f8..8f809eb084df 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -77,4 +77,13 @@ #define MX25_INT_UART1 45 #define MX25_INT_FEC 57 +#define MX25_DMA_REQ_SSI2_RX1 22 +#define MX25_DMA_REQ_SSI2_TX1 23 +#define MX25_DMA_REQ_SSI2_RX0 24 +#define MX25_DMA_REQ_SSI2_TX0 25 +#define MX25_DMA_REQ_SSI1_RX1 26 +#define MX25_DMA_REQ_SSI1_TX1 27 +#define MX25_DMA_REQ_SSI1_RX0 28 +#define MX25_DMA_REQ_SSI1_TX0 29 + #endif /* ifndef __MACH_MX25_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index afee3ab9d62e..eb8bbc7eedfa 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -197,6 +197,15 @@ static inline void mx31_setup_weimcs(size_t cs, #define MX31_INT_EXT_WDOG 62 #define MX31_INT_EXT_TV 63 +#define MX31_DMA_REQ_SSI2_RX1 22 +#define MX31_DMA_REQ_SSI2_TX1 23 +#define MX31_DMA_REQ_SSI2_RX0 24 +#define MX31_DMA_REQ_SSI2_TX0 25 +#define MX31_DMA_REQ_SSI1_RX1 26 +#define MX31_DMA_REQ_SSI1_TX1 27 +#define MX31_DMA_REQ_SSI1_RX0 28 +#define MX31_DMA_REQ_SSI1_TX0 29 + #define MX31_PROD_SIGNATURE 0x1 /* For MX31 */ /* silicon revisions specific to i.MX31 */ diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index af3038c12e39..867b8c0ca105 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -173,6 +173,15 @@ #define MX35_INT_EXT_WDOG 62 #define MX35_INT_EXT_TV 63 +#define MX35_DMA_REQ_SSI2_RX1 22 +#define MX35_DMA_REQ_SSI2_TX1 23 +#define MX35_DMA_REQ_SSI2_RX0 24 +#define MX35_DMA_REQ_SSI2_TX0 25 +#define MX35_DMA_REQ_SSI1_RX1 26 +#define MX35_DMA_REQ_SSI1_TX1 27 +#define MX35_DMA_REQ_SSI1_RX0 28 +#define MX35_DMA_REQ_SSI1_TX0 29 + #define MX35_PROD_SIGNATURE 0x1 /* For MX31 */ /* silicon revisions specific to i.MX31 */ From 64de5ec168d9743903e6ec482c3e9f37af49f9c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 21 Sep 2010 12:13:34 +0200 Subject: [PATCH 23/72] ARM: imx: reorganize imx-i2c device registration to use a struct per SoC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König --- arch/arm/mach-imx/devices-imx1.h | 3 +- arch/arm/mach-imx/devices-imx21.h | 3 +- arch/arm/mach-imx/devices-imx27.h | 9 ++- arch/arm/mach-mx25/devices-imx25.h | 12 +-- arch/arm/mach-mx3/devices-imx31.h | 12 +-- arch/arm/mach-mx3/devices-imx35.h | 12 +-- arch/arm/plat-mxc/devices/platform-imx-i2c.c | 75 +++++++++++++++++-- .../plat-mxc/include/mach/devices-common.h | 10 ++- arch/arm/plat-mxc/include/mach/mx51.h | 4 +- 9 files changed, 105 insertions(+), 35 deletions(-) diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h index 2861cb8b100a..6cf08640dae9 100644 --- a/arch/arm/mach-imx/devices-imx1.h +++ b/arch/arm/mach-imx/devices-imx1.h @@ -9,8 +9,9 @@ #include #include +extern const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst; #define imx1_add_i2c_imx(pdata) \ - imx_add_imx_i2c(0, MX1_I2C_BASE_ADDR, SZ_4K, MX1_INT_I2C, pdata) + imx_add_imx_i2c(&imx1_imx_i2c_data, pdata) extern const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst; #define imx1_add_imx_uart(id, pdata) \ diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 24868c36d824..d3d2b2669b96 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -9,8 +9,9 @@ #include #include +extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; #define imx21_add_i2c_imx(pdata) \ - imx_add_imx_i2c(0, MX2x_I2C_BASE_ADDR, SZ_4K, MX2x_INT_I2C, pdata) + imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst; #define imx21_add_imx_ssi(id, pdata) \ diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 2972e6912af4..193dfb55023b 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -9,10 +9,11 @@ #include #include -#define imx27_add_i2c_imx0(pdata) \ - imx_add_imx_i2c(0, MX27_I2C1_BASE_ADDR, SZ_4K, MX27_INT_I2C1, pdata) -#define imx27_add_i2c_imx1(pdata) \ - imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata) +extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; +#define imx27_add_imx_i2c(id, pdata) \ + imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) +#define imx27_add_i2c_imx0(pdata) imx27_add_imx_i2c(0, pdata) +#define imx27_add_i2c_imx1(pdata) imx27_add_imx_i2c(1, pdata) extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst; #define imx27_add_imx_ssi(id, pdata) \ diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index bf93facef3d0..1dd95721d9f5 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -14,12 +14,12 @@ #define imx25_add_flexcan1(pdata) \ imx_add_flexcan(1, MX25_CAN2_BASE_ADDR, SZ_16K, MX25_INT_CAN2, pdata) -#define imx25_add_imx_i2c0(pdata) \ - imx_add_imx_i2c(0, MX25_I2C1_BASE_ADDR, SZ_16K, MX25_INT_I2C1, pdata) -#define imx25_add_imx_i2c1(pdata) \ - imx_add_imx_i2c(1, MX25_I2C2_BASE_ADDR, SZ_16K, MX25_INT_I2C2, pdata) -#define imx25_add_imx_i2c2(pdata) \ - imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata) +extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst; +#define imx25_add_imx_i2c(id, pdata) \ + imx_add_imx_i2c(&imx25_imx_i2c_data[id], pdata) +#define imx25_add_imx_i2c0(pdata) imx25_add_imx_i2c(0, pdata) +#define imx25_add_imx_i2c1(pdata) imx25_add_imx_i2c(1, pdata) +#define imx25_add_imx_i2c2(pdata) imx25_add_imx_i2c(2, pdata) extern const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst; #define imx25_add_imx_ssi(id, pdata) \ diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h index b8568a1af81d..eea425ff074e 100644 --- a/arch/arm/mach-mx3/devices-imx31.h +++ b/arch/arm/mach-mx3/devices-imx31.h @@ -9,12 +9,12 @@ #include #include -#define imx31_add_imx_i2c0(pdata) \ - imx_add_imx_i2c(0, MX31_I2C1_BASE_ADDR, SZ_4K, MX31_INT_I2C1, pdata) -#define imx31_add_imx_i2c1(pdata) \ - imx_add_imx_i2c(1, MX31_I2C2_BASE_ADDR, SZ_4K, MX31_INT_I2C2, pdata) -#define imx31_add_imx_i2c2(pdata) \ - imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata) +extern const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst; +#define imx31_add_imx_i2c(id, pdata) \ + imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata) +#define imx31_add_imx_i2c0(pdata) imx31_add_imx_i2c(0, pdata) +#define imx31_add_imx_i2c1(pdata) imx31_add_imx_i2c(1, pdata) +#define imx31_add_imx_i2c2(pdata) imx31_add_imx_i2c(2, pdata) extern const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst; #define imx31_add_imx_ssi(id, pdata) \ diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index 813e570fd3ba..f187d3552738 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -14,12 +14,12 @@ #define imx35_add_flexcan1(pdata) \ imx_add_flexcan(1, MX35_CAN2_BASE_ADDR, SZ_16K, MX35_INT_CAN2, pdata) -#define imx35_add_imx_i2c0(pdata) \ - imx_add_imx_i2c(0, MX35_I2C1_BASE_ADDR, SZ_4K, MX35_INT_I2C1, pdata) -#define imx35_add_imx_i2c1(pdata) \ - imx_add_imx_i2c(1, MX35_I2C2_BASE_ADDR, SZ_4K, MX35_INT_I2C2, pdata) -#define imx35_add_imx_i2c2(pdata) \ - imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata) +extern const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst; +#define imx35_add_imx_i2c(id, pdata) \ + imx_add_imx_i2c(&imx35_imx_i2c_data[id], pdata) +#define imx35_add_imx_i2c0(pdata) imx35_add_imx_i2c(0, pdata) +#define imx35_add_imx_i2c1(pdata) imx35_add_imx_i2c(1, pdata) +#define imx35_add_imx_i2c2(pdata) imx35_add_imx_i2c(2, pdata) extern const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst; #define imx35_add_imx_ssi(id, pdata) \ diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index d0af9f7d8aed..ab9670b96c8a 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c @@ -6,24 +6,85 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ +#include #include -struct platform_device *__init imx_add_imx_i2c(int id, - resource_size_t iobase, resource_size_t iosize, int irq, +#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_I2C ## _hwid, \ + } + +#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = + imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = + imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_ARCH_MX25 +const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { +#define imx25_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K) + imx25_imx_i2c_data_entry(0, 1), + imx25_imx_i2c_data_entry(1, 2), + imx25_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { +#define imx27_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K) + imx27_imx_i2c_data_entry(0, 1), + imx27_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX31 +const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { +#define imx31_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K) + imx31_imx_i2c_data_entry(0, 1), + imx31_imx_i2c_data_entry(1, 2), + imx31_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_ARCH_MX31 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { +#define imx35_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K) + imx35_imx_i2c_data_entry(0, 1), + imx35_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX35 */ + +struct platform_device *__init imx_add_imx_i2c( + const struct imx_imx_i2c_data *data, const struct imxi2c_platform_data *pdata) { struct resource res[] = { { - .start = iobase, - .end = iobase + iosize - 1, + .start = data->iobase, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { - .start = irq, - .end = irq, + .start = data->irq, + .end = data->irq, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("imx-i2c", id, res, ARRAY_SIZE(res), + return imx_add_platform_device("imx-i2c", data->id, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 84bfe44ec2cd..490fe7c3ed5f 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -21,8 +21,14 @@ struct platform_device *__init imx_add_flexcan(int id, const struct flexcan_platform_data *pdata); #include -struct platform_device *__init imx_add_imx_i2c(int id, - resource_size_t iobase, resource_size_t iosize, int irq, +struct imx_imx_i2c_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_imx_i2c( + const struct imx_imx_i2c_data *data, const struct imxi2c_platform_data *pdata); #include diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index f6026506c5ef..b919235768a0 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -341,8 +341,8 @@ #define MX51_MXC_INT_WDOG2 59 #define MX51_MXC_INT_KPP 60 #define MX51_MXC_INT_PWM1 61 -#define MX51_MXC_INT_I2C1 62 -#define MX51_MXC_INT_I2C2 63 +#define MX51_INT_I2C1 62 +#define MX51_INT_I2C2 63 #define MX51_MXC_INT_HS_I2C 64 #define MX51_MXC_INT_RESV65 65 #define MX51_MXC_INT_RESV66 66 From 44505c0768971f4aa94ca09c8155448a46a7ff8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 30 Sep 2010 16:44:53 +0200 Subject: [PATCH 24/72] ARM: mx5: dynamically register imx-i2c devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 2 ++ arch/arm/mach-mx5/board-cpuimx51.c | 6 ++-- arch/arm/mach-mx5/board-mx51_babbage.c | 7 ++-- arch/arm/mach-mx5/devices-imx51.h | 14 ++++++++ arch/arm/mach-mx5/devices.c | 38 -------------------- arch/arm/mach-mx5/devices.h | 2 -- arch/arm/plat-mxc/devices/platform-imx-i2c.c | 9 +++++ 7 files changed, 31 insertions(+), 47 deletions(-) create mode 100644 arch/arm/mach-mx5/devices-imx51.h diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 0848db5dd364..e57caefb1f28 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -10,6 +10,7 @@ comment "MX5 platforms:" config MACH_MX51_BABBAGE bool "Support MX51 BABBAGE platforms" + select IMX_HAVE_PLATFORM_IMX_I2C help Include support for MX51 Babbage platform, also known as MX51EVK in u-boot. This includes specific configurations for the board and its @@ -24,6 +25,7 @@ config MACH_MX51_3DS config MACH_EUKREA_CPUIMX51 bool "Support Eukrea CPUIMX51 module" + select IMX_HAVE_PLATFORM_IMX_I2C help Include support for Eukrea CPUIMX51 platform. This includes specific configurations for the module and its peripherals. diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 623607a20f57..d52f2527f6bf 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include @@ -152,7 +151,8 @@ static struct imxuart_platform_data uart_pdata = { .flags = IMXUART_HAVE_RTSCTS, }; -static struct imxi2c_platform_data eukrea_cpuimx51_i2c_data = { +static const +struct imxi2c_platform_data eukrea_cpuimx51_i2c_data __initconst = { .bitrate = 100000, }; @@ -255,7 +255,7 @@ static void __init eukrea_cpuimx51_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); - mxc_register_device(&mxc_i2c_device1, &eukrea_cpuimx51_i2c_data); + imx51_add_imx_i2c(1, &eukrea_cpuimx51_i2c_data); i2c_register_board_info(1, eukrea_cpuimx51_i2c_devices, ARRAY_SIZE(eukrea_cpuimx51_i2c_devices)); diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index caa8f680649e..3f3075d7768f 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include @@ -137,7 +136,7 @@ static inline void mxc_init_imx_uart(void) } #endif /* SERIAL_IMX */ -static struct imxi2c_platform_data babbage_i2c_data = { +static const struct imxi2c_platform_data babbage_i2c_data __initconst = { .bitrate = 100000, }; @@ -293,8 +292,8 @@ static void __init mxc_board_init(void) babbage_fec_reset(); platform_add_devices(devices, ARRAY_SIZE(devices)); - mxc_register_device(&mxc_i2c_device0, &babbage_i2c_data); - mxc_register_device(&mxc_i2c_device1, &babbage_i2c_data); + imx51_add_imx_i2c(0, &babbage_i2c_data); + imx51_add_imx_i2c(1, &babbage_i2c_data); mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data); if (otg_mode_host) diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h new file mode 100644 index 000000000000..a3cc3834c9fe --- /dev/null +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +extern const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst; +#define imx51_add_imx_i2c(id, pdata) \ + imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 1920ff4963b2..70b76d16391c 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c @@ -93,44 +93,6 @@ struct platform_device mxc_fec_device = { .resource = mxc_fec_resources, }; -static struct resource mxc_i2c0_resources[] = { - { - .start = MX51_I2C1_BASE_ADDR, - .end = MX51_I2C1_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MX51_MXC_INT_I2C1, - .end = MX51_MXC_INT_I2C1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_i2c_device0 = { - .name = "imx-i2c", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_i2c0_resources), - .resource = mxc_i2c0_resources, -}; - -static struct resource mxc_i2c1_resources[] = { - { - .start = MX51_I2C2_BASE_ADDR, - .end = MX51_I2C2_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MX51_MXC_INT_I2C2, - .end = MX51_MXC_INT_I2C2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_i2c_device1 = { - .name = "imx-i2c", - .id = 1, - .num_resources = ARRAY_SIZE(mxc_i2c1_resources), - .resource = mxc_i2c1_resources, -}; - static struct resource mxc_hsi2c_resources[] = { { .start = MX51_HSI2C_DMA_BASE_ADDR, diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index e509cfaad1d4..5c2918fcec0d 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h @@ -6,7 +6,5 @@ extern struct platform_device mxc_usbdr_host_device; extern struct platform_device mxc_usbh1_device; extern struct platform_device mxc_usbdr_udc_device; extern struct platform_device mxc_wdt; -extern struct platform_device mxc_i2c_device0; -extern struct platform_device mxc_i2c_device1; extern struct platform_device mxc_hsi2c_device; extern struct platform_device mxc_keypad_device; diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index ab9670b96c8a..ca988d40a3d7 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c @@ -68,6 +68,15 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { }; #endif /* ifdef CONFIG_ARCH_MX35 */ +#ifdef CONFIG_ARCH_MX51 +const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { +#define imx51_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K) + imx51_imx_i2c_data_entry(0, 1), + imx51_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX51 */ + struct platform_device *__init imx_add_imx_i2c( const struct imx_imx_i2c_data *data, const struct imxi2c_platform_data *pdata) From 77a406da5a5b76445a816d5f043fc9aef4026ff1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 25 Aug 2010 12:19:50 +0200 Subject: [PATCH 25/72] ARM: imx: fix name of macros to add imx-i2c devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is a follow up to c698715 (ARM: imx: dynamically register imx-i2c devices (imx27)) 2b92084 (ARM: imx: dynamically register imx-i2c devices (imx21)) 6348e6b (ARM: imx: dynamically register imx-i2c devices (imx1)) Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/devices-imx1.h | 2 +- arch/arm/mach-imx/devices-imx21.h | 2 +- arch/arm/mach-imx/devices-imx27.h | 2 -- arch/arm/mach-imx/mach-cpuimx27.c | 2 +- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 4 ++-- arch/arm/mach-imx/mach-mx1ads.c | 2 +- arch/arm/mach-imx/mach-mx27ads.c | 2 +- arch/arm/mach-imx/mach-mxt_td60.c | 4 ++-- arch/arm/mach-imx/mach-pca100.c | 2 +- arch/arm/mach-imx/mach-pcm038.c | 2 +- 10 files changed, 11 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h index 6cf08640dae9..81979486218e 100644 --- a/arch/arm/mach-imx/devices-imx1.h +++ b/arch/arm/mach-imx/devices-imx1.h @@ -10,7 +10,7 @@ #include extern const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst; -#define imx1_add_i2c_imx(pdata) \ +#define imx1_add_imx_i2c(pdata) \ imx_add_imx_i2c(&imx1_imx_i2c_data, pdata) extern const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst; diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index d3d2b2669b96..4795d70314db 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -10,7 +10,7 @@ #include extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; -#define imx21_add_i2c_imx(pdata) \ +#define imx21_add_imx_i2c(pdata) \ imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst; diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 193dfb55023b..176552199abc 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -12,8 +12,6 @@ extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; #define imx27_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) -#define imx27_add_i2c_imx0(pdata) imx27_add_imx_i2c(0, pdata) -#define imx27_add_i2c_imx1(pdata) imx27_add_imx_i2c(1, pdata) extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst; #define imx27_add_imx_ssi(id, pdata) \ diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 339150ab0ea5..f00ddd9829b5 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -259,7 +259,7 @@ static void __init eukrea_cpuimx27_init(void) i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); - imx27_add_i2c_imx1(&cpuimx27_i2c1_data); + imx27_add_imx_i2c(1, &cpuimx27_i2c1_data); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 6dad632b83d6..7b3eed043ef1 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -236,8 +236,8 @@ static void __init visstrim_m10_board_init(void) i2c_register_board_info(0, visstrim_m10_i2c_devices, ARRAY_SIZE(visstrim_m10_i2c_devices)); - imx27_add_i2c_imx0(&visstrim_m10_i2c_data); - imx27_add_i2c_imx1(&visstrim_m10_i2c_data); + imx27_add_imx_i2c(0, &visstrim_m10_i2c_data); + imx27_add_imx_i2c(1, &visstrim_m10_i2c_data); mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata); mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 77a760cfadc0..6e2f24952f1b 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c @@ -131,7 +131,7 @@ static void __init mx1ads_init(void) i2c_register_board_info(0, mx1ads_i2c_devices, ARRAY_SIZE(mx1ads_i2c_devices)); - imx1_add_i2c_imx(&mx1ads_i2c_data); + imx1_add_imx_i2c(&mx1ads_i2c_data); } static void __init mx1ads_timer_init(void) diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 9c77da98a10e..6be6033c876d 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -308,7 +308,7 @@ static void __init mx27ads_board_init(void) /* only the i2c master 1 is used on this CPU card */ i2c_register_board_info(1, mx27ads_i2c_devices, ARRAY_SIZE(mx27ads_i2c_devices)); - imx27_add_i2c_imx1(&mx27ads_i2c1_data); + imx27_add_imx_i2c(1, &mx27ads_i2c1_data); mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index a3a1e452d4c5..d878bb99be7e 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -255,8 +255,8 @@ static void __init mxt_td60_board_init(void) i2c_register_board_info(1, mxt_td60_i2c2_devices, ARRAY_SIZE(mxt_td60_i2c2_devices)); - imx27_add_i2c_imx0(&mxt_td60_i2c0_data); - imx27_add_i2c_imx1(&mxt_td60_i2c1_data); + imx27_add_imx_i2c(0, &mxt_td60_i2c0_data); + imx27_add_imx_i2c(1, &mxt_td60_i2c1_data); mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 93e0d66e37dc..cccf521de6b1 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -400,7 +400,7 @@ static void __init pca100_init(void) i2c_register_board_info(1, pca100_i2c_devices, ARRAY_SIZE(pca100_i2c_devices)); - imx27_add_i2c_imx1(&pca100_i2c1_data); + imx27_add_imx_i2c(1, &pca100_i2c1_data); #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN); diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 9212e8f37001..641f9bb08b26 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -309,7 +309,7 @@ static void __init pcm038_init(void) i2c_register_board_info(1, pcm038_i2c_devices, ARRAY_SIZE(pcm038_i2c_devices)); - imx27_add_i2c_imx1(&pcm038_i2c1_data); + imx27_add_imx_i2c(1, &pcm038_i2c1_data); /* PE18 for user-LED D40 */ mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT); From e89524d33deb55de28b4ab171e4b0f89d46b2d4e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 9 Sep 2010 11:12:12 +0200 Subject: [PATCH 26/72] spi/imx: default to m on platforms that have such devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- drivers/spi/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 91c2f4f3af10..30aea6de4e37 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -147,6 +147,7 @@ config SPI_IMX tristate "Freescale i.MX SPI controllers" depends on ARCH_MXC select SPI_BITBANG + default m if IMX_HAVE_PLATFORM_SPI_IMX help This enables using the Freescale i.MX SPI controllers in master mode. From f4ba6315cb77a5dcff6664ce1d66ebfe31bcc6b1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 9 Sep 2010 15:29:01 +0200 Subject: [PATCH 27/72] spi/imx: convert driver to use platform ids MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This has the advantage not to need to much cpu_is_... macros. Still more when imx51 support is added which has two different spi interfaces which would introduce additional checks on the device id. With this setup it's not possible for the compiler anymore to detect the unused functions, so four additional kconfig symbols are introduced to ifdef out the unneeded functions in the callback array and all these functions are marked with __maybe_unused to suppress the corresponding gcc warnings. Comparing the driver footprint with and without the patch for a mx27 kernel yields: add/remove: 2/0 grow/shrink: 2/0 up/down: 280/0 (280) function old new delta spi_imx_devtype - 192 +192 spi_imx_probe 980 1032 +52 spi_imx_devtype_data - 32 +32 spi_imx_setupxfer 276 280 +4 Later when the platform code is updated to use the platform ids, the autodetection can be removed which will make the driver a bit smaller again. (~60 Bytes in my test.) Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- drivers/spi/Kconfig | 12 +++ drivers/spi/spi_imx.c | 173 ++++++++++++++++++++++++++++++++---------- 2 files changed, 143 insertions(+), 42 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 30aea6de4e37..4e9d77bc7d2f 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -143,6 +143,18 @@ config SPI_GPIO GPIO operations, you should be able to leverage that for better speed with a custom version of this driver; see the source code. +config SPI_IMX_VER_IMX1 + def_bool y if SOC_IMX1 + +config SPI_IMX_VER_0_0 + def_bool y if SOC_IMX21 || SOC_IMX27 + +config SPI_IMX_VER_0_4 + def_bool y if ARCH_MX31 + +config SPI_IMX_VER_0_7 + def_bool y if ARCH_MX25 || ARCH_MX35 + config SPI_IMX tristate "Freescale i.MX SPI controllers" depends on ARCH_MXC diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 7972e9077473..20cdee3b5a2e 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -59,6 +59,24 @@ struct spi_imx_config { int cs; }; +enum spi_imx_devtype { + SPI_IMX_VER_IMX1, + SPI_IMX_VER_0_0, + SPI_IMX_VER_0_4, + SPI_IMX_VER_0_5, + SPI_IMX_VER_0_7, + SPI_IMX_VER_AUTODETECT, +}; + +struct spi_imx_data; + +struct spi_imx_devtype_data { + void (*intctrl)(struct spi_imx_data *, int); + int (*config)(struct spi_imx_data *, struct spi_imx_config *); + void (*trigger)(struct spi_imx_data *); + int (*rx_available)(struct spi_imx_data *); +}; + struct spi_imx_data { struct spi_bitbang bitbang; @@ -76,11 +94,7 @@ struct spi_imx_data { const void *tx_buf; unsigned int txfifo; /* number of words pushed in tx FIFO */ - /* SoC specific functions */ - void (*intctrl)(struct spi_imx_data *, int); - int (*config)(struct spi_imx_data *, struct spi_imx_config *); - void (*trigger)(struct spi_imx_data *); - int (*rx_available)(struct spi_imx_data *); + struct spi_imx_devtype_data devtype_data; }; #define MXC_SPI_BUF_RX(type) \ @@ -178,7 +192,7 @@ static unsigned int spi_imx_clkdiv_2(unsigned int fin, * the i.MX35 has a slightly different register layout for bits * we do not use here. */ -static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable) +static void __maybe_unused mx31_intctrl(struct spi_imx_data *spi_imx, int enable) { unsigned int val = 0; @@ -190,7 +204,7 @@ static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable) writel(val, spi_imx->base + MXC_CSPIINT); } -static void mx31_trigger(struct spi_imx_data *spi_imx) +static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx) { unsigned int reg; @@ -199,7 +213,7 @@ static void mx31_trigger(struct spi_imx_data *spi_imx) writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int mx31_config(struct spi_imx_data *spi_imx, +static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; @@ -232,7 +246,7 @@ static int mx31_config(struct spi_imx_data *spi_imx, return 0; } -static int mx31_rx_available(struct spi_imx_data *spi_imx) +static int __maybe_unused mx31_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; } @@ -250,7 +264,7 @@ static int mx31_rx_available(struct spi_imx_data *spi_imx) #define MX27_CSPICTRL_DR_SHIFT 14 #define MX27_CSPICTRL_CS_SHIFT 19 -static void mx27_intctrl(struct spi_imx_data *spi_imx, int enable) +static void __maybe_unused mx27_intctrl(struct spi_imx_data *spi_imx, int enable) { unsigned int val = 0; @@ -262,7 +276,7 @@ static void mx27_intctrl(struct spi_imx_data *spi_imx, int enable) writel(val, spi_imx->base + MXC_CSPIINT); } -static void mx27_trigger(struct spi_imx_data *spi_imx) +static void __maybe_unused mx27_trigger(struct spi_imx_data *spi_imx) { unsigned int reg; @@ -271,7 +285,7 @@ static void mx27_trigger(struct spi_imx_data *spi_imx) writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int mx27_config(struct spi_imx_data *spi_imx, +static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; @@ -294,7 +308,7 @@ static int mx27_config(struct spi_imx_data *spi_imx, return 0; } -static int mx27_rx_available(struct spi_imx_data *spi_imx) +static int __maybe_unused mx27_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MXC_CSPIINT) & MX27_INTREG_RR; } @@ -310,7 +324,7 @@ static int mx27_rx_available(struct spi_imx_data *spi_imx) #define MX1_CSPICTRL_MASTER (1 << 10) #define MX1_CSPICTRL_DR_SHIFT 13 -static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable) +static void __maybe_unused mx1_intctrl(struct spi_imx_data *spi_imx, int enable) { unsigned int val = 0; @@ -322,7 +336,7 @@ static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable) writel(val, spi_imx->base + MXC_CSPIINT); } -static void mx1_trigger(struct spi_imx_data *spi_imx) +static void __maybe_unused mx1_trigger(struct spi_imx_data *spi_imx) { unsigned int reg; @@ -331,7 +345,7 @@ static void mx1_trigger(struct spi_imx_data *spi_imx) writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int mx1_config(struct spi_imx_data *spi_imx, +static int __maybe_unused mx1_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; @@ -350,11 +364,50 @@ static int mx1_config(struct spi_imx_data *spi_imx, return 0; } -static int mx1_rx_available(struct spi_imx_data *spi_imx) +static int __maybe_unused mx1_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; } +/* + * These version numbers are taken from the Freescale driver. Unfortunately it + * doesn't support i.MX1, so this entry doesn't match the scheme. :-( + */ +static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { +#ifdef CONFIG_SPI_IMX_VER_IMX1 + [SPI_IMX_VER_IMX1] = { + .intctrl = mx1_intctrl, + .config = mx1_config, + .trigger = mx1_trigger, + .rx_available = mx1_rx_available, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_0_0 + [SPI_IMX_VER_0_0] = { + .intctrl = mx27_intctrl, + .config = mx27_config, + .trigger = mx27_trigger, + .rx_available = mx27_rx_available, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_0_4 + [SPI_IMX_VER_0_4] = { + .intctrl = mx31_intctrl, + .config = mx31_config, + .trigger = mx31_trigger, + .rx_available = mx31_rx_available, + }, +#endif +#ifdef CONFIG_SPI_IMX_VER_0_7 + [SPI_IMX_VER_0_7] = { + .intctrl = mx31_intctrl, + .config = mx31_config, + .trigger = mx31_trigger, + .rx_available = mx31_rx_available, + }, +#endif +}; + static void spi_imx_chipselect(struct spi_device *spi, int is_active) { struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); @@ -377,14 +430,14 @@ static void spi_imx_push(struct spi_imx_data *spi_imx) spi_imx->txfifo++; } - spi_imx->trigger(spi_imx); + spi_imx->devtype_data.trigger(spi_imx); } static irqreturn_t spi_imx_isr(int irq, void *dev_id) { struct spi_imx_data *spi_imx = dev_id; - while (spi_imx->rx_available(spi_imx)) { + while (spi_imx->devtype_data.rx_available(spi_imx)) { spi_imx->rx(spi_imx); spi_imx->txfifo--; } @@ -398,11 +451,12 @@ static irqreturn_t spi_imx_isr(int irq, void *dev_id) /* No data left to push, but still waiting for rx data, * enable receive data available interrupt. */ - spi_imx->intctrl(spi_imx, MXC_INT_RR); + spi_imx->devtype_data.intctrl( + spi_imx, MXC_INT_RR); return IRQ_HANDLED; } - spi_imx->intctrl(spi_imx, 0); + spi_imx->devtype_data.intctrl(spi_imx, 0); complete(&spi_imx->xfer_done); return IRQ_HANDLED; @@ -439,7 +493,7 @@ static int spi_imx_setupxfer(struct spi_device *spi, } else BUG(); - spi_imx->config(spi_imx, &config); + spi_imx->devtype_data.config(spi_imx, &config); return 0; } @@ -458,7 +512,7 @@ static int spi_imx_transfer(struct spi_device *spi, spi_imx_push(spi_imx); - spi_imx->intctrl(spi_imx, MXC_INT_TE); + spi_imx->devtype_data.intctrl(spi_imx, MXC_INT_TE); wait_for_completion(&spi_imx->xfer_done); @@ -485,6 +539,33 @@ static void spi_imx_cleanup(struct spi_device *spi) { } +static struct platform_device_id spi_imx_devtype[] = { + { + .name = DRIVER_NAME, + .driver_data = SPI_IMX_VER_AUTODETECT, + }, { + .name = "imx1-cspi", + .driver_data = SPI_IMX_VER_IMX1, + }, { + .name = "imx21-cspi", + .driver_data = SPI_IMX_VER_0_0, + }, { + .name = "imx25-cspi", + .driver_data = SPI_IMX_VER_0_7, + }, { + .name = "imx27-cspi", + .driver_data = SPI_IMX_VER_0_0, + }, { + .name = "imx31-cspi", + .driver_data = SPI_IMX_VER_0_4, + }, { + .name = "imx35-cspi", + .driver_data = SPI_IMX_VER_0_7, + }, { + /* sentinel */ + } +}; + static int __devinit spi_imx_probe(struct platform_device *pdev) { struct spi_imx_master *mxc_platform_info; @@ -536,6 +617,31 @@ static int __devinit spi_imx_probe(struct platform_device *pdev) init_completion(&spi_imx->xfer_done); + if (pdev->id_entry->driver_data == SPI_IMX_VER_AUTODETECT) { + if (cpu_is_mx25() || cpu_is_mx35()) + spi_imx->devtype_data = + spi_imx_devtype_data[SPI_IMX_VER_0_7]; + else if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) + spi_imx->devtype_data = + spi_imx_devtype_data[SPI_IMX_VER_0_4]; + else if (cpu_is_mx27() || cpu_is_mx21()) + spi_imx->devtype_data = + spi_imx_devtype_data[SPI_IMX_VER_0_0]; + else if (cpu_is_mx1()) + spi_imx->devtype_data = + spi_imx_devtype_data[SPI_IMX_VER_IMX1]; + else + BUG(); + } else + spi_imx->devtype_data = + spi_imx_devtype_data[pdev->id_entry->driver_data]; + + if (!spi_imx->devtype_data.intctrl) { + dev_err(&pdev->dev, "no support for this device compiled in\n"); + ret = -ENODEV; + goto out_gpio_free; + } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pdev->dev, "can't get platform resource\n"); @@ -567,24 +673,6 @@ static int __devinit spi_imx_probe(struct platform_device *pdev) goto out_iounmap; } - if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) { - spi_imx->intctrl = mx31_intctrl; - spi_imx->config = mx31_config; - spi_imx->trigger = mx31_trigger; - spi_imx->rx_available = mx31_rx_available; - } else if (cpu_is_mx27() || cpu_is_mx21()) { - spi_imx->intctrl = mx27_intctrl; - spi_imx->config = mx27_config; - spi_imx->trigger = mx27_trigger; - spi_imx->rx_available = mx27_rx_available; - } else if (cpu_is_mx1()) { - spi_imx->intctrl = mx1_intctrl; - spi_imx->config = mx1_config; - spi_imx->trigger = mx1_trigger; - spi_imx->rx_available = mx1_rx_available; - } else - BUG(); - spi_imx->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(spi_imx->clk)) { dev_err(&pdev->dev, "unable to get clock\n"); @@ -603,7 +691,7 @@ static int __devinit spi_imx_probe(struct platform_device *pdev) while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) readl(spi_imx->base + MXC_CSPIRXDATA); - spi_imx->intctrl(spi_imx, 0); + spi_imx->devtype_data.intctrl(spi_imx, 0); ret = spi_bitbang_start(&spi_imx->bitbang); if (ret) { @@ -668,6 +756,7 @@ static struct platform_driver spi_imx_driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, }, + .id_table = spi_imx_devtype, .probe = spi_imx_probe, .remove = __devexit_p(spi_imx_remove), }; From 1723e66b03c3d131d16f7646752c9782c66ea1ae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 Sep 2010 09:19:18 +0200 Subject: [PATCH 28/72] spi/imx: get rid of more ifs depending on the used cpu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Nearly everything that is needed is provided by the version of the SPI IP. Now the only checks left using cpu_is_... are clk divider tuning on mx21/mx27 and autodetection (which will die soon). Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- drivers/spi/spi_imx.c | 73 +++++++++++++++++++++++++++++++------------ 1 file changed, 53 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 20cdee3b5a2e..60a52d173d8f 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -75,6 +75,7 @@ struct spi_imx_devtype_data { int (*config)(struct spi_imx_data *, struct spi_imx_config *); void (*trigger)(struct spi_imx_data *); int (*rx_available)(struct spi_imx_data *); + void (*reset)(struct spi_imx_data *); }; struct spi_imx_data { @@ -213,7 +214,7 @@ static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx) writel(reg, spi_imx->base + MXC_CSPICTRL); } -static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx, +static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; @@ -221,12 +222,7 @@ static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx, reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << MX31_CSPICTRL_DR_SHIFT; - if (cpu_is_mx31()) - reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; - else if (cpu_is_mx25() || cpu_is_mx35()) { - reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; - reg |= MX31_CSPICTRL_SSCTL; - } + reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; if (config->mode & SPI_CPHA) reg |= MX31_CSPICTRL_PHA; @@ -235,10 +231,7 @@ static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx, if (config->mode & SPI_CS_HIGH) reg |= MX31_CSPICTRL_SSPOL; if (config->cs < 0) { - if (cpu_is_mx31()) - reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT; - else if (cpu_is_mx25() || cpu_is_mx35()) - reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT; + reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT; } writel(reg, spi_imx->base + MXC_CSPICTRL); @@ -246,11 +239,43 @@ static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx, return 0; } +static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, + struct spi_imx_config *config) +{ + unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + + reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << + MX31_CSPICTRL_DR_SHIFT; + + reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; + reg |= MX31_CSPICTRL_SSCTL; + + if (config->mode & SPI_CPHA) + reg |= MX31_CSPICTRL_PHA; + if (config->mode & SPI_CPOL) + reg |= MX31_CSPICTRL_POL; + if (config->mode & SPI_CS_HIGH) + reg |= MX31_CSPICTRL_SSPOL; + if (config->cs < 0) + reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT; + + writel(reg, spi_imx->base + MXC_CSPICTRL); + + return 0; +} + static int __maybe_unused mx31_rx_available(struct spi_imx_data *spi_imx) { return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; } +static void __maybe_unused spi_imx0_4_reset(struct spi_imx_data *spi_imx) +{ + /* drain receive buffer */ + while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) + readl(spi_imx->base + MXC_CSPIRXDATA); +} + #define MX27_INTREG_RR (1 << 4) #define MX27_INTREG_TEEN (1 << 9) #define MX27_INTREG_RREN (1 << 13) @@ -313,6 +338,11 @@ static int __maybe_unused mx27_rx_available(struct spi_imx_data *spi_imx) return readl(spi_imx->base + MXC_CSPIINT) & MX27_INTREG_RR; } +static void __maybe_unused spi_imx0_0_reset(struct spi_imx_data *spi_imx) +{ + writel(1, spi_imx->base + MXC_RESET); +} + #define MX1_INTREG_RR (1 << 3) #define MX1_INTREG_TEEN (1 << 8) #define MX1_INTREG_RREN (1 << 11) @@ -369,6 +399,11 @@ static int __maybe_unused mx1_rx_available(struct spi_imx_data *spi_imx) return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; } +static void __maybe_unused mx1_reset(struct spi_imx_data *spi_imx) +{ + writel(1, spi_imx->base + MXC_RESET); +} + /* * These version numbers are taken from the Freescale driver. Unfortunately it * doesn't support i.MX1, so this entry doesn't match the scheme. :-( @@ -380,6 +415,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .config = mx1_config, .trigger = mx1_trigger, .rx_available = mx1_rx_available, + .reset = mx1_reset, }, #endif #ifdef CONFIG_SPI_IMX_VER_0_0 @@ -388,22 +424,25 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .config = mx27_config, .trigger = mx27_trigger, .rx_available = mx27_rx_available, + .reset = spi_imx0_0_reset, }, #endif #ifdef CONFIG_SPI_IMX_VER_0_4 [SPI_IMX_VER_0_4] = { .intctrl = mx31_intctrl, - .config = mx31_config, + .config = spi_imx0_4_config, .trigger = mx31_trigger, .rx_available = mx31_rx_available, + .reset = spi_imx0_4_reset, }, #endif #ifdef CONFIG_SPI_IMX_VER_0_7 [SPI_IMX_VER_0_7] = { .intctrl = mx31_intctrl, - .config = mx31_config, + .config = spi_imx0_7_config, .trigger = mx31_trigger, .rx_available = mx31_rx_available, + .reset = spi_imx0_4_reset, }, #endif }; @@ -683,13 +722,7 @@ static int __devinit spi_imx_probe(struct platform_device *pdev) clk_enable(spi_imx->clk); spi_imx->spi_clk = clk_get_rate(spi_imx->clk); - if (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) - writel(1, spi_imx->base + MXC_RESET); - - /* drain receive buffer */ - if (cpu_is_mx25() || cpu_is_mx31() || cpu_is_mx35()) - while (readl(spi_imx->base + MX3_CSPISTAT) & MX3_CSPISTAT_RR) - readl(spi_imx->base + MXC_CSPIRXDATA); + spi_imx->devtype_data.reset(spi_imx); spi_imx->devtype_data.intctrl(spi_imx, 0); From 3b2aa89eb381d2f445aa3c60d8f070a3f55efa63 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 Sep 2010 09:42:29 +0200 Subject: [PATCH 29/72] spi/imx: save the spi chip select in config struct, not the gpio to use MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This prepares adding support for imx51's eCSPI. This IP has seperate control and config bits for all four supported chip selects, so the config routine needs to know which chip select is being used even if the chipselect is realized by a gpio. Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- drivers/spi/spi_imx.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 60a52d173d8f..23db9840b9ae 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -56,7 +56,7 @@ struct spi_imx_config { unsigned int speed_hz; unsigned int bpw; unsigned int mode; - int cs; + u8 cs; }; enum spi_imx_devtype { @@ -218,6 +218,7 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + int cs = spi_imx->chipselect[config->cs]; reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << MX31_CSPICTRL_DR_SHIFT; @@ -230,9 +231,8 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, reg |= MX31_CSPICTRL_POL; if (config->mode & SPI_CS_HIGH) reg |= MX31_CSPICTRL_SSPOL; - if (config->cs < 0) { - reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT; - } + if (cs < 0) + reg |= (cs + 32) << MX31_CSPICTRL_CS_SHIFT; writel(reg, spi_imx->base + MXC_CSPICTRL); @@ -243,6 +243,7 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + int cs = spi_imx->chipselect[config->cs]; reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << MX31_CSPICTRL_DR_SHIFT; @@ -256,8 +257,8 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, reg |= MX31_CSPICTRL_POL; if (config->mode & SPI_CS_HIGH) reg |= MX31_CSPICTRL_SSPOL; - if (config->cs < 0) - reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT; + if (cs < 0) + reg |= (cs + 32) << MX35_CSPICTRL_CS_SHIFT; writel(reg, spi_imx->base + MXC_CSPICTRL); @@ -314,6 +315,7 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, struct spi_imx_config *config) { unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; + int cs = spi_imx->chipselect[config->cs]; reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << MX27_CSPICTRL_DR_SHIFT; @@ -325,8 +327,8 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, reg |= MX27_CSPICTRL_POL; if (config->mode & SPI_CS_HIGH) reg |= MX27_CSPICTRL_SSPOL; - if (config->cs < 0) - reg |= (config->cs + 32) << MX27_CSPICTRL_CS_SHIFT; + if (cs < 0) + reg |= (cs + 32) << MX27_CSPICTRL_CS_SHIFT; writel(reg, spi_imx->base + MXC_CSPICTRL); @@ -510,7 +512,7 @@ static int spi_imx_setupxfer(struct spi_device *spi, config.bpw = t ? t->bits_per_word : spi->bits_per_word; config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; config.mode = spi->mode; - config.cs = spi_imx->chipselect[spi->chip_select]; + config.cs = spi->chip_select; if (!config.speed_hz) config.speed_hz = spi->max_speed_hz; From 0b599603d8534bc3946a0f07e461c76d7947dfcf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 9 Sep 2010 21:02:48 +0200 Subject: [PATCH 30/72] spi/imx: add support for imx51's eCSPI and CSPI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit i.MX51 comes with two eCSPI interfaces (that are quite different from what was known before---the tried and tested Freescale way) and a CSPI interface that is identical to the devices found on i.MX25 and i.MX35. This patch is a merge of two very similar patches (by Jason Wang and Sascha Hauer resp.) plus a (now hopefully correct) reimplementation of the clock calculation. Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- drivers/spi/Kconfig | 5 +- drivers/spi/spi_imx.c | 140 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 143 insertions(+), 2 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 4e9d77bc7d2f..7e631fa51098 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -153,7 +153,10 @@ config SPI_IMX_VER_0_4 def_bool y if ARCH_MX31 config SPI_IMX_VER_0_7 - def_bool y if ARCH_MX25 || ARCH_MX35 + def_bool y if ARCH_MX25 || ARCH_MX35 || ARCH_MX51 + +config SPI_IMX_VER_2_3 + def_bool y if ARCH_MX51 config SPI_IMX tristate "Freescale i.MX SPI controllers" diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 23db9840b9ae..6bab2cfd93c1 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -65,6 +65,7 @@ enum spi_imx_devtype { SPI_IMX_VER_0_4, SPI_IMX_VER_0_5, SPI_IMX_VER_0_7, + SPI_IMX_VER_2_3, SPI_IMX_VER_AUTODETECT, }; @@ -155,7 +156,7 @@ static unsigned int spi_imx_clkdiv_1(unsigned int fin, return max; } -/* MX1, MX31, MX35 */ +/* MX1, MX31, MX35, MX51 CSPI */ static unsigned int spi_imx_clkdiv_2(unsigned int fin, unsigned int fspi) { @@ -170,6 +171,128 @@ static unsigned int spi_imx_clkdiv_2(unsigned int fin, return 7; } +#define SPI_IMX2_3_CTRL 0x08 +#define SPI_IMX2_3_CTRL_ENABLE (1 << 0) +#define SPI_IMX2_3_CTRL_XCH (1 << 2) +#define SPI_IMX2_3_CTRL_MODE(cs) (1 << ((cs) + 4)) +#define SPI_IMX2_3_CTRL_POSTDIV_OFFSET 8 +#define SPI_IMX2_3_CTRL_PREDIV_OFFSET 12 +#define SPI_IMX2_3_CTRL_CS(cs) ((cs) << 18) +#define SPI_IMX2_3_CTRL_BL_OFFSET 20 + +#define SPI_IMX2_3_CONFIG 0x0c +#define SPI_IMX2_3_CONFIG_SCLKPHA(cs) (1 << ((cs) + 0)) +#define SPI_IMX2_3_CONFIG_SCLKPOL(cs) (1 << ((cs) + 4)) +#define SPI_IMX2_3_CONFIG_SBBCTRL(cs) (1 << ((cs) + 8)) +#define SPI_IMX2_3_CONFIG_SSBPOL(cs) (1 << ((cs) + 12)) + +#define SPI_IMX2_3_INT 0x10 +#define SPI_IMX2_3_INT_TEEN (1 << 0) +#define SPI_IMX2_3_INT_RREN (1 << 3) + +#define SPI_IMX2_3_STAT 0x18 +#define SPI_IMX2_3_STAT_RR (1 << 3) + +/* MX51 eCSPI */ +static unsigned int spi_imx2_3_clkdiv(unsigned int fin, unsigned int fspi) +{ + /* + * there are two 4-bit dividers, the pre-divider divides by + * $pre, the post-divider by 2^$post + */ + unsigned int pre, post; + + if (unlikely(fspi > fin)) + return 0; + + post = fls(fin) - fls(fspi); + if (fin > fspi << post) + post++; + + /* now we have: (fin <= fspi << post) with post being minimal */ + + post = max(4U, post) - 4; + if (unlikely(post > 0xf)) { + pr_err("%s: cannot set clock freq: %u (base freq: %u)\n", + __func__, fspi, fin); + return 0xff; + } + + pre = DIV_ROUND_UP(fin, fspi << post) - 1; + + pr_debug("%s: fin: %u, fspi: %u, post: %u, pre: %u\n", + __func__, fin, fspi, post, pre); + return (pre << SPI_IMX2_3_CTRL_PREDIV_OFFSET) | + (post << SPI_IMX2_3_CTRL_POSTDIV_OFFSET); +} + +static void __maybe_unused spi_imx2_3_intctrl(struct spi_imx_data *spi_imx, int enable) +{ + unsigned val = 0; + + if (enable & MXC_INT_TE) + val |= SPI_IMX2_3_INT_TEEN; + + if (enable & MXC_INT_RR) + val |= SPI_IMX2_3_INT_RREN; + + writel(val, spi_imx->base + SPI_IMX2_3_INT); +} + +static void __maybe_unused spi_imx2_3_trigger(struct spi_imx_data *spi_imx) +{ + u32 reg; + + reg = readl(spi_imx->base + SPI_IMX2_3_CTRL); + reg |= SPI_IMX2_3_CTRL_XCH; + writel(reg, spi_imx->base + SPI_IMX2_3_CTRL); +} + +static int __maybe_unused spi_imx2_3_config(struct spi_imx_data *spi_imx, + struct spi_imx_config *config) +{ + u32 ctrl = SPI_IMX2_3_CTRL_ENABLE, cfg = 0; + + /* set master mode */ + ctrl |= SPI_IMX2_3_CTRL_MODE(config->cs); + + /* set clock speed */ + ctrl |= spi_imx2_3_clkdiv(spi_imx->spi_clk, config->speed_hz); + + /* set chip select to use */ + ctrl |= SPI_IMX2_3_CTRL_CS(config->cs); + + ctrl |= (config->bpw - 1) << SPI_IMX2_3_CTRL_BL_OFFSET; + + cfg |= SPI_IMX2_3_CONFIG_SBBCTRL(config->cs); + + if (config->mode & SPI_CPHA) + cfg |= SPI_IMX2_3_CONFIG_SCLKPHA(config->cs); + + if (config->mode & SPI_CPOL) + cfg |= SPI_IMX2_3_CONFIG_SCLKPOL(config->cs); + + if (config->mode & SPI_CS_HIGH) + cfg |= SPI_IMX2_3_CONFIG_SSBPOL(config->cs); + + writel(ctrl, spi_imx->base + SPI_IMX2_3_CTRL); + writel(cfg, spi_imx->base + SPI_IMX2_3_CONFIG); + + return 0; +} + +static int __maybe_unused spi_imx2_3_rx_available(struct spi_imx_data *spi_imx) +{ + return readl(spi_imx->base + SPI_IMX2_3_STAT) & SPI_IMX2_3_STAT_RR; +} + +static void __maybe_unused spi_imx2_3_reset(struct spi_imx_data *spi_imx) +{ + /* drain receive buffer */ + while (spi_imx2_3_rx_available(spi_imx)) + readl(spi_imx->base + MXC_CSPIRXDATA); +} + #define MX31_INTREG_TEEN (1 << 0) #define MX31_INTREG_RREN (1 << 3) @@ -447,6 +570,15 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .reset = spi_imx0_4_reset, }, #endif +#ifdef CONFIG_SPI_IMX_VER_2_3 + [SPI_IMX_VER_2_3] = { + .intctrl = spi_imx2_3_intctrl, + .config = spi_imx2_3_config, + .trigger = spi_imx2_3_trigger, + .rx_available = spi_imx2_3_rx_available, + .reset = spi_imx2_3_reset, + }, +#endif }; static void spi_imx_chipselect(struct spi_device *spi, int is_active) @@ -602,6 +734,12 @@ static struct platform_device_id spi_imx_devtype[] = { }, { .name = "imx35-cspi", .driver_data = SPI_IMX_VER_0_7, + }, { + .name = "imx51-cspi", + .driver_data = SPI_IMX_VER_0_7, + }, { + .name = "imx51-ecspi", + .driver_data = SPI_IMX_VER_2_3, }, { /* sentinel */ } From ab5605037c119f1bde0f01786ede16d0ea5dcd8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 9 Sep 2010 21:02:02 +0200 Subject: [PATCH 31/72] ARM: imx: use platform ids for spi_imx devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver recently learned to handle platform ids. Make use of this new feature. The up side is that the driver needs less knowledge about the spi interfaces used on different SoCs. Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clock-imx1.c | 2 +- arch/arm/mach-imx/clock-imx21.c | 6 +++--- arch/arm/mach-imx/clock-imx27.c | 6 +++--- arch/arm/mach-mx25/clock.c | 6 +++--- arch/arm/mach-mx3/clock-imx31.c | 6 +++--- arch/arm/mach-mx3/clock-imx35.c | 4 ++-- arch/arm/plat-mxc/devices/platform-spi_imx.c | 3 ++- arch/arm/plat-mxc/include/mach/devices-common.h | 1 + 8 files changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-imx/clock-imx1.c b/arch/arm/mach-imx/clock-imx1.c index c05096c38301..daca30b2d5b1 100644 --- a/arch/arm/mach-imx/clock-imx1.c +++ b/arch/arm/mach-imx/clock-imx1.c @@ -592,7 +592,7 @@ static struct clk_lookup lookups[] __initdata = { _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk) _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) - _REGISTER_CLOCK("spi_imx.0", NULL, spi_clk) + _REGISTER_CLOCK("imx1-cspi.0", NULL, spi_clk) _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) _REGISTER_CLOCK(NULL, "mshc", mshc_clk) diff --git a/arch/arm/mach-imx/clock-imx21.c b/arch/arm/mach-imx/clock-imx21.c index bb419ef4d133..cf15ea516a72 100644 --- a/arch/arm/mach-imx/clock-imx21.c +++ b/arch/arm/mach-imx/clock-imx21.c @@ -1172,9 +1172,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "pwm", pwm_clk[0]) _REGISTER_CLOCK(NULL, "sdhc1", sdhc_clk[0]) _REGISTER_CLOCK(NULL, "sdhc2", sdhc_clk[1]) - _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0]) - _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1]) - _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) + _REGISTER_CLOCK("imx21-cspi.0", NULL, cspi_clk[0]) + _REGISTER_CLOCK("imx21-cspi.1", NULL, cspi_clk[1]) + _REGISTER_CLOCK("imx21-cspi.2", NULL, cspi_clk[2]) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0]) _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) _REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0]) diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c index 5a1aa15c8a16..07bf315bc078 100644 --- a/arch/arm/mach-imx/clock-imx27.c +++ b/arch/arm/mach-imx/clock-imx27.c @@ -640,9 +640,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk) - _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) - _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) - _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) + _REGISTER_CLOCK("imx27-cspi.0", NULL, cspi1_clk) + _REGISTER_CLOCK("imx27-cspi.1", NULL, cspi2_clk) + _REGISTER_CLOCK("imx27-cspi.2", NULL, cspi3_clk) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk) diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 40c7cc41cee3..039464a8dacc 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c @@ -261,9 +261,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) - _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) - _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) - _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) + _REGISTER_CLOCK("imx25-cspi.0", NULL, cspi1_clk) + _REGISTER_CLOCK("imx25-cspi.1", NULL, cspi2_clk) + _REGISTER_CLOCK("imx25-cspi.2", NULL, cspi3_clk) _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk) _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk) _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk) diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c index 9a9eb6de6127..18e98f1d4de0 100644 --- a/arch/arm/mach-mx3/clock-imx31.c +++ b/arch/arm/mach-mx3/clock-imx31.c @@ -525,9 +525,9 @@ DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "emi", emi_clk) - _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) - _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) - _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) + _REGISTER_CLOCK("imx31-cspi.0", NULL, cspi1_clk) + _REGISTER_CLOCK("imx31-cspi.1", NULL, cspi2_clk) + _REGISTER_CLOCK("imx31-cspi.2", NULL, cspi3_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK(NULL, "pwm", pwm_clk) _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index f11ef990120c..708c2b36cf06 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -451,8 +451,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "ata", ata_clk) _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) - _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) - _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) + _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk) + _REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk) _REGISTER_CLOCK(NULL, "ect", ect_clk) _REGISTER_CLOCK(NULL, "edio", edio_clk) _REGISTER_CLOCK(NULL, "emi", emi_clk) diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c index 412a81f24101..bd30d4b2b2f9 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c @@ -11,6 +11,7 @@ #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ { \ + .devid = _devid, \ .id = _id, \ .iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \ .iosize = _size, \ @@ -83,6 +84,6 @@ struct platform_device *__init imx_add_spi_imx( }, }; - return imx_add_platform_device("spi_imx", data->id, + return imx_add_platform_device(data->devid, data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 490fe7c3ed5f..32b8f3674cc9 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -77,6 +77,7 @@ struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase, #include struct imx_spi_imx_data { + const char *devid; int id; resource_size_t iobase; resource_size_t iosize; From 9f0c11ee67d9a5ab76c27d2f9dbdd9ee85fbce10 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 Sep 2010 16:57:07 +0200 Subject: [PATCH 32/72] ARM: mx5: add spi_imx device registration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/devices-imx51.h | 8 ++++++++ arch/arm/plat-mxc/devices/platform-spi_imx.c | 12 ++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index a3cc3834c9fe..09d2b5c8b4f5 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -12,3 +12,11 @@ extern const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst; #define imx51_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) + +extern const struct imx_spi_imx_data imx51_cspi_data __initconst; +#define imx51_add_cspi(pdata) \ + imx_add_spi_imx(&imx51_cspi_data, pdata) + +extern const struct imx_spi_imx_data imx51_ecspi_data[] __initconst; +#define imx51_add_ecspi(id, pdata) \ + imx_add_spi_imx(&imx51_ecspi_data[id], pdata) diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c index bd30d4b2b2f9..e48340ec331e 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c @@ -68,6 +68,18 @@ const struct imx_spi_imx_data imx35_cspi_data[] __initconst = { }; #endif /* ifdef CONFIG_ARCH_MX35 */ +#ifdef CONFIG_ARCH_MX51 +const struct imx_spi_imx_data imx51_cspi_data __initconst = + imx_spi_imx_data_entry_single(MX51, CSPI, "imx51-cspi", 0, , SZ_4K); + +const struct imx_spi_imx_data imx51_ecspi_data[] __initconst = { +#define imx51_ecspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX51, ECSPI, "imx51-ecspi", _id, _hwid, SZ_4K) + imx51_ecspi_data_entry(0, 1), + imx51_ecspi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX51 */ + struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata) From 79901478e0a2854c4becbb2e77f176bd7fa37caa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 Sep 2010 16:58:42 +0200 Subject: [PATCH 33/72] ARM: mx5/clock-mx51: refactor ccgr callbacks to use common code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51.c | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 57c10a9926cc..fe658bf5b490 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -41,34 +41,36 @@ static struct clk usboh3_clk; #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ +static void _clk_ccgr_setclk(struct clk *clk, unsigned mode) +{ + u32 reg = __raw_readl(clk->enable_reg); + + reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); + reg |= mode << clk->enable_shift; + + __raw_writel(reg, clk->enable_reg); +} + static int _clk_ccgr_enable(struct clk *clk) { - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg |= MXC_CCM_CCGRx_MOD_ON << clk->enable_shift; - __raw_writel(reg, clk->enable_reg); - + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_ON); return 0; } static void _clk_ccgr_disable(struct clk *clk) { - u32 reg; - reg = __raw_readl(clk->enable_reg); - reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); - __raw_writel(reg, clk->enable_reg); + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_OFF); +} +static int _clk_ccgr_enable_inrun(struct clk *clk) +{ + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE); + return 0; } static void _clk_ccgr_disable_inwait(struct clk *clk) { - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); - reg |= MXC_CCM_CCGRx_MOD_IDLE << clk->enable_shift; - __raw_writel(reg, clk->enable_reg); + _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE); } /* From 74d99f395901502747a44a1379f3b4fdb638dafa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 Sep 2010 17:01:26 +0200 Subject: [PATCH 34/72] ARM: mx5/clock-mx51: new macro that defines a clk with all members MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index fe658bf5b490..0e396981c27c 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -764,21 +764,21 @@ static struct clk kpp_clk = { .id = 0, }; -#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = gr, \ - .set_rate = sr, \ - .enable = _clk_ccgr_enable, \ - .disable = _clk_ccgr_disable, \ - .parent = p, \ - .secondary = s, \ +#define DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, e, d, p, s) \ + static struct clk name = { \ + .id = i, \ + .enable_reg = er, \ + .enable_shift = es, \ + .get_rate = gr, \ + .set_rate = sr, \ + .enable = e, \ + .disable = d, \ + .parent = p, \ + .secondary = s, \ } -/* DEFINE_CLOCK(name, id, enable_reg, enable_shift, - get_rate, set_rate, parent, secondary); */ +#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \ + DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, _clk_ccgr_enable, _clk_ccgr_disable, p, s) /* Shared peripheral bus arbiter */ DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET, From 8d83db81affd71af0fb6f054ab552d16a7cb805b Mon Sep 17 00:00:00 2001 From: Jason Wang Date: Thu, 2 Sep 2010 15:52:00 +0800 Subject: [PATCH 35/72] ARM: mx5/clock-mx51: add spi clocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51.c | 57 ++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 0e396981c27c..68aef2d58484 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -764,6 +764,42 @@ static struct clk kpp_clk = { .id = 0, }; +/* eCSPI */ +static unsigned long clk_ecspi_get_rate(struct clk *clk) +{ + u32 reg, pred, podf; + + reg = __raw_readl(MXC_CCM_CSCDR2); + + pred = (reg & MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK) >> + MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET; + podf = (reg & MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK) >> + MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET; + + return DIV_ROUND_CLOSEST(clk_get_rate(clk->parent), + (pred + 1) * (podf + 1)); +} + +static int clk_ecspi_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ecspi_main_clk = { + .parent = &pll3_sw_clk, + .get_rate = clk_ecspi_get_rate, + .set_parent = clk_ecspi_set_parent, +}; + #define DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, e, d, p, s) \ static struct clk name = { \ .id = i, \ @@ -816,6 +852,24 @@ DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, NULL, NULL, &ipg_clk, NULL); +/* eCSPI */ +DEFINE_CLOCK_FULL(ecspi1_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET, + NULL, NULL, _clk_ccgr_enable_inrun, _clk_ccgr_disable, + &ipg_clk, &spba_clk); +DEFINE_CLOCK(ecspi1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG10_OFFSET, + NULL, NULL, &ecspi_main_clk, &ecspi1_ipg_clk); +DEFINE_CLOCK_FULL(ecspi2_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG11_OFFSET, + NULL, NULL, _clk_ccgr_enable_inrun, _clk_ccgr_disable, + &ipg_clk, &aips_tz2_clk); +DEFINE_CLOCK(ecspi2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG12_OFFSET, + NULL, NULL, &ecspi_main_clk, &ecspi2_ipg_clk); + +/* CSPI */ +DEFINE_CLOCK(cspi_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET, + NULL, NULL, &ipg_clk, &aips_tz2_clk); +DEFINE_CLOCK(cspi_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG13_OFFSET, + NULL, NULL, &ipg_clk, &cspi_ipg_clk); + #define _REGISTER_CLOCK(d, n, c) \ { \ .dev_id = d, \ @@ -839,6 +893,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk) + _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) + _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) + _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) }; static void clk_tree_init(void) From eaa4fd0b4022bd4d2ff0c38b3cc936ee5a441711 Mon Sep 17 00:00:00 2001 From: Jason Wang Date: Thu, 2 Sep 2010 15:52:02 +0800 Subject: [PATCH 36/72] ARM: mx5/iomux-mx51: add iomux definitions for eCSPI2 on the imx51_3ds board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash, now add iomux definitions for those used pins. Signed-off-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx51.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index 0d77be3a2374..d0ef881c3776 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h @@ -45,6 +45,8 @@ typedef enum iomux_config { PAD_CTL_PKE | PAD_CTL_HYS) #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \ PAD_CTL_SRE_FAST) +#define MX51_ECSPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ + PAD_CTL_SRE_FAST) #define MX51_PAD_CTRL_1 (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_HYS) @@ -139,8 +141,10 @@ typedef enum iomux_config { #define MX51_PAD_NANDF_RB0__GPIO_3_8 IOMUX_PAD(0x4F8, 0x11C, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB1__GPIO_3_9 IOMUX_PAD(0x4FC, 0x120, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB2__GPIO_3_10 IOMUX_PAD(0x500, 0x124, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RB2__ECSPI2_SCLK IOMUX_PAD(0x500, 0x124, 2, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_NANDF_RB2__FEC_COL IOMUX_PAD(0x500, 0x124, 1, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_NANDF_RB3__GPIO_3_11 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RB3__ECSPI2_MISO IOMUX_PAD(0x504, 0x128, 2, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_NANDF_RB3__FEC_RXCLK IOMUX_PAD(0x504, 0x128, 1, 0x0, 0, MX51_PAD_CTRL_2) #define MX51_PAD_NANDF_RB6__FEC_RDAT0 IOMUX_PAD(0x5DC, 0x134, 1, 0x0, 0, MX51_PAD_CTRL_4) #define MX51_PAD_NANDF_RB7__FEC_TDAT0 IOMUX_PAD(0x5E0, 0x138, 1, 0x0, 0, MX51_PAD_CTRL_5) @@ -162,6 +166,7 @@ typedef enum iomux_config { #define MX51_PAD_NANDF_RDY_INT__GPIO_3_24 IOMUX_PAD(0x538, 0x150, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x0, 0, MX51_PAD_CTRL_4) #define MX51_PAD_NANDF_D15__GPIO_3_25 IOMUX_PAD(0x53C, 0x154, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_D15__ECSPI2_MOSI IOMUX_PAD(0x53C, 0x154, 2, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_NANDF_D14__GPIO_3_26 IOMUX_PAD(0x540, 0x158, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_D13__GPIO_3_27 IOMUX_PAD(0x544, 0x15C, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_D12__GPIO_3_28 IOMUX_PAD(0x548, 0x160, 3, 0x0, 0, NO_PAD_CTRL) From 988916e1a9af1994d510138e7201acf7b425fb46 Mon Sep 17 00:00:00 2001 From: Jason Wang Date: Thu, 2 Sep 2010 15:52:03 +0800 Subject: [PATCH 37/72] ARM: mx5/mx51_3ds: add eCSPI2 support on the imx51_3ds board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx51_3ds.c | 20 ++++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index e57caefb1f28..2735314a78e0 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -18,6 +18,7 @@ config MACH_MX51_BABBAGE config MACH_MX51_3DS bool "Support MX51PDK (3DS)" + select IMX_HAVE_PLATFORM_SPI_IMX select MXC_DEBUG_BOARD help Include support for MX51PDK (3DS) platform. This includes specific diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index f95c2fd94667..c9c41282c996 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -24,9 +24,11 @@ #include #include +#include "devices-imx51.h" #include "devices.h" #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 6) +#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) static struct pad_desc mx51_3ds_pads[] = { /* UART1 */ @@ -61,6 +63,12 @@ static struct pad_desc mx51_3ds_pads[] = { MX51_PAD_KEY_COL3__KEY_COL3, MX51_PAD_KEY_COL4__KEY_COL4, MX51_PAD_KEY_COL5__KEY_COL5, + + /* eCSPI2 */ + MX51_PAD_NANDF_RB2__ECSPI2_SCLK, + MX51_PAD_NANDF_RB3__ECSPI2_MISO, + MX51_PAD_NANDF_D15__ECSPI2_MOSI, + MX51_PAD_NANDF_D12__GPIO_3_28, }; /* Serial ports */ @@ -127,6 +135,16 @@ static inline void mxc_init_keypad(void) } #endif +static int mx51_3ds_spi2_cs[] = { + MXC_SPI_CS(0), + MX51_3DS_ECSPI2_CS, +}; + +static const struct spi_imx_master mx51_3ds_ecspi2_pdata __initconst = { + .chipselect = mx51_3ds_spi2_cs, + .num_chipselect = ARRAY_SIZE(mx51_3ds_spi2_cs), +}; + /* * Board specific initialization. */ @@ -136,6 +154,8 @@ static void __init mxc_board_init(void) ARRAY_SIZE(mx51_3ds_pads)); mxc_init_imx_uart(); + imx51_add_ecspi(1, &mx51_3ds_ecspi2_pdata); + if (mxc_expio_init(MX51_CS5_BASE_ADDR, EXPIO_PARENT_INT)) printk(KERN_WARNING "Init of the debugboard failed, all " "devices on the board are unusable.\n"); From 8005cf2eb39786a0a3592fe178603ee1caccc5eb Mon Sep 17 00:00:00 2001 From: Jason Wang Date: Thu, 2 Sep 2010 15:52:04 +0800 Subject: [PATCH 38/72] ARM: mx5/mx51_3ds: add SPI NOR flash in the board init stage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A 2M bytes SPI NOR flash(sst25vf016b) is soldered on the mx51_3ds board. So add the corresponding device for it. Signed-off-by: Jason Wang Acked-by: Grant Likely Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx51_3ds.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index c9c41282c996..b9d3331ba308 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -145,6 +146,16 @@ static const struct spi_imx_master mx51_3ds_ecspi2_pdata __initconst = { .num_chipselect = ARRAY_SIZE(mx51_3ds_spi2_cs), }; +static struct spi_board_info mx51_3ds_spi_nor_device[] = { + { + .modalias = "m25p80", + .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 1, + .chip_select = 1, + .mode = SPI_MODE_0, + .platform_data = NULL,}, +}; + /* * Board specific initialization. */ @@ -155,6 +166,8 @@ static void __init mxc_board_init(void) mxc_init_imx_uart(); imx51_add_ecspi(1, &mx51_3ds_ecspi2_pdata); + spi_register_board_info(mx51_3ds_spi_nor_device, + ARRAY_SIZE(mx51_3ds_spi_nor_device)); if (mxc_expio_init(MX51_CS5_BASE_ADDR, EXPIO_PARENT_INT)) printk(KERN_WARNING "Init of the debugboard failed, all " From 8efd9271fae0a735db5660330e14022031c88e77 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 20 Aug 2010 10:45:11 +0200 Subject: [PATCH 39/72] ARM: mx5/iomux-mx51: Add SPI controller pads MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx51.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index d0ef881c3776..2bd09feb19ca 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h @@ -218,11 +218,17 @@ typedef enum iomux_config { #define MX51_PAD_AUD3_BB_RXD__GPIO_4_19 IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_AUD3_BB_CK__GPIO_4_20 IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_AUD3_BB_FS__GPIO_4_21 IOMUX_PAD(0x5FC, 0x20C, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI IOMUX_PAD(0x600, 0x210, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_MOSI__GPIO_4_22 IOMUX_PAD(0x600, 0x210, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_CSPI1_MISO__ECSPI1_MISO IOMUX_PAD(0x604, 0x214, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_MISO__GPIO_4_23 IOMUX_PAD(0x604, 0x214, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_CSPI1_SS0__ECSPI1_SS0 IOMUX_PAD(0x608, 0x218, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_SS0__GPIO_4_24 IOMUX_PAD(0x608, 0x218, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_CSPI1_SS1__ECSPI1_SS1 IOMUX_PAD(0x60C, 0x21C, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_SS1__GPIO_4_25 IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_CSPI1_RDY__ECSPI1_RDY IOMUX_PAD(0x610, 0x220, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_RDY__GPIO_4_26 IOMUX_PAD(0x610, 0x220, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK IOMUX_PAD(0x614, 0x224, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_SCLK__GPIO_4_27 IOMUX_PAD(0x614, 0x224, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_UART1_RXD__UART1_RXD IOMUX_PAD(0x618, 0x228, 0, 0x9e4, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST) #define MX51_PAD_UART1_TXD__UART1_TXD IOMUX_PAD(0x61C, 0x22C, 0, 0x0, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST) From 2e35bab5fd8b19a8eabbb4c57b3ddd305057eed4 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 20 Aug 2010 18:35:51 +0200 Subject: [PATCH 40/72] ARM: mx5/iomux-mx51: Add aud3 primary function defines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx51.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index 2bd09feb19ca..197cd1ff7c60 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h @@ -214,9 +214,13 @@ typedef enum iomux_config { #define MX51_PAD_I2C1_CLK__HSI2C_CLK IOMUX_PAD(0x5E8, 0x1F8, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_I2C1_DAT__GPIO_4_17 IOMUX_PAD(0x5EC, 0x1FC, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_I2C1_DAT__HSI2C_DAT IOMUX_PAD(0x5EC, 0x1FC, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_AUD3_BB_TXD__AUD3_BB_TXD IOMUX_PAD(0x5F0, 0x200, IOMUX_CONFIG_SION, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_AUD3_BB_TXD__GPIO_4_18 IOMUX_PAD(0x5F0, 0x200, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_AUD3_BB_RXD__AUD3_BB_RXD IOMUX_PAD(0x5F4, 0x204, IOMUX_CONFIG_SION, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_AUD3_BB_RXD__GPIO_4_19 IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_AUD3_BB_CK__AUD3_BB_CK IOMUX_PAD(0x5F8, 0x208, IOMUX_CONFIG_SION, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_AUD3_BB_CK__GPIO_4_20 IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_AUD3_BB_FS__AUD3_BB_FS IOMUX_PAD(0x5FC, 0x20C, IOMUX_CONFIG_SION, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_AUD3_BB_FS__GPIO_4_21 IOMUX_PAD(0x5FC, 0x20C, 3, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI IOMUX_PAD(0x600, 0x210, 0, 0x0, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_CSPI1_MOSI__GPIO_4_22 IOMUX_PAD(0x600, 0x210, 3, 0x0, 0, NO_PAD_CTRL) From f781bc8aa44c8676ad84b69fc4553e8f035c6e89 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 24 Aug 2010 14:49:09 +0200 Subject: [PATCH 41/72] ARM: mx5/iomux-mx51: Fix input path of some pins in gpio mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx51.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index 197cd1ff7c60..633650d3f814 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h @@ -275,14 +275,14 @@ typedef enum iomux_config { #define MX51_PAD_USBH1_DATA6__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 0, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_USBH1_DATA7__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 0, 0x0, 0, MX51_USBH1_PAD_CTRL) #define MX51_PAD_DI1_PIN11__GPIO_3_0 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DI1_PIN12__GPIO_3_1 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DI1_PIN13__GPIO_3_2 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DI1_D0_CS__GPIO_3_3 IOMUX_PAD(0x6B4, 0x2B4, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DI1_D1_CS__GPIO_3_4 IOMUX_PAD(0x6B8, 0x2B8, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DISPB2_SER_DIN__GPIO_3_5 IOMUX_PAD(0x6BC, 0x2BC, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DISPB2_SER_DIO__GPIO_3_6 IOMUX_PAD(0x6C0, 0x2C0, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DISPB2_SER_CLK__GPIO_3_7 IOMUX_PAD(0x6C4, 0x2C4, 4, 0x0, 0, NO_PAD_CTRL) -#define MX51_PAD_DISPB2_SER_RS__GPIO_3_8 IOMUX_PAD(0x6C8, 0x2C8, 4, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_DI1_PIN12__GPIO_3_1 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x978, 1, NO_PAD_CTRL) +#define MX51_PAD_DI1_PIN13__GPIO_3_2 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x97c, 1, NO_PAD_CTRL) +#define MX51_PAD_DI1_D0_CS__GPIO_3_3 IOMUX_PAD(0x6B4, 0x2B4, 4, 0x980, 1, NO_PAD_CTRL) +#define MX51_PAD_DI1_D1_CS__GPIO_3_4 IOMUX_PAD(0x6B8, 0x2B8, 4, 0x984, 1, NO_PAD_CTRL) +#define MX51_PAD_DISPB2_SER_DIN__GPIO_3_5 IOMUX_PAD(0x6BC, 0x2BC, 4, 0x988, 1, NO_PAD_CTRL) +#define MX51_PAD_DISPB2_SER_DIO__GPIO_3_6 IOMUX_PAD(0x6C0, 0x2C0, 4, 0x98c, 1, NO_PAD_CTRL) +#define MX51_PAD_DISPB2_SER_CLK__GPIO_3_7 IOMUX_PAD(0x6C4, 0x2C4, 4, 0x990, 1, NO_PAD_CTRL) +#define MX51_PAD_DISPB2_SER_RS__GPIO_3_8 IOMUX_PAD(0x6C8, 0x2C8, 4, 0x994, 1, NO_PAD_CTRL) #define MX51_PAD_DISP1_DAT0__DISP1_DAT0 IOMUX_PAD(0x6CC, 0x2CC, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_DISP1_DAT1__DISP1_DAT1 IOMUX_PAD(0x6D0, 0x2D0, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_DISP1_DAT2__DISP1_DAT2 IOMUX_PAD(0x6D4, 0x2D4, 0, 0x0, 0, NO_PAD_CTRL) From 2b82e64d787f9d1a5d304da137c2b1bdbe3b2d9d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 3 Aug 2010 11:59:07 +0200 Subject: [PATCH 42/72] ARM: mx5: Add Nand clock support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51.c | 98 ++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 68aef2d58484..0cef8c4f84ba 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -573,6 +573,64 @@ static int _clk_uart_set_parent(struct clk *clk, struct clk *parent) return 0; } +#define clk_nfc_set_parent NULL + +static unsigned long clk_nfc_get_rate(struct clk *clk) +{ + unsigned long rate; + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_NFC_PODF_MASK) >> + MXC_CCM_CBCDR_NFC_PODF_OFFSET) + 1; + rate = clk_get_rate(clk->parent) / div; + WARN_ON(rate == 0); + return rate; +} + +static unsigned long clk_nfc_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + unsigned long parent_rate = clk_get_rate(clk->parent); + + if (!rate) + return -EINVAL; + + div = parent_rate / rate; + + if (parent_rate % rate) + div++; + + if (div > 8) + return -EINVAL; + + return parent_rate / div; + +} + +static int clk_nfc_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + + div = clk_get_rate(clk->parent) / rate; + if (div == 0) + div++; + if (((clk_get_rate(clk->parent) / div) != rate) || (div > 8)) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_NFC_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_NFC_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + + while (__raw_readl(MXC_CCM_CDHIPR) & + MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY){ + } + + return 0; +} + static unsigned long clk_usboh3_get_rate(struct clk *clk) { u32 reg, prediv, podf; @@ -622,6 +680,17 @@ static unsigned long get_ckih2_reference_clock_rate(struct clk *clk) return ckih2_reference; } +static unsigned long clk_emi_slow_get_rate(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_EMI_PODF_MASK) >> + MXC_CCM_CBCDR_EMI_PODF_OFFSET) + 1; + + return clk_get_rate(clk->parent) / div; +} + /* External high frequency clock */ static struct clk ckih_clk = { .get_rate = get_high_reference_clock_rate, @@ -764,6 +833,30 @@ static struct clk kpp_clk = { .id = 0, }; +static struct clk emi_slow_clk = { + .parent = &pll2_sw_clk, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGRx_CG8_OFFSET, + .enable = _clk_ccgr_enable, + .disable = _clk_ccgr_disable_inwait, + .get_rate = clk_emi_slow_get_rate, +}; + +#define DEFINE_CLOCK1(name, i, er, es, pfx, p, s) \ + static struct clk name = { \ + .id = i, \ + .enable_reg = er, \ + .enable_shift = es, \ + .get_rate = pfx##_get_rate, \ + .set_rate = pfx##_set_rate, \ + .round_rate = pfx##_round_rate, \ + .set_parent = pfx##_set_parent, \ + .enable = _clk_ccgr_enable, \ + .disable = _clk_ccgr_disable, \ + .parent = p, \ + .secondary = s, \ + } + /* eCSPI */ static unsigned long clk_ecspi_get_rate(struct clk *clk) { @@ -852,6 +945,10 @@ DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, NULL, NULL, &ipg_clk, NULL); +/* NFC */ +DEFINE_CLOCK1(nfc_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG10_OFFSET, + clk_nfc, &emi_slow_clk, NULL); + /* eCSPI */ DEFINE_CLOCK_FULL(ecspi1_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET, NULL, NULL, _clk_ccgr_enable_inrun, _clk_ccgr_disable, @@ -893,6 +990,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk) + _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) From 04b73b1571c26d491c62c42cb06b96bf482fa7a2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 11 Aug 2010 22:23:06 +0200 Subject: [PATCH 43/72] ARM: mx51: dynamically register imx-uart devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 3 + arch/arm/mach-mx5/board-cpuimx51.c | 6 +- arch/arm/mach-mx5/board-mx51_3ds.c | 9 ++- arch/arm/mach-mx5/board-mx51_babbage.c | 10 ++-- arch/arm/mach-mx5/devices-imx51.h | 4 ++ arch/arm/mach-mx5/devices.c | 57 ------------------- arch/arm/mach-mx5/devices.h | 3 - arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c | 7 ++- arch/arm/plat-mxc/devices/platform-imx-uart.c | 10 ++++ arch/arm/plat-mxc/include/mach/mx51.h | 6 +- 10 files changed, 36 insertions(+), 79 deletions(-) diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 2735314a78e0..65bf34e1a4f6 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -11,6 +11,7 @@ comment "MX5 platforms:" config MACH_MX51_BABBAGE bool "Support MX51 BABBAGE platforms" select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_UART help Include support for MX51 Babbage platform, also known as MX51EVK in u-boot. This includes specific configurations for the board and its @@ -18,6 +19,7 @@ config MACH_MX51_BABBAGE config MACH_MX51_3DS bool "Support MX51PDK (3DS)" + select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SPI_IMX select MXC_DEBUG_BOARD help @@ -27,6 +29,7 @@ config MACH_MX51_3DS config MACH_EUKREA_CPUIMX51 bool "Support Eukrea CPUIMX51 module" select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_UART help Include support for Eukrea CPUIMX51 platform. This includes specific configurations for the module and its peripherals. diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index d52f2527f6bf..a6c09c7ff728 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include @@ -38,6 +37,7 @@ #include #include +#include "devices-imx51.h" #include "devices.h" #define CPUIMX51_USBH1_STP (0*32 + 27) @@ -147,7 +147,7 @@ static struct pad_desc eukrea_cpuimx51_pads[] = { MX51_PAD_USBH1_STP__USBH1_STP, }; -static struct imxuart_platform_data uart_pdata = { +static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -239,7 +239,7 @@ static void __init eukrea_cpuimx51_init(void) mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads)); - mxc_register_device(&mxc_uart_device0, &uart_pdata); + imx51_add_imx_uart(0, &uart_pdata); gpio_request(CPUIMX51_QUARTA_GPIO, "quarta_irq"); gpio_direction_input(CPUIMX51_QUARTA_GPIO); gpio_free(CPUIMX51_QUARTA_GPIO); diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index b9d3331ba308..ed08a2352a1a 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include "devices-imx51.h" @@ -74,15 +73,15 @@ static struct pad_desc mx51_3ds_pads[] = { /* Serial ports */ #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) -static struct imxuart_platform_data uart_pdata = { +static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; static inline void mxc_init_imx_uart(void) { - mxc_register_device(&mxc_uart_device0, &uart_pdata); - mxc_register_device(&mxc_uart_device1, &uart_pdata); - mxc_register_device(&mxc_uart_device2, &uart_pdata); + imx51_add_imx_uart(0, &uart_pdata); + imx51_add_imx_uart(1, &uart_pdata); + imx51_add_imx_uart(2, &uart_pdata); } #else /* !SERIAL_IMX */ static inline void mxc_init_imx_uart(void) diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 3f3075d7768f..7c0b6618a164 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -21,7 +21,6 @@ #include #include -#include #include #include @@ -31,6 +30,7 @@ #include #include +#include "devices-imx51.h" #include "devices.h" #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */ @@ -120,15 +120,15 @@ static struct pad_desc mx51babbage_pads[] = { /* Serial ports */ #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) -static struct imxuart_platform_data uart_pdata = { +static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; static inline void mxc_init_imx_uart(void) { - mxc_register_device(&mxc_uart_device0, &uart_pdata); - mxc_register_device(&mxc_uart_device1, &uart_pdata); - mxc_register_device(&mxc_uart_device2, &uart_pdata); + imx51_add_imx_uart(0, &uart_pdata); + imx51_add_imx_uart(1, &uart_pdata); + imx51_add_imx_uart(2, &uart_pdata); } #else /* !SERIAL_IMX */ static inline void mxc_init_imx_uart(void) diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index 09d2b5c8b4f5..8235b8c6729b 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -13,6 +13,10 @@ extern const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst; #define imx51_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) +extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst; +#define imx51_add_imx_uart(id, pdata) \ + imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata) + extern const struct imx_spi_imx_data imx51_cspi_data __initconst; #define imx51_add_cspi(pdata) \ imx_add_spi_imx(&imx51_cspi_data, pdata) diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 70b76d16391c..5f40082d9e61 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c @@ -17,63 +17,6 @@ #include #include -static struct resource uart0[] = { - { - .start = MX51_UART1_BASE_ADDR, - .end = MX51_UART1_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, { - .start = MX51_MXC_INT_UART1, - .end = MX51_MXC_INT_UART1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_uart_device0 = { - .name = "imx-uart", - .id = 0, - .resource = uart0, - .num_resources = ARRAY_SIZE(uart0), -}; - -static struct resource uart1[] = { - { - .start = MX51_UART2_BASE_ADDR, - .end = MX51_UART2_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, { - .start = MX51_MXC_INT_UART2, - .end = MX51_MXC_INT_UART2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_uart_device1 = { - .name = "imx-uart", - .id = 1, - .resource = uart1, - .num_resources = ARRAY_SIZE(uart1), -}; - -static struct resource uart2[] = { - { - .start = MX51_UART3_BASE_ADDR, - .end = MX51_UART3_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, { - .start = MX51_MXC_INT_UART3, - .end = MX51_MXC_INT_UART3, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_uart_device2 = { - .name = "imx-uart", - .id = 2, - .resource = uart2, - .num_resources = ARRAY_SIZE(uart2), -}; - static struct resource mxc_fec_resources[] = { { .start = MX51_MXC_FEC_BASE_ADDR, diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index 5c2918fcec0d..67a6d6910530 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h @@ -1,6 +1,3 @@ -extern struct platform_device mxc_uart_device0; -extern struct platform_device mxc_uart_device1; -extern struct platform_device mxc_uart_device2; extern struct platform_device mxc_fec_device; extern struct platform_device mxc_usbdr_host_device; extern struct platform_device mxc_usbh1_device; diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index ffa93d1d6ef8..d0e417ce2c08 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -30,6 +30,7 @@ #include +#include "devices-imx51.h" #include "devices.h" #define MBIMX51_TSC2007_GPIO (2*32 + 30) @@ -114,7 +115,7 @@ static struct pad_desc mbimx51_pads[] = { MX51_PAD_KEY_COL3__KEY_COL3, }; -static struct imxuart_platform_data uart_pdata = { +static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -172,8 +173,8 @@ void __init eukrea_mbimx51_baseboard_init(void) mxc_iomux_v3_setup_multiple_pads(mbimx51_pads, ARRAY_SIZE(mbimx51_pads)); - mxc_register_device(&mxc_uart_device1, NULL); - mxc_register_device(&mxc_uart_device2, &uart_pdata); + imx51_add_imx_uart(1, NULL); + imx51_add_imx_uart(2, &uart_pdata); gpio_request(MBIMX51_LED0, "LED0"); gpio_direction_output(MBIMX51_LED0, 1); diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index af7fabba4e71..2039640adf27 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -94,6 +94,16 @@ const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = { }; #endif /* ifdef CONFIG_ARCH_MX35 */ +#ifdef CONFIG_ARCH_MX51 +const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = { +#define imx51_imx_uart_data_entry(_id, _hwid) \ + imx_imx_uart_1irq_data_entry(MX51, _id, _hwid, SZ_4K) + imx51_imx_uart_data_entry(0, 1), + imx51_imx_uart_data_entry(1, 2), + imx51_imx_uart_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_ARCH_MX51 */ + struct platform_device *__init imx_add_imx_uart_3irq( const struct imx_imx_uart_3irq_data *data, const struct imxuart_platform_data *pdata) diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index b919235768a0..b7359d7d54e2 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -310,9 +310,9 @@ #define MX51_MXC_INT_SLIM_B 28 #define MX51_MXC_INT_SSI1 29 #define MX51_MXC_INT_SSI2 30 -#define MX51_MXC_INT_UART1 31 -#define MX51_MXC_INT_UART2 32 -#define MX51_MXC_INT_UART3 33 +#define MX51_INT_UART1 31 +#define MX51_INT_UART2 32 +#define MX51_INT_UART3 33 #define MX51_MXC_INT_RESV34 34 #define MX51_MXC_INT_RESV35 35 #define MX51_INT_ECSPI1 36 From b86186610f639344a7db54da89267f645afc30ec Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 20 Aug 2010 16:43:54 +0200 Subject: [PATCH 44/72] ARM: mx51: add imx-ssi devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51.c | 12 ++++++++++++ arch/arm/mach-mx5/devices-imx51.h | 4 ++++ arch/arm/plat-mxc/devices/platform-imx-ssi.c | 9 +++++++++ arch/arm/plat-mxc/include/mach/mx51.h | 20 ++++++++++---------- 4 files changed, 35 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 0cef8c4f84ba..5c7901180c8e 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -949,6 +949,16 @@ DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, DEFINE_CLOCK1(nfc_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG10_OFFSET, clk_nfc, &emi_slow_clk, NULL); +/* SSI */ +DEFINE_CLOCK(ssi1_ipg_clk, 0, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG8_OFFSET, + NULL, NULL, &ipg_clk, NULL); +DEFINE_CLOCK(ssi1_clk, 0, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG9_OFFSET, + NULL, NULL, &pll3_sw_clk, &ssi1_ipg_clk); +DEFINE_CLOCK(ssi2_ipg_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG10_OFFSET, + NULL, NULL, &ipg_clk, NULL); +DEFINE_CLOCK(ssi2_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG11_OFFSET, + NULL, NULL, &pll3_sw_clk, &ssi2_ipg_clk); + /* eCSPI */ DEFINE_CLOCK_FULL(ecspi1_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET, NULL, NULL, _clk_ccgr_enable_inrun, _clk_ccgr_disable, @@ -991,6 +1001,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk) _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) + _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) + _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index 8235b8c6729b..782b45bd916b 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -13,6 +13,10 @@ extern const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst; #define imx51_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) +extern const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst; +#define imx51_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx51_imx_ssi_data[id], pdata) + extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst; #define imx51_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 1535bc9f0601..38a7a0b8f2f1 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -66,6 +66,15 @@ const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { }; #endif /* ifdef CONFIG_ARCH_MX35 */ +#ifdef CONFIG_ARCH_MX51 +const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { +#define imx51_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K) + imx51_imx_ssi_data_entry(0, 1), + imx51_imx_ssi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX51 */ + struct platform_device *__init imx_add_imx_ssi( const struct imx_imx_ssi_data *data, const struct imx_ssi_platform_data *pdata) diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index b7359d7d54e2..b47d65b1c112 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -248,14 +248,14 @@ #define MX51_DMA_REQ_UART1_TX 19 #define MX51_DMA_REQ_SDHC1 20 #define MX51_DMA_REQ_SDHC2 21 -#define MX51_DMA_REQ_SSI2_RX2 22 -#define MX51_DMA_REQ_SSI2_TX2 23 -#define MX51_DMA_REQ_SSI2_RX1 24 -#define MX51_DMA_REQ_SSI2_TX1 25 -#define MX51_DMA_REQ_SSI1_RX2 26 -#define MX51_DMA_REQ_SSI1_TX2 27 -#define MX51_DMA_REQ_SSI1_RX1 28 -#define MX51_DMA_REQ_SSI1_TX1 29 +#define MX51_DMA_REQ_SSI2_RX1 22 +#define MX51_DMA_REQ_SSI2_TX1 23 +#define MX51_DMA_REQ_SSI2_RX0 24 +#define MX51_DMA_REQ_SSI2_TX0 25 +#define MX51_DMA_REQ_SSI1_RX1 26 +#define MX51_DMA_REQ_SSI1_TX1 27 +#define MX51_DMA_REQ_SSI1_RX0 28 +#define MX51_DMA_REQ_SSI1_TX0 29 #define MX51_DMA_REQ_EMI_RD 30 #define MX51_DMA_REQ_CTI2_0 31 #define MX51_DMA_REQ_EMI_WR 32 @@ -308,8 +308,8 @@ #define MX51_MXC_INT_RTIC 26 #define MX51_MXC_INT_CSU 27 #define MX51_MXC_INT_SLIM_B 28 -#define MX51_MXC_INT_SSI1 29 -#define MX51_MXC_INT_SSI2 30 +#define MX51_INT_SSI1 29 +#define MX51_INT_SSI2 30 #define MX51_INT_UART1 31 #define MX51_INT_UART2 32 #define MX51_INT_UART3 33 From 40e2eda92178f58fd7da2866d3f346dcd2baafed Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 20 Aug 2010 16:44:34 +0200 Subject: [PATCH 45/72] ARM: mx51: Add audmux support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/plat-mxc/audmux-v2.c | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 65bf34e1a4f6..3a4c3b32a6e7 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -5,6 +5,7 @@ config ARCH_MX51 default y select MXC_TZIC select ARCH_MXC_IOMUX_V3 + select ARCH_MXC_AUDMUX_V2 comment "MX5 platforms:" diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c index f9e7cdbd0005..62920490c0d6 100644 --- a/arch/arm/plat-mxc/audmux-v2.c +++ b/arch/arm/plat-mxc/audmux-v2.c @@ -186,7 +186,13 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port); static int mxc_audmux_v2_init(void) { int ret; - +#if defined(CONFIG_ARCH_MX5) + if (cpu_is_mx51()) { + audmux_base = MX51_IO_ADDRESS(MX51_AUDMUX_BASE_ADDR); + ret = 0; + return ret; + } +#endif #if defined(CONFIG_ARCH_MX3) if (cpu_is_mx31()) audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR); From 00b57bf9786ca701508333112c8917d1e0860129 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 23 Aug 2010 11:25:52 +0200 Subject: [PATCH 46/72] ARM: imx: reorganize nand registration to use a struct MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Addiontionally make the interrupt #defines match the base address defines MX.._NFC_BASE_ADDR. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/devices-imx21.h | 3 +- arch/arm/mach-imx/devices-imx27.h | 3 +- arch/arm/mach-mx25/devices-imx25.h | 3 +- arch/arm/mach-mx3/devices-imx31.h | 3 +- arch/arm/mach-mx3/devices-imx35.h | 3 +- arch/arm/plat-mxc/devices/platform-mxc_nand.c | 64 ++++++++++++------- .../plat-mxc/include/mach/devices-common.h | 12 ++-- arch/arm/plat-mxc/include/mach/mx21.h | 2 +- arch/arm/plat-mxc/include/mach/mx25.h | 2 +- arch/arm/plat-mxc/include/mach/mx27.h | 2 +- arch/arm/plat-mxc/include/mach/mx31.h | 2 +- arch/arm/plat-mxc/include/mach/mx35.h | 2 +- 12 files changed, 64 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 4795d70314db..d189039749b0 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -25,8 +25,9 @@ extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst; #define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata) #define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata) +extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst; #define imx21_add_mxc_nand(pdata) \ - imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata) + imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst; #define imx21_add_cspi(id, pdata) \ diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 176552199abc..e11606b4d31c 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -27,8 +27,9 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst; #define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata) #define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata) +extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst; #define imx27_add_mxc_nand(pdata) \ - imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata) + imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst; #define imx27_add_cspi(id, pdata) \ diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index 1dd95721d9f5..eab19c0a9429 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -34,8 +34,9 @@ extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst; #define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata) #define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata) +extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst; #define imx25_add_mxc_nand(pdata) \ - imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata) + imx_add_mxc_nand(&imx25_mxc_nand_data, pdata) extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst; #define imx25_add_spi_imx(id, pdata) \ diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h index eea425ff074e..de9598590eba 100644 --- a/arch/arm/mach-mx3/devices-imx31.h +++ b/arch/arm/mach-mx3/devices-imx31.h @@ -29,8 +29,9 @@ extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst; #define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata) #define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata) +extern const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst; #define imx31_add_mxc_nand(pdata) \ - imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata) + imx_add_mxc_nand(&imx31_mxc_nand_data, pdata) extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst; #define imx31_add_cspi(id, pdata) \ diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index f187d3552738..56404de907f9 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -32,8 +32,9 @@ extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst; #define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata) #define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata) +extern const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst; #define imx35_add_mxc_nand(pdata) \ - imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata) + imx_add_mxc_nand(&imx35_mxc_nand_data, pdata) extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst; #define imx35_add_cspi(id, pdata) \ diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/plat-mxc/devices/platform-mxc_nand.c index 1c286418d123..6d3a4785f95b 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c +++ b/arch/arm/plat-mxc/devices/platform-mxc_nand.c @@ -7,38 +7,56 @@ * Free Software Foundation. */ #include +#include #include -static struct platform_device *__init imx_add_mxc_nand(resource_size_t iobase, - int irq, const struct mxc_nand_platform_data *pdata, - resource_size_t iosize) +#define imx_mxc_nand_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _NFC_BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_NFC \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX21, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_ARCH_MX25 +const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX25, SZ_8K); +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX27, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX31 +const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX31, SZ_4K); +#endif + +#ifdef CONFIG_ARCH_MX35 +const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = + imx_mxc_nand_data_entry_single(MX35, SZ_8K); +#endif + +struct platform_device *__init imx_add_mxc_nand( + const struct imx_mxc_nand_data *data, + const struct mxc_nand_platform_data *pdata) { - static int id = 0; - struct resource res[] = { { - .start = iobase, - .end = iobase + iosize - 1, + .start = data->iobase, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { - .start = irq, - .end = irq, + .start = data->irq, + .end = data->irq, .flags = IORESOURCE_IRQ, }, }; - - return imx_add_platform_device("mxc_nand", id++, res, ARRAY_SIZE(res), + return imx_add_platform_device("mxc_nand", 0, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } - -struct platform_device *__init imx_add_mxc_nand_v1(resource_size_t iobase, - int irq, const struct mxc_nand_platform_data *pdata) -{ - return imx_add_mxc_nand(iobase, irq, pdata, SZ_4K); -} - -struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase, - int irq, const struct mxc_nand_platform_data *pdata) -{ - return imx_add_mxc_nand(iobase, irq, pdata, SZ_8K); -} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 32b8f3674cc9..371336ee9d7f 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -70,10 +70,14 @@ struct platform_device *__init imx_add_imx_uart_1irq( const struct imxuart_platform_data *pdata); #include -struct platform_device *__init imx_add_mxc_nand_v1(resource_size_t iobase, - int irq, const struct mxc_nand_platform_data *pdata); -struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase, - int irq, const struct mxc_nand_platform_data *pdata); +struct imx_mxc_nand_data { + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_mxc_nand( + const struct imx_mxc_nand_data *data, + const struct mxc_nand_platform_data *pdata); #include struct imx_spi_imx_data { diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index ed98b9c9f389..8bc59720b6e4 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h @@ -120,7 +120,7 @@ #define MX21_INT_GPT1 26 #define MX21_INT_WDOG 27 #define MX21_INT_PCMCIA 28 -#define MX21_INT_NANDFC 29 +#define MX21_INT_NFC 29 #define MX21_INT_BMI 30 #define MX21_INT_CSI 31 #define MX21_INT_DMACH0 32 diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 8f809eb084df..a9e1095d7486 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -69,7 +69,7 @@ #define MX25_INT_KPP 24 #define MX25_INT_DRYICE 25 #define MX25_INT_UART2 32 -#define MX25_INT_NANDFC 33 +#define MX25_INT_NFC 33 #define MX25_INT_LCDC 39 #define MX25_INT_UART5 40 #define MX25_INT_CAN1 43 diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index a8ab2e02a8ca..2237ba2e5351 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -167,7 +167,7 @@ static inline void mx27_setup_weimcs(size_t cs, #define MX27_INT_GPT1 26 #define MX27_INT_WDOG 27 #define MX27_INT_PCMCIA 28 -#define MX27_INT_NANDFC 29 +#define MX27_INT_NFC 29 #define MX27_INT_ATA 30 #define MX27_INT_CSI 31 #define MX27_INT_DMACH0 32 diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index eb8bbc7eedfa..03e2afabc9fc 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -168,7 +168,7 @@ static inline void mx31_setup_weimcs(size_t cs, #define MX31_INT_POWER_FAIL 30 #define MX31_INT_CCM_DVFS 31 #define MX31_INT_UART2 32 -#define MX31_INT_NANDFC 33 +#define MX31_INT_NFC 33 #define MX31_INT_SDMA 34 #define MX31_INT_USB1 35 #define MX31_INT_USB2 36 diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 867b8c0ca105..9f0a1ee126ee 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -145,7 +145,7 @@ #define MX35_INT_GPT 29 #define MX35_INT_POWER_FAIL 30 #define MX35_INT_UART2 32 -#define MX35_INT_NANDFC 33 +#define MX35_INT_NFC 33 #define MX35_INT_SDMA 34 #define MX35_INT_USBHS 35 #define MX35_INT_USBOTG 37 From 63a7c6d7507ed6f4ea24a8ed008efa1bb22a2a97 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 3 Aug 2010 11:59:46 +0200 Subject: [PATCH 47/72] ARM: mx5: dynamically register mxc-nand device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/devices-imx51.h | 4 ++++ arch/arm/plat-mxc/devices/platform-mxc_nand.c | 23 ++++++++++++++++++- .../plat-mxc/include/mach/devices-common.h | 7 ++++++ arch/arm/plat-mxc/include/mach/mx51.h | 2 +- 4 files changed, 34 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index 782b45bd916b..41d93c3d7d0b 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -21,6 +21,10 @@ extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst; #define imx51_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata) +extern const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst; +#define imx51_add_mxc_nand(pdata) \ + imx_add_mxc_nand(&imx51_mxc_nand_data, pdata) + extern const struct imx_spi_imx_data imx51_cspi_data __initconst; #define imx51_add_cspi(pdata) \ imx_add_spi_imx(&imx51_cspi_data, pdata) diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/plat-mxc/devices/platform-mxc_nand.c index 6d3a4785f95b..3fdcc32e3d67 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c +++ b/arch/arm/plat-mxc/devices/platform-mxc_nand.c @@ -17,6 +17,15 @@ .irq = soc ## _INT_NFC \ } +#define imx_mxc_nandv3_data_entry_single(soc, _size) \ + { \ + .id = -1, \ + .iobase = soc ## _NFC_BASE_ADDR, \ + .iosize = _size, \ + .axibase = soc ## _NFC_AXI_BASE_ADDR, \ + .irq = soc ## _INT_NFC \ + } + #ifdef CONFIG_SOC_IMX21 const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = imx_mxc_nand_data_entry_single(MX21, SZ_4K); @@ -42,12 +51,22 @@ const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = imx_mxc_nand_data_entry_single(MX35, SZ_8K); #endif +#ifdef CONFIG_ARCH_MX51 +const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst = + imx_mxc_nandv3_data_entry_single(MX51, SZ_16K); +#endif + struct platform_device *__init imx_add_mxc_nand( const struct imx_mxc_nand_data *data, const struct mxc_nand_platform_data *pdata) { + /* AXI has to come first, that's how the mxc_nand driver expect it */ struct resource res[] = { { + .start = data->axibase, + .end = data->axibase + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, { .start = data->iobase, .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, @@ -57,6 +76,8 @@ struct platform_device *__init imx_add_mxc_nand( .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("mxc_nand", 0, res, ARRAY_SIZE(res), + return imx_add_platform_device("mxc_nand", data->id, + res + !data->axibase, + ARRAY_SIZE(res) - !data->axibase, pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 371336ee9d7f..f87aa1ad6685 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -71,8 +71,15 @@ struct platform_device *__init imx_add_imx_uart_1irq( #include struct imx_mxc_nand_data { + /* + * id is traditionally 0, but -1 is more appropriate. We use -1 for new + * machines but don't change existing devices as the nand device usually + * appears in the kernel command line to pass its partitioning. + */ + int id; resource_size_t iobase; resource_size_t iosize; + resource_size_t axibase; resource_size_t irq; }; struct platform_device *__init imx_add_mxc_nand( diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index b47d65b1c112..c99eeab6fe09 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -287,7 +287,7 @@ #define MX51_MXC_INT_RESV5 5 #define MX51_MXC_INT_SDMA 6 #define MX51_MXC_INT_IOMUX 7 -#define MX51_MXC_INT_NFC 8 +#define MX51_INT_NFC 8 #define MX51_MXC_INT_VPU 9 #define MX51_MXC_INT_IPU_ERR 10 #define MX51_MXC_INT_IPU_SYN 11 From 8f6e900a661881f9585d9b3a7173a44020c3c0b2 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 25 Aug 2010 11:56:26 +0200 Subject: [PATCH 48/72] ARM: mx5: clock-imx51: make *ipg clocks secondary clocks of their corresponding peripheral clocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently the uarts and timer only work because they are turned on by reset default. Make them secondary clocks of their corresponding peripheral clocks to make sure they are turned on when necessary. Also, register some clocks to get rid of compiler warnings Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 5c7901180c8e..e6c17d78189c 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -914,24 +914,24 @@ DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET, NULL, NULL, &ipg_clk, NULL); /* UART */ -DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, - NULL, NULL, &uart_root_clk, NULL); -DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, - NULL, NULL, &uart_root_clk, NULL); -DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, - NULL, NULL, &uart_root_clk, NULL); DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &ipg_clk, &aips_tz1_clk); DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, &ipg_clk, &aips_tz1_clk); DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, NULL, NULL, &ipg_clk, &spba_clk); +DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, + NULL, NULL, &uart_root_clk, &uart1_ipg_clk); +DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, + NULL, NULL, &uart_root_clk, &uart2_ipg_clk); +DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, + NULL, NULL, &uart_root_clk, &uart3_ipg_clk); /* GPT */ -DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, - NULL, NULL, &ipg_clk, NULL); DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, NULL, NULL, &ipg_clk, NULL); +DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, + NULL, NULL, &ipg_clk, &gpt_ipg_clk); /* I2C */ DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, @@ -1003,6 +1003,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK(NULL, "ckih", ckih_clk) + _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk) + _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk) _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) _REGISTER_CLOCK("imx51-cspi.0", NULL, cspi_clk) From 13040066e28688b635801cdd5c6587fddae0e232 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 28 Sep 2010 21:37:20 +0200 Subject: [PATCH 49/72] ARM: imx/clock-imx27: Pass NULL as function callback, not 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes many sparse warnings like: arch/arm/mach-imx/clock-imx27.c:597:1: warning: Using plain integer as NULL pointer Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clock-imx27.c | 42 ++++++++++++++++----------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c index 07bf315bc078..98a25bada783 100644 --- a/arch/arm/mach-imx/clock-imx27.c +++ b/arch/arm/mach-imx/clock-imx27.c @@ -594,27 +594,27 @@ DEFINE_CLOCK(uart2_clk1, 0, PCCR1, 30, NULL, NULL, &ipg_clk); DEFINE_CLOCK(uart1_clk1, 0, PCCR1, 31, NULL, NULL, &ipg_clk); /* Clocks we cannot directly gate, but drivers need their rates */ -DEFINE_CLOCK(cspi1_clk, 0, 0, 0, NULL, &cspi1_clk1, &per2_clk); -DEFINE_CLOCK(cspi2_clk, 1, 0, 0, NULL, &cspi2_clk1, &per2_clk); -DEFINE_CLOCK(cspi3_clk, 2, 0, 0, NULL, &cspi13_clk1, &per2_clk); -DEFINE_CLOCK(sdhc1_clk, 0, 0, 0, NULL, &sdhc1_clk1, &per2_clk); -DEFINE_CLOCK(sdhc2_clk, 1, 0, 0, NULL, &sdhc2_clk1, &per2_clk); -DEFINE_CLOCK(sdhc3_clk, 2, 0, 0, NULL, &sdhc3_clk1, &per2_clk); -DEFINE_CLOCK(pwm_clk, 0, 0, 0, NULL, &pwm_clk1, &per1_clk); -DEFINE_CLOCK(gpt1_clk, 0, 0, 0, NULL, &gpt1_clk1, &per1_clk); -DEFINE_CLOCK(gpt2_clk, 1, 0, 0, NULL, &gpt2_clk1, &per1_clk); -DEFINE_CLOCK(gpt3_clk, 2, 0, 0, NULL, &gpt3_clk1, &per1_clk); -DEFINE_CLOCK(gpt4_clk, 3, 0, 0, NULL, &gpt4_clk1, &per1_clk); -DEFINE_CLOCK(gpt5_clk, 4, 0, 0, NULL, &gpt5_clk1, &per1_clk); -DEFINE_CLOCK(gpt6_clk, 5, 0, 0, NULL, &gpt6_clk1, &per1_clk); -DEFINE_CLOCK(uart1_clk, 0, 0, 0, NULL, &uart1_clk1, &per1_clk); -DEFINE_CLOCK(uart2_clk, 1, 0, 0, NULL, &uart2_clk1, &per1_clk); -DEFINE_CLOCK(uart3_clk, 2, 0, 0, NULL, &uart3_clk1, &per1_clk); -DEFINE_CLOCK(uart4_clk, 3, 0, 0, NULL, &uart4_clk1, &per1_clk); -DEFINE_CLOCK(uart5_clk, 4, 0, 0, NULL, &uart5_clk1, &per1_clk); -DEFINE_CLOCK(uart6_clk, 5, 0, 0, NULL, &uart6_clk1, &per1_clk); -DEFINE_CLOCK1(lcdc_clk, 0, 0, 0, parent, &lcdc_clk1, &per3_clk); -DEFINE_CLOCK1(csi_clk, 0, 0, 0, parent, &csi_clk1, &per4_clk); +DEFINE_CLOCK(cspi1_clk, 0, NULL, 0, NULL, &cspi1_clk1, &per2_clk); +DEFINE_CLOCK(cspi2_clk, 1, NULL, 0, NULL, &cspi2_clk1, &per2_clk); +DEFINE_CLOCK(cspi3_clk, 2, NULL, 0, NULL, &cspi13_clk1, &per2_clk); +DEFINE_CLOCK(sdhc1_clk, 0, NULL, 0, NULL, &sdhc1_clk1, &per2_clk); +DEFINE_CLOCK(sdhc2_clk, 1, NULL, 0, NULL, &sdhc2_clk1, &per2_clk); +DEFINE_CLOCK(sdhc3_clk, 2, NULL, 0, NULL, &sdhc3_clk1, &per2_clk); +DEFINE_CLOCK(pwm_clk, 0, NULL, 0, NULL, &pwm_clk1, &per1_clk); +DEFINE_CLOCK(gpt1_clk, 0, NULL, 0, NULL, &gpt1_clk1, &per1_clk); +DEFINE_CLOCK(gpt2_clk, 1, NULL, 0, NULL, &gpt2_clk1, &per1_clk); +DEFINE_CLOCK(gpt3_clk, 2, NULL, 0, NULL, &gpt3_clk1, &per1_clk); +DEFINE_CLOCK(gpt4_clk, 3, NULL, 0, NULL, &gpt4_clk1, &per1_clk); +DEFINE_CLOCK(gpt5_clk, 4, NULL, 0, NULL, &gpt5_clk1, &per1_clk); +DEFINE_CLOCK(gpt6_clk, 5, NULL, 0, NULL, &gpt6_clk1, &per1_clk); +DEFINE_CLOCK(uart1_clk, 0, NULL, 0, NULL, &uart1_clk1, &per1_clk); +DEFINE_CLOCK(uart2_clk, 1, NULL, 0, NULL, &uart2_clk1, &per1_clk); +DEFINE_CLOCK(uart3_clk, 2, NULL, 0, NULL, &uart3_clk1, &per1_clk); +DEFINE_CLOCK(uart4_clk, 3, NULL, 0, NULL, &uart4_clk1, &per1_clk); +DEFINE_CLOCK(uart5_clk, 4, NULL, 0, NULL, &uart5_clk1, &per1_clk); +DEFINE_CLOCK(uart6_clk, 5, NULL, 0, NULL, &uart6_clk1, &per1_clk); +DEFINE_CLOCK1(lcdc_clk, 0, NULL, 0, parent, &lcdc_clk1, &per3_clk); +DEFINE_CLOCK1(csi_clk, 0, NULL, 0, parent, &csi_clk1, &per4_clk); #define _REGISTER_CLOCK(d, n, c) \ { \ From 7ad211e35b41166ccf8448345726f324f26260f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 28 Sep 2010 21:39:49 +0200 Subject: [PATCH 50/72] ARM: imx/pcm038: make regulator platform data static MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes the following sparse warning: arch/arm/mach-imx/pcm970-baseboard.c:203:30: warning: symbol 'pcm970_sja1000_platform_data' was not declared. Should it be static? Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-pcm038.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 641f9bb08b26..a3d645ff4467 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -257,7 +257,7 @@ static struct regulator_init_data cam_data = { .consumer_supplies = cam_consumers, }; -struct mc13783_regulator_init_data pcm038_regulators[] = { +static struct mc13783_regulator_init_data pcm038_regulators[] = { { .id = MC13783_REGU_VCAM, .init_data = &cam_data, From 6c80ee51707ec9fcf137bc7b511d2853b772eae6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 28 Sep 2010 21:53:31 +0200 Subject: [PATCH 51/72] ARM: imx: make all pin lists const and signed, move to .init where possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Making the lists signed fixes sparse warnings like: arch/arm/mach-imx/mach-mx27_3ds.c:94:31: warning: incorrect type in argument 1 (different signedness) arch/arm/mach-imx/mach-mx27_3ds.c:94:31: expected int const *pin_list arch/arm/mach-imx/mach-mx27_3ds.c:94:31: got unsigned int static [toplevel] * Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 2 +- arch/arm/mach-imx/mach-cpuimx27.c | 2 +- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 +- arch/arm/mach-imx/mach-imx27lite.c | 2 +- arch/arm/mach-imx/mach-mx1ads.c | 2 +- arch/arm/mach-imx/mach-mx21ads.c | 2 +- arch/arm/mach-imx/mach-mx27_3ds.c | 2 +- arch/arm/mach-imx/mach-mx27ads.c | 2 +- arch/arm/mach-imx/mach-mxt_td60.c | 2 +- arch/arm/mach-imx/mach-pca100.c | 2 +- arch/arm/mach-imx/mach-pcm038.c | 2 +- arch/arm/mach-imx/mach-scb9328.c | 2 +- arch/arm/mach-imx/pcm970-baseboard.c | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index cb433aeec939..026263c665ca 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -41,7 +41,7 @@ #include "devices-imx27.h" #include "devices.h" -static int eukrea_mbimx27_pins[] = { +static const int eukrea_mbimx27_pins[] __initconst = { /* UART2 */ PE3_PF_UART2_CTS, PE4_PF_UART2_RTS, diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index f00ddd9829b5..d4cb592ffaed 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -46,7 +46,7 @@ #include "devices-imx27.h" #include "devices.h" -static int eukrea_cpuimx27_pins[] = { +static const int eukrea_cpuimx27_pins[] __initconst = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 7b3eed043ef1..21904f32740c 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -44,7 +44,7 @@ #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17) #define SDHC1_IRQ IRQ_GPIOB(25) -static int visstrim_m10_pins[] = { +static const int visstrim_m10_pins[] __initconst = { /* UART1 (console) */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 22a2b5d91213..67480b639e2c 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c @@ -27,7 +27,7 @@ #include "devices-imx27.h" #include "devices.h" -static unsigned int mx27lite_pins[] = { +static const int mx27lite_pins[] __initconst = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 6e2f24952f1b..85e2877572b5 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c @@ -32,7 +32,7 @@ #include "devices-imx1.h" #include "devices.h" -static int mx1ads_pins[] = { +static const int mx1ads_pins[] __initconst = { /* UART1 */ PC9_PF_UART1_CTS, PC10_PF_UART1_RTS, diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 96d7f8189f32..7f021e6f6acd 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -67,7 +67,7 @@ #define MX21ADS_IO_LED4_ON 0x4000 #define MX21ADS_IO_LED3_ON 0x8000 -static unsigned int mx21ads_pins[] = { +static const int mx21ads_pins[] __initconst = { /* CS8900A */ (GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11), diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index e66ffaa1c26c..9f6832d5f7f7 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -33,7 +33,7 @@ #include "devices-imx27.h" #include "devices.h" -static unsigned int mx27pdk_pins[] = { +static const int mx27pdk_pins[] __initconst = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 6be6033c876d..1a33288787a8 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -66,7 +66,7 @@ /* to determine the correct external crystal reference */ #define CKIH_27MHZ_BIT_SET (1 << 3) -static unsigned int mx27ads_pins[] = { +static const int mx27ads_pins[] __initconst = { /* UART0 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index d878bb99be7e..58fb0d653981 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -37,7 +37,7 @@ #include "devices-imx27.h" #include "devices.h" -static unsigned int mxt_td60_pins[] __initdata = { +static const int mxt_td60_pins[] __initconst = { /* UART0 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index cccf521de6b1..197dbb8afe9f 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -54,7 +54,7 @@ #define SPI1_SS1 (GPIO_PORTD + 27) #define SD2_CD (GPIO_PORTC + 29) -static int pca100_pins[] = { +static const int pca100_pins[] __initconst = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index a3d645ff4467..3fbed661f612 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -43,7 +43,7 @@ #include "devices-imx27.h" #include "devices.h" -static int pcm038_pins[] = { +static const int pcm038_pins[] __initconst = { /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index 88bf0d1e26e6..fb2e5f3d37f6 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -95,7 +95,7 @@ static struct platform_device dm9000x_device = { } }; -static int mxc_uart1_pins[] = { +static const int mxc_uart1_pins[] = { PC9_PF_UART1_CTS, PC10_PF_UART1_RTS, PC11_PF_UART1_TXD, diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c index f490a406d57e..7cffad880e42 100644 --- a/arch/arm/mach-imx/pcm970-baseboard.c +++ b/arch/arm/mach-imx/pcm970-baseboard.c @@ -31,7 +31,7 @@ #include "devices.h" -static int pcm970_pins[] = { +static const int pcm970_pins[] __initconst = { /* SDHC */ PB4_PF_SD2_D0, PB5_PF_SD2_D1, From 214b43100fd59e55fcd265329aafd14ab01ec30d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 28 Sep 2010 21:55:22 +0200 Subject: [PATCH 52/72] ARM: imx/pcm970: make platform_data static MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes the following sparse warning: arch/arm/mach-imx/pcm970-baseboard.c:224:13: warning: symbol 'pcm970_baseboard_init' was not declared. Should it be static? Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/pcm970-baseboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c index 7cffad880e42..9110d9cca7a2 100644 --- a/arch/arm/mach-imx/pcm970-baseboard.c +++ b/arch/arm/mach-imx/pcm970-baseboard.c @@ -200,7 +200,7 @@ static struct resource pcm970_sja1000_resources[] = { }, }; -struct sja1000_platform_data pcm970_sja1000_platform_data = { +static struct sja1000_platform_data pcm970_sja1000_platform_data = { .osc_freq = 16000000, .ocr = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL, .cdr = CDR_CBP, From bd9e310dca15c9987256f67af19f9f42426e7493 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 28 Sep 2010 22:04:01 +0200 Subject: [PATCH 53/72] ARM: imx/pca100: only specify i2c device type once MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The first argument to I2C_BOARD_INFO is used to assign .type, so it should not be specified a second time. For the rtc-pcf8563/pcf8563 entry gcc preferred pcf8563, so did I. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-pca100.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 197dbb8afe9f..1247ce9dabad 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -192,11 +192,9 @@ static struct i2c_board_info pca100_i2c_devices[] = { I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ .platform_data = &board_eeprom, }, { - I2C_BOARD_INFO("rtc-pcf8563", 0x51), - .type = "pcf8563" + I2C_BOARD_INFO("pcf8563", 0x51), }, { I2C_BOARD_INFO("lm75", 0x4a), - .type = "lm75" } }; From 54dc3f4674fbaf362d6e969904bfcece3cfebef1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20B=C3=A9nard?= Date: Sat, 2 Oct 2010 17:15:26 +0200 Subject: [PATCH 54/72] mach-cpuimx35: remove unecessary tsc2007 functions + style cleanup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - remove functions which are no more necessary for tsc2007 - indent platform_data for better readability Signed-off-by: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/mach-cpuimx35.c | 32 +++++-------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c index 2a4f8b781ba4..ea0a85f1c9aa 100644 --- a/arch/arm/mach-mx3/mach-cpuimx35.c +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -53,39 +54,16 @@ static const struct imxuart_platform_data uart_pdata __initconst = { }; static const struct imxi2c_platform_data -eukrea_cpuimx35_i2c0_data __initconst = { - .bitrate = 50000, + eukrea_cpuimx35_i2c0_data __initconst = { + .bitrate = 100000, }; -#define TSC2007_IRQGPIO (2 * 32 + 2) -static int ts_get_pendown_state(void) -{ - int val = 0; - gpio_free(TSC2007_IRQGPIO); - gpio_request(TSC2007_IRQGPIO, NULL); - gpio_direction_input(TSC2007_IRQGPIO); - - val = gpio_get_value(TSC2007_IRQGPIO); - - gpio_free(TSC2007_IRQGPIO); - gpio_request(TSC2007_IRQGPIO, NULL); - - return val ? 0 : 1; -} - -static int ts_init(void) -{ - gpio_request(TSC2007_IRQGPIO, NULL); - return 0; -} - static struct tsc2007_platform_data tsc2007_info = { .model = 2007, .x_plate_ohms = 180, - .get_pendown_state = ts_get_pendown_state, - .init_platform_hw = ts_init, }; +#define TSC2007_IRQGPIO (2 * 32 + 2) static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { { I2C_BOARD_INFO("pcf8563", 0x51), @@ -135,7 +113,7 @@ static struct pad_desc eukrea_cpuimx35_pads[] = { }; static const struct mxc_nand_platform_data -eukrea_cpuimx35_nand_board_info __initconst = { + eukrea_cpuimx35_nand_board_info __initconst = { .width = 1, .hw_ecc = 1, .flash_bbt = 1, From 203a0734709779fa40552cd9bb7c4dd325b5131f Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 11 Oct 2010 12:55:21 +0200 Subject: [PATCH 55/72] arm: imx: add generic esdhc device Signed-off-by: Wolfram Sang Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/Kconfig | 3 ++ arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-esdhc.c | 31 +++++++++++++++++++ .../plat-mxc/include/mach/devices-common.h | 6 ++++ arch/arm/plat-mxc/include/mach/esdhc.h | 16 ++++++++++ 5 files changed, 57 insertions(+) create mode 100644 arch/arm/plat-mxc/devices/platform-esdhc.c create mode 100644 arch/arm/plat-mxc/include/mach/esdhc.h diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index d736c3d4e292..8266ecb6933e 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -1,3 +1,6 @@ +config IMX_HAVE_PLATFORM_ESDHC + bool + config IMX_HAVE_PLATFORM_FLEXCAN select HAVE_CAN_FLEXCAN bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index ac7738379374..da9676e80e8d 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o diff --git a/arch/arm/plat-mxc/devices/platform-esdhc.c b/arch/arm/plat-mxc/devices/platform-esdhc.c new file mode 100644 index 000000000000..68db2a22d2cd --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-esdhc.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2010 Pengutronix, Wolfram Sang + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#include +#include + +struct platform_device *__init imx_add_esdhc(int id, + resource_size_t iobase, resource_size_t iosize, + resource_size_t irq, + const struct esdhc_platform_data *pdata) +{ + struct resource res[] = { + { + .start = iobase, + .end = iobase + iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .end = irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("sdhci-esdhc-imx", id, res, + ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index f87aa1ad6685..f75446fa97eb 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -97,3 +97,9 @@ struct imx_spi_imx_data { struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); + +#include +struct platform_device *__init imx_add_esdhc(int id, + resource_size_t iobase, resource_size_t iosize, + resource_size_t irq, + const struct esdhc_platform_data *pdata); diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h new file mode 100644 index 000000000000..a48a9aaa56b1 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/esdhc.h @@ -0,0 +1,16 @@ +/* + * Copyright 2010 Wolfram Sang + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 + * of the License. + */ + +#ifndef __ASM_ARCH_IMX_ESDHC_H +#define __ASM_ARCH_IMX_ESDHC_H + +struct esdhc_platform_data { + unsigned int wp_gpio; /* write protect pin */ +}; +#endif /* __ASM_ARCH_IMX_ESDHC_H */ From 774305d0ee105f75d44699e2c94ef3bf9c5e2d90 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 11 Oct 2010 12:55:22 +0200 Subject: [PATCH 56/72] arm: imx35: add esdhc-device to MX35-platform Signed-off-by: Wolfram Sang Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/clock-imx35.c | 6 +++--- arch/arm/mach-mx3/devices-imx35.h | 7 +++++++ arch/arm/plat-mxc/include/mach/mx35.h | 3 +++ 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index 708c2b36cf06..f08b407cdb3f 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -459,9 +459,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk) _REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk) _REGISTER_CLOCK(NULL, "esai", esai_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc3_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK(NULL, "gpio", gpio1_clk) _REGISTER_CLOCK(NULL, "gpio", gpio2_clk) diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index 56404de907f9..766008451ccd 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -41,3 +41,10 @@ extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst; imx_add_spi_imx(&imx35_cspi_data[id], pdata) #define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata) #define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata) + +#define imx35_add_esdhc0(pdata) \ + imx_add_esdhc(0, MX35_ESDHC1_BASE_ADDR, SZ_16K, MX35_INT_MMC_SDHC1, pdata) +#define imx35_add_esdhc1(pdata) \ + imx_add_esdhc(1, MX35_ESDHC2_BASE_ADDR, SZ_16K, MX35_INT_MMC_SDHC2, pdata) +#define imx35_add_esdhc2(pdata) \ + imx_add_esdhc(2, MX35_ESDHC3_BASE_ADDR, SZ_16K, MX35_INT_MMC_SDHC3, pdata) diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 9f0a1ee126ee..5a1c621aeba1 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -52,6 +52,9 @@ #define MX35_GPIO3_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xa4000) #define MX35_SCC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xac000) #define MX35_RNGA_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb0000) +#define MX35_ESDHC1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb4000) +#define MX35_ESDHC2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb8000) +#define MX35_ESDHC3_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xbc000) #define MX35_IPU_CTRL_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xc0000) #define MX35_AUDMUX_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xc4000) #define MX35_GPIO1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xcc000) From 9a545943a378ec1b3a9819de4b189ce5e822a6af Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 11 Oct 2010 12:55:23 +0200 Subject: [PATCH 57/72] arm: pcm043: add esdhc-device to boardconfig Signed-off-by: Wolfram Sang Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/Kconfig | 1 + arch/arm/mach-mx3/mach-pcm043.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index d762bf8e539b..84ff177cba7a 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -123,6 +123,7 @@ config MACH_PCM043 select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_FLEXCAN + select IMX_HAVE_PLATFORM_ESDHC select MXC_ULPI if USB_ULPI help Include support for Phytec pcm043 platform. This includes diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index dcc216bb3952..c427b3c35ca7 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c @@ -216,6 +216,13 @@ static struct pad_desc pcm043_pads[] = { /* CAN2 */ MX35_PAD_TX5_RX0__CAN2_TXCAN, MX35_PAD_TX4_RX1__CAN2_RXCAN, + /* esdhc */ + MX35_PAD_SD1_CMD__ESDHC1_CMD, + MX35_PAD_SD1_CLK__ESDHC1_CLK, + MX35_PAD_SD1_DATA0__ESDHC1_DAT0, + MX35_PAD_SD1_DATA1__ESDHC1_DAT1, + MX35_PAD_SD1_DATA2__ESDHC1_DAT2, + MX35_PAD_SD1_DATA3__ESDHC1_DAT3, }; #define AC97_GPIO_TXFS (1 * 32 + 31) @@ -388,6 +395,7 @@ static void __init mxc_board_init(void) mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); imx35_add_flexcan1(NULL); + imx35_add_esdhc0(NULL); } static void __init pcm043_timer_init(void) From 438a4d66a561fe3d6dceeb9c7f30d23f52cb371b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20B=C3=A9nard?= Date: Sat, 2 Oct 2010 17:15:27 +0200 Subject: [PATCH 58/72] eukrea_mbimxsd for cpuimx35: add CAN & SDCard support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/Kconfig | 2 ++ arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c | 13 +++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 84ff177cba7a..096fd33f8ab9 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -164,6 +164,8 @@ config MACH_EUKREA_CPUIMX35 select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_FLEXCAN + select IMX_HAVE_PLATFORM_ESDHC select MXC_ULPI if USB_ULPI help Include support for Eukrea CPUIMX35 platform. This includes diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c index cb667b6f17ae..886959906fbc 100644 --- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c @@ -119,6 +119,16 @@ static struct pad_desc eukrea_mbimxsd_pads[] = { MX35_PAD_STXD4__AUDMUX_AUD4_TXD, MX35_PAD_SRXD4__AUDMUX_AUD4_RXD, MX35_PAD_SCK4__AUDMUX_AUD4_TXC, + /* CAN2 */ + MX35_PAD_TX5_RX0__CAN2_TXCAN, + MX35_PAD_TX4_RX1__CAN2_RXCAN, + /* SDCARD */ + MX35_PAD_SD1_CMD__ESDHC1_CMD, + MX35_PAD_SD1_CLK__ESDHC1_CLK, + MX35_PAD_SD1_DATA0__ESDHC1_DAT0, + MX35_PAD_SD1_DATA1__ESDHC1_DAT1, + MX35_PAD_SD1_DATA2__ESDHC1_DAT2, + MX35_PAD_SD1_DATA3__ESDHC1_DAT3, }; #define GPIO_LED1 (2 * 32 + 29) @@ -244,6 +254,9 @@ void __init eukrea_mbimxsd35_baseboard_init(void) imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); + imx35_add_flexcan1(NULL); + imx35_add_esdhc0(NULL); + gpio_request(GPIO_LED1, "LED1"); gpio_direction_output(GPIO_LED1, 1); gpio_free(GPIO_LED1); From f5e40c28b63939ee63f1f9d865eece0a28444fd0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20B=C3=A9nard?= Date: Sat, 2 Oct 2010 17:15:28 +0200 Subject: [PATCH 59/72] i.mx25: add esdhc support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/mach-mx25/clock.c | 22 ++++++++++++++++++++++ arch/arm/mach-mx25/devices-imx25.h | 5 +++++ arch/arm/plat-mxc/include/mach/mx25.h | 4 ++++ 3 files changed, 31 insertions(+) diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 039464a8dacc..25f37a9a0422 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c @@ -139,6 +139,16 @@ static unsigned long get_rate_lcdc(struct clk *clk) return get_rate_per(7); } +static unsigned long get_rate_esdhc1(struct clk *clk) +{ + return get_rate_per(3); +} + +static unsigned long get_rate_esdhc2(struct clk *clk) +{ + return get_rate_per(4); +} + static unsigned long get_rate_csi(struct clk *clk) { return get_rate_per(0); @@ -213,6 +223,12 @@ DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); +DEFINE_CLOCK(esdhc1_ahb_clk, 0, CCM_CGCR0, 21, get_rate_esdhc1, NULL, NULL); +DEFINE_CLOCK(esdhc1_per_clk, 0, CCM_CGCR0, 3, get_rate_esdhc1, NULL, + &esdhc1_ahb_clk); +DEFINE_CLOCK(esdhc2_ahb_clk, 0, CCM_CGCR0, 22, get_rate_esdhc2, NULL, NULL); +DEFINE_CLOCK(esdhc2_per_clk, 0, CCM_CGCR0, 4, get_rate_esdhc2, NULL, + &esdhc2_ahb_clk); DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL); DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk); @@ -238,6 +254,10 @@ DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk); DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk); DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk); +DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGCR1, 13, get_rate_esdhc1, NULL, + &esdhc1_per_clk); +DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGCR1, 14, get_rate_esdhc2, NULL, + &esdhc2_per_clk); DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); @@ -279,6 +299,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) + _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk) _REGISTER_CLOCK(NULL, "audmux", audmux_clk) _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index eab19c0a9429..fa7e05088e25 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -44,3 +44,8 @@ extern const struct imx_spi_imx_data imx25_spi_imx_data[] __initconst; #define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata) #define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata) #define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata) + +#define imx25_add_esdhc0(pdata) \ + imx_add_esdhc(0, MX25_ESDHC1_BASE_ADDR, SZ_16K, MX25_INT_MMC_SDHC1, pdata) +#define imx25_add_esdhc1(pdata) \ + imx_add_esdhc(1, MX25_ESDHC2_BASE_ADDR, SZ_16K, MX25_INT_MMC_SDHC2, pdata) diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index a9e1095d7486..153dd1b2a473 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -50,6 +50,8 @@ #define MX25_SSI1_BASE_ADDR 0x50034000 #define MX25_NFC_BASE_ADDR 0xbb000000 #define MX25_DRYICE_BASE_ADDR 0x53ffc000 +#define MX25_ESDHC1_BASE_ADDR 0x53fb4000 +#define MX25_ESDHC2_BASE_ADDR 0x53fb8000 #define MX25_LCDC_BASE_ADDR 0x53fbc000 #define MX25_KPP_BASE_ADDR 0x43fa8000 #define MX25_OTG_BASE_ADDR 0x53ff4000 @@ -59,6 +61,8 @@ #define MX25_INT_I2C1 3 #define MX25_INT_I2C2 4 #define MX25_INT_UART4 5 +#define MX25_INT_MMC_SDHC2 8 +#define MX25_INT_MMC_SDHC1 9 #define MX25_INT_I2C3 10 #define MX25_INT_SSI2 11 #define MX25_INT_SSI1 12 From 6f8460eb823c37f6ba236cd261a6edceea4805e5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20B=C3=A9nard?= Date: Sat, 2 Oct 2010 17:15:29 +0200 Subject: [PATCH 60/72] eukrea_mbimxsd for cpuimx25: add CAN & SDCard support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/mach-mx25/Kconfig | 2 ++ arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig index 326bb648f466..aa57e35ce3cd 100644 --- a/arch/arm/mach-mx25/Kconfig +++ b/arch/arm/mach-mx25/Kconfig @@ -12,6 +12,8 @@ config MACH_EUKREA_CPUIMX25 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_FLEXCAN + select IMX_HAVE_PLATFORM_ESDHC select MXC_ULPI if USB_ULPI choice diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c index 2062dd930955..c1fe048c445e 100644 --- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c @@ -89,6 +89,9 @@ static struct pad_desc eukrea_mbimxsd_pads[] = { MX25_PAD_KPP_COL2__AUD5_TXC, MX25_PAD_KPP_COL1__AUD5_RXD, MX25_PAD_KPP_COL0__AUD5_TXD, + /* CAN */ + MX25_PAD_GPIO_D__CAN2_RX, + MX25_PAD_GPIO_C__CAN2_TX, }; #define GPIO_LED1 83 @@ -241,6 +244,9 @@ void __init eukrea_mbimxsd25_baseboard_init(void) mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata); imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); + imx25_add_flexcan1(NULL); + imx25_add_esdhc0(NULL); + gpio_request(GPIO_LED1, "LED1"); gpio_direction_output(GPIO_LED1, 1); gpio_free(GPIO_LED1); From fdb03870a9714ba2695daa0c2b3e6b6be4318e9d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 8 Oct 2010 16:00:09 +0200 Subject: [PATCH 61/72] ARM: mx3: use MX3x_ prefixed version of CHIP_REV_x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also, remove the deprecated symbols from arch/arm/mach-mx3/cpu.c Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/Makefile | 1 - arch/arm/mach-mx3/cpu.c | 20 ++++++++++---------- arch/arm/plat-mxc/include/mach/mx3x.h | 13 ------------- 3 files changed, 10 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile index 2bd7beceb991..8a182d0a3fcf 100644 --- a/arch/arm/mach-mx3/Makefile +++ b/arch/arm/mach-mx3/Makefile @@ -7,7 +7,6 @@ obj-y := mm.o devices.o cpu.o CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS -CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c index 861afe0fe3ad..47b0573c11f5 100644 --- a/arch/arm/mach-mx3/cpu.c +++ b/arch/arm/mach-mx3/cpu.c @@ -25,15 +25,15 @@ struct mx3_cpu_type { }; static struct mx3_cpu_type mx31_cpu_type[] __initdata = { - { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = CHIP_REV_1_0 }, - { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = CHIP_REV_1_1 }, - { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = CHIP_REV_1_1 }, - { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = CHIP_REV_1_1 }, - { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = CHIP_REV_1_1 }, - { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = CHIP_REV_1_2 }, - { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = CHIP_REV_1_2 }, - { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = CHIP_REV_2_0 }, - { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = CHIP_REV_2_0 }, + { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = MX3x_CHIP_REV_1_0 }, + { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 }, + { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 }, + { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 }, + { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 }, + { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 }, + { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 }, + { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 }, + { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 }, }; void __init mx31_read_cpu_rev(void) @@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void) u32 i, srev; /* read SREV register from IIM module */ - srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV)); + srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) if (srev == mx31_cpu_type[i].srev) { diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index 7a356de385f5..d41ad68c1315 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h @@ -389,19 +389,6 @@ static inline int mx31_revision(void) #define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG #define MXC_INT_EXT_TV MX3x_INT_EXT_TV #define PROD_SIGNATURE MX3x_PROD_SIGNATURE -#define CHIP_REV_1_0 MX3x_CHIP_REV_1_0 -#define CHIP_REV_1_1 MX3x_CHIP_REV_1_1 -#define CHIP_REV_1_2 MX3x_CHIP_REV_1_2 -#define CHIP_REV_1_3 MX3x_CHIP_REV_1_3 -#define CHIP_REV_2_0 MX3x_CHIP_REV_2_0 -#define CHIP_REV_2_1 MX3x_CHIP_REV_2_1 -#define CHIP_REV_2_2 MX3x_CHIP_REV_2_2 -#define CHIP_REV_2_3 MX3x_CHIP_REV_2_3 -#define CHIP_REV_3_0 MX3x_CHIP_REV_3_0 -#define CHIP_REV_3_1 MX3x_CHIP_REV_3_1 -#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2 -#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN -#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM #endif #endif /* ifndef __MACH_MX3x_H__ */ From 67520f3a896acb1635894fd25626f7fa7c91e61c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Eric=20B=C3=A9nard?= Date: Fri, 8 Oct 2010 16:00:10 +0200 Subject: [PATCH 62/72] ARM: mx35: Add mx35_revision function to query the silicon revision MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Based on work done earlier by Sascha Hauer Signed-off-by: Sascha Hauer Signed-off-by: Eric Bénard [ukl: actually squash the two approaches together] Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/clock-imx35.c | 3 +++ arch/arm/mach-mx3/cpu.c | 27 +++++++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/mx35.h | 18 ++++-------------- arch/arm/plat-mxc/include/mach/mx3x.h | 10 +++++++++- 4 files changed, 43 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index f08b407cdb3f..9a1009884164 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -535,6 +535,9 @@ int __init mx35_clocks_init() __raw_writel(cgr2, CCM_BASE + CCM_CGR2); __raw_writel(cgr3, CCM_BASE + CCM_CGR3); + clk_enable(&iim_clk); + mx35_read_cpu_rev(); + #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(&epit1_clk, MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c index 47b0573c11f5..d00a75457812 100644 --- a/arch/arm/mach-mx3/cpu.c +++ b/arch/arm/mach-mx3/cpu.c @@ -55,3 +55,30 @@ void __init mx31_read_cpu_rev(void) printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); } + +unsigned int mx35_cpu_rev; +EXPORT_SYMBOL(mx35_cpu_rev); + +void __init mx35_read_cpu_rev(void) +{ + u32 rev; + char *srev = "unknown"; + + rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); + switch (rev) { + case 0x00: + mx35_cpu_rev = MX3x_CHIP_REV_1_0; + srev = "1.0"; + break; + case 0x10: + mx35_cpu_rev = MX3x_CHIP_REV_2_0; + srev = "2.0"; + break; + case 0x11: + mx35_cpu_rev = MX3x_CHIP_REV_2_1; + srev = "2.1"; + break; + } + + printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); +} diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 5a1c621aeba1..cb071b7b17e5 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -1,5 +1,6 @@ #ifndef __MACH_MX35_H__ #define __MACH_MX35_H__ + /* * IRAM */ @@ -66,6 +67,8 @@ #define MX35_CAN1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe4000) #define MX35_CAN2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe8000) #define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000) +#define MX35_IIM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xf0000) + #define MX35_OTG_BASE_ADDR 0x53ff4000 #define MX35_ROMP_BASE_ADDR 0x60000000 @@ -187,20 +190,7 @@ #define MX35_PROD_SIGNATURE 0x1 /* For MX31 */ -/* silicon revisions specific to i.MX31 */ -#define MX35_CHIP_REV_1_0 0x10 -#define MX35_CHIP_REV_1_1 0x11 -#define MX35_CHIP_REV_1_2 0x12 -#define MX35_CHIP_REV_1_3 0x13 -#define MX35_CHIP_REV_2_0 0x20 -#define MX35_CHIP_REV_2_1 0x21 -#define MX35_CHIP_REV_2_2 0x22 -#define MX35_CHIP_REV_2_3 0x23 -#define MX35_CHIP_REV_3_0 0x30 -#define MX35_CHIP_REV_3_1 0x31 -#define MX35_CHIP_REV_3_2 0x32 - -#define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0 +#define MX35_SYSTEM_REV_MIN MX3x_CHIP_REV_1_0 #define MX35_SYSTEM_REV_NUM 3 #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index d41ad68c1315..d1bd26d7b8a6 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h @@ -240,7 +240,7 @@ #define MX3x_PROD_SIGNATURE 0x1 /* For MX31 */ -/* silicon revisions specific to i.MX31 */ +/* silicon revisions specific to i.MX31 and i.MX35 */ #define MX3x_CHIP_REV_1_0 0x10 #define MX3x_CHIP_REV_1_1 0x11 #define MX3x_CHIP_REV_1_2 0x12 @@ -267,6 +267,14 @@ static inline int mx31_revision(void) { return mx31_cpu_rev; } + +extern unsigned int mx35_cpu_rev; +extern void mx35_read_cpu_rev(void); + +static inline int mx35_revision(void) +{ + return mx35_cpu_rev; +} #endif #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS From 8a8d20600dce01553c8505b7c576f8d4307e4ba8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 8 Oct 2010 16:00:11 +0200 Subject: [PATCH 63/72] ARM: imx: fix/define clocks and create devices for imx dma MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/clock-imx31.c | 4 +- arch/arm/mach-mx3/clock-imx35.c | 2 +- arch/arm/mach-mx5/clock-mx51.c | 5 + arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-imx-dma.c | 129 +++++++++++++++++++ arch/arm/plat-mxc/include/mach/mx51.h | 2 +- 6 files changed, 139 insertions(+), 4 deletions(-) create mode 100644 arch/arm/plat-mxc/devices/platform-imx-dma.c diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c index 18e98f1d4de0..109e98f323e0 100644 --- a/arch/arm/mach-mx3/clock-imx31.c +++ b/arch/arm/mach-mx3/clock-imx31.c @@ -477,7 +477,7 @@ DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk); +DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk); DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk); @@ -564,7 +564,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "ata", ata_clk) _REGISTER_CLOCK(NULL, "rtic", rtic_clk) _REGISTER_CLOCK(NULL, "rng", rng_clk) - _REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1) + _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk1) _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2) _REGISTER_CLOCK(NULL, "mstick", mstick1_clk) _REGISTER_CLOCK(NULL, "mstick", mstick2_clk) diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index 9a1009884164..61e4a318980a 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -482,7 +482,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "rtc", rtc_clk) _REGISTER_CLOCK(NULL, "rtic", rtic_clk) _REGISTER_CLOCK(NULL, "scc", scc_clk) - _REGISTER_CLOCK(NULL, "sdma", sdma_clk) + _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) _REGISTER_CLOCK(NULL, "spba", spba_clk) _REGISTER_CLOCK(NULL, "spdif", spdif_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index e6c17d78189c..21cecc040172 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -977,6 +977,10 @@ DEFINE_CLOCK(cspi_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET, DEFINE_CLOCK(cspi_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG13_OFFSET, NULL, NULL, &ipg_clk, &cspi_ipg_clk); +/* SDMA */ +DEFINE_CLOCK(sdma_clk, 1, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG15_OFFSET, + NULL, NULL, &ahb_clk, NULL); + #define _REGISTER_CLOCK(d, n, c) \ { \ .dev_id = d, \ @@ -1003,6 +1007,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) _REGISTER_CLOCK(NULL, "ckih", ckih_clk) _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk) _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk) diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index da9676e80e8d..cd0bf756c3f8 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o +obj-y += platform-imx-dma.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c new file mode 100644 index 000000000000..02d989018059 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -0,0 +1,129 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include +#include + +#include +#include +#ifdef SDMA_IS_MERGED +#include +#else +struct sdma_platform_data { + int sdma_version; + char *cpu_name; + int to_version; +}; +#endif + +struct imx_imx_sdma_data { + resource_size_t iobase; + resource_size_t irq; + struct sdma_platform_data pdata; +}; + +#define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ + { \ + .iobase = soc ## _SDMA ## _BASE_ADDR, \ + .irq = soc ## _INT_SDMA, \ + .pdata = { \ + .sdma_version = _sdma_version, \ + .cpu_name = _cpu_name, \ + .to_version = _to_version, \ + }, \ + } + +#ifdef CONFIG_ARCH_MX25 +const struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_ARCH_MX31 +struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = + imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); +#endif /* ifdef CONFIG_ARCH_MX31 */ + +#ifdef CONFIG_ARCH_MX35 +struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = + imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); +#endif /* ifdef CONFIG_ARCH_MX35 */ + +#ifdef CONFIG_ARCH_MX51 +const struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0); +#endif /* ifdef CONFIG_ARCH_MX51 */ + +static struct platform_device __init __maybe_unused *imx_add_imx_sdma( + const struct imx_imx_sdma_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx-sdma", -1, + res, ARRAY_SIZE(res), + &data->pdata, sizeof(data->pdata)); +} + +static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) +{ + return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); +} + +static int __init imxXX_add_imx_dma(void) +{ + struct platform_device *ret; + +#if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) + if (cpu_is_mx21() || cpu_is_mx27()) + ret = imx_add_imx_dma(); + else +#endif + +#if defined(CONFIG_ARCH_MX25) + if (cpu_is_mx25()) + ret = imx_add_imx_sdma(&imx25_imx_sdma_data); + else +#endif + +#if defined(CONFIG_ARCH_MX31) + if (cpu_is_mx31()) { + imx31_imx_sdma_data.pdata.to_version = mx31_revision() >> 4; + ret = imx_add_imx_sdma(&imx31_imx_sdma_data); + } else +#endif + +#if defined(CONFIG_ARCH_MX35) + if (cpu_is_mx35()) { + imx35_imx_sdma_data.pdata.to_version = mx35_revision() >> 4; + ret = imx_add_imx_sdma(&imx35_imx_sdma_data); + } else +#endif + +#if defined(CONFIG_ARCH_MX51) + if (cpu_is_mx51()) + ret = imx_add_imx_sdma(&imx51_imx_sdma_data); + else +#endif + ret = ERR_PTR(-ENODEV); + + if (IS_ERR(ret)) + return PTR_ERR(ret); + + return 0; +} +arch_initcall(imxXX_add_imx_dma); diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index c99eeab6fe09..1906ee5a5497 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -285,7 +285,7 @@ #define MX51_MXC_INT_MMC_SDHC3 3 #define MX51_MXC_INT_MMC_SDHC4 4 #define MX51_MXC_INT_RESV5 5 -#define MX51_MXC_INT_SDMA 6 +#define MX51_INT_SDMA 6 #define MX51_MXC_INT_IOMUX 7 #define MX51_INT_NFC 8 #define MX51_MXC_INT_VPU 9 From 6bd96f3c332d422c0dda302f1b32c8e21dd75ee3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 6 Oct 2010 12:00:18 +0200 Subject: [PATCH 64/72] ARM: imx: dynamically register fec devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/devices-imx27.h | 4 ++ arch/arm/mach-imx/devices.c | 21 ------- arch/arm/mach-imx/devices.h | 1 - arch/arm/mach-imx/mach-cpuimx27.c | 2 +- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 +- arch/arm/mach-imx/mach-imx27lite.c | 6 +- arch/arm/mach-imx/mach-mx27_3ds.c | 6 +- arch/arm/mach-imx/mach-mx27ads.c | 2 +- arch/arm/mach-imx/mach-mxt_td60.c | 7 +-- arch/arm/mach-imx/mach-pca100.c | 2 +- arch/arm/mach-imx/mach-pcm038.c | 2 +- arch/arm/mach-mx25/devices-imx25.h | 4 ++ arch/arm/mach-mx25/devices.c | 20 ------- arch/arm/mach-mx25/devices.h | 1 - arch/arm/mach-mx25/mach-cpuimx25.c | 5 +- arch/arm/mach-mx25/mach-mx25_3ds.c | 5 +- arch/arm/mach-mx3/devices-imx35.h | 4 ++ arch/arm/mach-mx3/devices.c | 21 ------- arch/arm/mach-mx3/devices.h | 1 - arch/arm/mach-mx3/mach-cpuimx35.c | 2 +- arch/arm/mach-mx3/mach-mx35_3ds.c | 2 +- arch/arm/mach-mx3/mach-pcm043.c | 2 +- arch/arm/mach-mx5/board-cpuimx51.c | 2 +- arch/arm/mach-mx5/board-mx51_babbage.c | 6 +- arch/arm/mach-mx5/devices-imx51.h | 4 ++ arch/arm/mach-mx5/devices.c | 19 ------ arch/arm/mach-mx5/devices.h | 1 - arch/arm/plat-mxc/devices/Kconfig | 4 ++ arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-fec.c | 58 +++++++++++++++++++ .../plat-mxc/include/mach/devices-common.h | 9 +++ arch/arm/plat-mxc/include/mach/mx51.h | 4 +- 32 files changed, 107 insertions(+), 123 deletions(-) create mode 100644 arch/arm/plat-mxc/devices/platform-fec.c diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index e11606b4d31c..7011690364f2 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -9,6 +9,10 @@ #include #include +extern const struct imx_fec_data imx27_fec_data __initconst; +#define imx27_add_fec(pdata) \ + imx_add_fec(&imx27_fec_data, pdata) + extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; #define imx27_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 423fa05dabd0..fba5047de8b1 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -314,27 +314,6 @@ struct platform_device mxc_fb_device = { }, }; -#ifdef CONFIG_MACH_MX27 -static struct resource mxc_fec_resources[] = { - { - .start = MX27_FEC_BASE_ADDR, - .end = MX27_FEC_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MX27_INT_FEC, - .end = MX27_INT_FEC, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_fec_device = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fec_resources), - .resource = mxc_fec_resources, -}; -#endif - static struct resource mxc_pwm_resources[] = { { .start = MX2x_PWM_BASE_ADDR, diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 57d4b1cac039..807f02a031c9 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -16,7 +16,6 @@ extern struct platform_device mxc_gpt5; extern struct platform_device mxc_wdt; extern struct platform_device mxc_w1_master_device; extern struct platform_device mxc_fb_device; -extern struct platform_device mxc_fec_device; extern struct platform_device mxc_pwm_device; extern struct platform_device mxc_sdhc_device0; extern struct platform_device mxc_sdhc_device1; diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index d4cb592ffaed..28f73a1c79f7 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -157,7 +157,6 @@ cpuimx27_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &eukrea_cpuimx27_nor_mtd_device, - &mxc_fec_device, &mxc_wdt, &mxc_w1_master_device, }; @@ -261,6 +260,7 @@ static void __init eukrea_cpuimx27_init(void) imx27_add_imx_i2c(1, &cpuimx27_i2c1_data); + imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 21904f32740c..a0d78faa08e8 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -185,7 +185,6 @@ static struct platform_device visstrim_m10_nor_mtd_device = { static struct platform_device *platform_devices[] __initdata = { &visstrim_gpio_keys_device, &visstrim_m10_nor_mtd_device, - &mxc_fec_device, }; /* Visstrim_M10 uses UART0 as console */ @@ -240,6 +239,7 @@ static void __init visstrim_m10_board_init(void) imx27_add_imx_i2c(1, &visstrim_m10_i2c_data); mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata); mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); + imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 67480b639e2c..60d4d0ac4939 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c @@ -58,16 +58,12 @@ static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; -static struct platform_device *platform_devices[] __initdata = { - &mxc_fec_device, -}; - static void __init mx27lite_init(void) { mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), "imx27lite"); imx27_add_imx_uart0(&uart_pdata); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_fec(NULL); } static void __init mx27lite_timer_init(void) diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 9f6832d5f7f7..a69dba252658 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -64,10 +64,6 @@ static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; -static struct platform_device *platform_devices[] __initdata = { - &mxc_fec_device, -}; - /* * Matrix keyboard */ @@ -94,7 +90,7 @@ static void __init mx27pdk_init(void) mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), "mx27pdk"); imx27_add_imx_uart0(&uart_pdata); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_fec(NULL); mxc_register_device(&imx_kpp_device, &mx27_3ds_keymap_data); } diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 1a33288787a8..ffb39a42f240 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -284,7 +284,6 @@ static struct imxmmc_platform_data sdhc2_pdata = { static struct platform_device *platform_devices[] __initdata = { &mx27ads_nor_mtd_device, - &mxc_fec_device, &mxc_w1_master_device, }; @@ -313,6 +312,7 @@ static void __init mx27ads_board_init(void) mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); + imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 58fb0d653981..f4c397dec794 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -231,10 +231,6 @@ static struct imxmmc_platform_data sdhc1_pdata = { .exit = mxt_td60_sdhc1_exit, }; -static struct platform_device *platform_devices[] __initdata = { - &mxc_fec_device, -}; - static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -259,8 +255,7 @@ static void __init mxt_td60_board_init(void) imx27_add_imx_i2c(1, &mxt_td60_i2c1_data); mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); - - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_fec(NULL); } static void __init mxt_td60_timer_init(void) diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 1247ce9dabad..223c31c48db6 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -173,7 +173,6 @@ pca100_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &mxc_w1_master_device, - &mxc_fec_device, &mxc_wdt, }; @@ -433,6 +432,7 @@ static void __init pca100_init(void) mxc_register_device(&mxc_fb_device, &pca100_fb_data); + imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 3fbed661f612..b9888a8defc1 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -173,7 +173,6 @@ pcm038_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &pcm038_nor_mtd_device, &mxc_w1_master_device, - &mxc_fec_device, &pcm038_sram_mtd_device, &mxc_wdt, }; @@ -325,6 +324,7 @@ static void __init pcm038_init(void) mxc_register_device(&mxc_usbh2, &usbh2_pdata); + imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); #ifdef CONFIG_MACH_PCM970_BASEBOARD diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index fa7e05088e25..733aaee5bae8 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -9,6 +9,10 @@ #include #include +extern const struct imx_fec_data imx25_fec_data __initconst; +#define imx25_add_fec(pdata) \ + imx_add_fec(&imx25_fec_data, pdata) + #define imx25_add_flexcan0(pdata) \ imx_add_flexcan(0, MX25_CAN1_BASE_ADDR, SZ_16K, MX25_INT_CAN1, pdata) #define imx25_add_flexcan1(pdata) \ diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index bc19e8cc26df..1d0eb3e85941 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c @@ -208,26 +208,6 @@ int __init imx25_register_gpios(void) return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); } -static struct resource mx25_fec_resources[] = { - { - .start = MX25_FEC_BASE_ADDR, - .end = MX25_FEC_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, - { - .start = MX25_INT_FEC, - .end = MX25_INT_FEC, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mx25_fec_device = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(mx25_fec_resources), - .resource = mx25_fec_resources, -}; - static struct resource mx25_rtc_resources[] = { { .start = MX25_DRYICE_BASE_ADDR, diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index f6e6d3a5f640..7b70a43c3a4b 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h @@ -6,7 +6,6 @@ extern struct platform_device mxc_pwm_device1; extern struct platform_device mxc_pwm_device2; extern struct platform_device mxc_pwm_device3; extern struct platform_device mxc_keypad_device; -extern struct platform_device mx25_fec_device; extern struct platform_device mx25_rtc_device; extern struct platform_device mx25_fb_device; extern struct platform_device mxc_wdt; diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c index e064bb3d6919..21d9b9e9c92c 100644 --- a/arch/arm/mach-mx25/mach-cpuimx25.c +++ b/arch/arm/mach-mx25/mach-cpuimx25.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -67,7 +66,7 @@ static struct pad_desc eukrea_cpuimx25_pads[] = { MX25_PAD_I2C1_DAT__I2C1_DAT, }; -static struct fec_platform_data mx25_fec_pdata = { +static const struct fec_platform_data mx25_fec_pdata __initconst = { .phy = PHY_INTERFACE_MODE_RMII, }; @@ -129,7 +128,7 @@ static void __init eukrea_cpuimx25_init(void) imx25_add_imx_uart0(&uart_pdata); imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info); mxc_register_device(&mx25_rtc_device, NULL); - mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); + imx25_add_fec(&mx25_fec_pdata); i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices, ARRAY_SIZE(eukrea_cpuimx25_i2c_devices)); diff --git a/arch/arm/mach-mx25/mach-mx25_3ds.c b/arch/arm/mach-mx25/mach-mx25_3ds.c index 62bc21f11a71..bd1805698631 100644 --- a/arch/arm/mach-mx25/mach-mx25_3ds.c +++ b/arch/arm/mach-mx25/mach-mx25_3ds.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include @@ -99,7 +98,7 @@ static struct pad_desc mx25pdk_pads[] = { MX25_PAD_KPP_COL3__KPP_COL3, }; -static struct fec_platform_data mx25_fec_pdata = { +static const struct fec_platform_data mx25_fec_pdata __initconst = { .phy = PHY_INTERFACE_MODE_RMII, }; @@ -192,7 +191,7 @@ static void __init mx25pdk_init(void) mxc_register_device(&mxc_wdt, NULL); mx25pdk_fec_reset(); - mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); + imx25_add_fec(&mx25_fec_pdata); mxc_register_device(&mx25_kpp_device, &mx25pdk_keymap_data); } diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index 766008451ccd..509b346b7fef 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -9,6 +9,10 @@ #include #include +extern const struct imx_fec_data imx35_fec_data __initconst; +#define imx35_add_fec(pdata) \ + imx_add_fec(&imx35_fec_data, pdata) + #define imx35_add_flexcan0(pdata) \ imx_add_flexcan(0, MX35_CAN1_BASE_ADDR, SZ_16K, MX35_INT_CAN1, pdata) #define imx35_add_flexcan1(pdata) \ diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 87a9a21457b9..f4dff11aaee7 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -281,27 +281,6 @@ struct platform_device mxc_usbh2 = { .num_resources = ARRAY_SIZE(mxc_usbh2_resources), }; -#if defined(CONFIG_ARCH_MX35) -static struct resource mxc_fec_resources[] = { - { - .start = MXC_FEC_BASE_ADDR, - .end = MXC_FEC_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_FEC, - .end = MXC_INT_FEC, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_fec_device = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fec_resources), - .resource = mxc_fec_resources, -}; -#endif - static struct resource imx_wdt_resources[] = { { .flags = IORESOURCE_MEM, diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index 2a69465bc542..585f814473d5 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h @@ -2,7 +2,6 @@ extern struct platform_device mxc_w1_master_device; extern struct platform_device mx3_ipu; extern struct platform_device mx3_fb; extern struct platform_device mx3_camera; -extern struct platform_device mxc_fec_device; extern struct platform_device mxcsdhc_device0; extern struct platform_device mxcsdhc_device1; extern struct platform_device mxc_otg_udc_device; diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c index ea0a85f1c9aa..781ab4694a0f 100644 --- a/arch/arm/mach-mx3/mach-cpuimx35.c +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -76,7 +76,6 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { }; static struct platform_device *devices[] __initdata = { - &mxc_fec_device, &imx_wdt_device0, }; @@ -158,6 +157,7 @@ static void __init mxc_board_init(void) mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, ARRAY_SIZE(eukrea_cpuimx35_pads)); + imx35_add_fec(NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); imx35_add_imx_uart0(&uart_pdata); diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index 1dd7baae4507..91bb06552af1 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -74,7 +74,6 @@ static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = }; static struct platform_device *devices[] __initdata = { - &mxc_fec_device, &mx35pdk_flash, }; @@ -131,6 +130,7 @@ static void __init mxc_board_init(void) { mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); + imx35_add_fec(NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); imx35_add_imx_uart0(&uart_pdata); diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index c427b3c35ca7..e790a00cf99f 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c @@ -140,7 +140,6 @@ static struct i2c_board_info pcm043_i2c_devices[] = { static struct platform_device *devices[] __initdata = { &pcm043_flash, - &mxc_fec_device, &imx_wdt_device0, }; @@ -363,6 +362,7 @@ static void __init mxc_board_init(void) MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */ MXC_AUDMUX_V2_PDCR_RXDSEL(3)); + imx35_add_fec(NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); imx35_add_imx_uart0(&uart_pdata); diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index a6c09c7ff728..61f051043bbc 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -108,7 +108,6 @@ static struct platform_device serial_device = { #endif static struct platform_device *devices[] __initdata = { - &mxc_fec_device, #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) &serial_device, #endif @@ -253,6 +252,7 @@ static void __init eukrea_cpuimx51_init(void) gpio_direction_input(CPUIMX51_QUARTD_GPIO); gpio_free(CPUIMX51_QUARTD_GPIO); + imx51_add_fec(NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); imx51_add_imx_i2c(1, &eukrea_cpuimx51_i2c_data); diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 7c0b6618a164..23ee4a447406 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -46,10 +46,6 @@ #define MX51_USB_PLL_DIV_19_2_MHZ 0x01 #define MX51_USB_PLL_DIV_24_MHZ 0x02 -static struct platform_device *devices[] __initdata = { - &mxc_fec_device, -}; - static struct pad_desc mx51babbage_pads[] = { /* UART1 */ MX51_PAD_UART1_RXD__UART1_RXD, @@ -290,7 +286,7 @@ static void __init mxc_board_init(void) ARRAY_SIZE(mx51babbage_pads)); mxc_init_imx_uart(); babbage_fec_reset(); - platform_add_devices(devices, ARRAY_SIZE(devices)); + imx51_add_fec(NULL); imx51_add_imx_i2c(0, &babbage_i2c_data); imx51_add_imx_i2c(1, &babbage_i2c_data); diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index 41d93c3d7d0b..c233379256b8 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -9,6 +9,10 @@ #include #include +extern const struct imx_fec_data imx51_fec_data __initconst; +#define imx51_add_fec(pdata) \ + imx_add_fec(&imx51_fec_data, pdata) + extern const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst; #define imx51_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 5f40082d9e61..4c7be87a7c9d 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c @@ -17,25 +17,6 @@ #include #include -static struct resource mxc_fec_resources[] = { - { - .start = MX51_MXC_FEC_BASE_ADDR, - .end = MX51_MXC_FEC_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, { - .start = MX51_MXC_INT_FEC, - .end = MX51_MXC_INT_FEC, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_fec_device = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fec_resources), - .resource = mxc_fec_resources, -}; - static struct resource mxc_hsi2c_resources[] = { { .start = MX51_HSI2C_DMA_BASE_ADDR, diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index 67a6d6910530..af1d07c0bbc1 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h @@ -1,4 +1,3 @@ -extern struct platform_device mxc_fec_device; extern struct platform_device mxc_usbdr_host_device; extern struct platform_device mxc_usbh1_device; extern struct platform_device mxc_usbdr_udc_device; diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 8266ecb6933e..404799487f17 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -1,6 +1,10 @@ config IMX_HAVE_PLATFORM_ESDHC bool +config IMX_HAVE_PLATFORM_FEC + bool + default y if ARCH_MX25 || SOC_IMX27 || ARCH_MX35 || ARCH_MX51 + config IMX_HAVE_PLATFORM_FLEXCAN select HAVE_CAN_FLEXCAN bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index cd0bf756c3f8..0a3c1f089413 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -1,4 +1,5 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-y += platform-imx-dma.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c new file mode 100644 index 000000000000..11d087f4e219 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-fec.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include +#include + +#define imx_fec_data_entry_single(soc) \ + { \ + .iobase = soc ## _FEC_BASE_ADDR, \ + .irq = soc ## _INT_FEC, \ + } + +#ifdef CONFIG_ARCH_MX25 +const struct imx_fec_data imx25_fec_data __initconst = + imx_fec_data_entry_single(MX25); +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_fec_data imx27_fec_data __initconst = + imx_fec_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_fec_data imx35_fec_data __initconst = + imx_fec_data_entry_single(MX35); +#endif + +#ifdef CONFIG_ARCH_MX51 +const struct imx_fec_data imx51_fec_data __initconst = + imx_fec_data_entry_single(MX51); +#endif + +struct platform_device *__init imx_add_fec( + const struct imx_fec_data *data, + const struct fec_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("fec", 0 /* -1? */, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index f75446fa97eb..049897880403 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -14,6 +14,15 @@ struct platform_device *imx_add_platform_device(const char *name, int id, const struct resource *res, unsigned int num_resources, const void *data, size_t size_data); +#include +struct imx_fec_data { + resource_size_t iobase; + resource_size_t irq; +}; +struct platform_device *__init imx_add_fec( + const struct imx_fec_data *data, + const struct fec_platform_data *pdata); + #include struct platform_device *__init imx_add_flexcan(int id, resource_size_t iobase, resource_size_t iosize, diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 1906ee5a5497..c54b5c32d82e 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -140,7 +140,7 @@ #define MX51_ATA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe0000) #define MX51_SIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe4000) #define MX51_SSI3BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe8000) -#define MX51_MXC_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xec000) +#define MX51_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xec000) #define MX51_TVE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf0000) #define MX51_VPU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf4000) #define MX51_SAHARA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf8000) @@ -366,7 +366,7 @@ #define MX51_MXC_INT_GPU2_IRQ 84 #define MX51_MXC_INT_GPU2_BUSY 85 #define MX51_MXC_INT_RESV86 86 -#define MX51_MXC_INT_FEC 87 +#define MX51_INT_FEC 87 #define MX51_MXC_INT_OWIRE 88 #define MX51_MXC_INT_CTI1_TG2 89 #define MX51_MXC_INT_SJC 90 From 55fd2ef6d9e9f40f30d891e01f2f565552e688fa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 6 Oct 2010 12:00:19 +0200 Subject: [PATCH 65/72] ARM: mx3/cpuimx35: mark otg_pdata and usbh1_pdata as maybe unused MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes arch/arm/mach-mx3/mach-cpuimx35.c:143: warning: 'otg_pdata' defined but not used arch/arm/mach-mx3/mach-cpuimx35.c:148: warning: 'usbh1_pdata' defined but not used when USB_ULPI is not selected. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/mach-cpuimx35.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c index 781ab4694a0f..6024bb958eea 100644 --- a/arch/arm/mach-mx3/mach-cpuimx35.c +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -118,12 +118,12 @@ static const struct mxc_nand_platform_data .flash_bbt = 1, }; -static struct mxc_usbh_platform_data otg_pdata = { +static struct mxc_usbh_platform_data __maybe_unused otg_pdata = { .portsc = MXC_EHCI_MODE_UTMI, .flags = MXC_EHCI_INTERFACE_DIFF_UNI, }; -static struct mxc_usbh_platform_data usbh1_pdata = { +static struct mxc_usbh_platform_data __maybe_unused usbh1_pdata = { .portsc = MXC_EHCI_MODE_SERIAL, .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN, From 9524705c867dc8d5b558f4793b7464eab967a530 Mon Sep 17 00:00:00 2001 From: Juergen Beisert Date: Wed, 22 Sep 2010 09:42:15 +0200 Subject: [PATCH 66/72] MX35: Fix bogus L2 cache settings i.MX35 CPUs marked with "MCIMX357CJQ5C M99V CTHA0943B" are coming with bogus L2 cache settings. If these settings are kept unmodified prior enabling the L2 cache the CPU runs amok immediately when its enabled. This fix should not hurt already working CPUs, as they are using the written register value already. Its currently unknown if its possible to detect the production lot from the software to fix only affected CPUs. While at it, make sure that mxc_init_l2x0 is only executed on i.MX31/35 Signed-off-by: Juergen Beisert Signed-off-by: Michael Grzeschik Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/mm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 20e48c0195c4..b4ffc531a82c 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c @@ -110,6 +110,24 @@ void __init mx35_init_irq(void) static int mxc_init_l2x0(void) { void __iomem *l2x0_base; + void __iomem *clkctl_base; +/* + * First of all, we must repair broken chip settings. There are some + * i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These + * misconfigured CPUs will run amok immediately when the L2 cache gets enabled. + * Workaraound is to setup the correct register setting prior enabling the + * L2 cache. This should not hurt already working CPUs, as they are using the + * same value + */ +#define L2_MEM_VAL 0x10 + + clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096); + if (clkctl_base != NULL) { + writel(0x00000515, clkctl_base + L2_MEM_VAL); + iounmap(clkctl_base); + } else { + pr_err("L2 cache: Cannot fix timing. Trying to continue without\n"); + } l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); if (IS_ERR(l2x0_base)) { From 886ab3dae2ba26bde5bab096c931365db9f49830 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Mon, 11 Oct 2010 15:02:06 +0200 Subject: [PATCH 67/72] mxc/gpio: make _set_value work with values != 0/1 Documentation/gpio.txt specifies that the value argument to gpio_set_value() should be handled as a boolean (E.G. != 0 is high), so use the same logic as in _set_direction(). Signed-off-by: Peter Korsgaard Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 57ec4a896a5d..9d38da077edb 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c @@ -235,7 +235,7 @@ static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value) unsigned long flags; spin_lock_irqsave(&port->lock, flags); - l = (__raw_readl(reg) & (~(1 << offset))) | (value << offset); + l = (__raw_readl(reg) & (~(1 << offset))) | (!!value << offset); __raw_writel(l, reg); spin_unlock_irqrestore(&port->lock, flags); } From 0d0e9cbf815a78d62889554826f7d06b323c2d06 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 11 Oct 2010 15:04:53 +0200 Subject: [PATCH 68/72] mx25/clocks: match esdhc-clocks to platform device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit So the correct clock will be taken for each of the two independent controllers. Signed-off-by: Wolfram Sang Cc: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/mach-mx25/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 25f37a9a0422..2179713873c2 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c @@ -299,8 +299,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk) _REGISTER_CLOCK(NULL, "audmux", audmux_clk) _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) From 4b5ee7a7689e3551f304b9154ecadbb0c3ae292f Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Sat, 9 Oct 2010 23:09:45 +0200 Subject: [PATCH 69/72] ARM: iomux-mx51: Add AUD5 pinmux definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx51.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index 633650d3f814..5160f1073ec9 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h @@ -334,11 +334,17 @@ typedef enum iomux_config { #define MX51_PAD_DISP2_DAT14__DISP2_DAT14 IOMUX_PAD(0x794, 0x38C, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT15__DISP2_DAT15 IOMUX_PAD(0x798, 0x390, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x79C, 0x394, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_SD1_CMD__AUD5_RXFS IOMUX_PAD(0x79C, 0x394, 1, 0x8e0, 1, NO_PAD_CTRL) #define MX51_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x7A0, 0x398, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_SD1_CLK__AUD5_RXC IOMUX_PAD(0x7A0, 0x398, 1, 0x8dc, 1, NO_PAD_CTRL) #define MX51_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x7A4, 0x39C, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_SD1_DATA0__AUD5_TXD IOMUX_PAD(0x7A4, 0x39C, 1, 0x8d8, 2, NO_PAD_CTRL) #define MX51_PAD_SD1_DATA1__SD1_DATA1 IOMUX_PAD(0x7A8, 0x3A0, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_SD1_DATA1__AUD5_RXD IOMUX_PAD(0x7A8, 0x3A0, 1, 0x8d4, 2, NO_PAD_CTRL) #define MX51_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x7AC, 0x3A4, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_SD1_DATA2__AUD5_TXC IOMUX_PAD(0x7AC, 0x3A4, 1, 0x8e4, 2, NO_PAD_CTRL) #define MX51_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x7B0, 0x3A8, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_SD1_DATA3__AUD5_TXFS IOMUX_PAD(0x7B0, 0x3A8, 1, 0x8e8, 2, NO_PAD_CTRL) #define MX51_PAD_GPIO_1_0__GPIO_1_0 IOMUX_PAD(0x7B4, 0x3AC, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO_1_1__GPIO_1_1 IOMUX_PAD(0x7B8, 0x3B0, 1, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_SD2_CMD__SD2_CMD IOMUX_PAD(0x7BC, 0x3B4, 0, 0x0, 0, NO_PAD_CTRL) From 6ff554e06869e970e6ef2c4d44ea43315917d22c Mon Sep 17 00:00:00 2001 From: David Jander Date: Fri, 8 Oct 2010 11:24:01 +0200 Subject: [PATCH 70/72] spi/imx: Support different fifo sizes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The i.MX51 ECSPI has a fifo size of 64 entries instead of 8 entries as found on the other cspi bus devices. Cc: Jason Wang Signed-off-by: David Jander Signed-off-by: Sascha Hauer Signed-off-by: Uwe Kleine-König Acked-by: Grant Likely Signed-off-by: Sascha Hauer --- drivers/spi/spi_imx.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 6bab2cfd93c1..55a38e2c6c13 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -77,6 +77,7 @@ struct spi_imx_devtype_data { void (*trigger)(struct spi_imx_data *); int (*rx_available)(struct spi_imx_data *); void (*reset)(struct spi_imx_data *); + unsigned int fifosize; }; struct spi_imx_data { @@ -541,6 +542,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .trigger = mx1_trigger, .rx_available = mx1_rx_available, .reset = mx1_reset, + .fifosize = 8, }, #endif #ifdef CONFIG_SPI_IMX_VER_0_0 @@ -550,6 +552,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .trigger = mx27_trigger, .rx_available = mx27_rx_available, .reset = spi_imx0_0_reset, + .fifosize = 8, }, #endif #ifdef CONFIG_SPI_IMX_VER_0_4 @@ -559,6 +562,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .trigger = mx31_trigger, .rx_available = mx31_rx_available, .reset = spi_imx0_4_reset, + .fifosize = 8, }, #endif #ifdef CONFIG_SPI_IMX_VER_0_7 @@ -568,6 +572,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .trigger = mx31_trigger, .rx_available = mx31_rx_available, .reset = spi_imx0_4_reset, + .fifosize = 8, }, #endif #ifdef CONFIG_SPI_IMX_VER_2_3 @@ -577,6 +582,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = { .trigger = spi_imx2_3_trigger, .rx_available = spi_imx2_3_rx_available, .reset = spi_imx2_3_reset, + .fifosize = 64, }, #endif }; @@ -596,7 +602,7 @@ static void spi_imx_chipselect(struct spi_device *spi, int is_active) static void spi_imx_push(struct spi_imx_data *spi_imx) { - while (spi_imx->txfifo < 8) { + while (spi_imx->txfifo < spi_imx->devtype_data.fifosize) { if (!spi_imx->count) break; spi_imx->tx(spi_imx); From 088d01b00e335230bc51be6ae396babb9767e9ea Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 7 Oct 2010 03:58:12 +0300 Subject: [PATCH 71/72] mx51: add support for genesi efikamx nettop Get serial port working for now Signed-off-by: Amit Kucheria Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 7 ++ arch/arm/mach-mx5/Makefile | 1 + arch/arm/mach-mx5/board-mx51_efikamx.c | 91 ++++++++++++++++++++++++++ 3 files changed, 99 insertions(+) create mode 100644 arch/arm/mach-mx5/board-mx51_efikamx.c diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 3a4c3b32a6e7..fad31cc5004b 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -49,4 +49,11 @@ config MACH_EUKREA_MBIMX51_BASEBOARD endchoice +config MACH_MX51_EFIKAMX + bool "Support MX51 Genesi Efika MX nettop" + select IMX_HAVE_PLATFORM_IMX_UART + help + Include support for Genesi Efika MX nettop. This includes specific + configurations for the board and its peripherals. + endif diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 86c66e7f52f3..d1aac9c3d33c 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o +obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c new file mode 100644 index 000000000000..4c921fc31816 --- /dev/null +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2010 Linaro Limited + * + * based on code from the following + * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved. + * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "devices-imx51.h" +#include "devices.h" + +static struct pad_desc mx51efikamx_pads[] = { + /* UART1 */ + MX51_PAD_UART1_RXD__UART1_RXD, + MX51_PAD_UART1_TXD__UART1_TXD, + MX51_PAD_UART1_RTS__UART1_RTS, + MX51_PAD_UART1_CTS__UART1_CTS, +}; + +/* Serial ports */ +#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) +static const struct imxuart_platform_data uart_pdata = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static inline void mxc_init_imx_uart(void) +{ + imx51_add_imx_uart(0, &uart_pdata); + imx51_add_imx_uart(1, &uart_pdata); + imx51_add_imx_uart(2, &uart_pdata); +} +#else /* !SERIAL_IMX */ +static inline void mxc_init_imx_uart(void) +{ +} +#endif /* SERIAL_IMX */ + +static void __init mxc_board_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, + ARRAY_SIZE(mx51efikamx_pads)); + mxc_init_imx_uart(); +} + +static void __init mx51_efikamx_timer_init(void) +{ + mx51_clocks_init(32768, 24000000, 22579200, 24576000); +} + +static struct sys_timer mxc_timer = { + .init = mx51_efikamx_timer_init, +}; + +MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") + /* Maintainer: Amit Kucheria */ + .phys_io = MX51_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = MX51_PHYS_OFFSET + 0x100, + .map_io = mx51_map_io, + .init_irq = mx51_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END From 81490fcdf406f42fff9d9f57d541788f90242885 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 7 Oct 2010 03:58:25 +0300 Subject: [PATCH 72/72] mx51: efikamx: add otg support Ethernet hangs off OTG Signed-off-by: Amit Kucheria Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx51_efikamx.c | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index 4c921fc31816..b00502acdc15 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -37,6 +37,8 @@ #include "devices-imx51.h" #include "devices.h" +#define MX51_USB_PLL_DIV_24_MHZ 0x01 + static struct pad_desc mx51efikamx_pads[] = { /* UART1 */ MX51_PAD_UART1_RXD__UART1_RXD, @@ -63,10 +65,38 @@ static inline void mxc_init_imx_uart(void) } #endif /* SERIAL_IMX */ +/* This function is board specific as the bit mask for the plldiv will also + * be different for other Freescale SoCs, thus a common bitmask is not + * possible and cannot get place in /plat-mxc/ehci.c. + */ +static int initialize_otg_port(struct platform_device *pdev) +{ + u32 v; + void __iomem *usb_base; + void __iomem *usbother_base; + usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); + usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); + + /* Set the PHY clock to 19.2MHz */ + v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); + v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK; + v |= MX51_USB_PLL_DIV_24_MHZ; + __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); + iounmap(usb_base); + return 0; +} + +static struct mxc_usbh_platform_data dr_utmi_config = { + .init = initialize_otg_port, + .portsc = MXC_EHCI_UTMI_16BIT, + .flags = MXC_EHCI_INTERNAL_PHY, +}; + static void __init mxc_board_init(void) { mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, ARRAY_SIZE(mx51efikamx_pads)); + mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); mxc_init_imx_uart(); }